Commit | Line | Data |
---|---|---|
c906108c | 1 | /* Target-dependent code for the ALPHA architecture, for GDB, the GNU Debugger. |
0fd88904 | 2 | |
6aba47ca | 3 | Copyright (C) 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, |
7b6bb8da JB |
4 | 2003, 2005, 2006, 2007, 2008, 2009, 2010, 2011 |
5 | Free Software Foundation, Inc. | |
c906108c | 6 | |
c5aa993b | 7 | This file is part of GDB. |
c906108c | 8 | |
c5aa993b JM |
9 | This program is free software; you can redistribute it and/or modify |
10 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 11 | the Free Software Foundation; either version 3 of the License, or |
c5aa993b | 12 | (at your option) any later version. |
c906108c | 13 | |
c5aa993b JM |
14 | This program is distributed in the hope that it will be useful, |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
c906108c | 18 | |
c5aa993b | 19 | You should have received a copy of the GNU General Public License |
a9762ec7 | 20 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
c906108c SS |
21 | |
22 | #include "defs.h" | |
615967cb | 23 | #include "doublest.h" |
c906108c | 24 | #include "frame.h" |
d2427a71 RH |
25 | #include "frame-unwind.h" |
26 | #include "frame-base.h" | |
baa490c4 | 27 | #include "dwarf2-frame.h" |
c906108c SS |
28 | #include "inferior.h" |
29 | #include "symtab.h" | |
30 | #include "value.h" | |
31 | #include "gdbcmd.h" | |
32 | #include "gdbcore.h" | |
33 | #include "dis-asm.h" | |
34 | #include "symfile.h" | |
35 | #include "objfiles.h" | |
36 | #include "gdb_string.h" | |
c5f0f3d0 | 37 | #include "linespec.h" |
4e052eda | 38 | #include "regcache.h" |
615967cb | 39 | #include "reggroups.h" |
dc129d82 | 40 | #include "arch-utils.h" |
4be87837 | 41 | #include "osabi.h" |
fe898f56 | 42 | #include "block.h" |
7d9b040b | 43 | #include "infcall.h" |
07ea644b | 44 | #include "trad-frame.h" |
dc129d82 JT |
45 | |
46 | #include "elf-bfd.h" | |
47 | ||
48 | #include "alpha-tdep.h" | |
49 | ||
3a48e6ff JG |
50 | /* Instruction decoding. The notations for registers, immediates and |
51 | opcodes are the same as the one used in Compaq's Alpha architecture | |
52 | handbook. */ | |
53 | ||
54 | #define INSN_OPCODE(insn) ((insn & 0xfc000000) >> 26) | |
55 | ||
56 | /* Memory instruction format */ | |
57 | #define MEM_RA(insn) ((insn & 0x03e00000) >> 21) | |
58 | #define MEM_RB(insn) ((insn & 0x001f0000) >> 16) | |
59 | #define MEM_DISP(insn) \ | |
60 | (((insn & 0x8000) == 0) ? (insn & 0xffff) : -((-insn) & 0xffff)) | |
61 | ||
62 | static const int lda_opcode = 0x08; | |
63 | static const int stq_opcode = 0x2d; | |
64 | ||
65 | /* Branch instruction format */ | |
66 | #define BR_RA(insn) MEM_RA(insn) | |
67 | ||
68 | static const int bne_opcode = 0x3d; | |
69 | ||
70 | /* Operate instruction format */ | |
71 | #define OPR_FUNCTION(insn) ((insn & 0xfe0) >> 5) | |
72 | #define OPR_HAS_IMMEDIATE(insn) ((insn & 0x1000) == 0x1000) | |
73 | #define OPR_RA(insn) MEM_RA(insn) | |
74 | #define OPR_RC(insn) ((insn & 0x1f)) | |
75 | #define OPR_LIT(insn) ((insn & 0x1fe000) >> 13) | |
76 | ||
77 | static const int subq_opcode = 0x10; | |
78 | static const int subq_function = 0x29; | |
79 | ||
c906108c | 80 | \f |
515921d7 JB |
81 | /* Return the name of the REGNO register. |
82 | ||
83 | An empty name corresponds to a register number that used to | |
0963b4bd | 84 | be used for a virtual register. That virtual register has |
515921d7 JB |
85 | been removed, but the index is still reserved to maintain |
86 | compatibility with existing remote alpha targets. */ | |
87 | ||
fa88f677 | 88 | static const char * |
d93859e2 | 89 | alpha_register_name (struct gdbarch *gdbarch, int regno) |
636a6dfc | 90 | { |
5ab84872 | 91 | static const char * const register_names[] = |
636a6dfc JT |
92 | { |
93 | "v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6", | |
94 | "t7", "s0", "s1", "s2", "s3", "s4", "s5", "fp", | |
95 | "a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9", | |
96 | "t10", "t11", "ra", "t12", "at", "gp", "sp", "zero", | |
97 | "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", | |
98 | "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", | |
99 | "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", | |
100 | "f24", "f25", "f26", "f27", "f28", "f29", "f30", "fpcr", | |
44d88583 | 101 | "pc", "", "unique" |
636a6dfc JT |
102 | }; |
103 | ||
104 | if (regno < 0) | |
5ab84872 | 105 | return NULL; |
e8d2d628 | 106 | if (regno >= ARRAY_SIZE(register_names)) |
5ab84872 RH |
107 | return NULL; |
108 | return register_names[regno]; | |
636a6dfc | 109 | } |
d734c450 | 110 | |
dc129d82 | 111 | static int |
64a3914f | 112 | alpha_cannot_fetch_register (struct gdbarch *gdbarch, int regno) |
d734c450 | 113 | { |
4a1be8d2 | 114 | return (strlen (alpha_register_name (gdbarch, regno)) == 0); |
d734c450 JT |
115 | } |
116 | ||
dc129d82 | 117 | static int |
64a3914f | 118 | alpha_cannot_store_register (struct gdbarch *gdbarch, int regno) |
d734c450 | 119 | { |
515921d7 | 120 | return (regno == ALPHA_ZERO_REGNUM |
64a3914f | 121 | || strlen (alpha_register_name (gdbarch, regno)) == 0); |
d734c450 JT |
122 | } |
123 | ||
dc129d82 | 124 | static struct type * |
c483c494 | 125 | alpha_register_type (struct gdbarch *gdbarch, int regno) |
0d056799 | 126 | { |
72667056 | 127 | if (regno == ALPHA_SP_REGNUM || regno == ALPHA_GP_REGNUM) |
0dfff4cb | 128 | return builtin_type (gdbarch)->builtin_data_ptr; |
72667056 | 129 | if (regno == ALPHA_PC_REGNUM) |
0dfff4cb | 130 | return builtin_type (gdbarch)->builtin_func_ptr; |
72667056 RH |
131 | |
132 | /* Don't need to worry about little vs big endian until | |
133 | some jerk tries to port to alpha-unicosmk. */ | |
b38b6be2 | 134 | if (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 31) |
27067745 | 135 | return builtin_type (gdbarch)->builtin_double; |
72667056 | 136 | |
df4df182 | 137 | return builtin_type (gdbarch)->builtin_int64; |
0d056799 | 138 | } |
f8453e34 | 139 | |
615967cb RH |
140 | /* Is REGNUM a member of REGGROUP? */ |
141 | ||
142 | static int | |
143 | alpha_register_reggroup_p (struct gdbarch *gdbarch, int regnum, | |
144 | struct reggroup *group) | |
145 | { | |
146 | /* Filter out any registers eliminated, but whose regnum is | |
147 | reserved for backward compatibility, e.g. the vfp. */ | |
ec7cc0e8 UW |
148 | if (gdbarch_register_name (gdbarch, regnum) == NULL |
149 | || *gdbarch_register_name (gdbarch, regnum) == '\0') | |
615967cb RH |
150 | return 0; |
151 | ||
df4a182b RH |
152 | if (group == all_reggroup) |
153 | return 1; | |
154 | ||
155 | /* Zero should not be saved or restored. Technically it is a general | |
156 | register (just as $f31 would be a float if we represented it), but | |
157 | there's no point displaying it during "info regs", so leave it out | |
158 | of all groups except for "all". */ | |
159 | if (regnum == ALPHA_ZERO_REGNUM) | |
160 | return 0; | |
161 | ||
162 | /* All other registers are saved and restored. */ | |
163 | if (group == save_reggroup || group == restore_reggroup) | |
615967cb RH |
164 | return 1; |
165 | ||
166 | /* All other groups are non-overlapping. */ | |
167 | ||
168 | /* Since this is really a PALcode memory slot... */ | |
169 | if (regnum == ALPHA_UNIQUE_REGNUM) | |
170 | return group == system_reggroup; | |
171 | ||
172 | /* Force the FPCR to be considered part of the floating point state. */ | |
173 | if (regnum == ALPHA_FPCR_REGNUM) | |
174 | return group == float_reggroup; | |
175 | ||
176 | if (regnum >= ALPHA_FP0_REGNUM && regnum < ALPHA_FP0_REGNUM + 31) | |
177 | return group == float_reggroup; | |
178 | else | |
179 | return group == general_reggroup; | |
180 | } | |
181 | ||
c483c494 RH |
182 | /* The following represents exactly the conversion performed by |
183 | the LDS instruction. This applies to both single-precision | |
184 | floating point and 32-bit integers. */ | |
185 | ||
186 | static void | |
e17a4113 | 187 | alpha_lds (struct gdbarch *gdbarch, void *out, const void *in) |
c483c494 | 188 | { |
e17a4113 UW |
189 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
190 | ULONGEST mem = extract_unsigned_integer (in, 4, byte_order); | |
c483c494 RH |
191 | ULONGEST frac = (mem >> 0) & 0x7fffff; |
192 | ULONGEST sign = (mem >> 31) & 1; | |
193 | ULONGEST exp_msb = (mem >> 30) & 1; | |
194 | ULONGEST exp_low = (mem >> 23) & 0x7f; | |
195 | ULONGEST exp, reg; | |
196 | ||
197 | exp = (exp_msb << 10) | exp_low; | |
198 | if (exp_msb) | |
199 | { | |
200 | if (exp_low == 0x7f) | |
201 | exp = 0x7ff; | |
202 | } | |
203 | else | |
204 | { | |
205 | if (exp_low != 0x00) | |
206 | exp |= 0x380; | |
207 | } | |
208 | ||
209 | reg = (sign << 63) | (exp << 52) | (frac << 29); | |
e17a4113 | 210 | store_unsigned_integer (out, 8, byte_order, reg); |
c483c494 RH |
211 | } |
212 | ||
213 | /* Similarly, this represents exactly the conversion performed by | |
214 | the STS instruction. */ | |
215 | ||
39efb398 | 216 | static void |
e17a4113 | 217 | alpha_sts (struct gdbarch *gdbarch, void *out, const void *in) |
c483c494 | 218 | { |
e17a4113 | 219 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
c483c494 RH |
220 | ULONGEST reg, mem; |
221 | ||
e17a4113 | 222 | reg = extract_unsigned_integer (in, 8, byte_order); |
c483c494 | 223 | mem = ((reg >> 32) & 0xc0000000) | ((reg >> 29) & 0x3fffffff); |
e17a4113 | 224 | store_unsigned_integer (out, 4, byte_order, mem); |
c483c494 RH |
225 | } |
226 | ||
d2427a71 RH |
227 | /* The alpha needs a conversion between register and memory format if the |
228 | register is a floating point register and memory format is float, as the | |
229 | register format must be double or memory format is an integer with 4 | |
230 | bytes or less, as the representation of integers in floating point | |
0963b4bd | 231 | registers is different. */ |
d2427a71 | 232 | |
c483c494 | 233 | static int |
0963b4bd MS |
234 | alpha_convert_register_p (struct gdbarch *gdbarch, int regno, |
235 | struct type *type) | |
14696584 | 236 | { |
83acabca DJ |
237 | return (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 31 |
238 | && TYPE_LENGTH (type) != 8); | |
14696584 RH |
239 | } |
240 | ||
8dccd430 | 241 | static int |
ff2e87ac | 242 | alpha_register_to_value (struct frame_info *frame, int regnum, |
8dccd430 PA |
243 | struct type *valtype, gdb_byte *out, |
244 | int *optimizedp, int *unavailablep) | |
5868c862 | 245 | { |
8dccd430 | 246 | struct gdbarch *gdbarch = get_frame_arch (frame); |
2a1ce6ec MK |
247 | gdb_byte in[MAX_REGISTER_SIZE]; |
248 | ||
8dccd430 PA |
249 | /* Convert to TYPE. */ |
250 | if (!get_frame_register_bytes (frame, regnum, 0, | |
251 | register_size (gdbarch, regnum), | |
252 | in, optimizedp, unavailablep)) | |
253 | return 0; | |
254 | ||
255 | if (TYPE_LENGTH (valtype) == 4) | |
d2427a71 | 256 | { |
8dccd430 PA |
257 | alpha_sts (gdbarch, out, in); |
258 | *optimizedp = *unavailablep = 0; | |
259 | return 1; | |
d2427a71 | 260 | } |
8dccd430 PA |
261 | |
262 | error (_("Cannot retrieve value from floating point register")); | |
d2427a71 | 263 | } |
5868c862 | 264 | |
d2427a71 | 265 | static void |
ff2e87ac | 266 | alpha_value_to_register (struct frame_info *frame, int regnum, |
5b819568 | 267 | struct type *valtype, const gdb_byte *in) |
d2427a71 | 268 | { |
2a1ce6ec MK |
269 | gdb_byte out[MAX_REGISTER_SIZE]; |
270 | ||
c483c494 | 271 | switch (TYPE_LENGTH (valtype)) |
d2427a71 | 272 | { |
c483c494 | 273 | case 4: |
e17a4113 | 274 | alpha_lds (get_frame_arch (frame), out, in); |
c483c494 | 275 | break; |
c483c494 | 276 | default: |
323e0a4a | 277 | error (_("Cannot store value in floating point register")); |
d2427a71 | 278 | } |
ff2e87ac | 279 | put_frame_register (frame, regnum, out); |
5868c862 JT |
280 | } |
281 | ||
d2427a71 RH |
282 | \f |
283 | /* The alpha passes the first six arguments in the registers, the rest on | |
c88e30c0 RH |
284 | the stack. The register arguments are stored in ARG_REG_BUFFER, and |
285 | then moved into the register file; this simplifies the passing of a | |
286 | large struct which extends from the registers to the stack, plus avoids | |
287 | three ptrace invocations per word. | |
288 | ||
289 | We don't bother tracking which register values should go in integer | |
290 | regs or fp regs; we load the same values into both. | |
291 | ||
d2427a71 RH |
292 | If the called function is returning a structure, the address of the |
293 | structure to be returned is passed as a hidden first argument. */ | |
c906108c | 294 | |
d2427a71 | 295 | static CORE_ADDR |
7d9b040b | 296 | alpha_push_dummy_call (struct gdbarch *gdbarch, struct value *function, |
c88e30c0 RH |
297 | struct regcache *regcache, CORE_ADDR bp_addr, |
298 | int nargs, struct value **args, CORE_ADDR sp, | |
299 | int struct_return, CORE_ADDR struct_addr) | |
c906108c | 300 | { |
e17a4113 | 301 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
d2427a71 RH |
302 | int i; |
303 | int accumulate_size = struct_return ? 8 : 0; | |
d2427a71 | 304 | struct alpha_arg |
c906108c | 305 | { |
f42a0a33 | 306 | const gdb_byte *contents; |
d2427a71 RH |
307 | int len; |
308 | int offset; | |
309 | }; | |
c88e30c0 RH |
310 | struct alpha_arg *alpha_args |
311 | = (struct alpha_arg *) alloca (nargs * sizeof (struct alpha_arg)); | |
52f0bd74 | 312 | struct alpha_arg *m_arg; |
2a1ce6ec | 313 | gdb_byte arg_reg_buffer[ALPHA_REGISTER_SIZE * ALPHA_NUM_ARG_REGS]; |
d2427a71 | 314 | int required_arg_regs; |
7d9b040b | 315 | CORE_ADDR func_addr = find_function_addr (function, NULL); |
c906108c | 316 | |
c88e30c0 RH |
317 | /* The ABI places the address of the called function in T12. */ |
318 | regcache_cooked_write_signed (regcache, ALPHA_T12_REGNUM, func_addr); | |
319 | ||
320 | /* Set the return address register to point to the entry point | |
321 | of the program, where a breakpoint lies in wait. */ | |
322 | regcache_cooked_write_signed (regcache, ALPHA_RA_REGNUM, bp_addr); | |
323 | ||
324 | /* Lay out the arguments in memory. */ | |
d2427a71 RH |
325 | for (i = 0, m_arg = alpha_args; i < nargs; i++, m_arg++) |
326 | { | |
327 | struct value *arg = args[i]; | |
4991999e | 328 | struct type *arg_type = check_typedef (value_type (arg)); |
c88e30c0 | 329 | |
d2427a71 RH |
330 | /* Cast argument to long if necessary as the compiler does it too. */ |
331 | switch (TYPE_CODE (arg_type)) | |
c906108c | 332 | { |
d2427a71 RH |
333 | case TYPE_CODE_INT: |
334 | case TYPE_CODE_BOOL: | |
335 | case TYPE_CODE_CHAR: | |
336 | case TYPE_CODE_RANGE: | |
337 | case TYPE_CODE_ENUM: | |
0ede8eca | 338 | if (TYPE_LENGTH (arg_type) == 4) |
d2427a71 | 339 | { |
0ede8eca RH |
340 | /* 32-bit values must be sign-extended to 64 bits |
341 | even if the base data type is unsigned. */ | |
df4df182 | 342 | arg_type = builtin_type (gdbarch)->builtin_int32; |
0ede8eca RH |
343 | arg = value_cast (arg_type, arg); |
344 | } | |
345 | if (TYPE_LENGTH (arg_type) < ALPHA_REGISTER_SIZE) | |
346 | { | |
df4df182 | 347 | arg_type = builtin_type (gdbarch)->builtin_int64; |
d2427a71 RH |
348 | arg = value_cast (arg_type, arg); |
349 | } | |
350 | break; | |
7b5e1cb3 | 351 | |
c88e30c0 RH |
352 | case TYPE_CODE_FLT: |
353 | /* "float" arguments loaded in registers must be passed in | |
354 | register format, aka "double". */ | |
355 | if (accumulate_size < sizeof (arg_reg_buffer) | |
356 | && TYPE_LENGTH (arg_type) == 4) | |
357 | { | |
27067745 | 358 | arg_type = builtin_type (gdbarch)->builtin_double; |
c88e30c0 RH |
359 | arg = value_cast (arg_type, arg); |
360 | } | |
361 | /* Tru64 5.1 has a 128-bit long double, and passes this by | |
362 | invisible reference. No one else uses this data type. */ | |
363 | else if (TYPE_LENGTH (arg_type) == 16) | |
364 | { | |
365 | /* Allocate aligned storage. */ | |
366 | sp = (sp & -16) - 16; | |
367 | ||
368 | /* Write the real data into the stack. */ | |
0fd88904 | 369 | write_memory (sp, value_contents (arg), 16); |
c88e30c0 RH |
370 | |
371 | /* Construct the indirection. */ | |
372 | arg_type = lookup_pointer_type (arg_type); | |
373 | arg = value_from_pointer (arg_type, sp); | |
374 | } | |
375 | break; | |
7b5e1cb3 RH |
376 | |
377 | case TYPE_CODE_COMPLEX: | |
378 | /* ??? The ABI says that complex values are passed as two | |
379 | separate scalar values. This distinction only matters | |
380 | for complex float. However, GCC does not implement this. */ | |
381 | ||
382 | /* Tru64 5.1 has a 128-bit long double, and passes this by | |
383 | invisible reference. */ | |
384 | if (TYPE_LENGTH (arg_type) == 32) | |
385 | { | |
386 | /* Allocate aligned storage. */ | |
387 | sp = (sp & -16) - 16; | |
388 | ||
389 | /* Write the real data into the stack. */ | |
0fd88904 | 390 | write_memory (sp, value_contents (arg), 32); |
7b5e1cb3 RH |
391 | |
392 | /* Construct the indirection. */ | |
393 | arg_type = lookup_pointer_type (arg_type); | |
394 | arg = value_from_pointer (arg_type, sp); | |
395 | } | |
396 | break; | |
397 | ||
d2427a71 RH |
398 | default: |
399 | break; | |
c906108c | 400 | } |
d2427a71 RH |
401 | m_arg->len = TYPE_LENGTH (arg_type); |
402 | m_arg->offset = accumulate_size; | |
403 | accumulate_size = (accumulate_size + m_arg->len + 7) & ~7; | |
f42a0a33 | 404 | m_arg->contents = value_contents (arg); |
c906108c SS |
405 | } |
406 | ||
d2427a71 RH |
407 | /* Determine required argument register loads, loading an argument register |
408 | is expensive as it uses three ptrace calls. */ | |
409 | required_arg_regs = accumulate_size / 8; | |
410 | if (required_arg_regs > ALPHA_NUM_ARG_REGS) | |
411 | required_arg_regs = ALPHA_NUM_ARG_REGS; | |
c906108c | 412 | |
d2427a71 | 413 | /* Make room for the arguments on the stack. */ |
c88e30c0 RH |
414 | if (accumulate_size < sizeof(arg_reg_buffer)) |
415 | accumulate_size = 0; | |
416 | else | |
417 | accumulate_size -= sizeof(arg_reg_buffer); | |
d2427a71 | 418 | sp -= accumulate_size; |
c906108c | 419 | |
c88e30c0 | 420 | /* Keep sp aligned to a multiple of 16 as the ABI requires. */ |
d2427a71 | 421 | sp &= ~15; |
c906108c | 422 | |
d2427a71 RH |
423 | /* `Push' arguments on the stack. */ |
424 | for (i = nargs; m_arg--, --i >= 0;) | |
c906108c | 425 | { |
f42a0a33 | 426 | const gdb_byte *contents = m_arg->contents; |
c88e30c0 RH |
427 | int offset = m_arg->offset; |
428 | int len = m_arg->len; | |
429 | ||
430 | /* Copy the bytes destined for registers into arg_reg_buffer. */ | |
431 | if (offset < sizeof(arg_reg_buffer)) | |
432 | { | |
433 | if (offset + len <= sizeof(arg_reg_buffer)) | |
434 | { | |
435 | memcpy (arg_reg_buffer + offset, contents, len); | |
436 | continue; | |
437 | } | |
438 | else | |
439 | { | |
440 | int tlen = sizeof(arg_reg_buffer) - offset; | |
441 | memcpy (arg_reg_buffer + offset, contents, tlen); | |
442 | offset += tlen; | |
443 | contents += tlen; | |
444 | len -= tlen; | |
445 | } | |
446 | } | |
447 | ||
448 | /* Everything else goes to the stack. */ | |
449 | write_memory (sp + offset - sizeof(arg_reg_buffer), contents, len); | |
c906108c | 450 | } |
c88e30c0 | 451 | if (struct_return) |
e17a4113 UW |
452 | store_unsigned_integer (arg_reg_buffer, ALPHA_REGISTER_SIZE, |
453 | byte_order, struct_addr); | |
c906108c | 454 | |
d2427a71 RH |
455 | /* Load the argument registers. */ |
456 | for (i = 0; i < required_arg_regs; i++) | |
457 | { | |
09cc52fd RH |
458 | regcache_cooked_write (regcache, ALPHA_A0_REGNUM + i, |
459 | arg_reg_buffer + i*ALPHA_REGISTER_SIZE); | |
460 | regcache_cooked_write (regcache, ALPHA_FPA0_REGNUM + i, | |
461 | arg_reg_buffer + i*ALPHA_REGISTER_SIZE); | |
d2427a71 | 462 | } |
c906108c | 463 | |
09cc52fd RH |
464 | /* Finally, update the stack pointer. */ |
465 | regcache_cooked_write_signed (regcache, ALPHA_SP_REGNUM, sp); | |
466 | ||
c88e30c0 | 467 | return sp; |
c906108c SS |
468 | } |
469 | ||
5ec2bb99 RH |
470 | /* Extract from REGCACHE the value about to be returned from a function |
471 | and copy it into VALBUF. */ | |
d2427a71 | 472 | |
dc129d82 | 473 | static void |
5ec2bb99 | 474 | alpha_extract_return_value (struct type *valtype, struct regcache *regcache, |
5b819568 | 475 | gdb_byte *valbuf) |
140f9984 | 476 | { |
e17a4113 UW |
477 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
478 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
7b5e1cb3 | 479 | int length = TYPE_LENGTH (valtype); |
2a1ce6ec | 480 | gdb_byte raw_buffer[ALPHA_REGISTER_SIZE]; |
5ec2bb99 RH |
481 | ULONGEST l; |
482 | ||
483 | switch (TYPE_CODE (valtype)) | |
484 | { | |
485 | case TYPE_CODE_FLT: | |
7b5e1cb3 | 486 | switch (length) |
5ec2bb99 RH |
487 | { |
488 | case 4: | |
489 | regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, raw_buffer); | |
e17a4113 | 490 | alpha_sts (gdbarch, valbuf, raw_buffer); |
5ec2bb99 RH |
491 | break; |
492 | ||
493 | case 8: | |
494 | regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf); | |
495 | break; | |
496 | ||
24064b5c RH |
497 | case 16: |
498 | regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &l); | |
499 | read_memory (l, valbuf, 16); | |
500 | break; | |
501 | ||
5ec2bb99 | 502 | default: |
0963b4bd MS |
503 | internal_error (__FILE__, __LINE__, |
504 | _("unknown floating point width")); | |
5ec2bb99 RH |
505 | } |
506 | break; | |
507 | ||
7b5e1cb3 RH |
508 | case TYPE_CODE_COMPLEX: |
509 | switch (length) | |
510 | { | |
511 | case 8: | |
512 | /* ??? This isn't correct wrt the ABI, but it's what GCC does. */ | |
513 | regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf); | |
514 | break; | |
515 | ||
516 | case 16: | |
517 | regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf); | |
2a1ce6ec | 518 | regcache_cooked_read (regcache, ALPHA_FP0_REGNUM + 1, valbuf + 8); |
7b5e1cb3 RH |
519 | break; |
520 | ||
521 | case 32: | |
522 | regcache_cooked_read_signed (regcache, ALPHA_V0_REGNUM, &l); | |
523 | read_memory (l, valbuf, 32); | |
524 | break; | |
525 | ||
526 | default: | |
0963b4bd MS |
527 | internal_error (__FILE__, __LINE__, |
528 | _("unknown floating point width")); | |
7b5e1cb3 RH |
529 | } |
530 | break; | |
531 | ||
5ec2bb99 RH |
532 | default: |
533 | /* Assume everything else degenerates to an integer. */ | |
534 | regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &l); | |
e17a4113 | 535 | store_unsigned_integer (valbuf, length, byte_order, l); |
5ec2bb99 RH |
536 | break; |
537 | } | |
140f9984 JT |
538 | } |
539 | ||
5ec2bb99 RH |
540 | /* Insert the given value into REGCACHE as if it was being |
541 | returned by a function. */ | |
0d056799 | 542 | |
d2427a71 | 543 | static void |
5ec2bb99 | 544 | alpha_store_return_value (struct type *valtype, struct regcache *regcache, |
5b819568 | 545 | const gdb_byte *valbuf) |
c906108c | 546 | { |
df4df182 | 547 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
d2427a71 | 548 | int length = TYPE_LENGTH (valtype); |
2a1ce6ec | 549 | gdb_byte raw_buffer[ALPHA_REGISTER_SIZE]; |
5ec2bb99 | 550 | ULONGEST l; |
d2427a71 | 551 | |
5ec2bb99 | 552 | switch (TYPE_CODE (valtype)) |
c906108c | 553 | { |
5ec2bb99 RH |
554 | case TYPE_CODE_FLT: |
555 | switch (length) | |
556 | { | |
557 | case 4: | |
e17a4113 | 558 | alpha_lds (gdbarch, raw_buffer, valbuf); |
f75d70cc RH |
559 | regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, raw_buffer); |
560 | break; | |
5ec2bb99 RH |
561 | |
562 | case 8: | |
563 | regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf); | |
564 | break; | |
565 | ||
24064b5c RH |
566 | case 16: |
567 | /* FIXME: 128-bit long doubles are returned like structures: | |
568 | by writing into indirect storage provided by the caller | |
569 | as the first argument. */ | |
323e0a4a | 570 | error (_("Cannot set a 128-bit long double return value.")); |
24064b5c | 571 | |
5ec2bb99 | 572 | default: |
0963b4bd MS |
573 | internal_error (__FILE__, __LINE__, |
574 | _("unknown floating point width")); | |
5ec2bb99 RH |
575 | } |
576 | break; | |
d2427a71 | 577 | |
7b5e1cb3 RH |
578 | case TYPE_CODE_COMPLEX: |
579 | switch (length) | |
580 | { | |
581 | case 8: | |
582 | /* ??? This isn't correct wrt the ABI, but it's what GCC does. */ | |
583 | regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf); | |
584 | break; | |
585 | ||
586 | case 16: | |
587 | regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf); | |
2a1ce6ec | 588 | regcache_cooked_write (regcache, ALPHA_FP0_REGNUM + 1, valbuf + 8); |
7b5e1cb3 RH |
589 | break; |
590 | ||
591 | case 32: | |
592 | /* FIXME: 128-bit long doubles are returned like structures: | |
593 | by writing into indirect storage provided by the caller | |
594 | as the first argument. */ | |
323e0a4a | 595 | error (_("Cannot set a 128-bit long double return value.")); |
7b5e1cb3 RH |
596 | |
597 | default: | |
0963b4bd MS |
598 | internal_error (__FILE__, __LINE__, |
599 | _("unknown floating point width")); | |
7b5e1cb3 RH |
600 | } |
601 | break; | |
602 | ||
5ec2bb99 RH |
603 | default: |
604 | /* Assume everything else degenerates to an integer. */ | |
0ede8eca RH |
605 | /* 32-bit values must be sign-extended to 64 bits |
606 | even if the base data type is unsigned. */ | |
607 | if (length == 4) | |
df4df182 | 608 | valtype = builtin_type (gdbarch)->builtin_int32; |
5ec2bb99 RH |
609 | l = unpack_long (valtype, valbuf); |
610 | regcache_cooked_write_unsigned (regcache, ALPHA_V0_REGNUM, l); | |
611 | break; | |
612 | } | |
c906108c SS |
613 | } |
614 | ||
9823e921 | 615 | static enum return_value_convention |
c055b101 CV |
616 | alpha_return_value (struct gdbarch *gdbarch, struct type *func_type, |
617 | struct type *type, struct regcache *regcache, | |
618 | gdb_byte *readbuf, const gdb_byte *writebuf) | |
9823e921 RH |
619 | { |
620 | enum type_code code = TYPE_CODE (type); | |
621 | ||
622 | if ((code == TYPE_CODE_STRUCT | |
623 | || code == TYPE_CODE_UNION | |
624 | || code == TYPE_CODE_ARRAY) | |
625 | && gdbarch_tdep (gdbarch)->return_in_memory (type)) | |
626 | { | |
627 | if (readbuf) | |
628 | { | |
629 | ULONGEST addr; | |
630 | regcache_raw_read_unsigned (regcache, ALPHA_V0_REGNUM, &addr); | |
631 | read_memory (addr, readbuf, TYPE_LENGTH (type)); | |
632 | } | |
633 | ||
634 | return RETURN_VALUE_ABI_RETURNS_ADDRESS; | |
635 | } | |
636 | ||
637 | if (readbuf) | |
638 | alpha_extract_return_value (type, regcache, readbuf); | |
639 | if (writebuf) | |
640 | alpha_store_return_value (type, regcache, writebuf); | |
641 | ||
642 | return RETURN_VALUE_REGISTER_CONVENTION; | |
643 | } | |
644 | ||
645 | static int | |
646 | alpha_return_in_memory_always (struct type *type) | |
647 | { | |
648 | return 1; | |
649 | } | |
d2427a71 | 650 | \f |
2a1ce6ec | 651 | static const gdb_byte * |
67d57894 | 652 | alpha_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pc, int *len) |
c906108c | 653 | { |
2a1ce6ec | 654 | static const gdb_byte break_insn[] = { 0x80, 0, 0, 0 }; /* call_pal bpt */ |
c906108c | 655 | |
2a1ce6ec MK |
656 | *len = sizeof(break_insn); |
657 | return break_insn; | |
d2427a71 | 658 | } |
c906108c | 659 | |
d2427a71 RH |
660 | \f |
661 | /* This returns the PC of the first insn after the prologue. | |
662 | If we can't find the prologue, then return 0. */ | |
c906108c | 663 | |
d2427a71 RH |
664 | CORE_ADDR |
665 | alpha_after_prologue (CORE_ADDR pc) | |
c906108c | 666 | { |
d2427a71 RH |
667 | struct symtab_and_line sal; |
668 | CORE_ADDR func_addr, func_end; | |
c906108c | 669 | |
d2427a71 | 670 | if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end)) |
c5aa993b | 671 | return 0; |
c906108c | 672 | |
d2427a71 RH |
673 | sal = find_pc_line (func_addr, 0); |
674 | if (sal.end < func_end) | |
675 | return sal.end; | |
c5aa993b | 676 | |
d2427a71 RH |
677 | /* The line after the prologue is after the end of the function. In this |
678 | case, tell the caller to find the prologue the hard way. */ | |
679 | return 0; | |
c906108c SS |
680 | } |
681 | ||
d2427a71 RH |
682 | /* Read an instruction from memory at PC, looking through breakpoints. */ |
683 | ||
684 | unsigned int | |
e17a4113 | 685 | alpha_read_insn (struct gdbarch *gdbarch, CORE_ADDR pc) |
c906108c | 686 | { |
e17a4113 | 687 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
e8d2d628 | 688 | gdb_byte buf[ALPHA_INSN_SIZE]; |
d2427a71 | 689 | int status; |
c5aa993b | 690 | |
8defab1a | 691 | status = target_read_memory (pc, buf, sizeof (buf)); |
d2427a71 RH |
692 | if (status) |
693 | memory_error (status, pc); | |
e17a4113 | 694 | return extract_unsigned_integer (buf, sizeof (buf), byte_order); |
d2427a71 | 695 | } |
c5aa993b | 696 | |
d2427a71 RH |
697 | /* To skip prologues, I use this predicate. Returns either PC itself |
698 | if the code at PC does not look like a function prologue; otherwise | |
699 | returns an address that (if we're lucky) follows the prologue. If | |
700 | LENIENT, then we must skip everything which is involved in setting | |
701 | up the frame (it's OK to skip more, just so long as we don't skip | |
702 | anything which might clobber the registers which are being saved. */ | |
c906108c | 703 | |
d2427a71 | 704 | static CORE_ADDR |
6093d2eb | 705 | alpha_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) |
d2427a71 RH |
706 | { |
707 | unsigned long inst; | |
708 | int offset; | |
709 | CORE_ADDR post_prologue_pc; | |
e8d2d628 | 710 | gdb_byte buf[ALPHA_INSN_SIZE]; |
c906108c | 711 | |
d2427a71 RH |
712 | /* Silently return the unaltered pc upon memory errors. |
713 | This could happen on OSF/1 if decode_line_1 tries to skip the | |
714 | prologue for quickstarted shared library functions when the | |
715 | shared library is not yet mapped in. | |
716 | Reading target memory is slow over serial lines, so we perform | |
717 | this check only if the target has shared libraries (which all | |
718 | Alpha targets do). */ | |
e8d2d628 | 719 | if (target_read_memory (pc, buf, sizeof (buf))) |
d2427a71 | 720 | return pc; |
c906108c | 721 | |
d2427a71 RH |
722 | /* See if we can determine the end of the prologue via the symbol table. |
723 | If so, then return either PC, or the PC after the prologue, whichever | |
724 | is greater. */ | |
c906108c | 725 | |
d2427a71 RH |
726 | post_prologue_pc = alpha_after_prologue (pc); |
727 | if (post_prologue_pc != 0) | |
728 | return max (pc, post_prologue_pc); | |
c906108c | 729 | |
d2427a71 RH |
730 | /* Can't determine prologue from the symbol table, need to examine |
731 | instructions. */ | |
dc1b0db2 | 732 | |
0963b4bd | 733 | /* Skip the typical prologue instructions. These are the stack adjustment |
d2427a71 RH |
734 | instruction and the instructions that save registers on the stack |
735 | or in the gcc frame. */ | |
e8d2d628 | 736 | for (offset = 0; offset < 100; offset += ALPHA_INSN_SIZE) |
d2427a71 | 737 | { |
e17a4113 | 738 | inst = alpha_read_insn (gdbarch, pc + offset); |
c906108c | 739 | |
d2427a71 RH |
740 | if ((inst & 0xffff0000) == 0x27bb0000) /* ldah $gp,n($t12) */ |
741 | continue; | |
742 | if ((inst & 0xffff0000) == 0x23bd0000) /* lda $gp,n($gp) */ | |
743 | continue; | |
744 | if ((inst & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */ | |
745 | continue; | |
746 | if ((inst & 0xffe01fff) == 0x43c0153e) /* subq $sp,n,$sp */ | |
747 | continue; | |
c906108c | 748 | |
d2427a71 RH |
749 | if (((inst & 0xfc1f0000) == 0xb41e0000 /* stq reg,n($sp) */ |
750 | || (inst & 0xfc1f0000) == 0x9c1e0000) /* stt reg,n($sp) */ | |
751 | && (inst & 0x03e00000) != 0x03e00000) /* reg != $zero */ | |
752 | continue; | |
c906108c | 753 | |
d2427a71 RH |
754 | if (inst == 0x47de040f) /* bis sp,sp,fp */ |
755 | continue; | |
756 | if (inst == 0x47fe040f) /* bis zero,sp,fp */ | |
757 | continue; | |
c906108c | 758 | |
d2427a71 | 759 | break; |
c906108c | 760 | } |
d2427a71 RH |
761 | return pc + offset; |
762 | } | |
c906108c | 763 | |
d2427a71 RH |
764 | \f |
765 | /* Figure out where the longjmp will land. | |
766 | We expect the first arg to be a pointer to the jmp_buf structure from | |
767 | which we extract the PC (JB_PC) that we will land at. The PC is copied | |
768 | into the "pc". This routine returns true on success. */ | |
c906108c SS |
769 | |
770 | static int | |
60ade65d | 771 | alpha_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc) |
c906108c | 772 | { |
e17a4113 UW |
773 | struct gdbarch *gdbarch = get_frame_arch (frame); |
774 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
775 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
d2427a71 | 776 | CORE_ADDR jb_addr; |
2a1ce6ec | 777 | gdb_byte raw_buffer[ALPHA_REGISTER_SIZE]; |
c906108c | 778 | |
60ade65d | 779 | jb_addr = get_frame_register_unsigned (frame, ALPHA_A0_REGNUM); |
c906108c | 780 | |
d2427a71 RH |
781 | if (target_read_memory (jb_addr + (tdep->jb_pc * tdep->jb_elt_size), |
782 | raw_buffer, tdep->jb_elt_size)) | |
c906108c | 783 | return 0; |
d2427a71 | 784 | |
e17a4113 | 785 | *pc = extract_unsigned_integer (raw_buffer, tdep->jb_elt_size, byte_order); |
d2427a71 | 786 | return 1; |
c906108c SS |
787 | } |
788 | ||
d2427a71 RH |
789 | \f |
790 | /* Frame unwinder for signal trampolines. We use alpha tdep bits that | |
791 | describe the location and shape of the sigcontext structure. After | |
792 | that, all registers are in memory, so it's easy. */ | |
793 | /* ??? Shouldn't we be able to do this generically, rather than with | |
794 | OSABI data specific to Alpha? */ | |
795 | ||
796 | struct alpha_sigtramp_unwind_cache | |
c906108c | 797 | { |
d2427a71 RH |
798 | CORE_ADDR sigcontext_addr; |
799 | }; | |
c906108c | 800 | |
d2427a71 | 801 | static struct alpha_sigtramp_unwind_cache * |
6834c9bb | 802 | alpha_sigtramp_frame_unwind_cache (struct frame_info *this_frame, |
d2427a71 RH |
803 | void **this_prologue_cache) |
804 | { | |
805 | struct alpha_sigtramp_unwind_cache *info; | |
806 | struct gdbarch_tdep *tdep; | |
c906108c | 807 | |
d2427a71 RH |
808 | if (*this_prologue_cache) |
809 | return *this_prologue_cache; | |
c906108c | 810 | |
d2427a71 RH |
811 | info = FRAME_OBSTACK_ZALLOC (struct alpha_sigtramp_unwind_cache); |
812 | *this_prologue_cache = info; | |
c906108c | 813 | |
6834c9bb JB |
814 | tdep = gdbarch_tdep (get_frame_arch (this_frame)); |
815 | info->sigcontext_addr = tdep->sigcontext_addr (this_frame); | |
c906108c | 816 | |
d2427a71 | 817 | return info; |
c906108c SS |
818 | } |
819 | ||
138e7be5 MK |
820 | /* Return the address of REGNUM in a sigtramp frame. Since this is |
821 | all arithmetic, it doesn't seem worthwhile to cache it. */ | |
c5aa993b | 822 | |
d2427a71 | 823 | static CORE_ADDR |
be8626e0 MD |
824 | alpha_sigtramp_register_address (struct gdbarch *gdbarch, |
825 | CORE_ADDR sigcontext_addr, int regnum) | |
d2427a71 | 826 | { |
be8626e0 | 827 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
138e7be5 MK |
828 | |
829 | if (regnum >= 0 && regnum < 32) | |
830 | return sigcontext_addr + tdep->sc_regs_offset + regnum * 8; | |
831 | else if (regnum >= ALPHA_FP0_REGNUM && regnum < ALPHA_FP0_REGNUM + 32) | |
832 | return sigcontext_addr + tdep->sc_fpregs_offset + regnum * 8; | |
833 | else if (regnum == ALPHA_PC_REGNUM) | |
834 | return sigcontext_addr + tdep->sc_pc_offset; | |
c5aa993b | 835 | |
d2427a71 | 836 | return 0; |
c906108c SS |
837 | } |
838 | ||
d2427a71 RH |
839 | /* Given a GDB frame, determine the address of the calling function's |
840 | frame. This will be used to create a new GDB frame struct. */ | |
140f9984 | 841 | |
dc129d82 | 842 | static void |
6834c9bb | 843 | alpha_sigtramp_frame_this_id (struct frame_info *this_frame, |
d2427a71 RH |
844 | void **this_prologue_cache, |
845 | struct frame_id *this_id) | |
c906108c | 846 | { |
6834c9bb | 847 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
be8626e0 | 848 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
d2427a71 | 849 | struct alpha_sigtramp_unwind_cache *info |
6834c9bb | 850 | = alpha_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache); |
d2427a71 RH |
851 | CORE_ADDR stack_addr, code_addr; |
852 | ||
853 | /* If the OSABI couldn't locate the sigcontext, give up. */ | |
854 | if (info->sigcontext_addr == 0) | |
855 | return; | |
856 | ||
857 | /* If we have dynamic signal trampolines, find their start. | |
858 | If we do not, then we must assume there is a symbol record | |
859 | that can provide the start address. */ | |
d2427a71 | 860 | if (tdep->dynamic_sigtramp_offset) |
c906108c | 861 | { |
d2427a71 | 862 | int offset; |
6834c9bb | 863 | code_addr = get_frame_pc (this_frame); |
e17a4113 | 864 | offset = tdep->dynamic_sigtramp_offset (gdbarch, code_addr); |
d2427a71 RH |
865 | if (offset >= 0) |
866 | code_addr -= offset; | |
c906108c | 867 | else |
d2427a71 | 868 | code_addr = 0; |
c906108c | 869 | } |
d2427a71 | 870 | else |
6834c9bb | 871 | code_addr = get_frame_func (this_frame); |
c906108c | 872 | |
d2427a71 | 873 | /* The stack address is trivially read from the sigcontext. */ |
be8626e0 | 874 | stack_addr = alpha_sigtramp_register_address (gdbarch, info->sigcontext_addr, |
d2427a71 | 875 | ALPHA_SP_REGNUM); |
6834c9bb | 876 | stack_addr = get_frame_memory_unsigned (this_frame, stack_addr, |
b21fd293 | 877 | ALPHA_REGISTER_SIZE); |
c906108c | 878 | |
d2427a71 | 879 | *this_id = frame_id_build (stack_addr, code_addr); |
c906108c SS |
880 | } |
881 | ||
d2427a71 | 882 | /* Retrieve the value of REGNUM in FRAME. Don't give up! */ |
c906108c | 883 | |
6834c9bb JB |
884 | static struct value * |
885 | alpha_sigtramp_frame_prev_register (struct frame_info *this_frame, | |
886 | void **this_prologue_cache, int regnum) | |
c906108c | 887 | { |
d2427a71 | 888 | struct alpha_sigtramp_unwind_cache *info |
6834c9bb | 889 | = alpha_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache); |
d2427a71 | 890 | CORE_ADDR addr; |
c906108c | 891 | |
d2427a71 | 892 | if (info->sigcontext_addr != 0) |
c906108c | 893 | { |
d2427a71 | 894 | /* All integer and fp registers are stored in memory. */ |
6834c9bb | 895 | addr = alpha_sigtramp_register_address (get_frame_arch (this_frame), |
be8626e0 | 896 | info->sigcontext_addr, regnum); |
d2427a71 | 897 | if (addr != 0) |
6834c9bb | 898 | return frame_unwind_got_memory (this_frame, regnum, addr); |
c906108c SS |
899 | } |
900 | ||
d2427a71 RH |
901 | /* This extra register may actually be in the sigcontext, but our |
902 | current description of it in alpha_sigtramp_frame_unwind_cache | |
903 | doesn't include it. Too bad. Fall back on whatever's in the | |
904 | outer frame. */ | |
6834c9bb | 905 | return frame_unwind_got_register (this_frame, regnum, regnum); |
d2427a71 | 906 | } |
c906108c | 907 | |
6834c9bb JB |
908 | static int |
909 | alpha_sigtramp_frame_sniffer (const struct frame_unwind *self, | |
910 | struct frame_info *this_frame, | |
911 | void **this_prologue_cache) | |
d2427a71 | 912 | { |
6834c9bb JB |
913 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
914 | CORE_ADDR pc = get_frame_pc (this_frame); | |
d2427a71 | 915 | char *name; |
c906108c | 916 | |
f2524b93 AC |
917 | /* NOTE: cagney/2004-04-30: Do not copy/clone this code. Instead |
918 | look at tramp-frame.h and other simplier per-architecture | |
919 | sigtramp unwinders. */ | |
920 | ||
921 | /* We shouldn't even bother to try if the OSABI didn't register a | |
922 | sigcontext_addr handler or pc_in_sigtramp hander. */ | |
ec7cc0e8 | 923 | if (gdbarch_tdep (gdbarch)->sigcontext_addr == NULL) |
6834c9bb | 924 | return 0; |
ec7cc0e8 | 925 | if (gdbarch_tdep (gdbarch)->pc_in_sigtramp == NULL) |
6834c9bb | 926 | return 0; |
c906108c | 927 | |
d2427a71 RH |
928 | /* Otherwise we should be in a signal frame. */ |
929 | find_pc_partial_function (pc, &name, NULL, NULL); | |
e17a4113 | 930 | if (gdbarch_tdep (gdbarch)->pc_in_sigtramp (gdbarch, pc, name)) |
6834c9bb | 931 | return 1; |
c906108c | 932 | |
6834c9bb | 933 | return 0; |
c906108c | 934 | } |
6834c9bb JB |
935 | |
936 | static const struct frame_unwind alpha_sigtramp_frame_unwind = { | |
937 | SIGTRAMP_FRAME, | |
8fbca658 | 938 | default_frame_unwind_stop_reason, |
6834c9bb JB |
939 | alpha_sigtramp_frame_this_id, |
940 | alpha_sigtramp_frame_prev_register, | |
941 | NULL, | |
942 | alpha_sigtramp_frame_sniffer | |
943 | }; | |
944 | ||
d2427a71 | 945 | \f |
c906108c | 946 | |
d2427a71 RH |
947 | /* Heuristic_proc_start may hunt through the text section for a long |
948 | time across a 2400 baud serial line. Allows the user to limit this | |
949 | search. */ | |
950 | static unsigned int heuristic_fence_post = 0; | |
c906108c | 951 | |
d2427a71 RH |
952 | /* Attempt to locate the start of the function containing PC. We assume that |
953 | the previous function ends with an about_to_return insn. Not foolproof by | |
954 | any means, since gcc is happy to put the epilogue in the middle of a | |
955 | function. But we're guessing anyway... */ | |
c906108c | 956 | |
d2427a71 | 957 | static CORE_ADDR |
be8626e0 | 958 | alpha_heuristic_proc_start (struct gdbarch *gdbarch, CORE_ADDR pc) |
d2427a71 | 959 | { |
be8626e0 | 960 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
d2427a71 RH |
961 | CORE_ADDR last_non_nop = pc; |
962 | CORE_ADDR fence = pc - heuristic_fence_post; | |
963 | CORE_ADDR orig_pc = pc; | |
fbe586ae | 964 | CORE_ADDR func; |
d6b48e9c | 965 | struct inferior *inf; |
9e0b60a8 | 966 | |
d2427a71 RH |
967 | if (pc == 0) |
968 | return 0; | |
9e0b60a8 | 969 | |
fbe586ae RH |
970 | /* First see if we can find the start of the function from minimal |
971 | symbol information. This can succeed with a binary that doesn't | |
972 | have debug info, but hasn't been stripped. */ | |
973 | func = get_pc_function_start (pc); | |
974 | if (func) | |
975 | return func; | |
976 | ||
d2427a71 RH |
977 | if (heuristic_fence_post == UINT_MAX |
978 | || fence < tdep->vm_min_address) | |
979 | fence = tdep->vm_min_address; | |
c906108c | 980 | |
d2427a71 RH |
981 | /* Search back for previous return; also stop at a 0, which might be |
982 | seen for instance before the start of a code section. Don't include | |
983 | nops, since this usually indicates padding between functions. */ | |
e8d2d628 | 984 | for (pc -= ALPHA_INSN_SIZE; pc >= fence; pc -= ALPHA_INSN_SIZE) |
c906108c | 985 | { |
e17a4113 | 986 | unsigned int insn = alpha_read_insn (gdbarch, pc); |
d2427a71 | 987 | switch (insn) |
c906108c | 988 | { |
d2427a71 RH |
989 | case 0: /* invalid insn */ |
990 | case 0x6bfa8001: /* ret $31,($26),1 */ | |
991 | return last_non_nop; | |
992 | ||
993 | case 0x2ffe0000: /* unop: ldq_u $31,0($30) */ | |
994 | case 0x47ff041f: /* nop: bis $31,$31,$31 */ | |
995 | break; | |
996 | ||
997 | default: | |
998 | last_non_nop = pc; | |
999 | break; | |
c906108c | 1000 | } |
d2427a71 | 1001 | } |
c906108c | 1002 | |
d6b48e9c PA |
1003 | inf = current_inferior (); |
1004 | ||
d2427a71 RH |
1005 | /* It's not clear to me why we reach this point when stopping quietly, |
1006 | but with this test, at least we don't print out warnings for every | |
1007 | child forked (eg, on decstation). 22apr93 rich@cygnus.com. */ | |
16c381f0 | 1008 | if (inf->control.stop_soon == NO_STOP_QUIETLY) |
d2427a71 RH |
1009 | { |
1010 | static int blurb_printed = 0; | |
c906108c | 1011 | |
d2427a71 | 1012 | if (fence == tdep->vm_min_address) |
323e0a4a | 1013 | warning (_("Hit beginning of text section without finding \ |
5af949e3 | 1014 | enclosing function for address %s"), paddress (gdbarch, orig_pc)); |
c906108c | 1015 | else |
323e0a4a | 1016 | warning (_("Hit heuristic-fence-post without finding \ |
5af949e3 | 1017 | enclosing function for address %s"), paddress (gdbarch, orig_pc)); |
c906108c | 1018 | |
d2427a71 RH |
1019 | if (!blurb_printed) |
1020 | { | |
323e0a4a | 1021 | printf_filtered (_("\ |
d2427a71 RH |
1022 | This warning occurs if you are debugging a function without any symbols\n\ |
1023 | (for example, in a stripped executable). In that case, you may wish to\n\ | |
1024 | increase the size of the search with the `set heuristic-fence-post' command.\n\ | |
1025 | \n\ | |
1026 | Otherwise, you told GDB there was a function where there isn't one, or\n\ | |
323e0a4a | 1027 | (more likely) you have encountered a bug in GDB.\n")); |
d2427a71 RH |
1028 | blurb_printed = 1; |
1029 | } | |
1030 | } | |
c906108c | 1031 | |
d2427a71 RH |
1032 | return 0; |
1033 | } | |
c906108c | 1034 | |
07ea644b MD |
1035 | /* Fallback alpha frame unwinder. Uses instruction scanning and knows |
1036 | something about the traditional layout of alpha stack frames. */ | |
1037 | ||
1038 | struct alpha_heuristic_unwind_cache | |
1039 | { | |
1040 | CORE_ADDR vfp; | |
1041 | CORE_ADDR start_pc; | |
1042 | struct trad_frame_saved_reg *saved_regs; | |
1043 | int return_reg; | |
1044 | }; | |
1045 | ||
3a48e6ff JG |
1046 | /* If a probing loop sequence starts at PC, simulate it and compute |
1047 | FRAME_SIZE and PC after its execution. Otherwise, return with PC and | |
1048 | FRAME_SIZE unchanged. */ | |
1049 | ||
1050 | static void | |
1051 | alpha_heuristic_analyze_probing_loop (struct gdbarch *gdbarch, CORE_ADDR *pc, | |
1052 | int *frame_size) | |
1053 | { | |
1054 | CORE_ADDR cur_pc = *pc; | |
1055 | int cur_frame_size = *frame_size; | |
1056 | int nb_of_iterations, reg_index, reg_probe; | |
1057 | unsigned int insn; | |
1058 | ||
1059 | /* The following pattern is recognized as a probing loop: | |
1060 | ||
1061 | lda REG_INDEX,NB_OF_ITERATIONS | |
1062 | lda REG_PROBE,<immediate>(sp) | |
1063 | ||
1064 | LOOP_START: | |
1065 | stq zero,<immediate>(REG_PROBE) | |
1066 | subq REG_INDEX,0x1,REG_INDEX | |
1067 | lda REG_PROBE,<immediate>(REG_PROBE) | |
1068 | bne REG_INDEX, LOOP_START | |
1069 | ||
1070 | lda sp,<immediate>(REG_PROBE) | |
1071 | ||
1072 | If anything different is found, the function returns without | |
1073 | changing PC and FRAME_SIZE. Otherwise, PC will point immediately | |
0963b4bd | 1074 | after this sequence, and FRAME_SIZE will be updated. */ |
3a48e6ff JG |
1075 | |
1076 | /* lda REG_INDEX,NB_OF_ITERATIONS */ | |
1077 | ||
1078 | insn = alpha_read_insn (gdbarch, cur_pc); | |
1079 | if (INSN_OPCODE (insn) != lda_opcode) | |
1080 | return; | |
1081 | reg_index = MEM_RA (insn); | |
1082 | nb_of_iterations = MEM_DISP (insn); | |
1083 | ||
1084 | /* lda REG_PROBE,<immediate>(sp) */ | |
1085 | ||
1086 | cur_pc += ALPHA_INSN_SIZE; | |
1087 | insn = alpha_read_insn (gdbarch, cur_pc); | |
1088 | if (INSN_OPCODE (insn) != lda_opcode | |
1089 | || MEM_RB (insn) != ALPHA_SP_REGNUM) | |
1090 | return; | |
1091 | reg_probe = MEM_RA (insn); | |
1092 | cur_frame_size -= MEM_DISP (insn); | |
1093 | ||
1094 | /* stq zero,<immediate>(REG_PROBE) */ | |
1095 | ||
1096 | cur_pc += ALPHA_INSN_SIZE; | |
1097 | insn = alpha_read_insn (gdbarch, cur_pc); | |
1098 | if (INSN_OPCODE (insn) != stq_opcode | |
1099 | || MEM_RA (insn) != 0x1f | |
1100 | || MEM_RB (insn) != reg_probe) | |
1101 | return; | |
1102 | ||
1103 | /* subq REG_INDEX,0x1,REG_INDEX */ | |
1104 | ||
1105 | cur_pc += ALPHA_INSN_SIZE; | |
1106 | insn = alpha_read_insn (gdbarch, cur_pc); | |
1107 | if (INSN_OPCODE (insn) != subq_opcode | |
1108 | || !OPR_HAS_IMMEDIATE (insn) | |
1109 | || OPR_FUNCTION (insn) != subq_function | |
1110 | || OPR_LIT(insn) != 1 | |
1111 | || OPR_RA (insn) != reg_index | |
1112 | || OPR_RC (insn) != reg_index) | |
1113 | return; | |
1114 | ||
1115 | /* lda REG_PROBE,<immediate>(REG_PROBE) */ | |
1116 | ||
1117 | cur_pc += ALPHA_INSN_SIZE; | |
1118 | insn = alpha_read_insn (gdbarch, cur_pc); | |
1119 | if (INSN_OPCODE (insn) != lda_opcode | |
1120 | || MEM_RA (insn) != reg_probe | |
1121 | || MEM_RB (insn) != reg_probe) | |
1122 | return; | |
1123 | cur_frame_size -= MEM_DISP (insn) * nb_of_iterations; | |
1124 | ||
1125 | /* bne REG_INDEX, LOOP_START */ | |
1126 | ||
1127 | cur_pc += ALPHA_INSN_SIZE; | |
1128 | insn = alpha_read_insn (gdbarch, cur_pc); | |
1129 | if (INSN_OPCODE (insn) != bne_opcode | |
1130 | || MEM_RA (insn) != reg_index) | |
1131 | return; | |
1132 | ||
1133 | /* lda sp,<immediate>(REG_PROBE) */ | |
1134 | ||
1135 | cur_pc += ALPHA_INSN_SIZE; | |
1136 | insn = alpha_read_insn (gdbarch, cur_pc); | |
1137 | if (INSN_OPCODE (insn) != lda_opcode | |
1138 | || MEM_RA (insn) != ALPHA_SP_REGNUM | |
1139 | || MEM_RB (insn) != reg_probe) | |
1140 | return; | |
1141 | cur_frame_size -= MEM_DISP (insn); | |
1142 | ||
1143 | *pc = cur_pc; | |
1144 | *frame_size = cur_frame_size; | |
1145 | } | |
1146 | ||
fbe586ae | 1147 | static struct alpha_heuristic_unwind_cache * |
6834c9bb | 1148 | alpha_heuristic_frame_unwind_cache (struct frame_info *this_frame, |
d2427a71 RH |
1149 | void **this_prologue_cache, |
1150 | CORE_ADDR start_pc) | |
1151 | { | |
6834c9bb | 1152 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
d2427a71 RH |
1153 | struct alpha_heuristic_unwind_cache *info; |
1154 | ULONGEST val; | |
1155 | CORE_ADDR limit_pc, cur_pc; | |
1156 | int frame_reg, frame_size, return_reg, reg; | |
c906108c | 1157 | |
d2427a71 RH |
1158 | if (*this_prologue_cache) |
1159 | return *this_prologue_cache; | |
c906108c | 1160 | |
d2427a71 RH |
1161 | info = FRAME_OBSTACK_ZALLOC (struct alpha_heuristic_unwind_cache); |
1162 | *this_prologue_cache = info; | |
6834c9bb | 1163 | info->saved_regs = trad_frame_alloc_saved_regs (this_frame); |
c906108c | 1164 | |
6834c9bb | 1165 | limit_pc = get_frame_pc (this_frame); |
d2427a71 | 1166 | if (start_pc == 0) |
be8626e0 | 1167 | start_pc = alpha_heuristic_proc_start (gdbarch, limit_pc); |
d2427a71 | 1168 | info->start_pc = start_pc; |
c906108c | 1169 | |
d2427a71 RH |
1170 | frame_reg = ALPHA_SP_REGNUM; |
1171 | frame_size = 0; | |
1172 | return_reg = -1; | |
c906108c | 1173 | |
d2427a71 RH |
1174 | /* If we've identified a likely place to start, do code scanning. */ |
1175 | if (start_pc != 0) | |
c5aa993b | 1176 | { |
d2427a71 RH |
1177 | /* Limit the forward search to 50 instructions. */ |
1178 | if (start_pc + 200 < limit_pc) | |
1179 | limit_pc = start_pc + 200; | |
c5aa993b | 1180 | |
e8d2d628 | 1181 | for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += ALPHA_INSN_SIZE) |
d2427a71 | 1182 | { |
e17a4113 | 1183 | unsigned int word = alpha_read_insn (gdbarch, cur_pc); |
c5aa993b | 1184 | |
d2427a71 RH |
1185 | if ((word & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */ |
1186 | { | |
1187 | if (word & 0x8000) | |
1188 | { | |
1189 | /* Consider only the first stack allocation instruction | |
0963b4bd | 1190 | to contain the static size of the frame. */ |
d2427a71 RH |
1191 | if (frame_size == 0) |
1192 | frame_size = (-word) & 0xffff; | |
1193 | } | |
1194 | else | |
1195 | { | |
1196 | /* Exit loop if a positive stack adjustment is found, which | |
1197 | usually means that the stack cleanup code in the function | |
1198 | epilogue is reached. */ | |
1199 | break; | |
1200 | } | |
1201 | } | |
1202 | else if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */ | |
1203 | { | |
1204 | reg = (word & 0x03e00000) >> 21; | |
1205 | ||
d15bfd3a AC |
1206 | /* Ignore this instruction if we have already encountered |
1207 | an instruction saving the same register earlier in the | |
1208 | function code. The current instruction does not tell | |
1209 | us where the original value upon function entry is saved. | |
1210 | All it says is that the function we are scanning reused | |
1211 | that register for some computation of its own, and is now | |
1212 | saving its result. */ | |
07ea644b | 1213 | if (trad_frame_addr_p(info->saved_regs, reg)) |
d15bfd3a AC |
1214 | continue; |
1215 | ||
d2427a71 RH |
1216 | if (reg == 31) |
1217 | continue; | |
1218 | ||
1219 | /* Do not compute the address where the register was saved yet, | |
1220 | because we don't know yet if the offset will need to be | |
1221 | relative to $sp or $fp (we can not compute the address | |
1222 | relative to $sp if $sp is updated during the execution of | |
1223 | the current subroutine, for instance when doing some alloca). | |
1224 | So just store the offset for the moment, and compute the | |
1225 | address later when we know whether this frame has a frame | |
1226 | pointer or not. */ | |
1227 | /* Hack: temporarily add one, so that the offset is non-zero | |
1228 | and we can tell which registers have save offsets below. */ | |
07ea644b | 1229 | info->saved_regs[reg].addr = (word & 0xffff) + 1; |
d2427a71 RH |
1230 | |
1231 | /* Starting with OSF/1-3.2C, the system libraries are shipped | |
1232 | without local symbols, but they still contain procedure | |
1233 | descriptors without a symbol reference. GDB is currently | |
1234 | unable to find these procedure descriptors and uses | |
1235 | heuristic_proc_desc instead. | |
1236 | As some low level compiler support routines (__div*, __add*) | |
1237 | use a non-standard return address register, we have to | |
1238 | add some heuristics to determine the return address register, | |
1239 | or stepping over these routines will fail. | |
1240 | Usually the return address register is the first register | |
1241 | saved on the stack, but assembler optimization might | |
1242 | rearrange the register saves. | |
1243 | So we recognize only a few registers (t7, t9, ra) within | |
1244 | the procedure prologue as valid return address registers. | |
1245 | If we encounter a return instruction, we extract the | |
7a9dd1b2 | 1246 | return address register from it. |
d2427a71 RH |
1247 | |
1248 | FIXME: Rewriting GDB to access the procedure descriptors, | |
0963b4bd MS |
1249 | e.g. via the minimal symbol table, might obviate this |
1250 | hack. */ | |
d2427a71 RH |
1251 | if (return_reg == -1 |
1252 | && cur_pc < (start_pc + 80) | |
1253 | && (reg == ALPHA_T7_REGNUM | |
1254 | || reg == ALPHA_T9_REGNUM | |
1255 | || reg == ALPHA_RA_REGNUM)) | |
1256 | return_reg = reg; | |
1257 | } | |
1258 | else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */ | |
1259 | return_reg = (word >> 16) & 0x1f; | |
1260 | else if (word == 0x47de040f) /* bis sp,sp,fp */ | |
1261 | frame_reg = ALPHA_GCC_FP_REGNUM; | |
1262 | else if (word == 0x47fe040f) /* bis zero,sp,fp */ | |
1263 | frame_reg = ALPHA_GCC_FP_REGNUM; | |
3a48e6ff JG |
1264 | |
1265 | alpha_heuristic_analyze_probing_loop (gdbarch, &cur_pc, &frame_size); | |
d2427a71 | 1266 | } |
c5aa993b | 1267 | |
d2427a71 RH |
1268 | /* If we haven't found a valid return address register yet, keep |
1269 | searching in the procedure prologue. */ | |
1270 | if (return_reg == -1) | |
1271 | { | |
1272 | while (cur_pc < (limit_pc + 80) && cur_pc < (start_pc + 80)) | |
1273 | { | |
e17a4113 | 1274 | unsigned int word = alpha_read_insn (gdbarch, cur_pc); |
c5aa993b | 1275 | |
d2427a71 RH |
1276 | if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */ |
1277 | { | |
1278 | reg = (word & 0x03e00000) >> 21; | |
1279 | if (reg == ALPHA_T7_REGNUM | |
1280 | || reg == ALPHA_T9_REGNUM | |
1281 | || reg == ALPHA_RA_REGNUM) | |
1282 | { | |
1283 | return_reg = reg; | |
1284 | break; | |
1285 | } | |
1286 | } | |
1287 | else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */ | |
1288 | { | |
1289 | return_reg = (word >> 16) & 0x1f; | |
1290 | break; | |
1291 | } | |
85b32d22 | 1292 | |
e8d2d628 | 1293 | cur_pc += ALPHA_INSN_SIZE; |
d2427a71 RH |
1294 | } |
1295 | } | |
c906108c | 1296 | } |
c906108c | 1297 | |
d2427a71 RH |
1298 | /* Failing that, do default to the customary RA. */ |
1299 | if (return_reg == -1) | |
1300 | return_reg = ALPHA_RA_REGNUM; | |
1301 | info->return_reg = return_reg; | |
f8453e34 | 1302 | |
6834c9bb | 1303 | val = get_frame_register_unsigned (this_frame, frame_reg); |
d2427a71 | 1304 | info->vfp = val + frame_size; |
c906108c | 1305 | |
d2427a71 RH |
1306 | /* Convert offsets to absolute addresses. See above about adding |
1307 | one to the offsets to make all detected offsets non-zero. */ | |
1308 | for (reg = 0; reg < ALPHA_NUM_REGS; ++reg) | |
07ea644b MD |
1309 | if (trad_frame_addr_p(info->saved_regs, reg)) |
1310 | info->saved_regs[reg].addr += val - 1; | |
d2427a71 | 1311 | |
bfd66dd9 JB |
1312 | /* The stack pointer of the previous frame is computed by popping |
1313 | the current stack frame. */ | |
1314 | if (!trad_frame_addr_p (info->saved_regs, ALPHA_SP_REGNUM)) | |
1315 | trad_frame_set_value (info->saved_regs, ALPHA_SP_REGNUM, info->vfp); | |
1316 | ||
d2427a71 | 1317 | return info; |
c906108c | 1318 | } |
c906108c | 1319 | |
d2427a71 RH |
1320 | /* Given a GDB frame, determine the address of the calling function's |
1321 | frame. This will be used to create a new GDB frame struct. */ | |
1322 | ||
fbe586ae | 1323 | static void |
6834c9bb JB |
1324 | alpha_heuristic_frame_this_id (struct frame_info *this_frame, |
1325 | void **this_prologue_cache, | |
1326 | struct frame_id *this_id) | |
c906108c | 1327 | { |
d2427a71 | 1328 | struct alpha_heuristic_unwind_cache *info |
6834c9bb | 1329 | = alpha_heuristic_frame_unwind_cache (this_frame, this_prologue_cache, 0); |
c906108c | 1330 | |
d2427a71 | 1331 | *this_id = frame_id_build (info->vfp, info->start_pc); |
c906108c SS |
1332 | } |
1333 | ||
d2427a71 RH |
1334 | /* Retrieve the value of REGNUM in FRAME. Don't give up! */ |
1335 | ||
6834c9bb JB |
1336 | static struct value * |
1337 | alpha_heuristic_frame_prev_register (struct frame_info *this_frame, | |
1338 | void **this_prologue_cache, int regnum) | |
c906108c | 1339 | { |
d2427a71 | 1340 | struct alpha_heuristic_unwind_cache *info |
6834c9bb | 1341 | = alpha_heuristic_frame_unwind_cache (this_frame, this_prologue_cache, 0); |
d2427a71 RH |
1342 | |
1343 | /* The PC of the previous frame is stored in the link register of | |
1344 | the current frame. Frob regnum so that we pull the value from | |
1345 | the correct place. */ | |
1346 | if (regnum == ALPHA_PC_REGNUM) | |
1347 | regnum = info->return_reg; | |
1348 | ||
6834c9bb | 1349 | return trad_frame_get_prev_register (this_frame, info->saved_regs, regnum); |
95b80706 JT |
1350 | } |
1351 | ||
d2427a71 RH |
1352 | static const struct frame_unwind alpha_heuristic_frame_unwind = { |
1353 | NORMAL_FRAME, | |
8fbca658 | 1354 | default_frame_unwind_stop_reason, |
d2427a71 | 1355 | alpha_heuristic_frame_this_id, |
6834c9bb JB |
1356 | alpha_heuristic_frame_prev_register, |
1357 | NULL, | |
1358 | default_frame_sniffer | |
d2427a71 | 1359 | }; |
c906108c | 1360 | |
fbe586ae | 1361 | static CORE_ADDR |
6834c9bb | 1362 | alpha_heuristic_frame_base_address (struct frame_info *this_frame, |
d2427a71 | 1363 | void **this_prologue_cache) |
c906108c | 1364 | { |
d2427a71 | 1365 | struct alpha_heuristic_unwind_cache *info |
6834c9bb | 1366 | = alpha_heuristic_frame_unwind_cache (this_frame, this_prologue_cache, 0); |
c906108c | 1367 | |
d2427a71 | 1368 | return info->vfp; |
c906108c SS |
1369 | } |
1370 | ||
d2427a71 RH |
1371 | static const struct frame_base alpha_heuristic_frame_base = { |
1372 | &alpha_heuristic_frame_unwind, | |
1373 | alpha_heuristic_frame_base_address, | |
1374 | alpha_heuristic_frame_base_address, | |
1375 | alpha_heuristic_frame_base_address | |
1376 | }; | |
1377 | ||
c906108c | 1378 | /* Just like reinit_frame_cache, but with the right arguments to be |
d2427a71 | 1379 | callable as an sfunc. Used by the "set heuristic-fence-post" command. */ |
c906108c SS |
1380 | |
1381 | static void | |
fba45db2 | 1382 | reinit_frame_cache_sfunc (char *args, int from_tty, struct cmd_list_element *c) |
c906108c SS |
1383 | { |
1384 | reinit_frame_cache (); | |
1385 | } | |
1386 | ||
d2427a71 | 1387 | \f |
d2427a71 RH |
1388 | /* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that |
1389 | dummy frame. The frame ID's base needs to match the TOS value | |
1390 | saved by save_dummy_frame_tos(), and the PC match the dummy frame's | |
1391 | breakpoint. */ | |
d734c450 | 1392 | |
d2427a71 | 1393 | static struct frame_id |
6834c9bb | 1394 | alpha_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame) |
0d056799 | 1395 | { |
d2427a71 | 1396 | ULONGEST base; |
6834c9bb JB |
1397 | base = get_frame_register_unsigned (this_frame, ALPHA_SP_REGNUM); |
1398 | return frame_id_build (base, get_frame_pc (this_frame)); | |
0d056799 JT |
1399 | } |
1400 | ||
dc129d82 | 1401 | static CORE_ADDR |
d2427a71 | 1402 | alpha_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) |
accc6d1f | 1403 | { |
d2427a71 | 1404 | ULONGEST pc; |
11411de3 | 1405 | pc = frame_unwind_register_unsigned (next_frame, ALPHA_PC_REGNUM); |
d2427a71 | 1406 | return pc; |
accc6d1f JT |
1407 | } |
1408 | ||
98a8e1e5 RH |
1409 | \f |
1410 | /* Helper routines for alpha*-nat.c files to move register sets to and | |
1411 | from core files. The UNIQUE pointer is allowed to be NULL, as most | |
1412 | targets don't supply this value in their core files. */ | |
1413 | ||
1414 | void | |
390c1522 UW |
1415 | alpha_supply_int_regs (struct regcache *regcache, int regno, |
1416 | const void *r0_r30, const void *pc, const void *unique) | |
98a8e1e5 | 1417 | { |
2a1ce6ec | 1418 | const gdb_byte *regs = r0_r30; |
98a8e1e5 RH |
1419 | int i; |
1420 | ||
1421 | for (i = 0; i < 31; ++i) | |
1422 | if (regno == i || regno == -1) | |
390c1522 | 1423 | regcache_raw_supply (regcache, i, regs + i * 8); |
98a8e1e5 RH |
1424 | |
1425 | if (regno == ALPHA_ZERO_REGNUM || regno == -1) | |
4a1be8d2 PA |
1426 | { |
1427 | const gdb_byte zero[8] = { 0 }; | |
1428 | ||
1429 | regcache_raw_supply (regcache, ALPHA_ZERO_REGNUM, zero); | |
1430 | } | |
98a8e1e5 RH |
1431 | |
1432 | if (regno == ALPHA_PC_REGNUM || regno == -1) | |
390c1522 | 1433 | regcache_raw_supply (regcache, ALPHA_PC_REGNUM, pc); |
98a8e1e5 RH |
1434 | |
1435 | if (regno == ALPHA_UNIQUE_REGNUM || regno == -1) | |
390c1522 | 1436 | regcache_raw_supply (regcache, ALPHA_UNIQUE_REGNUM, unique); |
98a8e1e5 RH |
1437 | } |
1438 | ||
1439 | void | |
390c1522 UW |
1440 | alpha_fill_int_regs (const struct regcache *regcache, |
1441 | int regno, void *r0_r30, void *pc, void *unique) | |
98a8e1e5 | 1442 | { |
2a1ce6ec | 1443 | gdb_byte *regs = r0_r30; |
98a8e1e5 RH |
1444 | int i; |
1445 | ||
1446 | for (i = 0; i < 31; ++i) | |
1447 | if (regno == i || regno == -1) | |
390c1522 | 1448 | regcache_raw_collect (regcache, i, regs + i * 8); |
98a8e1e5 RH |
1449 | |
1450 | if (regno == ALPHA_PC_REGNUM || regno == -1) | |
390c1522 | 1451 | regcache_raw_collect (regcache, ALPHA_PC_REGNUM, pc); |
98a8e1e5 RH |
1452 | |
1453 | if (unique && (regno == ALPHA_UNIQUE_REGNUM || regno == -1)) | |
390c1522 | 1454 | regcache_raw_collect (regcache, ALPHA_UNIQUE_REGNUM, unique); |
98a8e1e5 RH |
1455 | } |
1456 | ||
1457 | void | |
390c1522 UW |
1458 | alpha_supply_fp_regs (struct regcache *regcache, int regno, |
1459 | const void *f0_f30, const void *fpcr) | |
98a8e1e5 | 1460 | { |
2a1ce6ec | 1461 | const gdb_byte *regs = f0_f30; |
98a8e1e5 RH |
1462 | int i; |
1463 | ||
1464 | for (i = ALPHA_FP0_REGNUM; i < ALPHA_FP0_REGNUM + 31; ++i) | |
1465 | if (regno == i || regno == -1) | |
390c1522 | 1466 | regcache_raw_supply (regcache, i, |
2a1ce6ec | 1467 | regs + (i - ALPHA_FP0_REGNUM) * 8); |
98a8e1e5 RH |
1468 | |
1469 | if (regno == ALPHA_FPCR_REGNUM || regno == -1) | |
390c1522 | 1470 | regcache_raw_supply (regcache, ALPHA_FPCR_REGNUM, fpcr); |
98a8e1e5 RH |
1471 | } |
1472 | ||
1473 | void | |
390c1522 UW |
1474 | alpha_fill_fp_regs (const struct regcache *regcache, |
1475 | int regno, void *f0_f30, void *fpcr) | |
98a8e1e5 | 1476 | { |
2a1ce6ec | 1477 | gdb_byte *regs = f0_f30; |
98a8e1e5 RH |
1478 | int i; |
1479 | ||
1480 | for (i = ALPHA_FP0_REGNUM; i < ALPHA_FP0_REGNUM + 31; ++i) | |
1481 | if (regno == i || regno == -1) | |
390c1522 | 1482 | regcache_raw_collect (regcache, i, |
2a1ce6ec | 1483 | regs + (i - ALPHA_FP0_REGNUM) * 8); |
98a8e1e5 RH |
1484 | |
1485 | if (regno == ALPHA_FPCR_REGNUM || regno == -1) | |
390c1522 | 1486 | regcache_raw_collect (regcache, ALPHA_FPCR_REGNUM, fpcr); |
98a8e1e5 RH |
1487 | } |
1488 | ||
d2427a71 | 1489 | \f |
0de94d4b JB |
1490 | |
1491 | /* Return nonzero if the G_floating register value in REG is equal to | |
1492 | zero for FP control instructions. */ | |
1493 | ||
1494 | static int | |
1495 | fp_register_zero_p (LONGEST reg) | |
1496 | { | |
1497 | /* Check that all bits except the sign bit are zero. */ | |
1498 | const LONGEST zero_mask = ((LONGEST) 1 << 63) ^ -1; | |
1499 | ||
1500 | return ((reg & zero_mask) == 0); | |
1501 | } | |
1502 | ||
1503 | /* Return the value of the sign bit for the G_floating register | |
1504 | value held in REG. */ | |
1505 | ||
1506 | static int | |
1507 | fp_register_sign_bit (LONGEST reg) | |
1508 | { | |
1509 | const LONGEST sign_mask = (LONGEST) 1 << 63; | |
1510 | ||
1511 | return ((reg & sign_mask) != 0); | |
1512 | } | |
1513 | ||
ec32e4be JT |
1514 | /* alpha_software_single_step() is called just before we want to resume |
1515 | the inferior, if we want to single-step it but there is no hardware | |
1516 | or kernel single-step support (NetBSD on Alpha, for example). We find | |
e0cd558a | 1517 | the target of the coming instruction and breakpoint it. */ |
ec32e4be JT |
1518 | |
1519 | static CORE_ADDR | |
0b1b3e42 | 1520 | alpha_next_pc (struct frame_info *frame, CORE_ADDR pc) |
ec32e4be | 1521 | { |
e17a4113 | 1522 | struct gdbarch *gdbarch = get_frame_arch (frame); |
ec32e4be JT |
1523 | unsigned int insn; |
1524 | unsigned int op; | |
551e4f2e | 1525 | int regno; |
ec32e4be JT |
1526 | int offset; |
1527 | LONGEST rav; | |
1528 | ||
e17a4113 | 1529 | insn = alpha_read_insn (gdbarch, pc); |
ec32e4be | 1530 | |
0963b4bd | 1531 | /* Opcode is top 6 bits. */ |
ec32e4be JT |
1532 | op = (insn >> 26) & 0x3f; |
1533 | ||
1534 | if (op == 0x1a) | |
1535 | { | |
1536 | /* Jump format: target PC is: | |
1537 | RB & ~3 */ | |
0b1b3e42 | 1538 | return (get_frame_register_unsigned (frame, (insn >> 16) & 0x1f) & ~3); |
ec32e4be JT |
1539 | } |
1540 | ||
1541 | if ((op & 0x30) == 0x30) | |
1542 | { | |
1543 | /* Branch format: target PC is: | |
1544 | (new PC) + (4 * sext(displacement)) */ | |
f8bf5763 PM |
1545 | if (op == 0x30 /* BR */ |
1546 | || op == 0x34) /* BSR */ | |
ec32e4be JT |
1547 | { |
1548 | branch_taken: | |
1549 | offset = (insn & 0x001fffff); | |
1550 | if (offset & 0x00100000) | |
1551 | offset |= 0xffe00000; | |
e8d2d628 MK |
1552 | offset *= ALPHA_INSN_SIZE; |
1553 | return (pc + ALPHA_INSN_SIZE + offset); | |
ec32e4be JT |
1554 | } |
1555 | ||
1556 | /* Need to determine if branch is taken; read RA. */ | |
551e4f2e JB |
1557 | regno = (insn >> 21) & 0x1f; |
1558 | switch (op) | |
1559 | { | |
1560 | case 0x31: /* FBEQ */ | |
1561 | case 0x36: /* FBGE */ | |
1562 | case 0x37: /* FBGT */ | |
1563 | case 0x33: /* FBLE */ | |
1564 | case 0x32: /* FBLT */ | |
1565 | case 0x35: /* FBNE */ | |
e17a4113 | 1566 | regno += gdbarch_fp0_regnum (gdbarch); |
551e4f2e JB |
1567 | } |
1568 | ||
0b1b3e42 | 1569 | rav = get_frame_register_signed (frame, regno); |
0de94d4b | 1570 | |
ec32e4be JT |
1571 | switch (op) |
1572 | { | |
1573 | case 0x38: /* BLBC */ | |
1574 | if ((rav & 1) == 0) | |
1575 | goto branch_taken; | |
1576 | break; | |
1577 | case 0x3c: /* BLBS */ | |
1578 | if (rav & 1) | |
1579 | goto branch_taken; | |
1580 | break; | |
1581 | case 0x39: /* BEQ */ | |
1582 | if (rav == 0) | |
1583 | goto branch_taken; | |
1584 | break; | |
1585 | case 0x3d: /* BNE */ | |
1586 | if (rav != 0) | |
1587 | goto branch_taken; | |
1588 | break; | |
1589 | case 0x3a: /* BLT */ | |
1590 | if (rav < 0) | |
1591 | goto branch_taken; | |
1592 | break; | |
1593 | case 0x3b: /* BLE */ | |
1594 | if (rav <= 0) | |
1595 | goto branch_taken; | |
1596 | break; | |
1597 | case 0x3f: /* BGT */ | |
1598 | if (rav > 0) | |
1599 | goto branch_taken; | |
1600 | break; | |
1601 | case 0x3e: /* BGE */ | |
1602 | if (rav >= 0) | |
1603 | goto branch_taken; | |
1604 | break; | |
d2427a71 | 1605 | |
0de94d4b JB |
1606 | /* Floating point branches. */ |
1607 | ||
1608 | case 0x31: /* FBEQ */ | |
1609 | if (fp_register_zero_p (rav)) | |
1610 | goto branch_taken; | |
1611 | break; | |
1612 | case 0x36: /* FBGE */ | |
1613 | if (fp_register_sign_bit (rav) == 0 || fp_register_zero_p (rav)) | |
1614 | goto branch_taken; | |
1615 | break; | |
1616 | case 0x37: /* FBGT */ | |
1617 | if (fp_register_sign_bit (rav) == 0 && ! fp_register_zero_p (rav)) | |
1618 | goto branch_taken; | |
1619 | break; | |
1620 | case 0x33: /* FBLE */ | |
1621 | if (fp_register_sign_bit (rav) == 1 || fp_register_zero_p (rav)) | |
1622 | goto branch_taken; | |
1623 | break; | |
1624 | case 0x32: /* FBLT */ | |
1625 | if (fp_register_sign_bit (rav) == 1 && ! fp_register_zero_p (rav)) | |
1626 | goto branch_taken; | |
1627 | break; | |
1628 | case 0x35: /* FBNE */ | |
1629 | if (! fp_register_zero_p (rav)) | |
1630 | goto branch_taken; | |
1631 | break; | |
ec32e4be JT |
1632 | } |
1633 | } | |
1634 | ||
1635 | /* Not a branch or branch not taken; target PC is: | |
1636 | pc + 4 */ | |
e8d2d628 | 1637 | return (pc + ALPHA_INSN_SIZE); |
ec32e4be JT |
1638 | } |
1639 | ||
e6590a1b | 1640 | int |
0b1b3e42 | 1641 | alpha_software_single_step (struct frame_info *frame) |
ec32e4be | 1642 | { |
a6d9a66e | 1643 | struct gdbarch *gdbarch = get_frame_arch (frame); |
6c95b8df | 1644 | struct address_space *aspace = get_frame_address_space (frame); |
e0cd558a | 1645 | CORE_ADDR pc, next_pc; |
ec32e4be | 1646 | |
0b1b3e42 UW |
1647 | pc = get_frame_pc (frame); |
1648 | next_pc = alpha_next_pc (frame, pc); | |
ec32e4be | 1649 | |
6c95b8df | 1650 | insert_single_step_breakpoint (gdbarch, aspace, next_pc); |
e6590a1b | 1651 | return 1; |
c906108c SS |
1652 | } |
1653 | ||
dc129d82 | 1654 | \f |
dc129d82 JT |
1655 | /* Initialize the current architecture based on INFO. If possible, re-use an |
1656 | architecture from ARCHES, which is a list of architectures already created | |
1657 | during this debugging session. | |
1658 | ||
1659 | Called e.g. at program startup, when reading a core file, and when reading | |
1660 | a binary file. */ | |
1661 | ||
1662 | static struct gdbarch * | |
1663 | alpha_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | |
1664 | { | |
1665 | struct gdbarch_tdep *tdep; | |
1666 | struct gdbarch *gdbarch; | |
dc129d82 JT |
1667 | |
1668 | /* Try to determine the ABI of the object we are loading. */ | |
4be87837 | 1669 | if (info.abfd != NULL && info.osabi == GDB_OSABI_UNKNOWN) |
dc129d82 | 1670 | { |
4be87837 DJ |
1671 | /* If it's an ECOFF file, assume it's OSF/1. */ |
1672 | if (bfd_get_flavour (info.abfd) == bfd_target_ecoff_flavour) | |
aff87235 | 1673 | info.osabi = GDB_OSABI_OSF1; |
dc129d82 JT |
1674 | } |
1675 | ||
1676 | /* Find a candidate among extant architectures. */ | |
4be87837 DJ |
1677 | arches = gdbarch_list_lookup_by_info (arches, &info); |
1678 | if (arches != NULL) | |
1679 | return arches->gdbarch; | |
dc129d82 JT |
1680 | |
1681 | tdep = xmalloc (sizeof (struct gdbarch_tdep)); | |
1682 | gdbarch = gdbarch_alloc (&info, tdep); | |
1683 | ||
d2427a71 RH |
1684 | /* Lowest text address. This is used by heuristic_proc_start() |
1685 | to decide when to stop looking. */ | |
594706e6 | 1686 | tdep->vm_min_address = (CORE_ADDR) 0x120000000LL; |
d9b023cc | 1687 | |
36a6271d | 1688 | tdep->dynamic_sigtramp_offset = NULL; |
5868c862 | 1689 | tdep->sigcontext_addr = NULL; |
138e7be5 MK |
1690 | tdep->sc_pc_offset = 2 * 8; |
1691 | tdep->sc_regs_offset = 4 * 8; | |
1692 | tdep->sc_fpregs_offset = tdep->sc_regs_offset + 32 * 8 + 8; | |
36a6271d | 1693 | |
0963b4bd | 1694 | tdep->jb_pc = -1; /* longjmp support not enabled by default. */ |
accc6d1f | 1695 | |
9823e921 RH |
1696 | tdep->return_in_memory = alpha_return_in_memory_always; |
1697 | ||
dc129d82 JT |
1698 | /* Type sizes */ |
1699 | set_gdbarch_short_bit (gdbarch, 16); | |
1700 | set_gdbarch_int_bit (gdbarch, 32); | |
1701 | set_gdbarch_long_bit (gdbarch, 64); | |
1702 | set_gdbarch_long_long_bit (gdbarch, 64); | |
1703 | set_gdbarch_float_bit (gdbarch, 32); | |
1704 | set_gdbarch_double_bit (gdbarch, 64); | |
1705 | set_gdbarch_long_double_bit (gdbarch, 64); | |
1706 | set_gdbarch_ptr_bit (gdbarch, 64); | |
1707 | ||
1708 | /* Register info */ | |
1709 | set_gdbarch_num_regs (gdbarch, ALPHA_NUM_REGS); | |
1710 | set_gdbarch_sp_regnum (gdbarch, ALPHA_SP_REGNUM); | |
dc129d82 JT |
1711 | set_gdbarch_pc_regnum (gdbarch, ALPHA_PC_REGNUM); |
1712 | set_gdbarch_fp0_regnum (gdbarch, ALPHA_FP0_REGNUM); | |
1713 | ||
1714 | set_gdbarch_register_name (gdbarch, alpha_register_name); | |
c483c494 | 1715 | set_gdbarch_register_type (gdbarch, alpha_register_type); |
dc129d82 JT |
1716 | |
1717 | set_gdbarch_cannot_fetch_register (gdbarch, alpha_cannot_fetch_register); | |
1718 | set_gdbarch_cannot_store_register (gdbarch, alpha_cannot_store_register); | |
1719 | ||
c483c494 RH |
1720 | set_gdbarch_convert_register_p (gdbarch, alpha_convert_register_p); |
1721 | set_gdbarch_register_to_value (gdbarch, alpha_register_to_value); | |
1722 | set_gdbarch_value_to_register (gdbarch, alpha_value_to_register); | |
dc129d82 | 1723 | |
615967cb RH |
1724 | set_gdbarch_register_reggroup_p (gdbarch, alpha_register_reggroup_p); |
1725 | ||
d2427a71 | 1726 | /* Prologue heuristics. */ |
dc129d82 JT |
1727 | set_gdbarch_skip_prologue (gdbarch, alpha_skip_prologue); |
1728 | ||
5ef165c2 RH |
1729 | /* Disassembler. */ |
1730 | set_gdbarch_print_insn (gdbarch, print_insn_alpha); | |
1731 | ||
d2427a71 | 1732 | /* Call info. */ |
dc129d82 | 1733 | |
9823e921 | 1734 | set_gdbarch_return_value (gdbarch, alpha_return_value); |
dc129d82 JT |
1735 | |
1736 | /* Settings for calling functions in the inferior. */ | |
c88e30c0 | 1737 | set_gdbarch_push_dummy_call (gdbarch, alpha_push_dummy_call); |
d2427a71 RH |
1738 | |
1739 | /* Methods for saving / extracting a dummy frame's ID. */ | |
6834c9bb | 1740 | set_gdbarch_dummy_id (gdbarch, alpha_dummy_id); |
d2427a71 RH |
1741 | |
1742 | /* Return the unwound PC value. */ | |
1743 | set_gdbarch_unwind_pc (gdbarch, alpha_unwind_pc); | |
dc129d82 JT |
1744 | |
1745 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
36a6271d | 1746 | set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target); |
dc129d82 | 1747 | |
95b80706 | 1748 | set_gdbarch_breakpoint_from_pc (gdbarch, alpha_breakpoint_from_pc); |
e8d2d628 | 1749 | set_gdbarch_decr_pc_after_break (gdbarch, ALPHA_INSN_SIZE); |
9d519230 | 1750 | set_gdbarch_cannot_step_breakpoint (gdbarch, 1); |
95b80706 | 1751 | |
44dffaac | 1752 | /* Hook in ABI-specific overrides, if they have been registered. */ |
4be87837 | 1753 | gdbarch_init_osabi (info, gdbarch); |
44dffaac | 1754 | |
accc6d1f JT |
1755 | /* Now that we have tuned the configuration, set a few final things |
1756 | based on what the OS ABI has told us. */ | |
1757 | ||
1758 | if (tdep->jb_pc >= 0) | |
1759 | set_gdbarch_get_longjmp_target (gdbarch, alpha_get_longjmp_target); | |
1760 | ||
6834c9bb JB |
1761 | frame_unwind_append_unwinder (gdbarch, &alpha_sigtramp_frame_unwind); |
1762 | frame_unwind_append_unwinder (gdbarch, &alpha_heuristic_frame_unwind); | |
dc129d82 | 1763 | |
d2427a71 | 1764 | frame_base_set_default (gdbarch, &alpha_heuristic_frame_base); |
accc6d1f | 1765 | |
d2427a71 | 1766 | return gdbarch; |
dc129d82 JT |
1767 | } |
1768 | ||
baa490c4 RH |
1769 | void |
1770 | alpha_dwarf2_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) | |
1771 | { | |
6834c9bb | 1772 | dwarf2_append_unwinders (gdbarch); |
336d1bba | 1773 | frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer); |
baa490c4 RH |
1774 | } |
1775 | ||
a78f21af AC |
1776 | extern initialize_file_ftype _initialize_alpha_tdep; /* -Wmissing-prototypes */ |
1777 | ||
c906108c | 1778 | void |
fba45db2 | 1779 | _initialize_alpha_tdep (void) |
c906108c SS |
1780 | { |
1781 | struct cmd_list_element *c; | |
1782 | ||
d2427a71 | 1783 | gdbarch_register (bfd_arch_alpha, alpha_gdbarch_init, NULL); |
c906108c SS |
1784 | |
1785 | /* Let the user set the fence post for heuristic_proc_start. */ | |
1786 | ||
1787 | /* We really would like to have both "0" and "unlimited" work, but | |
1788 | command.c doesn't deal with that. So make it a var_zinteger | |
1789 | because the user can always use "999999" or some such for unlimited. */ | |
edefbb7c AC |
1790 | /* We need to throw away the frame cache when we set this, since it |
1791 | might change our ability to get backtraces. */ | |
1792 | add_setshow_zinteger_cmd ("heuristic-fence-post", class_support, | |
7915a72c AC |
1793 | &heuristic_fence_post, _("\ |
1794 | Set the distance searched for the start of a function."), _("\ | |
1795 | Show the distance searched for the start of a function."), _("\ | |
c906108c SS |
1796 | If you are debugging a stripped executable, GDB needs to search through the\n\ |
1797 | program for the start of a function. This command sets the distance of the\n\ | |
323e0a4a | 1798 | search. The only need to set it is when debugging a stripped executable."), |
2c5b56ce | 1799 | reinit_frame_cache_sfunc, |
0963b4bd MS |
1800 | NULL, /* FIXME: i18n: The distance searched for |
1801 | the start of a function is \"%d\". */ | |
edefbb7c | 1802 | &setlist, &showlist); |
c906108c | 1803 | } |