Commit | Line | Data |
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c906108c | 1 | /* Target-dependent code for the ALPHA architecture, for GDB, the GNU Debugger. |
0fd88904 | 2 | |
197e01b6 | 3 | Copyright (C) 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, |
0fd88904 | 4 | 2002, 2003, 2005 Free Software Foundation, Inc. |
c906108c | 5 | |
c5aa993b | 6 | This file is part of GDB. |
c906108c | 7 | |
c5aa993b JM |
8 | This program is free software; you can redistribute it and/or modify |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2 of the License, or | |
11 | (at your option) any later version. | |
c906108c | 12 | |
c5aa993b JM |
13 | This program is distributed in the hope that it will be useful, |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
c906108c | 17 | |
c5aa993b JM |
18 | You should have received a copy of the GNU General Public License |
19 | along with this program; if not, write to the Free Software | |
197e01b6 EZ |
20 | Foundation, Inc., 51 Franklin Street, Fifth Floor, |
21 | Boston, MA 02110-1301, USA. */ | |
c906108c SS |
22 | |
23 | #include "defs.h" | |
615967cb | 24 | #include "doublest.h" |
c906108c | 25 | #include "frame.h" |
d2427a71 RH |
26 | #include "frame-unwind.h" |
27 | #include "frame-base.h" | |
baa490c4 | 28 | #include "dwarf2-frame.h" |
c906108c SS |
29 | #include "inferior.h" |
30 | #include "symtab.h" | |
31 | #include "value.h" | |
32 | #include "gdbcmd.h" | |
33 | #include "gdbcore.h" | |
34 | #include "dis-asm.h" | |
35 | #include "symfile.h" | |
36 | #include "objfiles.h" | |
37 | #include "gdb_string.h" | |
c5f0f3d0 | 38 | #include "linespec.h" |
4e052eda | 39 | #include "regcache.h" |
615967cb | 40 | #include "reggroups.h" |
dc129d82 | 41 | #include "arch-utils.h" |
4be87837 | 42 | #include "osabi.h" |
fe898f56 | 43 | #include "block.h" |
7d9b040b | 44 | #include "infcall.h" |
dc129d82 JT |
45 | |
46 | #include "elf-bfd.h" | |
47 | ||
48 | #include "alpha-tdep.h" | |
49 | ||
c906108c | 50 | \f |
515921d7 JB |
51 | /* Return the name of the REGNO register. |
52 | ||
53 | An empty name corresponds to a register number that used to | |
54 | be used for a virtual register. That virtual register has | |
55 | been removed, but the index is still reserved to maintain | |
56 | compatibility with existing remote alpha targets. */ | |
57 | ||
fa88f677 | 58 | static const char * |
636a6dfc JT |
59 | alpha_register_name (int regno) |
60 | { | |
5ab84872 | 61 | static const char * const register_names[] = |
636a6dfc JT |
62 | { |
63 | "v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6", | |
64 | "t7", "s0", "s1", "s2", "s3", "s4", "s5", "fp", | |
65 | "a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9", | |
66 | "t10", "t11", "ra", "t12", "at", "gp", "sp", "zero", | |
67 | "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", | |
68 | "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", | |
69 | "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", | |
70 | "f24", "f25", "f26", "f27", "f28", "f29", "f30", "fpcr", | |
44d88583 | 71 | "pc", "", "unique" |
636a6dfc JT |
72 | }; |
73 | ||
74 | if (regno < 0) | |
5ab84872 | 75 | return NULL; |
636a6dfc | 76 | if (regno >= (sizeof(register_names) / sizeof(*register_names))) |
5ab84872 RH |
77 | return NULL; |
78 | return register_names[regno]; | |
636a6dfc | 79 | } |
d734c450 | 80 | |
dc129d82 | 81 | static int |
d734c450 JT |
82 | alpha_cannot_fetch_register (int regno) |
83 | { | |
515921d7 JB |
84 | return (regno == ALPHA_ZERO_REGNUM |
85 | || strlen (alpha_register_name (regno)) == 0); | |
d734c450 JT |
86 | } |
87 | ||
dc129d82 | 88 | static int |
d734c450 JT |
89 | alpha_cannot_store_register (int regno) |
90 | { | |
515921d7 JB |
91 | return (regno == ALPHA_ZERO_REGNUM |
92 | || strlen (alpha_register_name (regno)) == 0); | |
d734c450 JT |
93 | } |
94 | ||
dc129d82 | 95 | static struct type * |
c483c494 | 96 | alpha_register_type (struct gdbarch *gdbarch, int regno) |
0d056799 | 97 | { |
72667056 RH |
98 | if (regno == ALPHA_SP_REGNUM || regno == ALPHA_GP_REGNUM) |
99 | return builtin_type_void_data_ptr; | |
100 | if (regno == ALPHA_PC_REGNUM) | |
101 | return builtin_type_void_func_ptr; | |
102 | ||
103 | /* Don't need to worry about little vs big endian until | |
104 | some jerk tries to port to alpha-unicosmk. */ | |
b38b6be2 | 105 | if (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 31) |
72667056 RH |
106 | return builtin_type_ieee_double_little; |
107 | ||
108 | return builtin_type_int64; | |
0d056799 | 109 | } |
f8453e34 | 110 | |
615967cb RH |
111 | /* Is REGNUM a member of REGGROUP? */ |
112 | ||
113 | static int | |
114 | alpha_register_reggroup_p (struct gdbarch *gdbarch, int regnum, | |
115 | struct reggroup *group) | |
116 | { | |
117 | /* Filter out any registers eliminated, but whose regnum is | |
118 | reserved for backward compatibility, e.g. the vfp. */ | |
119 | if (REGISTER_NAME (regnum) == NULL || *REGISTER_NAME (regnum) == '\0') | |
120 | return 0; | |
121 | ||
df4a182b RH |
122 | if (group == all_reggroup) |
123 | return 1; | |
124 | ||
125 | /* Zero should not be saved or restored. Technically it is a general | |
126 | register (just as $f31 would be a float if we represented it), but | |
127 | there's no point displaying it during "info regs", so leave it out | |
128 | of all groups except for "all". */ | |
129 | if (regnum == ALPHA_ZERO_REGNUM) | |
130 | return 0; | |
131 | ||
132 | /* All other registers are saved and restored. */ | |
133 | if (group == save_reggroup || group == restore_reggroup) | |
615967cb RH |
134 | return 1; |
135 | ||
136 | /* All other groups are non-overlapping. */ | |
137 | ||
138 | /* Since this is really a PALcode memory slot... */ | |
139 | if (regnum == ALPHA_UNIQUE_REGNUM) | |
140 | return group == system_reggroup; | |
141 | ||
142 | /* Force the FPCR to be considered part of the floating point state. */ | |
143 | if (regnum == ALPHA_FPCR_REGNUM) | |
144 | return group == float_reggroup; | |
145 | ||
146 | if (regnum >= ALPHA_FP0_REGNUM && regnum < ALPHA_FP0_REGNUM + 31) | |
147 | return group == float_reggroup; | |
148 | else | |
149 | return group == general_reggroup; | |
150 | } | |
151 | ||
c483c494 RH |
152 | /* The following represents exactly the conversion performed by |
153 | the LDS instruction. This applies to both single-precision | |
154 | floating point and 32-bit integers. */ | |
155 | ||
156 | static void | |
157 | alpha_lds (void *out, const void *in) | |
158 | { | |
159 | ULONGEST mem = extract_unsigned_integer (in, 4); | |
160 | ULONGEST frac = (mem >> 0) & 0x7fffff; | |
161 | ULONGEST sign = (mem >> 31) & 1; | |
162 | ULONGEST exp_msb = (mem >> 30) & 1; | |
163 | ULONGEST exp_low = (mem >> 23) & 0x7f; | |
164 | ULONGEST exp, reg; | |
165 | ||
166 | exp = (exp_msb << 10) | exp_low; | |
167 | if (exp_msb) | |
168 | { | |
169 | if (exp_low == 0x7f) | |
170 | exp = 0x7ff; | |
171 | } | |
172 | else | |
173 | { | |
174 | if (exp_low != 0x00) | |
175 | exp |= 0x380; | |
176 | } | |
177 | ||
178 | reg = (sign << 63) | (exp << 52) | (frac << 29); | |
179 | store_unsigned_integer (out, 8, reg); | |
180 | } | |
181 | ||
182 | /* Similarly, this represents exactly the conversion performed by | |
183 | the STS instruction. */ | |
184 | ||
39efb398 | 185 | static void |
c483c494 RH |
186 | alpha_sts (void *out, const void *in) |
187 | { | |
188 | ULONGEST reg, mem; | |
189 | ||
190 | reg = extract_unsigned_integer (in, 8); | |
191 | mem = ((reg >> 32) & 0xc0000000) | ((reg >> 29) & 0x3fffffff); | |
192 | store_unsigned_integer (out, 4, mem); | |
193 | } | |
194 | ||
d2427a71 RH |
195 | /* The alpha needs a conversion between register and memory format if the |
196 | register is a floating point register and memory format is float, as the | |
197 | register format must be double or memory format is an integer with 4 | |
198 | bytes or less, as the representation of integers in floating point | |
199 | registers is different. */ | |
200 | ||
c483c494 | 201 | static int |
ff2e87ac | 202 | alpha_convert_register_p (int regno, struct type *type) |
14696584 | 203 | { |
c483c494 | 204 | return (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 31); |
14696584 RH |
205 | } |
206 | ||
d2427a71 | 207 | static void |
ff2e87ac | 208 | alpha_register_to_value (struct frame_info *frame, int regnum, |
5b819568 | 209 | struct type *valtype, gdb_byte *out) |
5868c862 | 210 | { |
ff2e87ac AC |
211 | char in[MAX_REGISTER_SIZE]; |
212 | frame_register_read (frame, regnum, in); | |
c483c494 | 213 | switch (TYPE_LENGTH (valtype)) |
d2427a71 | 214 | { |
c483c494 RH |
215 | case 4: |
216 | alpha_sts (out, in); | |
217 | break; | |
218 | case 8: | |
219 | memcpy (out, in, 8); | |
220 | break; | |
221 | default: | |
323e0a4a | 222 | error (_("Cannot retrieve value from floating point register")); |
d2427a71 | 223 | } |
d2427a71 | 224 | } |
5868c862 | 225 | |
d2427a71 | 226 | static void |
ff2e87ac | 227 | alpha_value_to_register (struct frame_info *frame, int regnum, |
5b819568 | 228 | struct type *valtype, const gdb_byte *in) |
d2427a71 | 229 | { |
ff2e87ac | 230 | char out[MAX_REGISTER_SIZE]; |
c483c494 | 231 | switch (TYPE_LENGTH (valtype)) |
d2427a71 | 232 | { |
c483c494 RH |
233 | case 4: |
234 | alpha_lds (out, in); | |
235 | break; | |
236 | case 8: | |
237 | memcpy (out, in, 8); | |
238 | break; | |
239 | default: | |
323e0a4a | 240 | error (_("Cannot store value in floating point register")); |
d2427a71 | 241 | } |
ff2e87ac | 242 | put_frame_register (frame, regnum, out); |
5868c862 JT |
243 | } |
244 | ||
d2427a71 RH |
245 | \f |
246 | /* The alpha passes the first six arguments in the registers, the rest on | |
c88e30c0 RH |
247 | the stack. The register arguments are stored in ARG_REG_BUFFER, and |
248 | then moved into the register file; this simplifies the passing of a | |
249 | large struct which extends from the registers to the stack, plus avoids | |
250 | three ptrace invocations per word. | |
251 | ||
252 | We don't bother tracking which register values should go in integer | |
253 | regs or fp regs; we load the same values into both. | |
254 | ||
d2427a71 RH |
255 | If the called function is returning a structure, the address of the |
256 | structure to be returned is passed as a hidden first argument. */ | |
c906108c | 257 | |
d2427a71 | 258 | static CORE_ADDR |
7d9b040b | 259 | alpha_push_dummy_call (struct gdbarch *gdbarch, struct value *function, |
c88e30c0 RH |
260 | struct regcache *regcache, CORE_ADDR bp_addr, |
261 | int nargs, struct value **args, CORE_ADDR sp, | |
262 | int struct_return, CORE_ADDR struct_addr) | |
c906108c | 263 | { |
d2427a71 RH |
264 | int i; |
265 | int accumulate_size = struct_return ? 8 : 0; | |
d2427a71 | 266 | struct alpha_arg |
c906108c | 267 | { |
d2427a71 RH |
268 | char *contents; |
269 | int len; | |
270 | int offset; | |
271 | }; | |
c88e30c0 RH |
272 | struct alpha_arg *alpha_args |
273 | = (struct alpha_arg *) alloca (nargs * sizeof (struct alpha_arg)); | |
52f0bd74 | 274 | struct alpha_arg *m_arg; |
c88e30c0 | 275 | char arg_reg_buffer[ALPHA_REGISTER_SIZE * ALPHA_NUM_ARG_REGS]; |
d2427a71 | 276 | int required_arg_regs; |
7d9b040b | 277 | CORE_ADDR func_addr = find_function_addr (function, NULL); |
c906108c | 278 | |
c88e30c0 RH |
279 | /* The ABI places the address of the called function in T12. */ |
280 | regcache_cooked_write_signed (regcache, ALPHA_T12_REGNUM, func_addr); | |
281 | ||
282 | /* Set the return address register to point to the entry point | |
283 | of the program, where a breakpoint lies in wait. */ | |
284 | regcache_cooked_write_signed (regcache, ALPHA_RA_REGNUM, bp_addr); | |
285 | ||
286 | /* Lay out the arguments in memory. */ | |
d2427a71 RH |
287 | for (i = 0, m_arg = alpha_args; i < nargs; i++, m_arg++) |
288 | { | |
289 | struct value *arg = args[i]; | |
4991999e | 290 | struct type *arg_type = check_typedef (value_type (arg)); |
c88e30c0 | 291 | |
d2427a71 RH |
292 | /* Cast argument to long if necessary as the compiler does it too. */ |
293 | switch (TYPE_CODE (arg_type)) | |
c906108c | 294 | { |
d2427a71 RH |
295 | case TYPE_CODE_INT: |
296 | case TYPE_CODE_BOOL: | |
297 | case TYPE_CODE_CHAR: | |
298 | case TYPE_CODE_RANGE: | |
299 | case TYPE_CODE_ENUM: | |
0ede8eca | 300 | if (TYPE_LENGTH (arg_type) == 4) |
d2427a71 | 301 | { |
0ede8eca RH |
302 | /* 32-bit values must be sign-extended to 64 bits |
303 | even if the base data type is unsigned. */ | |
304 | arg_type = builtin_type_int32; | |
305 | arg = value_cast (arg_type, arg); | |
306 | } | |
307 | if (TYPE_LENGTH (arg_type) < ALPHA_REGISTER_SIZE) | |
308 | { | |
309 | arg_type = builtin_type_int64; | |
d2427a71 RH |
310 | arg = value_cast (arg_type, arg); |
311 | } | |
312 | break; | |
7b5e1cb3 | 313 | |
c88e30c0 RH |
314 | case TYPE_CODE_FLT: |
315 | /* "float" arguments loaded in registers must be passed in | |
316 | register format, aka "double". */ | |
317 | if (accumulate_size < sizeof (arg_reg_buffer) | |
318 | && TYPE_LENGTH (arg_type) == 4) | |
319 | { | |
eb4edb88 | 320 | arg_type = builtin_type_ieee_double_little; |
c88e30c0 RH |
321 | arg = value_cast (arg_type, arg); |
322 | } | |
323 | /* Tru64 5.1 has a 128-bit long double, and passes this by | |
324 | invisible reference. No one else uses this data type. */ | |
325 | else if (TYPE_LENGTH (arg_type) == 16) | |
326 | { | |
327 | /* Allocate aligned storage. */ | |
328 | sp = (sp & -16) - 16; | |
329 | ||
330 | /* Write the real data into the stack. */ | |
0fd88904 | 331 | write_memory (sp, value_contents (arg), 16); |
c88e30c0 RH |
332 | |
333 | /* Construct the indirection. */ | |
334 | arg_type = lookup_pointer_type (arg_type); | |
335 | arg = value_from_pointer (arg_type, sp); | |
336 | } | |
337 | break; | |
7b5e1cb3 RH |
338 | |
339 | case TYPE_CODE_COMPLEX: | |
340 | /* ??? The ABI says that complex values are passed as two | |
341 | separate scalar values. This distinction only matters | |
342 | for complex float. However, GCC does not implement this. */ | |
343 | ||
344 | /* Tru64 5.1 has a 128-bit long double, and passes this by | |
345 | invisible reference. */ | |
346 | if (TYPE_LENGTH (arg_type) == 32) | |
347 | { | |
348 | /* Allocate aligned storage. */ | |
349 | sp = (sp & -16) - 16; | |
350 | ||
351 | /* Write the real data into the stack. */ | |
0fd88904 | 352 | write_memory (sp, value_contents (arg), 32); |
7b5e1cb3 RH |
353 | |
354 | /* Construct the indirection. */ | |
355 | arg_type = lookup_pointer_type (arg_type); | |
356 | arg = value_from_pointer (arg_type, sp); | |
357 | } | |
358 | break; | |
359 | ||
d2427a71 RH |
360 | default: |
361 | break; | |
c906108c | 362 | } |
d2427a71 RH |
363 | m_arg->len = TYPE_LENGTH (arg_type); |
364 | m_arg->offset = accumulate_size; | |
365 | accumulate_size = (accumulate_size + m_arg->len + 7) & ~7; | |
0fd88904 | 366 | m_arg->contents = value_contents_writeable (arg); |
c906108c SS |
367 | } |
368 | ||
d2427a71 RH |
369 | /* Determine required argument register loads, loading an argument register |
370 | is expensive as it uses three ptrace calls. */ | |
371 | required_arg_regs = accumulate_size / 8; | |
372 | if (required_arg_regs > ALPHA_NUM_ARG_REGS) | |
373 | required_arg_regs = ALPHA_NUM_ARG_REGS; | |
c906108c | 374 | |
d2427a71 | 375 | /* Make room for the arguments on the stack. */ |
c88e30c0 RH |
376 | if (accumulate_size < sizeof(arg_reg_buffer)) |
377 | accumulate_size = 0; | |
378 | else | |
379 | accumulate_size -= sizeof(arg_reg_buffer); | |
d2427a71 | 380 | sp -= accumulate_size; |
c906108c | 381 | |
c88e30c0 | 382 | /* Keep sp aligned to a multiple of 16 as the ABI requires. */ |
d2427a71 | 383 | sp &= ~15; |
c906108c | 384 | |
d2427a71 RH |
385 | /* `Push' arguments on the stack. */ |
386 | for (i = nargs; m_arg--, --i >= 0;) | |
c906108c | 387 | { |
c88e30c0 RH |
388 | char *contents = m_arg->contents; |
389 | int offset = m_arg->offset; | |
390 | int len = m_arg->len; | |
391 | ||
392 | /* Copy the bytes destined for registers into arg_reg_buffer. */ | |
393 | if (offset < sizeof(arg_reg_buffer)) | |
394 | { | |
395 | if (offset + len <= sizeof(arg_reg_buffer)) | |
396 | { | |
397 | memcpy (arg_reg_buffer + offset, contents, len); | |
398 | continue; | |
399 | } | |
400 | else | |
401 | { | |
402 | int tlen = sizeof(arg_reg_buffer) - offset; | |
403 | memcpy (arg_reg_buffer + offset, contents, tlen); | |
404 | offset += tlen; | |
405 | contents += tlen; | |
406 | len -= tlen; | |
407 | } | |
408 | } | |
409 | ||
410 | /* Everything else goes to the stack. */ | |
411 | write_memory (sp + offset - sizeof(arg_reg_buffer), contents, len); | |
c906108c | 412 | } |
c88e30c0 RH |
413 | if (struct_return) |
414 | store_unsigned_integer (arg_reg_buffer, ALPHA_REGISTER_SIZE, struct_addr); | |
c906108c | 415 | |
d2427a71 RH |
416 | /* Load the argument registers. */ |
417 | for (i = 0; i < required_arg_regs; i++) | |
418 | { | |
09cc52fd RH |
419 | regcache_cooked_write (regcache, ALPHA_A0_REGNUM + i, |
420 | arg_reg_buffer + i*ALPHA_REGISTER_SIZE); | |
421 | regcache_cooked_write (regcache, ALPHA_FPA0_REGNUM + i, | |
422 | arg_reg_buffer + i*ALPHA_REGISTER_SIZE); | |
d2427a71 | 423 | } |
c906108c | 424 | |
09cc52fd RH |
425 | /* Finally, update the stack pointer. */ |
426 | regcache_cooked_write_signed (regcache, ALPHA_SP_REGNUM, sp); | |
427 | ||
c88e30c0 | 428 | return sp; |
c906108c SS |
429 | } |
430 | ||
5ec2bb99 RH |
431 | /* Extract from REGCACHE the value about to be returned from a function |
432 | and copy it into VALBUF. */ | |
d2427a71 | 433 | |
dc129d82 | 434 | static void |
5ec2bb99 | 435 | alpha_extract_return_value (struct type *valtype, struct regcache *regcache, |
5b819568 | 436 | gdb_byte *valbuf) |
140f9984 | 437 | { |
7b5e1cb3 | 438 | int length = TYPE_LENGTH (valtype); |
5ec2bb99 RH |
439 | char raw_buffer[ALPHA_REGISTER_SIZE]; |
440 | ULONGEST l; | |
441 | ||
442 | switch (TYPE_CODE (valtype)) | |
443 | { | |
444 | case TYPE_CODE_FLT: | |
7b5e1cb3 | 445 | switch (length) |
5ec2bb99 RH |
446 | { |
447 | case 4: | |
448 | regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, raw_buffer); | |
c483c494 | 449 | alpha_sts (valbuf, raw_buffer); |
5ec2bb99 RH |
450 | break; |
451 | ||
452 | case 8: | |
453 | regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf); | |
454 | break; | |
455 | ||
24064b5c RH |
456 | case 16: |
457 | regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &l); | |
458 | read_memory (l, valbuf, 16); | |
459 | break; | |
460 | ||
5ec2bb99 | 461 | default: |
323e0a4a | 462 | internal_error (__FILE__, __LINE__, _("unknown floating point width")); |
5ec2bb99 RH |
463 | } |
464 | break; | |
465 | ||
7b5e1cb3 RH |
466 | case TYPE_CODE_COMPLEX: |
467 | switch (length) | |
468 | { | |
469 | case 8: | |
470 | /* ??? This isn't correct wrt the ABI, but it's what GCC does. */ | |
471 | regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf); | |
472 | break; | |
473 | ||
474 | case 16: | |
475 | regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf); | |
476 | regcache_cooked_read (regcache, ALPHA_FP0_REGNUM+1, | |
477 | (char *)valbuf + 8); | |
478 | break; | |
479 | ||
480 | case 32: | |
481 | regcache_cooked_read_signed (regcache, ALPHA_V0_REGNUM, &l); | |
482 | read_memory (l, valbuf, 32); | |
483 | break; | |
484 | ||
485 | default: | |
323e0a4a | 486 | internal_error (__FILE__, __LINE__, _("unknown floating point width")); |
7b5e1cb3 RH |
487 | } |
488 | break; | |
489 | ||
5ec2bb99 RH |
490 | default: |
491 | /* Assume everything else degenerates to an integer. */ | |
492 | regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &l); | |
7b5e1cb3 | 493 | store_unsigned_integer (valbuf, length, l); |
5ec2bb99 RH |
494 | break; |
495 | } | |
140f9984 JT |
496 | } |
497 | ||
5ec2bb99 RH |
498 | /* Insert the given value into REGCACHE as if it was being |
499 | returned by a function. */ | |
0d056799 | 500 | |
d2427a71 | 501 | static void |
5ec2bb99 | 502 | alpha_store_return_value (struct type *valtype, struct regcache *regcache, |
5b819568 | 503 | const gdb_byte *valbuf) |
c906108c | 504 | { |
d2427a71 | 505 | int length = TYPE_LENGTH (valtype); |
5ec2bb99 RH |
506 | char raw_buffer[ALPHA_REGISTER_SIZE]; |
507 | ULONGEST l; | |
d2427a71 | 508 | |
5ec2bb99 | 509 | switch (TYPE_CODE (valtype)) |
c906108c | 510 | { |
5ec2bb99 RH |
511 | case TYPE_CODE_FLT: |
512 | switch (length) | |
513 | { | |
514 | case 4: | |
c483c494 | 515 | alpha_lds (raw_buffer, valbuf); |
f75d70cc RH |
516 | regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, raw_buffer); |
517 | break; | |
5ec2bb99 RH |
518 | |
519 | case 8: | |
520 | regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf); | |
521 | break; | |
522 | ||
24064b5c RH |
523 | case 16: |
524 | /* FIXME: 128-bit long doubles are returned like structures: | |
525 | by writing into indirect storage provided by the caller | |
526 | as the first argument. */ | |
323e0a4a | 527 | error (_("Cannot set a 128-bit long double return value.")); |
24064b5c | 528 | |
5ec2bb99 | 529 | default: |
323e0a4a | 530 | internal_error (__FILE__, __LINE__, _("unknown floating point width")); |
5ec2bb99 RH |
531 | } |
532 | break; | |
d2427a71 | 533 | |
7b5e1cb3 RH |
534 | case TYPE_CODE_COMPLEX: |
535 | switch (length) | |
536 | { | |
537 | case 8: | |
538 | /* ??? This isn't correct wrt the ABI, but it's what GCC does. */ | |
539 | regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf); | |
540 | break; | |
541 | ||
542 | case 16: | |
543 | regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf); | |
544 | regcache_cooked_write (regcache, ALPHA_FP0_REGNUM+1, | |
545 | (const char *)valbuf + 8); | |
546 | break; | |
547 | ||
548 | case 32: | |
549 | /* FIXME: 128-bit long doubles are returned like structures: | |
550 | by writing into indirect storage provided by the caller | |
551 | as the first argument. */ | |
323e0a4a | 552 | error (_("Cannot set a 128-bit long double return value.")); |
7b5e1cb3 RH |
553 | |
554 | default: | |
323e0a4a | 555 | internal_error (__FILE__, __LINE__, _("unknown floating point width")); |
7b5e1cb3 RH |
556 | } |
557 | break; | |
558 | ||
5ec2bb99 RH |
559 | default: |
560 | /* Assume everything else degenerates to an integer. */ | |
0ede8eca RH |
561 | /* 32-bit values must be sign-extended to 64 bits |
562 | even if the base data type is unsigned. */ | |
563 | if (length == 4) | |
564 | valtype = builtin_type_int32; | |
5ec2bb99 RH |
565 | l = unpack_long (valtype, valbuf); |
566 | regcache_cooked_write_unsigned (regcache, ALPHA_V0_REGNUM, l); | |
567 | break; | |
568 | } | |
c906108c SS |
569 | } |
570 | ||
9823e921 RH |
571 | static enum return_value_convention |
572 | alpha_return_value (struct gdbarch *gdbarch, struct type *type, | |
573 | struct regcache *regcache, gdb_byte *readbuf, | |
574 | const gdb_byte *writebuf) | |
575 | { | |
576 | enum type_code code = TYPE_CODE (type); | |
577 | ||
578 | if ((code == TYPE_CODE_STRUCT | |
579 | || code == TYPE_CODE_UNION | |
580 | || code == TYPE_CODE_ARRAY) | |
581 | && gdbarch_tdep (gdbarch)->return_in_memory (type)) | |
582 | { | |
583 | if (readbuf) | |
584 | { | |
585 | ULONGEST addr; | |
586 | regcache_raw_read_unsigned (regcache, ALPHA_V0_REGNUM, &addr); | |
587 | read_memory (addr, readbuf, TYPE_LENGTH (type)); | |
588 | } | |
589 | ||
590 | return RETURN_VALUE_ABI_RETURNS_ADDRESS; | |
591 | } | |
592 | ||
593 | if (readbuf) | |
594 | alpha_extract_return_value (type, regcache, readbuf); | |
595 | if (writebuf) | |
596 | alpha_store_return_value (type, regcache, writebuf); | |
597 | ||
598 | return RETURN_VALUE_REGISTER_CONVENTION; | |
599 | } | |
600 | ||
601 | static int | |
602 | alpha_return_in_memory_always (struct type *type) | |
603 | { | |
604 | return 1; | |
605 | } | |
d2427a71 RH |
606 | \f |
607 | static const unsigned char * | |
608 | alpha_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr) | |
c906108c | 609 | { |
d2427a71 RH |
610 | static const unsigned char alpha_breakpoint[] = |
611 | { 0x80, 0, 0, 0 }; /* call_pal bpt */ | |
c906108c | 612 | |
d2427a71 RH |
613 | *lenptr = sizeof(alpha_breakpoint); |
614 | return (alpha_breakpoint); | |
615 | } | |
c906108c | 616 | |
d2427a71 RH |
617 | \f |
618 | /* This returns the PC of the first insn after the prologue. | |
619 | If we can't find the prologue, then return 0. */ | |
c906108c | 620 | |
d2427a71 RH |
621 | CORE_ADDR |
622 | alpha_after_prologue (CORE_ADDR pc) | |
c906108c | 623 | { |
d2427a71 RH |
624 | struct symtab_and_line sal; |
625 | CORE_ADDR func_addr, func_end; | |
c906108c | 626 | |
d2427a71 | 627 | if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end)) |
c5aa993b | 628 | return 0; |
c906108c | 629 | |
d2427a71 RH |
630 | sal = find_pc_line (func_addr, 0); |
631 | if (sal.end < func_end) | |
632 | return sal.end; | |
c5aa993b | 633 | |
d2427a71 RH |
634 | /* The line after the prologue is after the end of the function. In this |
635 | case, tell the caller to find the prologue the hard way. */ | |
636 | return 0; | |
c906108c SS |
637 | } |
638 | ||
d2427a71 RH |
639 | /* Read an instruction from memory at PC, looking through breakpoints. */ |
640 | ||
641 | unsigned int | |
642 | alpha_read_insn (CORE_ADDR pc) | |
c906108c | 643 | { |
d2427a71 RH |
644 | char buf[4]; |
645 | int status; | |
c5aa993b | 646 | |
1f602b35 | 647 | status = deprecated_read_memory_nobpt (pc, buf, 4); |
d2427a71 RH |
648 | if (status) |
649 | memory_error (status, pc); | |
650 | return extract_unsigned_integer (buf, 4); | |
651 | } | |
c5aa993b | 652 | |
d2427a71 RH |
653 | /* To skip prologues, I use this predicate. Returns either PC itself |
654 | if the code at PC does not look like a function prologue; otherwise | |
655 | returns an address that (if we're lucky) follows the prologue. If | |
656 | LENIENT, then we must skip everything which is involved in setting | |
657 | up the frame (it's OK to skip more, just so long as we don't skip | |
658 | anything which might clobber the registers which are being saved. */ | |
c906108c | 659 | |
d2427a71 RH |
660 | static CORE_ADDR |
661 | alpha_skip_prologue (CORE_ADDR pc) | |
662 | { | |
663 | unsigned long inst; | |
664 | int offset; | |
665 | CORE_ADDR post_prologue_pc; | |
666 | char buf[4]; | |
c906108c | 667 | |
d2427a71 RH |
668 | /* Silently return the unaltered pc upon memory errors. |
669 | This could happen on OSF/1 if decode_line_1 tries to skip the | |
670 | prologue for quickstarted shared library functions when the | |
671 | shared library is not yet mapped in. | |
672 | Reading target memory is slow over serial lines, so we perform | |
673 | this check only if the target has shared libraries (which all | |
674 | Alpha targets do). */ | |
675 | if (target_read_memory (pc, buf, 4)) | |
676 | return pc; | |
c906108c | 677 | |
d2427a71 RH |
678 | /* See if we can determine the end of the prologue via the symbol table. |
679 | If so, then return either PC, or the PC after the prologue, whichever | |
680 | is greater. */ | |
c906108c | 681 | |
d2427a71 RH |
682 | post_prologue_pc = alpha_after_prologue (pc); |
683 | if (post_prologue_pc != 0) | |
684 | return max (pc, post_prologue_pc); | |
c906108c | 685 | |
d2427a71 RH |
686 | /* Can't determine prologue from the symbol table, need to examine |
687 | instructions. */ | |
dc1b0db2 | 688 | |
d2427a71 RH |
689 | /* Skip the typical prologue instructions. These are the stack adjustment |
690 | instruction and the instructions that save registers on the stack | |
691 | or in the gcc frame. */ | |
692 | for (offset = 0; offset < 100; offset += 4) | |
693 | { | |
694 | inst = alpha_read_insn (pc + offset); | |
c906108c | 695 | |
d2427a71 RH |
696 | if ((inst & 0xffff0000) == 0x27bb0000) /* ldah $gp,n($t12) */ |
697 | continue; | |
698 | if ((inst & 0xffff0000) == 0x23bd0000) /* lda $gp,n($gp) */ | |
699 | continue; | |
700 | if ((inst & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */ | |
701 | continue; | |
702 | if ((inst & 0xffe01fff) == 0x43c0153e) /* subq $sp,n,$sp */ | |
703 | continue; | |
c906108c | 704 | |
d2427a71 RH |
705 | if (((inst & 0xfc1f0000) == 0xb41e0000 /* stq reg,n($sp) */ |
706 | || (inst & 0xfc1f0000) == 0x9c1e0000) /* stt reg,n($sp) */ | |
707 | && (inst & 0x03e00000) != 0x03e00000) /* reg != $zero */ | |
708 | continue; | |
c906108c | 709 | |
d2427a71 RH |
710 | if (inst == 0x47de040f) /* bis sp,sp,fp */ |
711 | continue; | |
712 | if (inst == 0x47fe040f) /* bis zero,sp,fp */ | |
713 | continue; | |
c906108c | 714 | |
d2427a71 | 715 | break; |
c906108c | 716 | } |
d2427a71 RH |
717 | return pc + offset; |
718 | } | |
c906108c | 719 | |
d2427a71 RH |
720 | \f |
721 | /* Figure out where the longjmp will land. | |
722 | We expect the first arg to be a pointer to the jmp_buf structure from | |
723 | which we extract the PC (JB_PC) that we will land at. The PC is copied | |
724 | into the "pc". This routine returns true on success. */ | |
c906108c SS |
725 | |
726 | static int | |
d2427a71 | 727 | alpha_get_longjmp_target (CORE_ADDR *pc) |
c906108c | 728 | { |
d2427a71 RH |
729 | struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); |
730 | CORE_ADDR jb_addr; | |
5ab84872 | 731 | char raw_buffer[ALPHA_REGISTER_SIZE]; |
c906108c | 732 | |
d2427a71 | 733 | jb_addr = read_register (ALPHA_A0_REGNUM); |
c906108c | 734 | |
d2427a71 RH |
735 | if (target_read_memory (jb_addr + (tdep->jb_pc * tdep->jb_elt_size), |
736 | raw_buffer, tdep->jb_elt_size)) | |
c906108c | 737 | return 0; |
d2427a71 | 738 | |
7c0b4a20 | 739 | *pc = extract_unsigned_integer (raw_buffer, tdep->jb_elt_size); |
d2427a71 | 740 | return 1; |
c906108c SS |
741 | } |
742 | ||
d2427a71 RH |
743 | \f |
744 | /* Frame unwinder for signal trampolines. We use alpha tdep bits that | |
745 | describe the location and shape of the sigcontext structure. After | |
746 | that, all registers are in memory, so it's easy. */ | |
747 | /* ??? Shouldn't we be able to do this generically, rather than with | |
748 | OSABI data specific to Alpha? */ | |
749 | ||
750 | struct alpha_sigtramp_unwind_cache | |
c906108c | 751 | { |
d2427a71 RH |
752 | CORE_ADDR sigcontext_addr; |
753 | }; | |
c906108c | 754 | |
d2427a71 RH |
755 | static struct alpha_sigtramp_unwind_cache * |
756 | alpha_sigtramp_frame_unwind_cache (struct frame_info *next_frame, | |
757 | void **this_prologue_cache) | |
758 | { | |
759 | struct alpha_sigtramp_unwind_cache *info; | |
760 | struct gdbarch_tdep *tdep; | |
c906108c | 761 | |
d2427a71 RH |
762 | if (*this_prologue_cache) |
763 | return *this_prologue_cache; | |
c906108c | 764 | |
d2427a71 RH |
765 | info = FRAME_OBSTACK_ZALLOC (struct alpha_sigtramp_unwind_cache); |
766 | *this_prologue_cache = info; | |
c906108c | 767 | |
d2427a71 RH |
768 | tdep = gdbarch_tdep (current_gdbarch); |
769 | info->sigcontext_addr = tdep->sigcontext_addr (next_frame); | |
c906108c | 770 | |
d2427a71 | 771 | return info; |
c906108c SS |
772 | } |
773 | ||
138e7be5 MK |
774 | /* Return the address of REGNUM in a sigtramp frame. Since this is |
775 | all arithmetic, it doesn't seem worthwhile to cache it. */ | |
c5aa993b | 776 | |
d2427a71 | 777 | static CORE_ADDR |
138e7be5 | 778 | alpha_sigtramp_register_address (CORE_ADDR sigcontext_addr, int regnum) |
d2427a71 | 779 | { |
138e7be5 MK |
780 | struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); |
781 | ||
782 | if (regnum >= 0 && regnum < 32) | |
783 | return sigcontext_addr + tdep->sc_regs_offset + regnum * 8; | |
784 | else if (regnum >= ALPHA_FP0_REGNUM && regnum < ALPHA_FP0_REGNUM + 32) | |
785 | return sigcontext_addr + tdep->sc_fpregs_offset + regnum * 8; | |
786 | else if (regnum == ALPHA_PC_REGNUM) | |
787 | return sigcontext_addr + tdep->sc_pc_offset; | |
c5aa993b | 788 | |
d2427a71 | 789 | return 0; |
c906108c SS |
790 | } |
791 | ||
d2427a71 RH |
792 | /* Given a GDB frame, determine the address of the calling function's |
793 | frame. This will be used to create a new GDB frame struct. */ | |
140f9984 | 794 | |
dc129d82 | 795 | static void |
d2427a71 RH |
796 | alpha_sigtramp_frame_this_id (struct frame_info *next_frame, |
797 | void **this_prologue_cache, | |
798 | struct frame_id *this_id) | |
c906108c | 799 | { |
d2427a71 RH |
800 | struct alpha_sigtramp_unwind_cache *info |
801 | = alpha_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache); | |
802 | struct gdbarch_tdep *tdep; | |
803 | CORE_ADDR stack_addr, code_addr; | |
804 | ||
805 | /* If the OSABI couldn't locate the sigcontext, give up. */ | |
806 | if (info->sigcontext_addr == 0) | |
807 | return; | |
808 | ||
809 | /* If we have dynamic signal trampolines, find their start. | |
810 | If we do not, then we must assume there is a symbol record | |
811 | that can provide the start address. */ | |
812 | tdep = gdbarch_tdep (current_gdbarch); | |
813 | if (tdep->dynamic_sigtramp_offset) | |
c906108c | 814 | { |
d2427a71 RH |
815 | int offset; |
816 | code_addr = frame_pc_unwind (next_frame); | |
817 | offset = tdep->dynamic_sigtramp_offset (code_addr); | |
818 | if (offset >= 0) | |
819 | code_addr -= offset; | |
c906108c | 820 | else |
d2427a71 | 821 | code_addr = 0; |
c906108c | 822 | } |
d2427a71 RH |
823 | else |
824 | code_addr = frame_func_unwind (next_frame); | |
c906108c | 825 | |
d2427a71 RH |
826 | /* The stack address is trivially read from the sigcontext. */ |
827 | stack_addr = alpha_sigtramp_register_address (info->sigcontext_addr, | |
828 | ALPHA_SP_REGNUM); | |
b21fd293 RH |
829 | stack_addr = get_frame_memory_unsigned (next_frame, stack_addr, |
830 | ALPHA_REGISTER_SIZE); | |
c906108c | 831 | |
d2427a71 | 832 | *this_id = frame_id_build (stack_addr, code_addr); |
c906108c SS |
833 | } |
834 | ||
d2427a71 | 835 | /* Retrieve the value of REGNUM in FRAME. Don't give up! */ |
c906108c | 836 | |
d2427a71 RH |
837 | static void |
838 | alpha_sigtramp_frame_prev_register (struct frame_info *next_frame, | |
839 | void **this_prologue_cache, | |
840 | int regnum, int *optimizedp, | |
841 | enum lval_type *lvalp, CORE_ADDR *addrp, | |
5b819568 | 842 | int *realnump, gdb_byte *bufferp) |
c906108c | 843 | { |
d2427a71 RH |
844 | struct alpha_sigtramp_unwind_cache *info |
845 | = alpha_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache); | |
846 | CORE_ADDR addr; | |
c906108c | 847 | |
d2427a71 | 848 | if (info->sigcontext_addr != 0) |
c906108c | 849 | { |
d2427a71 RH |
850 | /* All integer and fp registers are stored in memory. */ |
851 | addr = alpha_sigtramp_register_address (info->sigcontext_addr, regnum); | |
852 | if (addr != 0) | |
c906108c | 853 | { |
d2427a71 RH |
854 | *optimizedp = 0; |
855 | *lvalp = lval_memory; | |
856 | *addrp = addr; | |
857 | *realnump = -1; | |
858 | if (bufferp != NULL) | |
b21fd293 | 859 | get_frame_memory (next_frame, addr, bufferp, ALPHA_REGISTER_SIZE); |
d2427a71 | 860 | return; |
c906108c | 861 | } |
c906108c SS |
862 | } |
863 | ||
d2427a71 RH |
864 | /* This extra register may actually be in the sigcontext, but our |
865 | current description of it in alpha_sigtramp_frame_unwind_cache | |
866 | doesn't include it. Too bad. Fall back on whatever's in the | |
867 | outer frame. */ | |
868 | frame_register (next_frame, regnum, optimizedp, lvalp, addrp, | |
869 | realnump, bufferp); | |
870 | } | |
c906108c | 871 | |
d2427a71 RH |
872 | static const struct frame_unwind alpha_sigtramp_frame_unwind = { |
873 | SIGTRAMP_FRAME, | |
874 | alpha_sigtramp_frame_this_id, | |
875 | alpha_sigtramp_frame_prev_register | |
876 | }; | |
c906108c | 877 | |
d2427a71 | 878 | static const struct frame_unwind * |
336d1bba | 879 | alpha_sigtramp_frame_sniffer (struct frame_info *next_frame) |
d2427a71 | 880 | { |
336d1bba | 881 | CORE_ADDR pc = frame_pc_unwind (next_frame); |
d2427a71 | 882 | char *name; |
c906108c | 883 | |
f2524b93 AC |
884 | /* NOTE: cagney/2004-04-30: Do not copy/clone this code. Instead |
885 | look at tramp-frame.h and other simplier per-architecture | |
886 | sigtramp unwinders. */ | |
887 | ||
888 | /* We shouldn't even bother to try if the OSABI didn't register a | |
889 | sigcontext_addr handler or pc_in_sigtramp hander. */ | |
890 | if (gdbarch_tdep (current_gdbarch)->sigcontext_addr == NULL) | |
891 | return NULL; | |
892 | if (gdbarch_tdep (current_gdbarch)->pc_in_sigtramp == NULL) | |
d2427a71 | 893 | return NULL; |
c906108c | 894 | |
d2427a71 RH |
895 | /* Otherwise we should be in a signal frame. */ |
896 | find_pc_partial_function (pc, &name, NULL, NULL); | |
f2524b93 | 897 | if (gdbarch_tdep (current_gdbarch)->pc_in_sigtramp (pc, name)) |
d2427a71 | 898 | return &alpha_sigtramp_frame_unwind; |
c906108c | 899 | |
d2427a71 | 900 | return NULL; |
c906108c | 901 | } |
d2427a71 RH |
902 | \f |
903 | /* Fallback alpha frame unwinder. Uses instruction scanning and knows | |
904 | something about the traditional layout of alpha stack frames. */ | |
c906108c | 905 | |
d2427a71 | 906 | struct alpha_heuristic_unwind_cache |
c906108c | 907 | { |
d2427a71 RH |
908 | CORE_ADDR *saved_regs; |
909 | CORE_ADDR vfp; | |
910 | CORE_ADDR start_pc; | |
911 | int return_reg; | |
912 | }; | |
c906108c | 913 | |
d2427a71 RH |
914 | /* Heuristic_proc_start may hunt through the text section for a long |
915 | time across a 2400 baud serial line. Allows the user to limit this | |
916 | search. */ | |
917 | static unsigned int heuristic_fence_post = 0; | |
c906108c | 918 | |
d2427a71 RH |
919 | /* Attempt to locate the start of the function containing PC. We assume that |
920 | the previous function ends with an about_to_return insn. Not foolproof by | |
921 | any means, since gcc is happy to put the epilogue in the middle of a | |
922 | function. But we're guessing anyway... */ | |
c906108c | 923 | |
d2427a71 RH |
924 | static CORE_ADDR |
925 | alpha_heuristic_proc_start (CORE_ADDR pc) | |
926 | { | |
927 | struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); | |
928 | CORE_ADDR last_non_nop = pc; | |
929 | CORE_ADDR fence = pc - heuristic_fence_post; | |
930 | CORE_ADDR orig_pc = pc; | |
fbe586ae | 931 | CORE_ADDR func; |
9e0b60a8 | 932 | |
d2427a71 RH |
933 | if (pc == 0) |
934 | return 0; | |
9e0b60a8 | 935 | |
fbe586ae RH |
936 | /* First see if we can find the start of the function from minimal |
937 | symbol information. This can succeed with a binary that doesn't | |
938 | have debug info, but hasn't been stripped. */ | |
939 | func = get_pc_function_start (pc); | |
940 | if (func) | |
941 | return func; | |
942 | ||
d2427a71 RH |
943 | if (heuristic_fence_post == UINT_MAX |
944 | || fence < tdep->vm_min_address) | |
945 | fence = tdep->vm_min_address; | |
c906108c | 946 | |
d2427a71 RH |
947 | /* Search back for previous return; also stop at a 0, which might be |
948 | seen for instance before the start of a code section. Don't include | |
949 | nops, since this usually indicates padding between functions. */ | |
950 | for (pc -= 4; pc >= fence; pc -= 4) | |
c906108c | 951 | { |
d2427a71 RH |
952 | unsigned int insn = alpha_read_insn (pc); |
953 | switch (insn) | |
c906108c | 954 | { |
d2427a71 RH |
955 | case 0: /* invalid insn */ |
956 | case 0x6bfa8001: /* ret $31,($26),1 */ | |
957 | return last_non_nop; | |
958 | ||
959 | case 0x2ffe0000: /* unop: ldq_u $31,0($30) */ | |
960 | case 0x47ff041f: /* nop: bis $31,$31,$31 */ | |
961 | break; | |
962 | ||
963 | default: | |
964 | last_non_nop = pc; | |
965 | break; | |
c906108c | 966 | } |
d2427a71 | 967 | } |
c906108c | 968 | |
d2427a71 RH |
969 | /* It's not clear to me why we reach this point when stopping quietly, |
970 | but with this test, at least we don't print out warnings for every | |
971 | child forked (eg, on decstation). 22apr93 rich@cygnus.com. */ | |
972 | if (stop_soon == NO_STOP_QUIETLY) | |
973 | { | |
974 | static int blurb_printed = 0; | |
c906108c | 975 | |
d2427a71 | 976 | if (fence == tdep->vm_min_address) |
323e0a4a AC |
977 | warning (_("Hit beginning of text section without finding \ |
978 | enclosing function for address 0x%s"), paddr_nz (orig_pc)); | |
c906108c | 979 | else |
323e0a4a AC |
980 | warning (_("Hit heuristic-fence-post without finding \ |
981 | enclosing function for address 0x%s"), paddr_nz (orig_pc)); | |
c906108c | 982 | |
d2427a71 RH |
983 | if (!blurb_printed) |
984 | { | |
323e0a4a | 985 | printf_filtered (_("\ |
d2427a71 RH |
986 | This warning occurs if you are debugging a function without any symbols\n\ |
987 | (for example, in a stripped executable). In that case, you may wish to\n\ | |
988 | increase the size of the search with the `set heuristic-fence-post' command.\n\ | |
989 | \n\ | |
990 | Otherwise, you told GDB there was a function where there isn't one, or\n\ | |
323e0a4a | 991 | (more likely) you have encountered a bug in GDB.\n")); |
d2427a71 RH |
992 | blurb_printed = 1; |
993 | } | |
994 | } | |
c906108c | 995 | |
d2427a71 RH |
996 | return 0; |
997 | } | |
c906108c | 998 | |
fbe586ae | 999 | static struct alpha_heuristic_unwind_cache * |
d2427a71 RH |
1000 | alpha_heuristic_frame_unwind_cache (struct frame_info *next_frame, |
1001 | void **this_prologue_cache, | |
1002 | CORE_ADDR start_pc) | |
1003 | { | |
1004 | struct alpha_heuristic_unwind_cache *info; | |
1005 | ULONGEST val; | |
1006 | CORE_ADDR limit_pc, cur_pc; | |
1007 | int frame_reg, frame_size, return_reg, reg; | |
c906108c | 1008 | |
d2427a71 RH |
1009 | if (*this_prologue_cache) |
1010 | return *this_prologue_cache; | |
c906108c | 1011 | |
d2427a71 RH |
1012 | info = FRAME_OBSTACK_ZALLOC (struct alpha_heuristic_unwind_cache); |
1013 | *this_prologue_cache = info; | |
1014 | info->saved_regs = frame_obstack_zalloc (SIZEOF_FRAME_SAVED_REGS); | |
c906108c | 1015 | |
d2427a71 RH |
1016 | limit_pc = frame_pc_unwind (next_frame); |
1017 | if (start_pc == 0) | |
1018 | start_pc = alpha_heuristic_proc_start (limit_pc); | |
1019 | info->start_pc = start_pc; | |
c906108c | 1020 | |
d2427a71 RH |
1021 | frame_reg = ALPHA_SP_REGNUM; |
1022 | frame_size = 0; | |
1023 | return_reg = -1; | |
c906108c | 1024 | |
d2427a71 RH |
1025 | /* If we've identified a likely place to start, do code scanning. */ |
1026 | if (start_pc != 0) | |
c5aa993b | 1027 | { |
d2427a71 RH |
1028 | /* Limit the forward search to 50 instructions. */ |
1029 | if (start_pc + 200 < limit_pc) | |
1030 | limit_pc = start_pc + 200; | |
c5aa993b | 1031 | |
d2427a71 RH |
1032 | for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += 4) |
1033 | { | |
1034 | unsigned int word = alpha_read_insn (cur_pc); | |
c5aa993b | 1035 | |
d2427a71 RH |
1036 | if ((word & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */ |
1037 | { | |
1038 | if (word & 0x8000) | |
1039 | { | |
1040 | /* Consider only the first stack allocation instruction | |
1041 | to contain the static size of the frame. */ | |
1042 | if (frame_size == 0) | |
1043 | frame_size = (-word) & 0xffff; | |
1044 | } | |
1045 | else | |
1046 | { | |
1047 | /* Exit loop if a positive stack adjustment is found, which | |
1048 | usually means that the stack cleanup code in the function | |
1049 | epilogue is reached. */ | |
1050 | break; | |
1051 | } | |
1052 | } | |
1053 | else if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */ | |
1054 | { | |
1055 | reg = (word & 0x03e00000) >> 21; | |
1056 | ||
d15bfd3a AC |
1057 | /* Ignore this instruction if we have already encountered |
1058 | an instruction saving the same register earlier in the | |
1059 | function code. The current instruction does not tell | |
1060 | us where the original value upon function entry is saved. | |
1061 | All it says is that the function we are scanning reused | |
1062 | that register for some computation of its own, and is now | |
1063 | saving its result. */ | |
1064 | if (info->saved_regs[reg]) | |
1065 | continue; | |
1066 | ||
d2427a71 RH |
1067 | if (reg == 31) |
1068 | continue; | |
1069 | ||
1070 | /* Do not compute the address where the register was saved yet, | |
1071 | because we don't know yet if the offset will need to be | |
1072 | relative to $sp or $fp (we can not compute the address | |
1073 | relative to $sp if $sp is updated during the execution of | |
1074 | the current subroutine, for instance when doing some alloca). | |
1075 | So just store the offset for the moment, and compute the | |
1076 | address later when we know whether this frame has a frame | |
1077 | pointer or not. */ | |
1078 | /* Hack: temporarily add one, so that the offset is non-zero | |
1079 | and we can tell which registers have save offsets below. */ | |
1080 | info->saved_regs[reg] = (word & 0xffff) + 1; | |
1081 | ||
1082 | /* Starting with OSF/1-3.2C, the system libraries are shipped | |
1083 | without local symbols, but they still contain procedure | |
1084 | descriptors without a symbol reference. GDB is currently | |
1085 | unable to find these procedure descriptors and uses | |
1086 | heuristic_proc_desc instead. | |
1087 | As some low level compiler support routines (__div*, __add*) | |
1088 | use a non-standard return address register, we have to | |
1089 | add some heuristics to determine the return address register, | |
1090 | or stepping over these routines will fail. | |
1091 | Usually the return address register is the first register | |
1092 | saved on the stack, but assembler optimization might | |
1093 | rearrange the register saves. | |
1094 | So we recognize only a few registers (t7, t9, ra) within | |
1095 | the procedure prologue as valid return address registers. | |
1096 | If we encounter a return instruction, we extract the | |
1097 | the return address register from it. | |
1098 | ||
1099 | FIXME: Rewriting GDB to access the procedure descriptors, | |
1100 | e.g. via the minimal symbol table, might obviate this hack. */ | |
1101 | if (return_reg == -1 | |
1102 | && cur_pc < (start_pc + 80) | |
1103 | && (reg == ALPHA_T7_REGNUM | |
1104 | || reg == ALPHA_T9_REGNUM | |
1105 | || reg == ALPHA_RA_REGNUM)) | |
1106 | return_reg = reg; | |
1107 | } | |
1108 | else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */ | |
1109 | return_reg = (word >> 16) & 0x1f; | |
1110 | else if (word == 0x47de040f) /* bis sp,sp,fp */ | |
1111 | frame_reg = ALPHA_GCC_FP_REGNUM; | |
1112 | else if (word == 0x47fe040f) /* bis zero,sp,fp */ | |
1113 | frame_reg = ALPHA_GCC_FP_REGNUM; | |
1114 | } | |
c5aa993b | 1115 | |
d2427a71 RH |
1116 | /* If we haven't found a valid return address register yet, keep |
1117 | searching in the procedure prologue. */ | |
1118 | if (return_reg == -1) | |
1119 | { | |
1120 | while (cur_pc < (limit_pc + 80) && cur_pc < (start_pc + 80)) | |
1121 | { | |
1122 | unsigned int word = alpha_read_insn (cur_pc); | |
c5aa993b | 1123 | |
d2427a71 RH |
1124 | if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */ |
1125 | { | |
1126 | reg = (word & 0x03e00000) >> 21; | |
1127 | if (reg == ALPHA_T7_REGNUM | |
1128 | || reg == ALPHA_T9_REGNUM | |
1129 | || reg == ALPHA_RA_REGNUM) | |
1130 | { | |
1131 | return_reg = reg; | |
1132 | break; | |
1133 | } | |
1134 | } | |
1135 | else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */ | |
1136 | { | |
1137 | return_reg = (word >> 16) & 0x1f; | |
1138 | break; | |
1139 | } | |
85b32d22 RH |
1140 | |
1141 | cur_pc += 4; | |
d2427a71 RH |
1142 | } |
1143 | } | |
c906108c | 1144 | } |
c906108c | 1145 | |
d2427a71 RH |
1146 | /* Failing that, do default to the customary RA. */ |
1147 | if (return_reg == -1) | |
1148 | return_reg = ALPHA_RA_REGNUM; | |
1149 | info->return_reg = return_reg; | |
f8453e34 | 1150 | |
d2427a71 RH |
1151 | frame_unwind_unsigned_register (next_frame, frame_reg, &val); |
1152 | info->vfp = val + frame_size; | |
c906108c | 1153 | |
d2427a71 RH |
1154 | /* Convert offsets to absolute addresses. See above about adding |
1155 | one to the offsets to make all detected offsets non-zero. */ | |
1156 | for (reg = 0; reg < ALPHA_NUM_REGS; ++reg) | |
1157 | if (info->saved_regs[reg]) | |
1158 | info->saved_regs[reg] += val - 1; | |
1159 | ||
1160 | return info; | |
c906108c | 1161 | } |
c906108c | 1162 | |
d2427a71 RH |
1163 | /* Given a GDB frame, determine the address of the calling function's |
1164 | frame. This will be used to create a new GDB frame struct. */ | |
1165 | ||
fbe586ae | 1166 | static void |
d2427a71 RH |
1167 | alpha_heuristic_frame_this_id (struct frame_info *next_frame, |
1168 | void **this_prologue_cache, | |
1169 | struct frame_id *this_id) | |
c906108c | 1170 | { |
d2427a71 RH |
1171 | struct alpha_heuristic_unwind_cache *info |
1172 | = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0); | |
c906108c | 1173 | |
d2427a71 | 1174 | *this_id = frame_id_build (info->vfp, info->start_pc); |
c906108c SS |
1175 | } |
1176 | ||
d2427a71 RH |
1177 | /* Retrieve the value of REGNUM in FRAME. Don't give up! */ |
1178 | ||
fbe586ae | 1179 | static void |
d2427a71 RH |
1180 | alpha_heuristic_frame_prev_register (struct frame_info *next_frame, |
1181 | void **this_prologue_cache, | |
1182 | int regnum, int *optimizedp, | |
1183 | enum lval_type *lvalp, CORE_ADDR *addrp, | |
5b819568 | 1184 | int *realnump, gdb_byte *bufferp) |
c906108c | 1185 | { |
d2427a71 RH |
1186 | struct alpha_heuristic_unwind_cache *info |
1187 | = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0); | |
1188 | ||
1189 | /* The PC of the previous frame is stored in the link register of | |
1190 | the current frame. Frob regnum so that we pull the value from | |
1191 | the correct place. */ | |
1192 | if (regnum == ALPHA_PC_REGNUM) | |
1193 | regnum = info->return_reg; | |
1194 | ||
1195 | /* For all registers known to be saved in the current frame, | |
1196 | do the obvious and pull the value out. */ | |
1197 | if (info->saved_regs[regnum]) | |
c906108c | 1198 | { |
d2427a71 RH |
1199 | *optimizedp = 0; |
1200 | *lvalp = lval_memory; | |
1201 | *addrp = info->saved_regs[regnum]; | |
1202 | *realnump = -1; | |
1203 | if (bufferp != NULL) | |
b21fd293 | 1204 | get_frame_memory (next_frame, *addrp, bufferp, ALPHA_REGISTER_SIZE); |
c906108c SS |
1205 | return; |
1206 | } | |
1207 | ||
d2427a71 RH |
1208 | /* The stack pointer of the previous frame is computed by popping |
1209 | the current stack frame. */ | |
1210 | if (regnum == ALPHA_SP_REGNUM) | |
c906108c | 1211 | { |
d2427a71 RH |
1212 | *optimizedp = 0; |
1213 | *lvalp = not_lval; | |
1214 | *addrp = 0; | |
1215 | *realnump = -1; | |
1216 | if (bufferp != NULL) | |
1217 | store_unsigned_integer (bufferp, ALPHA_REGISTER_SIZE, info->vfp); | |
1218 | return; | |
c906108c | 1219 | } |
95b80706 | 1220 | |
d2427a71 | 1221 | /* Otherwise assume the next frame has the same register value. */ |
1cc759c3 JB |
1222 | frame_register_unwind (next_frame, regnum, optimizedp, lvalp, addrp, |
1223 | realnump, bufferp); | |
95b80706 JT |
1224 | } |
1225 | ||
d2427a71 RH |
1226 | static const struct frame_unwind alpha_heuristic_frame_unwind = { |
1227 | NORMAL_FRAME, | |
1228 | alpha_heuristic_frame_this_id, | |
1229 | alpha_heuristic_frame_prev_register | |
1230 | }; | |
c906108c | 1231 | |
d2427a71 | 1232 | static const struct frame_unwind * |
336d1bba | 1233 | alpha_heuristic_frame_sniffer (struct frame_info *next_frame) |
c906108c | 1234 | { |
d2427a71 | 1235 | return &alpha_heuristic_frame_unwind; |
c906108c SS |
1236 | } |
1237 | ||
fbe586ae | 1238 | static CORE_ADDR |
d2427a71 RH |
1239 | alpha_heuristic_frame_base_address (struct frame_info *next_frame, |
1240 | void **this_prologue_cache) | |
c906108c | 1241 | { |
d2427a71 RH |
1242 | struct alpha_heuristic_unwind_cache *info |
1243 | = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0); | |
c906108c | 1244 | |
d2427a71 | 1245 | return info->vfp; |
c906108c SS |
1246 | } |
1247 | ||
d2427a71 RH |
1248 | static const struct frame_base alpha_heuristic_frame_base = { |
1249 | &alpha_heuristic_frame_unwind, | |
1250 | alpha_heuristic_frame_base_address, | |
1251 | alpha_heuristic_frame_base_address, | |
1252 | alpha_heuristic_frame_base_address | |
1253 | }; | |
1254 | ||
c906108c | 1255 | /* Just like reinit_frame_cache, but with the right arguments to be |
d2427a71 | 1256 | callable as an sfunc. Used by the "set heuristic-fence-post" command. */ |
c906108c SS |
1257 | |
1258 | static void | |
fba45db2 | 1259 | reinit_frame_cache_sfunc (char *args, int from_tty, struct cmd_list_element *c) |
c906108c SS |
1260 | { |
1261 | reinit_frame_cache (); | |
1262 | } | |
1263 | ||
d2427a71 | 1264 | \f |
d2427a71 RH |
1265 | /* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that |
1266 | dummy frame. The frame ID's base needs to match the TOS value | |
1267 | saved by save_dummy_frame_tos(), and the PC match the dummy frame's | |
1268 | breakpoint. */ | |
d734c450 | 1269 | |
d2427a71 RH |
1270 | static struct frame_id |
1271 | alpha_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
0d056799 | 1272 | { |
d2427a71 RH |
1273 | ULONGEST base; |
1274 | frame_unwind_unsigned_register (next_frame, ALPHA_SP_REGNUM, &base); | |
1275 | return frame_id_build (base, frame_pc_unwind (next_frame)); | |
0d056799 JT |
1276 | } |
1277 | ||
dc129d82 | 1278 | static CORE_ADDR |
d2427a71 | 1279 | alpha_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) |
accc6d1f | 1280 | { |
d2427a71 RH |
1281 | ULONGEST pc; |
1282 | frame_unwind_unsigned_register (next_frame, ALPHA_PC_REGNUM, &pc); | |
1283 | return pc; | |
accc6d1f JT |
1284 | } |
1285 | ||
98a8e1e5 RH |
1286 | \f |
1287 | /* Helper routines for alpha*-nat.c files to move register sets to and | |
1288 | from core files. The UNIQUE pointer is allowed to be NULL, as most | |
1289 | targets don't supply this value in their core files. */ | |
1290 | ||
1291 | void | |
1292 | alpha_supply_int_regs (int regno, const void *r0_r30, | |
1293 | const void *pc, const void *unique) | |
1294 | { | |
1295 | int i; | |
1296 | ||
1297 | for (i = 0; i < 31; ++i) | |
1298 | if (regno == i || regno == -1) | |
23a6d369 | 1299 | regcache_raw_supply (current_regcache, i, (const char *)r0_r30 + i*8); |
98a8e1e5 RH |
1300 | |
1301 | if (regno == ALPHA_ZERO_REGNUM || regno == -1) | |
23a6d369 | 1302 | regcache_raw_supply (current_regcache, ALPHA_ZERO_REGNUM, NULL); |
98a8e1e5 RH |
1303 | |
1304 | if (regno == ALPHA_PC_REGNUM || regno == -1) | |
23a6d369 | 1305 | regcache_raw_supply (current_regcache, ALPHA_PC_REGNUM, pc); |
98a8e1e5 RH |
1306 | |
1307 | if (regno == ALPHA_UNIQUE_REGNUM || regno == -1) | |
23a6d369 | 1308 | regcache_raw_supply (current_regcache, ALPHA_UNIQUE_REGNUM, unique); |
98a8e1e5 RH |
1309 | } |
1310 | ||
1311 | void | |
1312 | alpha_fill_int_regs (int regno, void *r0_r30, void *pc, void *unique) | |
1313 | { | |
1314 | int i; | |
1315 | ||
1316 | for (i = 0; i < 31; ++i) | |
1317 | if (regno == i || regno == -1) | |
822c9732 | 1318 | regcache_raw_collect (current_regcache, i, (char *)r0_r30 + i*8); |
98a8e1e5 RH |
1319 | |
1320 | if (regno == ALPHA_PC_REGNUM || regno == -1) | |
822c9732 | 1321 | regcache_raw_collect (current_regcache, ALPHA_PC_REGNUM, pc); |
98a8e1e5 RH |
1322 | |
1323 | if (unique && (regno == ALPHA_UNIQUE_REGNUM || regno == -1)) | |
822c9732 | 1324 | regcache_raw_collect (current_regcache, ALPHA_UNIQUE_REGNUM, unique); |
98a8e1e5 RH |
1325 | } |
1326 | ||
1327 | void | |
1328 | alpha_supply_fp_regs (int regno, const void *f0_f30, const void *fpcr) | |
1329 | { | |
1330 | int i; | |
1331 | ||
1332 | for (i = ALPHA_FP0_REGNUM; i < ALPHA_FP0_REGNUM + 31; ++i) | |
1333 | if (regno == i || regno == -1) | |
23a6d369 AC |
1334 | regcache_raw_supply (current_regcache, i, |
1335 | (const char *)f0_f30 + (i - ALPHA_FP0_REGNUM) * 8); | |
98a8e1e5 RH |
1336 | |
1337 | if (regno == ALPHA_FPCR_REGNUM || regno == -1) | |
23a6d369 | 1338 | regcache_raw_supply (current_regcache, ALPHA_FPCR_REGNUM, fpcr); |
98a8e1e5 RH |
1339 | } |
1340 | ||
1341 | void | |
1342 | alpha_fill_fp_regs (int regno, void *f0_f30, void *fpcr) | |
1343 | { | |
1344 | int i; | |
1345 | ||
1346 | for (i = ALPHA_FP0_REGNUM; i < ALPHA_FP0_REGNUM + 31; ++i) | |
1347 | if (regno == i || regno == -1) | |
822c9732 AC |
1348 | regcache_raw_collect (current_regcache, i, |
1349 | (char *)f0_f30 + (i - ALPHA_FP0_REGNUM) * 8); | |
98a8e1e5 RH |
1350 | |
1351 | if (regno == ALPHA_FPCR_REGNUM || regno == -1) | |
822c9732 | 1352 | regcache_raw_collect (current_regcache, ALPHA_FPCR_REGNUM, fpcr); |
98a8e1e5 RH |
1353 | } |
1354 | ||
d2427a71 | 1355 | \f |
0de94d4b JB |
1356 | |
1357 | /* Return nonzero if the G_floating register value in REG is equal to | |
1358 | zero for FP control instructions. */ | |
1359 | ||
1360 | static int | |
1361 | fp_register_zero_p (LONGEST reg) | |
1362 | { | |
1363 | /* Check that all bits except the sign bit are zero. */ | |
1364 | const LONGEST zero_mask = ((LONGEST) 1 << 63) ^ -1; | |
1365 | ||
1366 | return ((reg & zero_mask) == 0); | |
1367 | } | |
1368 | ||
1369 | /* Return the value of the sign bit for the G_floating register | |
1370 | value held in REG. */ | |
1371 | ||
1372 | static int | |
1373 | fp_register_sign_bit (LONGEST reg) | |
1374 | { | |
1375 | const LONGEST sign_mask = (LONGEST) 1 << 63; | |
1376 | ||
1377 | return ((reg & sign_mask) != 0); | |
1378 | } | |
1379 | ||
ec32e4be JT |
1380 | /* alpha_software_single_step() is called just before we want to resume |
1381 | the inferior, if we want to single-step it but there is no hardware | |
1382 | or kernel single-step support (NetBSD on Alpha, for example). We find | |
1383 | the target of the coming instruction and breakpoint it. | |
1384 | ||
1385 | single_step is also called just after the inferior stops. If we had | |
1386 | set up a simulated single-step, we undo our damage. */ | |
1387 | ||
1388 | static CORE_ADDR | |
1389 | alpha_next_pc (CORE_ADDR pc) | |
1390 | { | |
1391 | unsigned int insn; | |
1392 | unsigned int op; | |
551e4f2e | 1393 | int regno; |
ec32e4be JT |
1394 | int offset; |
1395 | LONGEST rav; | |
0de94d4b | 1396 | char reg[8]; |
ec32e4be | 1397 | |
b21fd293 | 1398 | insn = alpha_read_insn (pc); |
ec32e4be JT |
1399 | |
1400 | /* Opcode is top 6 bits. */ | |
1401 | op = (insn >> 26) & 0x3f; | |
1402 | ||
1403 | if (op == 0x1a) | |
1404 | { | |
1405 | /* Jump format: target PC is: | |
1406 | RB & ~3 */ | |
1407 | return (read_register ((insn >> 16) & 0x1f) & ~3); | |
1408 | } | |
1409 | ||
1410 | if ((op & 0x30) == 0x30) | |
1411 | { | |
1412 | /* Branch format: target PC is: | |
1413 | (new PC) + (4 * sext(displacement)) */ | |
1414 | if (op == 0x30 || /* BR */ | |
1415 | op == 0x34) /* BSR */ | |
1416 | { | |
1417 | branch_taken: | |
1418 | offset = (insn & 0x001fffff); | |
1419 | if (offset & 0x00100000) | |
1420 | offset |= 0xffe00000; | |
1421 | offset *= 4; | |
1422 | return (pc + 4 + offset); | |
1423 | } | |
1424 | ||
1425 | /* Need to determine if branch is taken; read RA. */ | |
551e4f2e JB |
1426 | regno = (insn >> 21) & 0x1f; |
1427 | switch (op) | |
1428 | { | |
1429 | case 0x31: /* FBEQ */ | |
1430 | case 0x36: /* FBGE */ | |
1431 | case 0x37: /* FBGT */ | |
1432 | case 0x33: /* FBLE */ | |
1433 | case 0x32: /* FBLT */ | |
1434 | case 0x35: /* FBNE */ | |
1435 | regno += FP0_REGNUM; | |
1436 | } | |
1437 | ||
1438 | regcache_cooked_read (current_regcache, regno, reg); | |
0de94d4b JB |
1439 | rav = extract_signed_integer (reg, 8); |
1440 | ||
ec32e4be JT |
1441 | switch (op) |
1442 | { | |
1443 | case 0x38: /* BLBC */ | |
1444 | if ((rav & 1) == 0) | |
1445 | goto branch_taken; | |
1446 | break; | |
1447 | case 0x3c: /* BLBS */ | |
1448 | if (rav & 1) | |
1449 | goto branch_taken; | |
1450 | break; | |
1451 | case 0x39: /* BEQ */ | |
1452 | if (rav == 0) | |
1453 | goto branch_taken; | |
1454 | break; | |
1455 | case 0x3d: /* BNE */ | |
1456 | if (rav != 0) | |
1457 | goto branch_taken; | |
1458 | break; | |
1459 | case 0x3a: /* BLT */ | |
1460 | if (rav < 0) | |
1461 | goto branch_taken; | |
1462 | break; | |
1463 | case 0x3b: /* BLE */ | |
1464 | if (rav <= 0) | |
1465 | goto branch_taken; | |
1466 | break; | |
1467 | case 0x3f: /* BGT */ | |
1468 | if (rav > 0) | |
1469 | goto branch_taken; | |
1470 | break; | |
1471 | case 0x3e: /* BGE */ | |
1472 | if (rav >= 0) | |
1473 | goto branch_taken; | |
1474 | break; | |
d2427a71 | 1475 | |
0de94d4b JB |
1476 | /* Floating point branches. */ |
1477 | ||
1478 | case 0x31: /* FBEQ */ | |
1479 | if (fp_register_zero_p (rav)) | |
1480 | goto branch_taken; | |
1481 | break; | |
1482 | case 0x36: /* FBGE */ | |
1483 | if (fp_register_sign_bit (rav) == 0 || fp_register_zero_p (rav)) | |
1484 | goto branch_taken; | |
1485 | break; | |
1486 | case 0x37: /* FBGT */ | |
1487 | if (fp_register_sign_bit (rav) == 0 && ! fp_register_zero_p (rav)) | |
1488 | goto branch_taken; | |
1489 | break; | |
1490 | case 0x33: /* FBLE */ | |
1491 | if (fp_register_sign_bit (rav) == 1 || fp_register_zero_p (rav)) | |
1492 | goto branch_taken; | |
1493 | break; | |
1494 | case 0x32: /* FBLT */ | |
1495 | if (fp_register_sign_bit (rav) == 1 && ! fp_register_zero_p (rav)) | |
1496 | goto branch_taken; | |
1497 | break; | |
1498 | case 0x35: /* FBNE */ | |
1499 | if (! fp_register_zero_p (rav)) | |
1500 | goto branch_taken; | |
1501 | break; | |
ec32e4be JT |
1502 | } |
1503 | } | |
1504 | ||
1505 | /* Not a branch or branch not taken; target PC is: | |
1506 | pc + 4 */ | |
1507 | return (pc + 4); | |
1508 | } | |
1509 | ||
1510 | void | |
1511 | alpha_software_single_step (enum target_signal sig, int insert_breakpoints_p) | |
1512 | { | |
1513 | static CORE_ADDR next_pc; | |
ec32e4be JT |
1514 | CORE_ADDR pc; |
1515 | ||
1516 | if (insert_breakpoints_p) | |
1517 | { | |
1518 | pc = read_pc (); | |
1519 | next_pc = alpha_next_pc (pc); | |
1520 | ||
8181d85f | 1521 | insert_single_step_breakpoint (next_pc); |
ec32e4be JT |
1522 | } |
1523 | else | |
1524 | { | |
8181d85f | 1525 | remove_single_step_breakpoints (); |
ec32e4be JT |
1526 | write_pc (next_pc); |
1527 | } | |
c906108c SS |
1528 | } |
1529 | ||
dc129d82 | 1530 | \f |
dc129d82 JT |
1531 | /* Initialize the current architecture based on INFO. If possible, re-use an |
1532 | architecture from ARCHES, which is a list of architectures already created | |
1533 | during this debugging session. | |
1534 | ||
1535 | Called e.g. at program startup, when reading a core file, and when reading | |
1536 | a binary file. */ | |
1537 | ||
1538 | static struct gdbarch * | |
1539 | alpha_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | |
1540 | { | |
1541 | struct gdbarch_tdep *tdep; | |
1542 | struct gdbarch *gdbarch; | |
dc129d82 JT |
1543 | |
1544 | /* Try to determine the ABI of the object we are loading. */ | |
4be87837 | 1545 | if (info.abfd != NULL && info.osabi == GDB_OSABI_UNKNOWN) |
dc129d82 | 1546 | { |
4be87837 DJ |
1547 | /* If it's an ECOFF file, assume it's OSF/1. */ |
1548 | if (bfd_get_flavour (info.abfd) == bfd_target_ecoff_flavour) | |
aff87235 | 1549 | info.osabi = GDB_OSABI_OSF1; |
dc129d82 JT |
1550 | } |
1551 | ||
1552 | /* Find a candidate among extant architectures. */ | |
4be87837 DJ |
1553 | arches = gdbarch_list_lookup_by_info (arches, &info); |
1554 | if (arches != NULL) | |
1555 | return arches->gdbarch; | |
dc129d82 JT |
1556 | |
1557 | tdep = xmalloc (sizeof (struct gdbarch_tdep)); | |
1558 | gdbarch = gdbarch_alloc (&info, tdep); | |
1559 | ||
d2427a71 RH |
1560 | /* Lowest text address. This is used by heuristic_proc_start() |
1561 | to decide when to stop looking. */ | |
594706e6 | 1562 | tdep->vm_min_address = (CORE_ADDR) 0x120000000LL; |
d9b023cc | 1563 | |
36a6271d | 1564 | tdep->dynamic_sigtramp_offset = NULL; |
5868c862 | 1565 | tdep->sigcontext_addr = NULL; |
138e7be5 MK |
1566 | tdep->sc_pc_offset = 2 * 8; |
1567 | tdep->sc_regs_offset = 4 * 8; | |
1568 | tdep->sc_fpregs_offset = tdep->sc_regs_offset + 32 * 8 + 8; | |
36a6271d | 1569 | |
accc6d1f JT |
1570 | tdep->jb_pc = -1; /* longjmp support not enabled by default */ |
1571 | ||
9823e921 RH |
1572 | tdep->return_in_memory = alpha_return_in_memory_always; |
1573 | ||
dc129d82 JT |
1574 | /* Type sizes */ |
1575 | set_gdbarch_short_bit (gdbarch, 16); | |
1576 | set_gdbarch_int_bit (gdbarch, 32); | |
1577 | set_gdbarch_long_bit (gdbarch, 64); | |
1578 | set_gdbarch_long_long_bit (gdbarch, 64); | |
1579 | set_gdbarch_float_bit (gdbarch, 32); | |
1580 | set_gdbarch_double_bit (gdbarch, 64); | |
1581 | set_gdbarch_long_double_bit (gdbarch, 64); | |
1582 | set_gdbarch_ptr_bit (gdbarch, 64); | |
1583 | ||
1584 | /* Register info */ | |
1585 | set_gdbarch_num_regs (gdbarch, ALPHA_NUM_REGS); | |
1586 | set_gdbarch_sp_regnum (gdbarch, ALPHA_SP_REGNUM); | |
dc129d82 JT |
1587 | set_gdbarch_pc_regnum (gdbarch, ALPHA_PC_REGNUM); |
1588 | set_gdbarch_fp0_regnum (gdbarch, ALPHA_FP0_REGNUM); | |
1589 | ||
1590 | set_gdbarch_register_name (gdbarch, alpha_register_name); | |
c483c494 | 1591 | set_gdbarch_register_type (gdbarch, alpha_register_type); |
dc129d82 JT |
1592 | |
1593 | set_gdbarch_cannot_fetch_register (gdbarch, alpha_cannot_fetch_register); | |
1594 | set_gdbarch_cannot_store_register (gdbarch, alpha_cannot_store_register); | |
1595 | ||
c483c494 RH |
1596 | set_gdbarch_convert_register_p (gdbarch, alpha_convert_register_p); |
1597 | set_gdbarch_register_to_value (gdbarch, alpha_register_to_value); | |
1598 | set_gdbarch_value_to_register (gdbarch, alpha_value_to_register); | |
dc129d82 | 1599 | |
615967cb RH |
1600 | set_gdbarch_register_reggroup_p (gdbarch, alpha_register_reggroup_p); |
1601 | ||
d2427a71 | 1602 | /* Prologue heuristics. */ |
dc129d82 JT |
1603 | set_gdbarch_skip_prologue (gdbarch, alpha_skip_prologue); |
1604 | ||
5ef165c2 RH |
1605 | /* Disassembler. */ |
1606 | set_gdbarch_print_insn (gdbarch, print_insn_alpha); | |
1607 | ||
d2427a71 | 1608 | /* Call info. */ |
dc129d82 | 1609 | |
9823e921 | 1610 | set_gdbarch_return_value (gdbarch, alpha_return_value); |
dc129d82 JT |
1611 | |
1612 | /* Settings for calling functions in the inferior. */ | |
c88e30c0 | 1613 | set_gdbarch_push_dummy_call (gdbarch, alpha_push_dummy_call); |
d2427a71 RH |
1614 | |
1615 | /* Methods for saving / extracting a dummy frame's ID. */ | |
1616 | set_gdbarch_unwind_dummy_id (gdbarch, alpha_unwind_dummy_id); | |
d2427a71 RH |
1617 | |
1618 | /* Return the unwound PC value. */ | |
1619 | set_gdbarch_unwind_pc (gdbarch, alpha_unwind_pc); | |
dc129d82 JT |
1620 | |
1621 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
36a6271d | 1622 | set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target); |
dc129d82 | 1623 | |
95b80706 | 1624 | set_gdbarch_breakpoint_from_pc (gdbarch, alpha_breakpoint_from_pc); |
dc129d82 | 1625 | set_gdbarch_decr_pc_after_break (gdbarch, 4); |
9d519230 | 1626 | set_gdbarch_cannot_step_breakpoint (gdbarch, 1); |
95b80706 | 1627 | |
44dffaac | 1628 | /* Hook in ABI-specific overrides, if they have been registered. */ |
4be87837 | 1629 | gdbarch_init_osabi (info, gdbarch); |
44dffaac | 1630 | |
accc6d1f JT |
1631 | /* Now that we have tuned the configuration, set a few final things |
1632 | based on what the OS ABI has told us. */ | |
1633 | ||
1634 | if (tdep->jb_pc >= 0) | |
1635 | set_gdbarch_get_longjmp_target (gdbarch, alpha_get_longjmp_target); | |
1636 | ||
336d1bba AC |
1637 | frame_unwind_append_sniffer (gdbarch, alpha_sigtramp_frame_sniffer); |
1638 | frame_unwind_append_sniffer (gdbarch, alpha_heuristic_frame_sniffer); | |
dc129d82 | 1639 | |
d2427a71 | 1640 | frame_base_set_default (gdbarch, &alpha_heuristic_frame_base); |
accc6d1f | 1641 | |
d2427a71 | 1642 | return gdbarch; |
dc129d82 JT |
1643 | } |
1644 | ||
baa490c4 RH |
1645 | void |
1646 | alpha_dwarf2_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) | |
1647 | { | |
336d1bba AC |
1648 | frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer); |
1649 | frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer); | |
baa490c4 RH |
1650 | } |
1651 | ||
a78f21af AC |
1652 | extern initialize_file_ftype _initialize_alpha_tdep; /* -Wmissing-prototypes */ |
1653 | ||
c906108c | 1654 | void |
fba45db2 | 1655 | _initialize_alpha_tdep (void) |
c906108c SS |
1656 | { |
1657 | struct cmd_list_element *c; | |
1658 | ||
d2427a71 | 1659 | gdbarch_register (bfd_arch_alpha, alpha_gdbarch_init, NULL); |
c906108c SS |
1660 | |
1661 | /* Let the user set the fence post for heuristic_proc_start. */ | |
1662 | ||
1663 | /* We really would like to have both "0" and "unlimited" work, but | |
1664 | command.c doesn't deal with that. So make it a var_zinteger | |
1665 | because the user can always use "999999" or some such for unlimited. */ | |
edefbb7c AC |
1666 | /* We need to throw away the frame cache when we set this, since it |
1667 | might change our ability to get backtraces. */ | |
1668 | add_setshow_zinteger_cmd ("heuristic-fence-post", class_support, | |
7915a72c AC |
1669 | &heuristic_fence_post, _("\ |
1670 | Set the distance searched for the start of a function."), _("\ | |
1671 | Show the distance searched for the start of a function."), _("\ | |
c906108c SS |
1672 | If you are debugging a stripped executable, GDB needs to search through the\n\ |
1673 | program for the start of a function. This command sets the distance of the\n\ | |
323e0a4a | 1674 | search. The only need to set it is when debugging a stripped executable."), |
2c5b56ce | 1675 | reinit_frame_cache_sfunc, |
7915a72c | 1676 | NULL, /* FIXME: i18n: The distance searched for the start of a function is \"%d\". */ |
edefbb7c | 1677 | &setlist, &showlist); |
c906108c | 1678 | } |