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2a6d284d MK |
1 | /* Native-dependent code for AMD64. |
2 | ||
b811d2c2 | 3 | Copyright (C) 2003-2020 Free Software Foundation, Inc. |
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4 | |
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 9 | the Free Software Foundation; either version 3 of the License, or |
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10 | (at your option) any later version. |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
a9762ec7 | 18 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
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19 | |
20 | #include "defs.h" | |
d55e5aa6 | 21 | #include "gdbarch.h" |
d55e5aa6 | 22 | #include "regcache.h" |
2a6d284d | 23 | |
4de283e4 TT |
24 | #include "i386-tdep.h" |
25 | #include "amd64-tdep.h" | |
26 | #include "amd64-nat.h" | |
27 | ||
2a6d284d MK |
28 | /* The following bits of code help with implementing debugging 32-bit |
29 | code natively on AMD64. The idea is to define two mappings between | |
30 | the register number as used by GDB and the register set used by the | |
31 | host to represent the general-purpose registers; one for 32-bit | |
32 | code and one for 64-bit code. The mappings are specified by the | |
85102364 | 33 | following variables and consist of an array of offsets within the |
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34 | register set indexed by register number, and the number of |
35 | registers supported by the mapping. We don't need mappings for the | |
36 | floating-point and SSE registers, since the difference between | |
30baf67b | 37 | 64-bit and 32-bit variants are negligible. The difference in the |
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38 | number of SSE registers is already handled by the target code. */ |
39 | ||
40 | /* General-purpose register mapping for native 32-bit code. */ | |
41 | int *amd64_native_gregset32_reg_offset; | |
42 | int amd64_native_gregset32_num_regs = I386_NUM_GREGS; | |
43 | ||
44 | /* General-purpose register mapping for native 64-bit code. */ | |
45 | int *amd64_native_gregset64_reg_offset; | |
90f90721 | 46 | int amd64_native_gregset64_num_regs = AMD64_NUM_GREGS; |
2a6d284d MK |
47 | |
48 | /* Return the offset of REGNUM within the appropriate native | |
49 | general-purpose register set. */ | |
50 | ||
51 | static int | |
f8028488 | 52 | amd64_native_gregset_reg_offset (struct gdbarch *gdbarch, int regnum) |
2a6d284d MK |
53 | { |
54 | int *reg_offset = amd64_native_gregset64_reg_offset; | |
55 | int num_regs = amd64_native_gregset64_num_regs; | |
56 | ||
57 | gdb_assert (regnum >= 0); | |
58 | ||
233dfcf0 | 59 | if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32) |
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60 | { |
61 | reg_offset = amd64_native_gregset32_reg_offset; | |
62 | num_regs = amd64_native_gregset32_num_regs; | |
63 | } | |
64 | ||
f8028488 MD |
65 | if (num_regs > gdbarch_num_regs (gdbarch)) |
66 | num_regs = gdbarch_num_regs (gdbarch); | |
2a6d284d | 67 | |
7005d26a WT |
68 | if (regnum >= num_regs) |
69 | return -1; | |
2a6d284d | 70 | |
2735833d WT |
71 | /* Kernels that predate Linux 2.6.25 don't provide access to |
72 | these segment registers in user_regs_struct. */ | |
73 | #ifndef HAVE_STRUCT_USER_REGS_STRUCT_FS_BASE | |
74 | if (regnum == AMD64_FSBASE_REGNUM || regnum == AMD64_GSBASE_REGNUM) | |
75 | return -1; | |
76 | #endif | |
77 | ||
7005d26a | 78 | return reg_offset[regnum]; |
2a6d284d MK |
79 | } |
80 | ||
81 | /* Return whether the native general-purpose register set supplies | |
82 | register REGNUM. */ | |
83 | ||
84 | int | |
f8028488 | 85 | amd64_native_gregset_supplies_p (struct gdbarch *gdbarch, int regnum) |
2a6d284d | 86 | { |
f8028488 | 87 | return (amd64_native_gregset_reg_offset (gdbarch, regnum) != -1); |
2a6d284d MK |
88 | } |
89 | ||
90 | ||
ecba89de | 91 | /* Supply register REGNUM, whose contents are stored in GREGS, to |
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92 | REGCACHE. If REGNUM is -1, supply all appropriate registers. */ |
93 | ||
94 | void | |
95 | amd64_supply_native_gregset (struct regcache *regcache, | |
96 | const void *gregs, int regnum) | |
97 | { | |
9a3c8263 | 98 | const char *regs = (const char *) gregs; |
ac7936df | 99 | struct gdbarch *gdbarch = regcache->arch (); |
2a6d284d MK |
100 | int num_regs = amd64_native_gregset64_num_regs; |
101 | int i; | |
102 | ||
233dfcf0 | 103 | if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32) |
2a6d284d MK |
104 | num_regs = amd64_native_gregset32_num_regs; |
105 | ||
2ae02b47 UW |
106 | if (num_regs > gdbarch_num_regs (gdbarch)) |
107 | num_regs = gdbarch_num_regs (gdbarch); | |
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108 | |
109 | for (i = 0; i < num_regs; i++) | |
110 | { | |
111 | if (regnum == -1 || regnum == i) | |
112 | { | |
f8028488 | 113 | int offset = amd64_native_gregset_reg_offset (gdbarch, i); |
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114 | |
115 | if (offset != -1) | |
73e1c03f | 116 | regcache->raw_supply (i, regs + offset); |
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117 | } |
118 | } | |
119 | } | |
120 | ||
121 | /* Collect register REGNUM from REGCACHE and store its contents in | |
122 | GREGS. If REGNUM is -1, collect and store all appropriate | |
123 | registers. */ | |
124 | ||
125 | void | |
126 | amd64_collect_native_gregset (const struct regcache *regcache, | |
127 | void *gregs, int regnum) | |
128 | { | |
9a3c8263 | 129 | char *regs = (char *) gregs; |
ac7936df | 130 | struct gdbarch *gdbarch = regcache->arch (); |
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131 | int num_regs = amd64_native_gregset64_num_regs; |
132 | int i; | |
133 | ||
233dfcf0 | 134 | if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32) |
041bd74b MK |
135 | { |
136 | num_regs = amd64_native_gregset32_num_regs; | |
137 | ||
138 | /* Make sure %eax, %ebx, %ecx, %edx, %esi, %edi, %ebp, %esp and | |
139 | %eip get zero-extended to 64 bits. */ | |
140 | for (i = 0; i <= I386_EIP_REGNUM; i++) | |
141 | { | |
142 | if (regnum == -1 || regnum == i) | |
f8028488 | 143 | memset (regs + amd64_native_gregset_reg_offset (gdbarch, i), 0, 8); |
041bd74b | 144 | } |
e9ff708b AC |
145 | /* Ditto for %cs, %ss, %ds, %es, %fs, and %gs. */ |
146 | for (i = I386_CS_REGNUM; i <= I386_GS_REGNUM; i++) | |
147 | { | |
148 | if (regnum == -1 || regnum == i) | |
f8028488 | 149 | memset (regs + amd64_native_gregset_reg_offset (gdbarch, i), 0, 8); |
e9ff708b | 150 | } |
041bd74b | 151 | } |
2a6d284d | 152 | |
2ae02b47 UW |
153 | if (num_regs > gdbarch_num_regs (gdbarch)) |
154 | num_regs = gdbarch_num_regs (gdbarch); | |
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155 | |
156 | for (i = 0; i < num_regs; i++) | |
157 | { | |
158 | if (regnum == -1 || regnum == i) | |
159 | { | |
f8028488 | 160 | int offset = amd64_native_gregset_reg_offset (gdbarch, i); |
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161 | |
162 | if (offset != -1) | |
34a79281 | 163 | regcache->raw_collect (i, regs + offset); |
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164 | } |
165 | } | |
166 | } |