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2a6d284d MK |
1 | /* Native-dependent code for AMD64. |
2 | ||
42a4f53d | 3 | Copyright (C) 2003-2019 Free Software Foundation, Inc. |
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4 | |
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 9 | the Free Software Foundation; either version 3 of the License, or |
2a6d284d MK |
10 | (at your option) any later version. |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
a9762ec7 | 18 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
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19 | |
20 | #include "defs.h" | |
2a6d284d | 21 | |
d55e5aa6 | 22 | /* Local non-gdb includes. */ |
2c0b251b | 23 | #include "amd64-nat.h" |
d55e5aa6 TT |
24 | #include "amd64-tdep.h" |
25 | #include "gdbarch.h" | |
26 | #include "i386-tdep.h" | |
27 | #include "regcache.h" | |
2a6d284d MK |
28 | |
29 | /* The following bits of code help with implementing debugging 32-bit | |
30 | code natively on AMD64. The idea is to define two mappings between | |
31 | the register number as used by GDB and the register set used by the | |
32 | host to represent the general-purpose registers; one for 32-bit | |
33 | code and one for 64-bit code. The mappings are specified by the | |
34 | follwing variables and consist of an array of offsets within the | |
35 | register set indexed by register number, and the number of | |
36 | registers supported by the mapping. We don't need mappings for the | |
37 | floating-point and SSE registers, since the difference between | |
38 | 64-bit and 32-bit variants are negligable. The difference in the | |
39 | number of SSE registers is already handled by the target code. */ | |
40 | ||
41 | /* General-purpose register mapping for native 32-bit code. */ | |
42 | int *amd64_native_gregset32_reg_offset; | |
43 | int amd64_native_gregset32_num_regs = I386_NUM_GREGS; | |
44 | ||
45 | /* General-purpose register mapping for native 64-bit code. */ | |
46 | int *amd64_native_gregset64_reg_offset; | |
90f90721 | 47 | int amd64_native_gregset64_num_regs = AMD64_NUM_GREGS; |
2a6d284d MK |
48 | |
49 | /* Return the offset of REGNUM within the appropriate native | |
50 | general-purpose register set. */ | |
51 | ||
52 | static int | |
f8028488 | 53 | amd64_native_gregset_reg_offset (struct gdbarch *gdbarch, int regnum) |
2a6d284d MK |
54 | { |
55 | int *reg_offset = amd64_native_gregset64_reg_offset; | |
56 | int num_regs = amd64_native_gregset64_num_regs; | |
57 | ||
58 | gdb_assert (regnum >= 0); | |
59 | ||
233dfcf0 | 60 | if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32) |
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61 | { |
62 | reg_offset = amd64_native_gregset32_reg_offset; | |
63 | num_regs = amd64_native_gregset32_num_regs; | |
64 | } | |
65 | ||
f8028488 MD |
66 | if (num_regs > gdbarch_num_regs (gdbarch)) |
67 | num_regs = gdbarch_num_regs (gdbarch); | |
2a6d284d | 68 | |
7005d26a WT |
69 | if (regnum >= num_regs) |
70 | return -1; | |
2a6d284d | 71 | |
2735833d WT |
72 | /* Kernels that predate Linux 2.6.25 don't provide access to |
73 | these segment registers in user_regs_struct. */ | |
74 | #ifndef HAVE_STRUCT_USER_REGS_STRUCT_FS_BASE | |
75 | if (regnum == AMD64_FSBASE_REGNUM || regnum == AMD64_GSBASE_REGNUM) | |
76 | return -1; | |
77 | #endif | |
78 | ||
7005d26a | 79 | return reg_offset[regnum]; |
2a6d284d MK |
80 | } |
81 | ||
82 | /* Return whether the native general-purpose register set supplies | |
83 | register REGNUM. */ | |
84 | ||
85 | int | |
f8028488 | 86 | amd64_native_gregset_supplies_p (struct gdbarch *gdbarch, int regnum) |
2a6d284d | 87 | { |
f8028488 | 88 | return (amd64_native_gregset_reg_offset (gdbarch, regnum) != -1); |
2a6d284d MK |
89 | } |
90 | ||
91 | ||
ecba89de | 92 | /* Supply register REGNUM, whose contents are stored in GREGS, to |
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93 | REGCACHE. If REGNUM is -1, supply all appropriate registers. */ |
94 | ||
95 | void | |
96 | amd64_supply_native_gregset (struct regcache *regcache, | |
97 | const void *gregs, int regnum) | |
98 | { | |
9a3c8263 | 99 | const char *regs = (const char *) gregs; |
ac7936df | 100 | struct gdbarch *gdbarch = regcache->arch (); |
2a6d284d MK |
101 | int num_regs = amd64_native_gregset64_num_regs; |
102 | int i; | |
103 | ||
233dfcf0 | 104 | if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32) |
2a6d284d MK |
105 | num_regs = amd64_native_gregset32_num_regs; |
106 | ||
2ae02b47 UW |
107 | if (num_regs > gdbarch_num_regs (gdbarch)) |
108 | num_regs = gdbarch_num_regs (gdbarch); | |
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109 | |
110 | for (i = 0; i < num_regs; i++) | |
111 | { | |
112 | if (regnum == -1 || regnum == i) | |
113 | { | |
f8028488 | 114 | int offset = amd64_native_gregset_reg_offset (gdbarch, i); |
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115 | |
116 | if (offset != -1) | |
73e1c03f | 117 | regcache->raw_supply (i, regs + offset); |
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118 | } |
119 | } | |
120 | } | |
121 | ||
122 | /* Collect register REGNUM from REGCACHE and store its contents in | |
123 | GREGS. If REGNUM is -1, collect and store all appropriate | |
124 | registers. */ | |
125 | ||
126 | void | |
127 | amd64_collect_native_gregset (const struct regcache *regcache, | |
128 | void *gregs, int regnum) | |
129 | { | |
9a3c8263 | 130 | char *regs = (char *) gregs; |
ac7936df | 131 | struct gdbarch *gdbarch = regcache->arch (); |
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132 | int num_regs = amd64_native_gregset64_num_regs; |
133 | int i; | |
134 | ||
233dfcf0 | 135 | if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32) |
041bd74b MK |
136 | { |
137 | num_regs = amd64_native_gregset32_num_regs; | |
138 | ||
139 | /* Make sure %eax, %ebx, %ecx, %edx, %esi, %edi, %ebp, %esp and | |
140 | %eip get zero-extended to 64 bits. */ | |
141 | for (i = 0; i <= I386_EIP_REGNUM; i++) | |
142 | { | |
143 | if (regnum == -1 || regnum == i) | |
f8028488 | 144 | memset (regs + amd64_native_gregset_reg_offset (gdbarch, i), 0, 8); |
041bd74b | 145 | } |
e9ff708b AC |
146 | /* Ditto for %cs, %ss, %ds, %es, %fs, and %gs. */ |
147 | for (i = I386_CS_REGNUM; i <= I386_GS_REGNUM; i++) | |
148 | { | |
149 | if (regnum == -1 || regnum == i) | |
f8028488 | 150 | memset (regs + amd64_native_gregset_reg_offset (gdbarch, i), 0, 8); |
e9ff708b | 151 | } |
041bd74b | 152 | } |
2a6d284d | 153 | |
2ae02b47 UW |
154 | if (num_regs > gdbarch_num_regs (gdbarch)) |
155 | num_regs = gdbarch_num_regs (gdbarch); | |
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156 | |
157 | for (i = 0; i < num_regs; i++) | |
158 | { | |
159 | if (regnum == -1 || regnum == i) | |
160 | { | |
f8028488 | 161 | int offset = amd64_native_gregset_reg_offset (gdbarch, i); |
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162 | |
163 | if (offset != -1) | |
34a79281 | 164 | regcache->raw_collect (i, regs + offset); |
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165 | } |
166 | } | |
167 | } |