Commit | Line | Data |
---|---|---|
d9311bfa AT |
1 | /* Common code for ARM software single stepping support. |
2 | ||
42a4f53d | 3 | Copyright (C) 1988-2019 Free Software Foundation, Inc. |
d9311bfa AT |
4 | |
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 3 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ | |
19 | ||
20 | #ifndef ARM_GET_NEXT_PCS_H | |
21 | #define ARM_GET_NEXT_PCS_H 1 | |
a0ff9e1a SM |
22 | |
23 | #include <vector> | |
d9311bfa AT |
24 | |
25 | /* Forward declaration. */ | |
26 | struct arm_get_next_pcs; | |
27 | ||
28 | /* get_next_pcs operations. */ | |
29 | struct arm_get_next_pcs_ops | |
30 | { | |
31 | ULONGEST (*read_mem_uint) (CORE_ADDR memaddr, int len, int byte_order); | |
553cb527 | 32 | CORE_ADDR (*syscall_next_pc) (struct arm_get_next_pcs *self); |
d9311bfa AT |
33 | CORE_ADDR (*addr_bits_remove) (struct arm_get_next_pcs *self, CORE_ADDR val); |
34 | int (*is_thumb) (struct arm_get_next_pcs *self); | |
ed443b61 YQ |
35 | |
36 | /* Fix up PC if needed. */ | |
37 | CORE_ADDR (*fixup) (struct arm_get_next_pcs *self, CORE_ADDR pc); | |
d9311bfa AT |
38 | }; |
39 | ||
40 | /* Context for a get_next_pcs call on ARM. */ | |
41 | struct arm_get_next_pcs | |
42 | { | |
43 | /* Operations implementations. */ | |
44 | struct arm_get_next_pcs_ops *ops; | |
45 | /* Byte order for data. */ | |
46 | int byte_order; | |
47 | /* Byte order for code. */ | |
48 | int byte_order_for_code; | |
1b451dda YQ |
49 | /* Whether the target has 32-bit thumb-2 breakpoint defined or |
50 | not. */ | |
51 | int has_thumb2_breakpoint; | |
d9311bfa AT |
52 | /* Registry cache. */ |
53 | struct regcache *regcache; | |
54 | }; | |
55 | ||
56 | /* Initialize arm_get_next_pcs. */ | |
57 | void arm_get_next_pcs_ctor (struct arm_get_next_pcs *self, | |
58 | struct arm_get_next_pcs_ops *ops, | |
59 | int byte_order, | |
60 | int byte_order_for_code, | |
1b451dda | 61 | int has_thumb2_breakpoint, |
d9311bfa AT |
62 | struct regcache *regcache); |
63 | ||
64 | /* Find the next possible PCs after the current instruction executes. */ | |
a0ff9e1a | 65 | std::vector<CORE_ADDR> arm_get_next_pcs (struct arm_get_next_pcs *self); |
d9311bfa | 66 | |
d9311bfa | 67 | #endif /* ARM_GET_NEXT_PCS_H */ |