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b5ffee31 AB |
1 | /* Common target-dependent functionality for RISC-V |
2 | ||
3 | Copyright (C) 2018 Free Software Foundation, Inc. | |
4 | ||
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 3 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ | |
19 | ||
20 | #ifndef ARCH_RISCV_H | |
21 | #define ARCH_RISCV_H | |
22 | ||
23 | #include "common/tdesc.h" | |
24 | ||
25 | /* The set of RISC-V architectural features that we track that impact how | |
26 | we configure the actual gdbarch instance. We hold one of these in the | |
27 | gdbarch_tdep structure, and use it to distinguish between different | |
28 | RISC-V gdbarch instances. | |
29 | ||
30 | The information in here ideally comes from the target description, | |
31 | however, if the target doesn't provide a target description then we will | |
32 | create a default target description by first populating one of these | |
33 | based on what we know about the binary being executed, and using that to | |
34 | drive default target description creation. */ | |
35 | ||
36 | struct riscv_gdbarch_features | |
37 | { | |
38 | /* The size of the x-registers in bytes. This is either 4 (RV32), 8 | |
39 | (RV64), or 16 (RV128). No other value is valid. Initialise to the | |
40 | invalid 0 value so we can spot if one of these is used | |
41 | uninitialised. */ | |
42 | int xlen = 0; | |
43 | ||
44 | /* The size of the f-registers in bytes. This is either 4 (RV32), 8 | |
45 | (RV64), or 16 (RV128). This can also hold the value 0 to indicate | |
46 | that there are no f-registers. No other value is valid. */ | |
47 | int flen = 0; | |
48 | ||
49 | /* This indicates if hardware floating point abi is in use. If the FLEN | |
50 | field is 0 then this value _must_ be false. If the FLEN field is | |
51 | non-zero and this field is false then this indicates the target has | |
52 | floating point registers, but is still using the soft-float abi. If | |
53 | this field is true then the hardware floating point abi is in use, and | |
54 | values are passed in f-registers matching the size of FLEN. */ | |
55 | bool hw_float_abi = false; | |
56 | }; | |
57 | ||
58 | /* Create and return a target description that is compatible with | |
59 | FEATURES. */ | |
60 | ||
61 | target_desc *riscv_create_target_description | |
62 | (struct riscv_gdbarch_features features); | |
63 | ||
64 | #endif /* ARCH_RISCV_H */ |