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faf5f7ad | 1 | /* GNU/Linux on ARM target support. |
0fd88904 AC |
2 | |
3 | Copyright 1999, 2000, 2001, 2002, 2003, 2005 Free Software | |
4 | Foundation, Inc. | |
faf5f7ad SB |
5 | |
6 | This file is part of GDB. | |
7 | ||
8 | This program is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2 of the License, or | |
11 | (at your option) any later version. | |
12 | ||
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with this program; if not, write to the Free Software | |
20 | Foundation, Inc., 59 Temple Place - Suite 330, | |
21 | Boston, MA 02111-1307, USA. */ | |
22 | ||
23 | #include "defs.h" | |
c20f6dea SB |
24 | #include "target.h" |
25 | #include "value.h" | |
faf5f7ad | 26 | #include "gdbtypes.h" |
134e61c4 | 27 | #include "floatformat.h" |
2a451106 KB |
28 | #include "gdbcore.h" |
29 | #include "frame.h" | |
4e052eda | 30 | #include "regcache.h" |
d16aafd8 | 31 | #include "doublest.h" |
7aa1783e | 32 | #include "solib-svr4.h" |
4be87837 | 33 | #include "osabi.h" |
faf5f7ad | 34 | |
34e8f22d | 35 | #include "arm-tdep.h" |
0670c0aa | 36 | #include "glibc-tdep.h" |
a52e6aac | 37 | |
fdf39c9a RE |
38 | /* Under ARM GNU/Linux the traditional way of performing a breakpoint |
39 | is to execute a particular software interrupt, rather than use a | |
40 | particular undefined instruction to provoke a trap. Upon exection | |
41 | of the software interrupt the kernel stops the inferior with a | |
2ef47cd0 DJ |
42 | SIGTRAP, and wakes the debugger. Since ARM GNU/Linux doesn't support |
43 | Thumb at the moment we only override the ARM breakpoints. */ | |
66e810cd | 44 | |
2ef47cd0 DJ |
45 | static const char arm_linux_arm_le_breakpoint[] = { 0x01, 0x00, 0x9f, 0xef }; |
46 | ||
47 | static const char arm_linux_arm_be_breakpoint[] = { 0xef, 0x9f, 0x00, 0x01 }; | |
66e810cd | 48 | |
9df628e0 | 49 | /* Description of the longjmp buffer. */ |
7a5ea0d4 | 50 | #define ARM_LINUX_JB_ELEMENT_SIZE INT_REGISTER_SIZE |
a6cdd8c5 | 51 | #define ARM_LINUX_JB_PC 21 |
faf5f7ad | 52 | |
faf5f7ad SB |
53 | /* Extract from an array REGBUF containing the (raw) register state |
54 | a function return value of type TYPE, and copy that, in virtual format, | |
55 | into VALBUF. */ | |
19d3fc80 RE |
56 | /* FIXME rearnsha/2002-02-23: This function shouldn't be necessary. |
57 | The ARM generic one should be able to handle the model used by | |
58 | linux and the low-level formatting of the registers should be | |
59 | hidden behind the regcache abstraction. */ | |
60 | static void | |
faf5f7ad | 61 | arm_linux_extract_return_value (struct type *type, |
b8b527c5 | 62 | char regbuf[], |
faf5f7ad SB |
63 | char *valbuf) |
64 | { | |
65 | /* ScottB: This needs to be looked at to handle the different | |
fdf39c9a | 66 | floating point emulators on ARM GNU/Linux. Right now the code |
faf5f7ad SB |
67 | assumes that fetch inferior registers does the right thing for |
68 | GDB. I suspect this won't handle NWFPE registers correctly, nor | |
69 | will the default ARM version (arm_extract_return_value()). */ | |
70 | ||
34e8f22d RE |
71 | int regnum = ((TYPE_CODE_FLT == TYPE_CODE (type)) |
72 | ? ARM_F0_REGNUM : ARM_A1_REGNUM); | |
62700349 | 73 | memcpy (valbuf, ®buf[DEPRECATED_REGISTER_BYTE (regnum)], TYPE_LENGTH (type)); |
faf5f7ad SB |
74 | } |
75 | ||
134e61c4 SB |
76 | /* Note: ScottB |
77 | ||
78 | This function does not support passing parameters using the FPA | |
79 | variant of the APCS. It passes any floating point arguments in the | |
80 | general registers and/or on the stack. | |
81 | ||
82 | FIXME: This and arm_push_arguments should be merged. However this | |
83 | function breaks on a little endian host, big endian target | |
84 | using the COFF file format. ELF is ok. | |
85 | ||
86 | ScottB. */ | |
87 | ||
88 | /* Addresses for calling Thumb functions have the bit 0 set. | |
89 | Here are some macros to test, set, or clear bit 0 of addresses. */ | |
90 | #define IS_THUMB_ADDR(addr) ((addr) & 1) | |
91 | #define MAKE_THUMB_ADDR(addr) ((addr) | 1) | |
92 | #define UNMAKE_THUMB_ADDR(addr) ((addr) & ~1) | |
93 | ||
19d3fc80 | 94 | static CORE_ADDR |
ea7c478f | 95 | arm_linux_push_arguments (int nargs, struct value **args, CORE_ADDR sp, |
134e61c4 SB |
96 | int struct_return, CORE_ADDR struct_addr) |
97 | { | |
98 | char *fp; | |
99 | int argnum, argreg, nstack_size; | |
100 | ||
101 | /* Walk through the list of args and determine how large a temporary | |
102 | stack is required. Need to take care here as structs may be | |
103 | passed on the stack, and we have to to push them. */ | |
b1e29e33 | 104 | nstack_size = -4 * DEPRECATED_REGISTER_SIZE; /* Some arguments go into A1-A4. */ |
134e61c4 SB |
105 | |
106 | if (struct_return) /* The struct address goes in A1. */ | |
b1e29e33 | 107 | nstack_size += DEPRECATED_REGISTER_SIZE; |
134e61c4 SB |
108 | |
109 | /* Walk through the arguments and add their size to nstack_size. */ | |
110 | for (argnum = 0; argnum < nargs; argnum++) | |
111 | { | |
112 | int len; | |
113 | struct type *arg_type; | |
114 | ||
4991999e | 115 | arg_type = check_typedef (value_type (args[argnum])); |
134e61c4 SB |
116 | len = TYPE_LENGTH (arg_type); |
117 | ||
118 | /* ANSI C code passes float arguments as integers, K&R code | |
119 | passes float arguments as doubles. Correct for this here. */ | |
b1e29e33 | 120 | if (TYPE_CODE_FLT == TYPE_CODE (arg_type) && DEPRECATED_REGISTER_SIZE == len) |
7a5ea0d4 | 121 | nstack_size += TARGET_DOUBLE_BIT / TARGET_CHAR_BIT; |
134e61c4 SB |
122 | else |
123 | nstack_size += len; | |
124 | } | |
125 | ||
126 | /* Allocate room on the stack, and initialize our stack frame | |
127 | pointer. */ | |
128 | fp = NULL; | |
129 | if (nstack_size > 0) | |
130 | { | |
131 | sp -= nstack_size; | |
132 | fp = (char *) sp; | |
133 | } | |
134 | ||
135 | /* Initialize the integer argument register pointer. */ | |
34e8f22d | 136 | argreg = ARM_A1_REGNUM; |
134e61c4 SB |
137 | |
138 | /* The struct_return pointer occupies the first parameter passing | |
139 | register. */ | |
140 | if (struct_return) | |
141 | write_register (argreg++, struct_addr); | |
142 | ||
143 | /* Process arguments from left to right. Store as many as allowed | |
144 | in the parameter passing registers (A1-A4), and save the rest on | |
145 | the temporary stack. */ | |
146 | for (argnum = 0; argnum < nargs; argnum++) | |
147 | { | |
148 | int len; | |
149 | char *val; | |
134e61c4 SB |
150 | CORE_ADDR regval; |
151 | enum type_code typecode; | |
152 | struct type *arg_type, *target_type; | |
153 | ||
4991999e | 154 | arg_type = check_typedef (value_type (args[argnum])); |
134e61c4 SB |
155 | target_type = TYPE_TARGET_TYPE (arg_type); |
156 | len = TYPE_LENGTH (arg_type); | |
157 | typecode = TYPE_CODE (arg_type); | |
0fd88904 | 158 | val = (char *) value_contents (args[argnum]); |
134e61c4 SB |
159 | |
160 | /* ANSI C code passes float arguments as integers, K&R code | |
161 | passes float arguments as doubles. The .stabs record for | |
162 | for ANSI prototype floating point arguments records the | |
163 | type as FP_INTEGER, while a K&R style (no prototype) | |
164 | .stabs records the type as FP_FLOAT. In this latter case | |
165 | the compiler converts the float arguments to double before | |
166 | calling the function. */ | |
b1e29e33 | 167 | if (TYPE_CODE_FLT == typecode && DEPRECATED_REGISTER_SIZE == len) |
134e61c4 | 168 | { |
134e61c4 | 169 | DOUBLEST dblval; |
f1908289 | 170 | dblval = deprecated_extract_floating (val, len); |
134e61c4 | 171 | len = TARGET_DOUBLE_BIT / TARGET_CHAR_BIT; |
a37b3cc0 | 172 | val = alloca (len); |
f1908289 | 173 | deprecated_store_floating (val, len, dblval); |
134e61c4 SB |
174 | } |
175 | ||
176 | /* If the argument is a pointer to a function, and it is a Thumb | |
177 | function, set the low bit of the pointer. */ | |
178 | if (TYPE_CODE_PTR == typecode | |
179 | && NULL != target_type | |
180 | && TYPE_CODE_FUNC == TYPE_CODE (target_type)) | |
181 | { | |
7c0b4a20 | 182 | CORE_ADDR regval = extract_unsigned_integer (val, len); |
134e61c4 | 183 | if (arm_pc_is_thumb (regval)) |
fbd9dcd3 | 184 | store_unsigned_integer (val, len, MAKE_THUMB_ADDR (regval)); |
134e61c4 SB |
185 | } |
186 | ||
187 | /* Copy the argument to general registers or the stack in | |
188 | register-sized pieces. Large arguments are split between | |
189 | registers and stack. */ | |
190 | while (len > 0) | |
191 | { | |
b1e29e33 | 192 | int partial_len = len < DEPRECATED_REGISTER_SIZE ? len : DEPRECATED_REGISTER_SIZE; |
134e61c4 SB |
193 | |
194 | if (argreg <= ARM_LAST_ARG_REGNUM) | |
195 | { | |
196 | /* It's an argument being passed in a general register. */ | |
7c0b4a20 | 197 | regval = extract_unsigned_integer (val, partial_len); |
134e61c4 SB |
198 | write_register (argreg++, regval); |
199 | } | |
200 | else | |
201 | { | |
202 | /* Push the arguments onto the stack. */ | |
b1e29e33 AC |
203 | write_memory ((CORE_ADDR) fp, val, DEPRECATED_REGISTER_SIZE); |
204 | fp += DEPRECATED_REGISTER_SIZE; | |
134e61c4 SB |
205 | } |
206 | ||
207 | len -= partial_len; | |
208 | val += partial_len; | |
209 | } | |
210 | } | |
211 | ||
212 | /* Return adjusted stack pointer. */ | |
213 | return sp; | |
214 | } | |
215 | ||
f38e884d | 216 | /* |
fdf39c9a RE |
217 | Dynamic Linking on ARM GNU/Linux |
218 | -------------------------------- | |
f38e884d SB |
219 | |
220 | Note: PLT = procedure linkage table | |
221 | GOT = global offset table | |
222 | ||
223 | As much as possible, ELF dynamic linking defers the resolution of | |
224 | jump/call addresses until the last minute. The technique used is | |
225 | inspired by the i386 ELF design, and is based on the following | |
226 | constraints. | |
227 | ||
228 | 1) The calling technique should not force a change in the assembly | |
229 | code produced for apps; it MAY cause changes in the way assembly | |
230 | code is produced for position independent code (i.e. shared | |
231 | libraries). | |
232 | ||
233 | 2) The technique must be such that all executable areas must not be | |
234 | modified; and any modified areas must not be executed. | |
235 | ||
236 | To do this, there are three steps involved in a typical jump: | |
237 | ||
238 | 1) in the code | |
239 | 2) through the PLT | |
240 | 3) using a pointer from the GOT | |
241 | ||
242 | When the executable or library is first loaded, each GOT entry is | |
243 | initialized to point to the code which implements dynamic name | |
244 | resolution and code finding. This is normally a function in the | |
fdf39c9a RE |
245 | program interpreter (on ARM GNU/Linux this is usually |
246 | ld-linux.so.2, but it does not have to be). On the first | |
247 | invocation, the function is located and the GOT entry is replaced | |
248 | with the real function address. Subsequent calls go through steps | |
249 | 1, 2 and 3 and end up calling the real code. | |
f38e884d SB |
250 | |
251 | 1) In the code: | |
252 | ||
253 | b function_call | |
254 | bl function_call | |
255 | ||
256 | This is typical ARM code using the 26 bit relative branch or branch | |
257 | and link instructions. The target of the instruction | |
258 | (function_call is usually the address of the function to be called. | |
259 | In position independent code, the target of the instruction is | |
260 | actually an entry in the PLT when calling functions in a shared | |
261 | library. Note that this call is identical to a normal function | |
262 | call, only the target differs. | |
263 | ||
264 | 2) In the PLT: | |
265 | ||
266 | The PLT is a synthetic area, created by the linker. It exists in | |
267 | both executables and libraries. It is an array of stubs, one per | |
268 | imported function call. It looks like this: | |
269 | ||
270 | PLT[0]: | |
271 | str lr, [sp, #-4]! @push the return address (lr) | |
272 | ldr lr, [pc, #16] @load from 6 words ahead | |
273 | add lr, pc, lr @form an address for GOT[0] | |
274 | ldr pc, [lr, #8]! @jump to the contents of that addr | |
275 | ||
276 | The return address (lr) is pushed on the stack and used for | |
277 | calculations. The load on the second line loads the lr with | |
278 | &GOT[3] - . - 20. The addition on the third leaves: | |
279 | ||
280 | lr = (&GOT[3] - . - 20) + (. + 8) | |
281 | lr = (&GOT[3] - 12) | |
282 | lr = &GOT[0] | |
283 | ||
284 | On the fourth line, the pc and lr are both updated, so that: | |
285 | ||
286 | pc = GOT[2] | |
287 | lr = &GOT[0] + 8 | |
288 | = &GOT[2] | |
289 | ||
290 | NOTE: PLT[0] borrows an offset .word from PLT[1]. This is a little | |
291 | "tight", but allows us to keep all the PLT entries the same size. | |
292 | ||
293 | PLT[n+1]: | |
294 | ldr ip, [pc, #4] @load offset from gotoff | |
295 | add ip, pc, ip @add the offset to the pc | |
296 | ldr pc, [ip] @jump to that address | |
297 | gotoff: .word GOT[n+3] - . | |
298 | ||
299 | The load on the first line, gets an offset from the fourth word of | |
300 | the PLT entry. The add on the second line makes ip = &GOT[n+3], | |
301 | which contains either a pointer to PLT[0] (the fixup trampoline) or | |
302 | a pointer to the actual code. | |
303 | ||
304 | 3) In the GOT: | |
305 | ||
306 | The GOT contains helper pointers for both code (PLT) fixups and | |
307 | data fixups. The first 3 entries of the GOT are special. The next | |
308 | M entries (where M is the number of entries in the PLT) belong to | |
309 | the PLT fixups. The next D (all remaining) entries belong to | |
310 | various data fixups. The actual size of the GOT is 3 + M + D. | |
311 | ||
312 | The GOT is also a synthetic area, created by the linker. It exists | |
313 | in both executables and libraries. When the GOT is first | |
314 | initialized , all the GOT entries relating to PLT fixups are | |
315 | pointing to code back at PLT[0]. | |
316 | ||
317 | The special entries in the GOT are: | |
318 | ||
319 | GOT[0] = linked list pointer used by the dynamic loader | |
320 | GOT[1] = pointer to the reloc table for this module | |
321 | GOT[2] = pointer to the fixup/resolver code | |
322 | ||
323 | The first invocation of function call comes through and uses the | |
324 | fixup/resolver code. On the entry to the fixup/resolver code: | |
325 | ||
326 | ip = &GOT[n+3] | |
327 | lr = &GOT[2] | |
328 | stack[0] = return address (lr) of the function call | |
329 | [r0, r1, r2, r3] are still the arguments to the function call | |
330 | ||
331 | This is enough information for the fixup/resolver code to work | |
332 | with. Before the fixup/resolver code returns, it actually calls | |
333 | the requested function and repairs &GOT[n+3]. */ | |
334 | ||
7aa1783e RE |
335 | /* Fetch, and possibly build, an appropriate link_map_offsets structure |
336 | for ARM linux targets using the struct offsets defined in <link.h>. | |
337 | Note, however, that link.h is not actually referred to in this file. | |
338 | Instead, the relevant structs offsets were obtained from examining | |
339 | link.h. (We can't refer to link.h from this file because the host | |
340 | system won't necessarily have it, or if it does, the structs which | |
341 | it defines will refer to the host system, not the target). */ | |
342 | ||
343 | static struct link_map_offsets * | |
344 | arm_linux_svr4_fetch_link_map_offsets (void) | |
345 | { | |
346 | static struct link_map_offsets lmo; | |
347 | static struct link_map_offsets *lmp = 0; | |
348 | ||
349 | if (lmp == 0) | |
350 | { | |
351 | lmp = &lmo; | |
352 | ||
353 | lmo.r_debug_size = 8; /* Actual size is 20, but this is all we | |
354 | need. */ | |
355 | ||
356 | lmo.r_map_offset = 4; | |
357 | lmo.r_map_size = 4; | |
358 | ||
359 | lmo.link_map_size = 20; /* Actual size is 552, but this is all we | |
360 | need. */ | |
361 | ||
362 | lmo.l_addr_offset = 0; | |
363 | lmo.l_addr_size = 4; | |
364 | ||
365 | lmo.l_name_offset = 4; | |
366 | lmo.l_name_size = 4; | |
367 | ||
368 | lmo.l_next_offset = 12; | |
369 | lmo.l_next_size = 4; | |
370 | ||
371 | lmo.l_prev_offset = 16; | |
372 | lmo.l_prev_size = 4; | |
373 | } | |
374 | ||
375 | return lmp; | |
376 | } | |
377 | ||
2a451106 KB |
378 | /* The constants below were determined by examining the following files |
379 | in the linux kernel sources: | |
380 | ||
381 | arch/arm/kernel/signal.c | |
382 | - see SWI_SYS_SIGRETURN and SWI_SYS_RT_SIGRETURN | |
383 | include/asm-arm/unistd.h | |
384 | - see __NR_sigreturn, __NR_rt_sigreturn, and __NR_SYSCALL_BASE */ | |
385 | ||
386 | #define ARM_LINUX_SIGRETURN_INSTR 0xef900077 | |
387 | #define ARM_LINUX_RT_SIGRETURN_INSTR 0xef9000ad | |
388 | ||
389 | /* arm_linux_in_sigtramp determines if PC points at one of the | |
390 | instructions which cause control to return to the Linux kernel upon | |
391 | return from a signal handler. FUNC_NAME is unused. */ | |
392 | ||
393 | int | |
394 | arm_linux_in_sigtramp (CORE_ADDR pc, char *func_name) | |
395 | { | |
396 | unsigned long inst; | |
397 | ||
398 | inst = read_memory_integer (pc, 4); | |
399 | ||
400 | return (inst == ARM_LINUX_SIGRETURN_INSTR | |
401 | || inst == ARM_LINUX_RT_SIGRETURN_INSTR); | |
402 | ||
403 | } | |
404 | ||
405 | /* arm_linux_sigcontext_register_address returns the address in the | |
406 | sigcontext of register REGNO given a stack pointer value SP and | |
407 | program counter value PC. The value 0 is returned if PC is not | |
408 | pointing at one of the signal return instructions or if REGNO is | |
409 | not saved in the sigcontext struct. */ | |
410 | ||
411 | CORE_ADDR | |
412 | arm_linux_sigcontext_register_address (CORE_ADDR sp, CORE_ADDR pc, int regno) | |
413 | { | |
414 | unsigned long inst; | |
415 | CORE_ADDR reg_addr = 0; | |
416 | ||
417 | inst = read_memory_integer (pc, 4); | |
418 | ||
fdf39c9a RE |
419 | if (inst == ARM_LINUX_SIGRETURN_INSTR |
420 | || inst == ARM_LINUX_RT_SIGRETURN_INSTR) | |
2a451106 KB |
421 | { |
422 | CORE_ADDR sigcontext_addr; | |
423 | ||
424 | /* The sigcontext structure is at different places for the two | |
425 | signal return instructions. For ARM_LINUX_SIGRETURN_INSTR, | |
426 | it starts at the SP value. For ARM_LINUX_RT_SIGRETURN_INSTR, | |
427 | it is at SP+8. For the latter instruction, it may also be | |
428 | the case that the address of this structure may be determined | |
429 | by reading the 4 bytes at SP, but I'm not convinced this is | |
430 | reliable. | |
431 | ||
432 | In any event, these magic constants (0 and 8) may be | |
433 | determined by examining struct sigframe and struct | |
434 | rt_sigframe in arch/arm/kernel/signal.c in the Linux kernel | |
435 | sources. */ | |
436 | ||
437 | if (inst == ARM_LINUX_RT_SIGRETURN_INSTR) | |
438 | sigcontext_addr = sp + 8; | |
439 | else /* inst == ARM_LINUX_SIGRETURN_INSTR */ | |
440 | sigcontext_addr = sp + 0; | |
441 | ||
442 | /* The layout of the sigcontext structure for ARM GNU/Linux is | |
443 | in include/asm-arm/sigcontext.h in the Linux kernel sources. | |
444 | ||
445 | There are three 4-byte fields which precede the saved r0 | |
446 | field. (This accounts for the 12 in the code below.) The | |
447 | sixteen registers (4 bytes per field) follow in order. The | |
448 | PSR value follows the sixteen registers which accounts for | |
449 | the constant 19 below. */ | |
450 | ||
34e8f22d | 451 | if (0 <= regno && regno <= ARM_PC_REGNUM) |
2a451106 | 452 | reg_addr = sigcontext_addr + 12 + (4 * regno); |
34e8f22d | 453 | else if (regno == ARM_PS_REGNUM) |
2a451106 KB |
454 | reg_addr = sigcontext_addr + 19 * 4; |
455 | } | |
456 | ||
457 | return reg_addr; | |
458 | } | |
459 | ||
97e03143 RE |
460 | static void |
461 | arm_linux_init_abi (struct gdbarch_info info, | |
462 | struct gdbarch *gdbarch) | |
463 | { | |
464 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
465 | ||
466 | tdep->lowest_pc = 0x8000; | |
2ef47cd0 DJ |
467 | if (info.byte_order == BFD_ENDIAN_BIG) |
468 | tdep->arm_breakpoint = arm_linux_arm_be_breakpoint; | |
469 | else | |
470 | tdep->arm_breakpoint = arm_linux_arm_le_breakpoint; | |
66e810cd | 471 | tdep->arm_breakpoint_size = sizeof (arm_linux_arm_le_breakpoint); |
9df628e0 | 472 | |
fd50bc42 RE |
473 | tdep->fp_model = ARM_FLOAT_FPA; |
474 | ||
a6cdd8c5 RE |
475 | tdep->jb_pc = ARM_LINUX_JB_PC; |
476 | tdep->jb_elt_size = ARM_LINUX_JB_ELEMENT_SIZE; | |
19d3fc80 | 477 | |
7aa1783e RE |
478 | set_solib_svr4_fetch_link_map_offsets |
479 | (gdbarch, arm_linux_svr4_fetch_link_map_offsets); | |
480 | ||
19d3fc80 | 481 | /* The following two overrides shouldn't be needed. */ |
26e9b323 | 482 | set_gdbarch_deprecated_extract_return_value (gdbarch, arm_linux_extract_return_value); |
b81774d8 | 483 | set_gdbarch_deprecated_push_arguments (gdbarch, arm_linux_push_arguments); |
0e18d038 RE |
484 | |
485 | /* Shared library handling. */ | |
0e18d038 | 486 | set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target); |
bb41a796 | 487 | set_gdbarch_skip_solib_resolver (gdbarch, glibc_skip_solib_resolver); |
97e03143 RE |
488 | } |
489 | ||
faf5f7ad SB |
490 | void |
491 | _initialize_arm_linux_tdep (void) | |
492 | { | |
05816f70 MK |
493 | gdbarch_register_osabi (bfd_arch_arm, 0, GDB_OSABI_LINUX, |
494 | arm_linux_init_abi); | |
faf5f7ad | 495 | } |