Commit | Line | Data |
---|---|---|
faf5f7ad | 1 | /* GNU/Linux on ARM target support. |
0fd88904 | 2 | |
0fb0cc75 | 3 | Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, |
7b6bb8da | 4 | 2009, 2010, 2011 Free Software Foundation, Inc. |
faf5f7ad SB |
5 | |
6 | This file is part of GDB. | |
7 | ||
8 | This program is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 10 | the Free Software Foundation; either version 3 of the License, or |
faf5f7ad SB |
11 | (at your option) any later version. |
12 | ||
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
a9762ec7 | 19 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
faf5f7ad SB |
20 | |
21 | #include "defs.h" | |
c20f6dea SB |
22 | #include "target.h" |
23 | #include "value.h" | |
faf5f7ad | 24 | #include "gdbtypes.h" |
134e61c4 | 25 | #include "floatformat.h" |
2a451106 KB |
26 | #include "gdbcore.h" |
27 | #include "frame.h" | |
4e052eda | 28 | #include "regcache.h" |
d16aafd8 | 29 | #include "doublest.h" |
7aa1783e | 30 | #include "solib-svr4.h" |
4be87837 | 31 | #include "osabi.h" |
cb587d83 | 32 | #include "regset.h" |
8e9d1a24 DJ |
33 | #include "trad-frame.h" |
34 | #include "tramp-frame.h" | |
daddc3c1 | 35 | #include "breakpoint.h" |
ef7e8358 | 36 | #include "auxv.h" |
faf5f7ad | 37 | |
34e8f22d | 38 | #include "arm-tdep.h" |
cb587d83 | 39 | #include "arm-linux-tdep.h" |
4aa995e1 | 40 | #include "linux-tdep.h" |
0670c0aa | 41 | #include "glibc-tdep.h" |
cca44b1b JB |
42 | #include "arch-utils.h" |
43 | #include "inferior.h" | |
44 | #include "gdbthread.h" | |
45 | #include "symfile.h" | |
a52e6aac | 46 | |
8e9d1a24 DJ |
47 | #include "gdb_string.h" |
48 | ||
ef7e8358 UW |
49 | /* This is defined in <elf.h> on ARM GNU/Linux systems. */ |
50 | #define AT_HWCAP 16 | |
51 | ||
cb587d83 DJ |
52 | extern int arm_apcs_32; |
53 | ||
fdf39c9a RE |
54 | /* Under ARM GNU/Linux the traditional way of performing a breakpoint |
55 | is to execute a particular software interrupt, rather than use a | |
56 | particular undefined instruction to provoke a trap. Upon exection | |
57 | of the software interrupt the kernel stops the inferior with a | |
498b1f87 | 58 | SIGTRAP, and wakes the debugger. */ |
66e810cd | 59 | |
2ef47cd0 DJ |
60 | static const char arm_linux_arm_le_breakpoint[] = { 0x01, 0x00, 0x9f, 0xef }; |
61 | ||
62 | static const char arm_linux_arm_be_breakpoint[] = { 0xef, 0x9f, 0x00, 0x01 }; | |
66e810cd | 63 | |
c75a2cc8 DJ |
64 | /* However, the EABI syscall interface (new in Nov. 2005) does not look at |
65 | the operand of the swi if old-ABI compatibility is disabled. Therefore, | |
66 | use an undefined instruction instead. This is supported as of kernel | |
67 | version 2.5.70 (May 2003), so should be a safe assumption for EABI | |
68 | binaries. */ | |
69 | ||
70 | static const char eabi_linux_arm_le_breakpoint[] = { 0xf0, 0x01, 0xf0, 0xe7 }; | |
71 | ||
72 | static const char eabi_linux_arm_be_breakpoint[] = { 0xe7, 0xf0, 0x01, 0xf0 }; | |
73 | ||
74 | /* All the kernels which support Thumb support using a specific undefined | |
75 | instruction for the Thumb breakpoint. */ | |
76 | ||
498b1f87 DJ |
77 | static const char arm_linux_thumb_be_breakpoint[] = {0xde, 0x01}; |
78 | ||
79 | static const char arm_linux_thumb_le_breakpoint[] = {0x01, 0xde}; | |
80 | ||
177321bd DJ |
81 | /* Because the 16-bit Thumb breakpoint is affected by Thumb-2 IT blocks, |
82 | we must use a length-appropriate breakpoint for 32-bit Thumb | |
83 | instructions. See also thumb_get_next_pc. */ | |
84 | ||
85 | static const char arm_linux_thumb2_be_breakpoint[] = { 0xf7, 0xf0, 0xa0, 0x00 }; | |
86 | ||
87 | static const char arm_linux_thumb2_le_breakpoint[] = { 0xf0, 0xf7, 0x00, 0xa0 }; | |
88 | ||
f8624c62 MGD |
89 | /* Description of the longjmp buffer. The buffer is treated as an array of |
90 | elements of size ARM_LINUX_JB_ELEMENT_SIZE. | |
91 | ||
92 | The location of saved registers in this buffer (in particular the PC | |
93 | to use after longjmp is called) varies depending on the ABI (in | |
94 | particular the FP model) and also (possibly) the C Library. | |
95 | ||
96 | For glibc, eglibc, and uclibc the following holds: If the FP model is | |
97 | SoftVFP or VFP (which implies EABI) then the PC is at offset 9 in the | |
98 | buffer. This is also true for the SoftFPA model. However, for the FPA | |
99 | model the PC is at offset 21 in the buffer. */ | |
7a5ea0d4 | 100 | #define ARM_LINUX_JB_ELEMENT_SIZE INT_REGISTER_SIZE |
f8624c62 MGD |
101 | #define ARM_LINUX_JB_PC_FPA 21 |
102 | #define ARM_LINUX_JB_PC_EABI 9 | |
faf5f7ad | 103 | |
f38e884d | 104 | /* |
fdf39c9a RE |
105 | Dynamic Linking on ARM GNU/Linux |
106 | -------------------------------- | |
f38e884d SB |
107 | |
108 | Note: PLT = procedure linkage table | |
109 | GOT = global offset table | |
110 | ||
111 | As much as possible, ELF dynamic linking defers the resolution of | |
0963b4bd | 112 | jump/call addresses until the last minute. The technique used is |
f38e884d SB |
113 | inspired by the i386 ELF design, and is based on the following |
114 | constraints. | |
115 | ||
116 | 1) The calling technique should not force a change in the assembly | |
117 | code produced for apps; it MAY cause changes in the way assembly | |
118 | code is produced for position independent code (i.e. shared | |
119 | libraries). | |
120 | ||
121 | 2) The technique must be such that all executable areas must not be | |
122 | modified; and any modified areas must not be executed. | |
123 | ||
124 | To do this, there are three steps involved in a typical jump: | |
125 | ||
126 | 1) in the code | |
127 | 2) through the PLT | |
128 | 3) using a pointer from the GOT | |
129 | ||
130 | When the executable or library is first loaded, each GOT entry is | |
131 | initialized to point to the code which implements dynamic name | |
132 | resolution and code finding. This is normally a function in the | |
fdf39c9a RE |
133 | program interpreter (on ARM GNU/Linux this is usually |
134 | ld-linux.so.2, but it does not have to be). On the first | |
135 | invocation, the function is located and the GOT entry is replaced | |
136 | with the real function address. Subsequent calls go through steps | |
137 | 1, 2 and 3 and end up calling the real code. | |
f38e884d SB |
138 | |
139 | 1) In the code: | |
140 | ||
141 | b function_call | |
142 | bl function_call | |
143 | ||
144 | This is typical ARM code using the 26 bit relative branch or branch | |
145 | and link instructions. The target of the instruction | |
146 | (function_call is usually the address of the function to be called. | |
147 | In position independent code, the target of the instruction is | |
148 | actually an entry in the PLT when calling functions in a shared | |
149 | library. Note that this call is identical to a normal function | |
150 | call, only the target differs. | |
151 | ||
152 | 2) In the PLT: | |
153 | ||
0963b4bd MS |
154 | The PLT is a synthetic area, created by the linker. It exists in |
155 | both executables and libraries. It is an array of stubs, one per | |
156 | imported function call. It looks like this: | |
f38e884d SB |
157 | |
158 | PLT[0]: | |
159 | str lr, [sp, #-4]! @push the return address (lr) | |
160 | ldr lr, [pc, #16] @load from 6 words ahead | |
161 | add lr, pc, lr @form an address for GOT[0] | |
162 | ldr pc, [lr, #8]! @jump to the contents of that addr | |
163 | ||
164 | The return address (lr) is pushed on the stack and used for | |
165 | calculations. The load on the second line loads the lr with | |
166 | &GOT[3] - . - 20. The addition on the third leaves: | |
167 | ||
168 | lr = (&GOT[3] - . - 20) + (. + 8) | |
169 | lr = (&GOT[3] - 12) | |
170 | lr = &GOT[0] | |
171 | ||
172 | On the fourth line, the pc and lr are both updated, so that: | |
173 | ||
174 | pc = GOT[2] | |
175 | lr = &GOT[0] + 8 | |
176 | = &GOT[2] | |
177 | ||
0963b4bd | 178 | NOTE: PLT[0] borrows an offset .word from PLT[1]. This is a little |
f38e884d SB |
179 | "tight", but allows us to keep all the PLT entries the same size. |
180 | ||
181 | PLT[n+1]: | |
182 | ldr ip, [pc, #4] @load offset from gotoff | |
183 | add ip, pc, ip @add the offset to the pc | |
184 | ldr pc, [ip] @jump to that address | |
185 | gotoff: .word GOT[n+3] - . | |
186 | ||
187 | The load on the first line, gets an offset from the fourth word of | |
188 | the PLT entry. The add on the second line makes ip = &GOT[n+3], | |
189 | which contains either a pointer to PLT[0] (the fixup trampoline) or | |
190 | a pointer to the actual code. | |
191 | ||
192 | 3) In the GOT: | |
193 | ||
194 | The GOT contains helper pointers for both code (PLT) fixups and | |
0963b4bd | 195 | data fixups. The first 3 entries of the GOT are special. The next |
f38e884d | 196 | M entries (where M is the number of entries in the PLT) belong to |
0963b4bd MS |
197 | the PLT fixups. The next D (all remaining) entries belong to |
198 | various data fixups. The actual size of the GOT is 3 + M + D. | |
f38e884d | 199 | |
0963b4bd | 200 | The GOT is also a synthetic area, created by the linker. It exists |
f38e884d SB |
201 | in both executables and libraries. When the GOT is first |
202 | initialized , all the GOT entries relating to PLT fixups are | |
203 | pointing to code back at PLT[0]. | |
204 | ||
205 | The special entries in the GOT are: | |
206 | ||
207 | GOT[0] = linked list pointer used by the dynamic loader | |
208 | GOT[1] = pointer to the reloc table for this module | |
209 | GOT[2] = pointer to the fixup/resolver code | |
210 | ||
211 | The first invocation of function call comes through and uses the | |
212 | fixup/resolver code. On the entry to the fixup/resolver code: | |
213 | ||
214 | ip = &GOT[n+3] | |
215 | lr = &GOT[2] | |
216 | stack[0] = return address (lr) of the function call | |
217 | [r0, r1, r2, r3] are still the arguments to the function call | |
218 | ||
219 | This is enough information for the fixup/resolver code to work | |
220 | with. Before the fixup/resolver code returns, it actually calls | |
221 | the requested function and repairs &GOT[n+3]. */ | |
222 | ||
2a451106 KB |
223 | /* The constants below were determined by examining the following files |
224 | in the linux kernel sources: | |
225 | ||
226 | arch/arm/kernel/signal.c | |
227 | - see SWI_SYS_SIGRETURN and SWI_SYS_RT_SIGRETURN | |
228 | include/asm-arm/unistd.h | |
229 | - see __NR_sigreturn, __NR_rt_sigreturn, and __NR_SYSCALL_BASE */ | |
230 | ||
231 | #define ARM_LINUX_SIGRETURN_INSTR 0xef900077 | |
232 | #define ARM_LINUX_RT_SIGRETURN_INSTR 0xef9000ad | |
233 | ||
edfb1a26 DJ |
234 | /* For ARM EABI, the syscall number is not in the SWI instruction |
235 | (instead it is loaded into r7). We recognize the pattern that | |
236 | glibc uses... alternatively, we could arrange to do this by | |
237 | function name, but they are not always exported. */ | |
8e9d1a24 DJ |
238 | #define ARM_SET_R7_SIGRETURN 0xe3a07077 |
239 | #define ARM_SET_R7_RT_SIGRETURN 0xe3a070ad | |
240 | #define ARM_EABI_SYSCALL 0xef000000 | |
2a451106 | 241 | |
f1973203 MR |
242 | /* OABI syscall restart trampoline, used for EABI executables too |
243 | whenever OABI support has been enabled in the kernel. */ | |
244 | #define ARM_OABI_SYSCALL_RESTART_SYSCALL 0xef900000 | |
245 | #define ARM_LDR_PC_SP_12 0xe49df00c | |
478fd957 | 246 | #define ARM_LDR_PC_SP_4 0xe49df004 |
f1973203 | 247 | |
8e9d1a24 | 248 | static void |
a262aec2 | 249 | arm_linux_sigtramp_cache (struct frame_info *this_frame, |
8e9d1a24 DJ |
250 | struct trad_frame_cache *this_cache, |
251 | CORE_ADDR func, int regs_offset) | |
2a451106 | 252 | { |
a262aec2 | 253 | CORE_ADDR sp = get_frame_register_unsigned (this_frame, ARM_SP_REGNUM); |
8e9d1a24 DJ |
254 | CORE_ADDR base = sp + regs_offset; |
255 | int i; | |
2a451106 | 256 | |
8e9d1a24 DJ |
257 | for (i = 0; i < 16; i++) |
258 | trad_frame_set_reg_addr (this_cache, i, base + i * 4); | |
2a451106 | 259 | |
8e9d1a24 | 260 | trad_frame_set_reg_addr (this_cache, ARM_PS_REGNUM, base + 16 * 4); |
2a451106 | 261 | |
8e9d1a24 DJ |
262 | /* The VFP or iWMMXt registers may be saved on the stack, but there's |
263 | no reliable way to restore them (yet). */ | |
2a451106 | 264 | |
8e9d1a24 DJ |
265 | /* Save a frame ID. */ |
266 | trad_frame_set_id (this_cache, frame_id_build (sp, func)); | |
267 | } | |
2a451106 | 268 | |
edfb1a26 DJ |
269 | /* There are a couple of different possible stack layouts that |
270 | we need to support. | |
271 | ||
272 | Before version 2.6.18, the kernel used completely independent | |
273 | layouts for non-RT and RT signals. For non-RT signals the stack | |
274 | began directly with a struct sigcontext. For RT signals the stack | |
275 | began with two redundant pointers (to the siginfo and ucontext), | |
276 | and then the siginfo and ucontext. | |
277 | ||
278 | As of version 2.6.18, the non-RT signal frame layout starts with | |
279 | a ucontext and the RT signal frame starts with a siginfo and then | |
280 | a ucontext. Also, the ucontext now has a designated save area | |
281 | for coprocessor registers. | |
282 | ||
283 | For RT signals, it's easy to tell the difference: we look for | |
284 | pinfo, the pointer to the siginfo. If it has the expected | |
285 | value, we have an old layout. If it doesn't, we have the new | |
286 | layout. | |
287 | ||
288 | For non-RT signals, it's a bit harder. We need something in one | |
289 | layout or the other with a recognizable offset and value. We can't | |
290 | use the return trampoline, because ARM usually uses SA_RESTORER, | |
291 | in which case the stack return trampoline is not filled in. | |
292 | We can't use the saved stack pointer, because sigaltstack might | |
293 | be in use. So for now we guess the new layout... */ | |
294 | ||
295 | /* There are three words (trap_no, error_code, oldmask) in | |
296 | struct sigcontext before r0. */ | |
297 | #define ARM_SIGCONTEXT_R0 0xc | |
298 | ||
299 | /* There are five words (uc_flags, uc_link, and three for uc_stack) | |
300 | in the ucontext_t before the sigcontext. */ | |
301 | #define ARM_UCONTEXT_SIGCONTEXT 0x14 | |
302 | ||
303 | /* There are three elements in an rt_sigframe before the ucontext: | |
304 | pinfo, puc, and info. The first two are pointers and the third | |
305 | is a struct siginfo, with size 128 bytes. We could follow puc | |
306 | to the ucontext, but it's simpler to skip the whole thing. */ | |
307 | #define ARM_OLD_RT_SIGFRAME_SIGINFO 0x8 | |
308 | #define ARM_OLD_RT_SIGFRAME_UCONTEXT 0x88 | |
309 | ||
310 | #define ARM_NEW_RT_SIGFRAME_UCONTEXT 0x80 | |
311 | ||
312 | #define ARM_NEW_SIGFRAME_MAGIC 0x5ac3c35a | |
313 | ||
8e9d1a24 DJ |
314 | static void |
315 | arm_linux_sigreturn_init (const struct tramp_frame *self, | |
a262aec2 | 316 | struct frame_info *this_frame, |
8e9d1a24 DJ |
317 | struct trad_frame_cache *this_cache, |
318 | CORE_ADDR func) | |
2a451106 | 319 | { |
e17a4113 UW |
320 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
321 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
a262aec2 | 322 | CORE_ADDR sp = get_frame_register_unsigned (this_frame, ARM_SP_REGNUM); |
e17a4113 | 323 | ULONGEST uc_flags = read_memory_unsigned_integer (sp, 4, byte_order); |
edfb1a26 DJ |
324 | |
325 | if (uc_flags == ARM_NEW_SIGFRAME_MAGIC) | |
a262aec2 | 326 | arm_linux_sigtramp_cache (this_frame, this_cache, func, |
edfb1a26 DJ |
327 | ARM_UCONTEXT_SIGCONTEXT |
328 | + ARM_SIGCONTEXT_R0); | |
329 | else | |
a262aec2 | 330 | arm_linux_sigtramp_cache (this_frame, this_cache, func, |
edfb1a26 | 331 | ARM_SIGCONTEXT_R0); |
8e9d1a24 | 332 | } |
2a451106 | 333 | |
8e9d1a24 DJ |
334 | static void |
335 | arm_linux_rt_sigreturn_init (const struct tramp_frame *self, | |
a262aec2 | 336 | struct frame_info *this_frame, |
8e9d1a24 DJ |
337 | struct trad_frame_cache *this_cache, |
338 | CORE_ADDR func) | |
339 | { | |
e17a4113 UW |
340 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
341 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
a262aec2 | 342 | CORE_ADDR sp = get_frame_register_unsigned (this_frame, ARM_SP_REGNUM); |
e17a4113 | 343 | ULONGEST pinfo = read_memory_unsigned_integer (sp, 4, byte_order); |
edfb1a26 DJ |
344 | |
345 | if (pinfo == sp + ARM_OLD_RT_SIGFRAME_SIGINFO) | |
a262aec2 | 346 | arm_linux_sigtramp_cache (this_frame, this_cache, func, |
edfb1a26 DJ |
347 | ARM_OLD_RT_SIGFRAME_UCONTEXT |
348 | + ARM_UCONTEXT_SIGCONTEXT | |
349 | + ARM_SIGCONTEXT_R0); | |
350 | else | |
a262aec2 | 351 | arm_linux_sigtramp_cache (this_frame, this_cache, func, |
edfb1a26 DJ |
352 | ARM_NEW_RT_SIGFRAME_UCONTEXT |
353 | + ARM_UCONTEXT_SIGCONTEXT | |
354 | + ARM_SIGCONTEXT_R0); | |
2a451106 KB |
355 | } |
356 | ||
f1973203 MR |
357 | static void |
358 | arm_linux_restart_syscall_init (const struct tramp_frame *self, | |
359 | struct frame_info *this_frame, | |
360 | struct trad_frame_cache *this_cache, | |
361 | CORE_ADDR func) | |
362 | { | |
478fd957 | 363 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
f1973203 | 364 | CORE_ADDR sp = get_frame_register_unsigned (this_frame, ARM_SP_REGNUM); |
478fd957 UW |
365 | CORE_ADDR pc = get_frame_memory_unsigned (this_frame, sp, 4); |
366 | CORE_ADDR cpsr = get_frame_register_unsigned (this_frame, ARM_PS_REGNUM); | |
367 | ULONGEST t_bit = arm_psr_thumb_bit (gdbarch); | |
368 | int sp_offset; | |
369 | ||
370 | /* There are two variants of this trampoline; with older kernels, the | |
371 | stub is placed on the stack, while newer kernels use the stub from | |
372 | the vector page. They are identical except that the older version | |
373 | increments SP by 12 (to skip stored PC and the stub itself), while | |
374 | the newer version increments SP only by 4 (just the stored PC). */ | |
375 | if (self->insn[1].bytes == ARM_LDR_PC_SP_4) | |
376 | sp_offset = 4; | |
377 | else | |
378 | sp_offset = 12; | |
379 | ||
380 | /* Update Thumb bit in CPSR. */ | |
381 | if (pc & 1) | |
382 | cpsr |= t_bit; | |
383 | else | |
384 | cpsr &= ~t_bit; | |
f1973203 | 385 | |
478fd957 UW |
386 | /* Remove Thumb bit from PC. */ |
387 | pc = gdbarch_addr_bits_remove (gdbarch, pc); | |
388 | ||
389 | /* Save previous register values. */ | |
390 | trad_frame_set_reg_value (this_cache, ARM_SP_REGNUM, sp + sp_offset); | |
391 | trad_frame_set_reg_value (this_cache, ARM_PC_REGNUM, pc); | |
392 | trad_frame_set_reg_value (this_cache, ARM_PS_REGNUM, cpsr); | |
f1973203 MR |
393 | |
394 | /* Save a frame ID. */ | |
395 | trad_frame_set_id (this_cache, frame_id_build (sp, func)); | |
396 | } | |
397 | ||
8e9d1a24 DJ |
398 | static struct tramp_frame arm_linux_sigreturn_tramp_frame = { |
399 | SIGTRAMP_FRAME, | |
400 | 4, | |
401 | { | |
402 | { ARM_LINUX_SIGRETURN_INSTR, -1 }, | |
403 | { TRAMP_SENTINEL_INSN } | |
404 | }, | |
405 | arm_linux_sigreturn_init | |
406 | }; | |
407 | ||
408 | static struct tramp_frame arm_linux_rt_sigreturn_tramp_frame = { | |
409 | SIGTRAMP_FRAME, | |
410 | 4, | |
411 | { | |
412 | { ARM_LINUX_RT_SIGRETURN_INSTR, -1 }, | |
413 | { TRAMP_SENTINEL_INSN } | |
414 | }, | |
415 | arm_linux_rt_sigreturn_init | |
416 | }; | |
417 | ||
418 | static struct tramp_frame arm_eabi_linux_sigreturn_tramp_frame = { | |
419 | SIGTRAMP_FRAME, | |
420 | 4, | |
421 | { | |
422 | { ARM_SET_R7_SIGRETURN, -1 }, | |
423 | { ARM_EABI_SYSCALL, -1 }, | |
424 | { TRAMP_SENTINEL_INSN } | |
425 | }, | |
426 | arm_linux_sigreturn_init | |
427 | }; | |
428 | ||
429 | static struct tramp_frame arm_eabi_linux_rt_sigreturn_tramp_frame = { | |
430 | SIGTRAMP_FRAME, | |
431 | 4, | |
432 | { | |
433 | { ARM_SET_R7_RT_SIGRETURN, -1 }, | |
434 | { ARM_EABI_SYSCALL, -1 }, | |
435 | { TRAMP_SENTINEL_INSN } | |
436 | }, | |
437 | arm_linux_rt_sigreturn_init | |
438 | }; | |
439 | ||
f1973203 MR |
440 | static struct tramp_frame arm_linux_restart_syscall_tramp_frame = { |
441 | NORMAL_FRAME, | |
442 | 4, | |
443 | { | |
444 | { ARM_OABI_SYSCALL_RESTART_SYSCALL, -1 }, | |
445 | { ARM_LDR_PC_SP_12, -1 }, | |
446 | { TRAMP_SENTINEL_INSN } | |
447 | }, | |
448 | arm_linux_restart_syscall_init | |
449 | }; | |
450 | ||
478fd957 UW |
451 | static struct tramp_frame arm_kernel_linux_restart_syscall_tramp_frame = { |
452 | NORMAL_FRAME, | |
453 | 4, | |
454 | { | |
455 | { ARM_OABI_SYSCALL_RESTART_SYSCALL, -1 }, | |
456 | { ARM_LDR_PC_SP_4, -1 }, | |
457 | { TRAMP_SENTINEL_INSN } | |
458 | }, | |
459 | arm_linux_restart_syscall_init | |
460 | }; | |
461 | ||
cb587d83 DJ |
462 | /* Core file and register set support. */ |
463 | ||
464 | #define ARM_LINUX_SIZEOF_GREGSET (18 * INT_REGISTER_SIZE) | |
465 | ||
466 | void | |
467 | arm_linux_supply_gregset (const struct regset *regset, | |
468 | struct regcache *regcache, | |
469 | int regnum, const void *gregs_buf, size_t len) | |
470 | { | |
e17a4113 UW |
471 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
472 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
cb587d83 DJ |
473 | const gdb_byte *gregs = gregs_buf; |
474 | int regno; | |
475 | CORE_ADDR reg_pc; | |
476 | gdb_byte pc_buf[INT_REGISTER_SIZE]; | |
477 | ||
478 | for (regno = ARM_A1_REGNUM; regno < ARM_PC_REGNUM; regno++) | |
479 | if (regnum == -1 || regnum == regno) | |
480 | regcache_raw_supply (regcache, regno, | |
481 | gregs + INT_REGISTER_SIZE * regno); | |
482 | ||
483 | if (regnum == ARM_PS_REGNUM || regnum == -1) | |
484 | { | |
485 | if (arm_apcs_32) | |
486 | regcache_raw_supply (regcache, ARM_PS_REGNUM, | |
17c12639 | 487 | gregs + INT_REGISTER_SIZE * ARM_CPSR_GREGNUM); |
cb587d83 DJ |
488 | else |
489 | regcache_raw_supply (regcache, ARM_PS_REGNUM, | |
490 | gregs + INT_REGISTER_SIZE * ARM_PC_REGNUM); | |
491 | } | |
492 | ||
493 | if (regnum == ARM_PC_REGNUM || regnum == -1) | |
494 | { | |
495 | reg_pc = extract_unsigned_integer (gregs | |
496 | + INT_REGISTER_SIZE * ARM_PC_REGNUM, | |
e17a4113 UW |
497 | INT_REGISTER_SIZE, byte_order); |
498 | reg_pc = gdbarch_addr_bits_remove (gdbarch, reg_pc); | |
499 | store_unsigned_integer (pc_buf, INT_REGISTER_SIZE, byte_order, reg_pc); | |
cb587d83 DJ |
500 | regcache_raw_supply (regcache, ARM_PC_REGNUM, pc_buf); |
501 | } | |
502 | } | |
503 | ||
504 | void | |
505 | arm_linux_collect_gregset (const struct regset *regset, | |
506 | const struct regcache *regcache, | |
507 | int regnum, void *gregs_buf, size_t len) | |
508 | { | |
509 | gdb_byte *gregs = gregs_buf; | |
510 | int regno; | |
511 | ||
512 | for (regno = ARM_A1_REGNUM; regno < ARM_PC_REGNUM; regno++) | |
513 | if (regnum == -1 || regnum == regno) | |
514 | regcache_raw_collect (regcache, regno, | |
515 | gregs + INT_REGISTER_SIZE * regno); | |
516 | ||
517 | if (regnum == ARM_PS_REGNUM || regnum == -1) | |
518 | { | |
519 | if (arm_apcs_32) | |
520 | regcache_raw_collect (regcache, ARM_PS_REGNUM, | |
17c12639 | 521 | gregs + INT_REGISTER_SIZE * ARM_CPSR_GREGNUM); |
cb587d83 DJ |
522 | else |
523 | regcache_raw_collect (regcache, ARM_PS_REGNUM, | |
524 | gregs + INT_REGISTER_SIZE * ARM_PC_REGNUM); | |
525 | } | |
526 | ||
527 | if (regnum == ARM_PC_REGNUM || regnum == -1) | |
528 | regcache_raw_collect (regcache, ARM_PC_REGNUM, | |
529 | gregs + INT_REGISTER_SIZE * ARM_PC_REGNUM); | |
530 | } | |
531 | ||
532 | /* Support for register format used by the NWFPE FPA emulator. */ | |
533 | ||
534 | #define typeNone 0x00 | |
535 | #define typeSingle 0x01 | |
536 | #define typeDouble 0x02 | |
537 | #define typeExtended 0x03 | |
538 | ||
539 | void | |
540 | supply_nwfpe_register (struct regcache *regcache, int regno, | |
541 | const gdb_byte *regs) | |
542 | { | |
543 | const gdb_byte *reg_data; | |
544 | gdb_byte reg_tag; | |
545 | gdb_byte buf[FP_REGISTER_SIZE]; | |
546 | ||
547 | reg_data = regs + (regno - ARM_F0_REGNUM) * FP_REGISTER_SIZE; | |
548 | reg_tag = regs[(regno - ARM_F0_REGNUM) + NWFPE_TAGS_OFFSET]; | |
549 | memset (buf, 0, FP_REGISTER_SIZE); | |
550 | ||
551 | switch (reg_tag) | |
552 | { | |
553 | case typeSingle: | |
554 | memcpy (buf, reg_data, 4); | |
555 | break; | |
556 | case typeDouble: | |
557 | memcpy (buf, reg_data + 4, 4); | |
558 | memcpy (buf + 4, reg_data, 4); | |
559 | break; | |
560 | case typeExtended: | |
561 | /* We want sign and exponent, then least significant bits, | |
562 | then most significant. NWFPE does sign, most, least. */ | |
563 | memcpy (buf, reg_data, 4); | |
564 | memcpy (buf + 4, reg_data + 8, 4); | |
565 | memcpy (buf + 8, reg_data + 4, 4); | |
566 | break; | |
567 | default: | |
568 | break; | |
569 | } | |
570 | ||
571 | regcache_raw_supply (regcache, regno, buf); | |
572 | } | |
573 | ||
574 | void | |
575 | collect_nwfpe_register (const struct regcache *regcache, int regno, | |
576 | gdb_byte *regs) | |
577 | { | |
578 | gdb_byte *reg_data; | |
579 | gdb_byte reg_tag; | |
580 | gdb_byte buf[FP_REGISTER_SIZE]; | |
581 | ||
582 | regcache_raw_collect (regcache, regno, buf); | |
583 | ||
584 | /* NOTE drow/2006-06-07: This code uses the tag already in the | |
585 | register buffer. I've preserved that when moving the code | |
586 | from the native file to the target file. But this doesn't | |
587 | always make sense. */ | |
588 | ||
589 | reg_data = regs + (regno - ARM_F0_REGNUM) * FP_REGISTER_SIZE; | |
590 | reg_tag = regs[(regno - ARM_F0_REGNUM) + NWFPE_TAGS_OFFSET]; | |
591 | ||
592 | switch (reg_tag) | |
593 | { | |
594 | case typeSingle: | |
595 | memcpy (reg_data, buf, 4); | |
596 | break; | |
597 | case typeDouble: | |
598 | memcpy (reg_data, buf + 4, 4); | |
599 | memcpy (reg_data + 4, buf, 4); | |
600 | break; | |
601 | case typeExtended: | |
602 | memcpy (reg_data, buf, 4); | |
603 | memcpy (reg_data + 4, buf + 8, 4); | |
604 | memcpy (reg_data + 8, buf + 4, 4); | |
605 | break; | |
606 | default: | |
607 | break; | |
608 | } | |
609 | } | |
610 | ||
611 | void | |
612 | arm_linux_supply_nwfpe (const struct regset *regset, | |
613 | struct regcache *regcache, | |
614 | int regnum, const void *regs_buf, size_t len) | |
615 | { | |
616 | const gdb_byte *regs = regs_buf; | |
617 | int regno; | |
618 | ||
619 | if (regnum == ARM_FPS_REGNUM || regnum == -1) | |
620 | regcache_raw_supply (regcache, ARM_FPS_REGNUM, | |
621 | regs + NWFPE_FPSR_OFFSET); | |
622 | ||
623 | for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++) | |
624 | if (regnum == -1 || regnum == regno) | |
625 | supply_nwfpe_register (regcache, regno, regs); | |
626 | } | |
627 | ||
628 | void | |
629 | arm_linux_collect_nwfpe (const struct regset *regset, | |
630 | const struct regcache *regcache, | |
631 | int regnum, void *regs_buf, size_t len) | |
632 | { | |
633 | gdb_byte *regs = regs_buf; | |
634 | int regno; | |
635 | ||
636 | for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++) | |
637 | if (regnum == -1 || regnum == regno) | |
638 | collect_nwfpe_register (regcache, regno, regs); | |
639 | ||
640 | if (regnum == ARM_FPS_REGNUM || regnum == -1) | |
641 | regcache_raw_collect (regcache, ARM_FPS_REGNUM, | |
642 | regs + INT_REGISTER_SIZE * ARM_FPS_REGNUM); | |
643 | } | |
644 | ||
ef7e8358 UW |
645 | /* Support VFP register format. */ |
646 | ||
647 | #define ARM_LINUX_SIZEOF_VFP (32 * 8 + 4) | |
648 | ||
649 | static void | |
650 | arm_linux_supply_vfp (const struct regset *regset, | |
651 | struct regcache *regcache, | |
652 | int regnum, const void *regs_buf, size_t len) | |
653 | { | |
654 | const gdb_byte *regs = regs_buf; | |
655 | int regno; | |
656 | ||
657 | if (regnum == ARM_FPSCR_REGNUM || regnum == -1) | |
658 | regcache_raw_supply (regcache, ARM_FPSCR_REGNUM, regs + 32 * 8); | |
659 | ||
660 | for (regno = ARM_D0_REGNUM; regno <= ARM_D31_REGNUM; regno++) | |
661 | if (regnum == -1 || regnum == regno) | |
662 | regcache_raw_supply (regcache, regno, | |
663 | regs + (regno - ARM_D0_REGNUM) * 8); | |
664 | } | |
665 | ||
666 | static void | |
667 | arm_linux_collect_vfp (const struct regset *regset, | |
668 | const struct regcache *regcache, | |
669 | int regnum, void *regs_buf, size_t len) | |
670 | { | |
671 | gdb_byte *regs = regs_buf; | |
672 | int regno; | |
673 | ||
674 | if (regnum == ARM_FPSCR_REGNUM || regnum == -1) | |
675 | regcache_raw_collect (regcache, ARM_FPSCR_REGNUM, regs + 32 * 8); | |
676 | ||
677 | for (regno = ARM_D0_REGNUM; regno <= ARM_D31_REGNUM; regno++) | |
678 | if (regnum == -1 || regnum == regno) | |
679 | regcache_raw_collect (regcache, regno, | |
680 | regs + (regno - ARM_D0_REGNUM) * 8); | |
681 | } | |
682 | ||
cb587d83 DJ |
683 | /* Return the appropriate register set for the core section identified |
684 | by SECT_NAME and SECT_SIZE. */ | |
685 | ||
686 | static const struct regset * | |
687 | arm_linux_regset_from_core_section (struct gdbarch *gdbarch, | |
688 | const char *sect_name, size_t sect_size) | |
689 | { | |
690 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
691 | ||
692 | if (strcmp (sect_name, ".reg") == 0 | |
693 | && sect_size == ARM_LINUX_SIZEOF_GREGSET) | |
694 | { | |
695 | if (tdep->gregset == NULL) | |
696 | tdep->gregset = regset_alloc (gdbarch, arm_linux_supply_gregset, | |
697 | arm_linux_collect_gregset); | |
698 | return tdep->gregset; | |
699 | } | |
700 | ||
701 | if (strcmp (sect_name, ".reg2") == 0 | |
702 | && sect_size == ARM_LINUX_SIZEOF_NWFPE) | |
703 | { | |
704 | if (tdep->fpregset == NULL) | |
705 | tdep->fpregset = regset_alloc (gdbarch, arm_linux_supply_nwfpe, | |
706 | arm_linux_collect_nwfpe); | |
707 | return tdep->fpregset; | |
708 | } | |
709 | ||
ef7e8358 UW |
710 | if (strcmp (sect_name, ".reg-arm-vfp") == 0 |
711 | && sect_size == ARM_LINUX_SIZEOF_VFP) | |
712 | { | |
713 | if (tdep->vfpregset == NULL) | |
714 | tdep->vfpregset = regset_alloc (gdbarch, arm_linux_supply_vfp, | |
715 | arm_linux_collect_vfp); | |
716 | return tdep->vfpregset; | |
717 | } | |
718 | ||
719 | return NULL; | |
720 | } | |
721 | ||
722 | /* Core file register set sections. */ | |
723 | ||
724 | static struct core_regset_section arm_linux_fpa_regset_sections[] = | |
725 | { | |
726 | { ".reg", ARM_LINUX_SIZEOF_GREGSET, "general-purpose" }, | |
727 | { ".reg2", ARM_LINUX_SIZEOF_NWFPE, "FPA floating-point" }, | |
728 | { NULL, 0} | |
729 | }; | |
730 | ||
731 | static struct core_regset_section arm_linux_vfp_regset_sections[] = | |
732 | { | |
733 | { ".reg", ARM_LINUX_SIZEOF_GREGSET, "general-purpose" }, | |
734 | { ".reg-arm-vfp", ARM_LINUX_SIZEOF_VFP, "VFP floating-point" }, | |
735 | { NULL, 0} | |
736 | }; | |
737 | ||
738 | /* Determine target description from core file. */ | |
739 | ||
740 | static const struct target_desc * | |
741 | arm_linux_core_read_description (struct gdbarch *gdbarch, | |
742 | struct target_ops *target, | |
743 | bfd *abfd) | |
744 | { | |
745 | CORE_ADDR arm_hwcap = 0; | |
746 | ||
747 | if (target_auxv_search (target, AT_HWCAP, &arm_hwcap) != 1) | |
748 | return NULL; | |
749 | ||
750 | if (arm_hwcap & HWCAP_VFP) | |
751 | { | |
752 | /* NEON implies VFPv3-D32 or no-VFP unit. Say that we only support | |
753 | Neon with VFPv3-D32. */ | |
754 | if (arm_hwcap & HWCAP_NEON) | |
755 | return tdesc_arm_with_neon; | |
756 | else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3) | |
757 | return tdesc_arm_with_vfpv3; | |
758 | else | |
759 | return tdesc_arm_with_vfpv2; | |
760 | } | |
761 | ||
cb587d83 DJ |
762 | return NULL; |
763 | } | |
764 | ||
ef7e8358 | 765 | |
25b41d01 | 766 | /* Copy the value of next pc of sigreturn and rt_sigrturn into PC, |
18819fa6 UW |
767 | return 1. In addition, set IS_THUMB depending on whether we |
768 | will return to ARM or Thumb code. Return 0 if it is not a | |
769 | rt_sigreturn/sigreturn syscall. */ | |
25b41d01 YQ |
770 | static int |
771 | arm_linux_sigreturn_return_addr (struct frame_info *frame, | |
772 | unsigned long svc_number, | |
18819fa6 | 773 | CORE_ADDR *pc, int *is_thumb) |
25b41d01 YQ |
774 | { |
775 | /* Is this a sigreturn or rt_sigreturn syscall? */ | |
776 | if (svc_number == 119 || svc_number == 173) | |
777 | { | |
778 | if (get_frame_type (frame) == SIGTRAMP_FRAME) | |
779 | { | |
18819fa6 UW |
780 | ULONGEST t_bit = arm_psr_thumb_bit (frame_unwind_arch (frame)); |
781 | CORE_ADDR cpsr | |
782 | = frame_unwind_register_unsigned (frame, ARM_PS_REGNUM); | |
783 | ||
784 | *is_thumb = (cpsr & t_bit) != 0; | |
25b41d01 YQ |
785 | *pc = frame_unwind_caller_pc (frame); |
786 | return 1; | |
787 | } | |
788 | } | |
789 | return 0; | |
790 | } | |
791 | ||
792 | /* When FRAME is at a syscall instruction, return the PC of the next | |
793 | instruction to be executed. */ | |
794 | ||
795 | static CORE_ADDR | |
796 | arm_linux_syscall_next_pc (struct frame_info *frame) | |
797 | { | |
798 | CORE_ADDR pc = get_frame_pc (frame); | |
799 | CORE_ADDR return_addr = 0; | |
800 | int is_thumb = arm_frame_is_thumb (frame); | |
801 | ULONGEST svc_number = 0; | |
25b41d01 YQ |
802 | |
803 | if (is_thumb) | |
804 | { | |
805 | svc_number = get_frame_register_unsigned (frame, 7); | |
18819fa6 | 806 | return_addr = pc + 2; |
25b41d01 YQ |
807 | } |
808 | else | |
809 | { | |
810 | struct gdbarch *gdbarch = get_frame_arch (frame); | |
811 | enum bfd_endian byte_order_for_code = | |
812 | gdbarch_byte_order_for_code (gdbarch); | |
813 | unsigned long this_instr = | |
814 | read_memory_unsigned_integer (pc, 4, byte_order_for_code); | |
815 | ||
816 | unsigned long svc_operand = (0x00ffffff & this_instr); | |
817 | if (svc_operand) /* OABI. */ | |
818 | { | |
819 | svc_number = svc_operand - 0x900000; | |
820 | } | |
821 | else /* EABI. */ | |
822 | { | |
823 | svc_number = get_frame_register_unsigned (frame, 7); | |
824 | } | |
18819fa6 UW |
825 | |
826 | return_addr = pc + 4; | |
25b41d01 YQ |
827 | } |
828 | ||
18819fa6 | 829 | arm_linux_sigreturn_return_addr (frame, svc_number, &return_addr, &is_thumb); |
25b41d01 | 830 | |
18819fa6 | 831 | /* Addresses for calling Thumb functions have the bit 0 set. */ |
25b41d01 | 832 | if (is_thumb) |
18819fa6 | 833 | return_addr |= 1; |
25b41d01 YQ |
834 | |
835 | return return_addr; | |
836 | } | |
837 | ||
838 | ||
daddc3c1 DJ |
839 | /* Insert a single step breakpoint at the next executed instruction. */ |
840 | ||
63807e1d | 841 | static int |
daddc3c1 DJ |
842 | arm_linux_software_single_step (struct frame_info *frame) |
843 | { | |
a6d9a66e | 844 | struct gdbarch *gdbarch = get_frame_arch (frame); |
6c95b8df | 845 | struct address_space *aspace = get_frame_address_space (frame); |
daddc3c1 DJ |
846 | CORE_ADDR next_pc = arm_get_next_pc (frame, get_frame_pc (frame)); |
847 | ||
848 | /* The Linux kernel offers some user-mode helpers in a high page. We can | |
849 | not read this page (as of 2.6.23), and even if we could then we couldn't | |
850 | set breakpoints in it, and even if we could then the atomic operations | |
851 | would fail when interrupted. They are all called as functions and return | |
852 | to the address in LR, so step to there instead. */ | |
853 | if (next_pc > 0xffff0000) | |
854 | next_pc = get_frame_register_unsigned (frame, ARM_LR_REGNUM); | |
855 | ||
18819fa6 | 856 | arm_insert_single_step_breakpoint (gdbarch, aspace, next_pc); |
daddc3c1 DJ |
857 | |
858 | return 1; | |
859 | } | |
860 | ||
cca44b1b JB |
861 | /* Support for displaced stepping of Linux SVC instructions. */ |
862 | ||
863 | static void | |
6e39997a | 864 | arm_linux_cleanup_svc (struct gdbarch *gdbarch, |
cca44b1b JB |
865 | struct regcache *regs, |
866 | struct displaced_step_closure *dsc) | |
867 | { | |
868 | CORE_ADDR from = dsc->insn_addr; | |
869 | ULONGEST apparent_pc; | |
870 | int within_scratch; | |
871 | ||
872 | regcache_cooked_read_unsigned (regs, ARM_PC_REGNUM, &apparent_pc); | |
873 | ||
874 | within_scratch = (apparent_pc >= dsc->scratch_base | |
875 | && apparent_pc < (dsc->scratch_base | |
876 | + DISPLACED_MODIFIED_INSNS * 4 + 4)); | |
877 | ||
878 | if (debug_displaced) | |
879 | { | |
880 | fprintf_unfiltered (gdb_stdlog, "displaced: PC is apparently %.8lx after " | |
881 | "SVC step ", (unsigned long) apparent_pc); | |
882 | if (within_scratch) | |
883 | fprintf_unfiltered (gdb_stdlog, "(within scratch space)\n"); | |
884 | else | |
885 | fprintf_unfiltered (gdb_stdlog, "(outside scratch space)\n"); | |
886 | } | |
887 | ||
888 | if (within_scratch) | |
889 | displaced_write_reg (regs, dsc, ARM_PC_REGNUM, from + 4, BRANCH_WRITE_PC); | |
890 | } | |
891 | ||
892 | static int | |
bd18283a YQ |
893 | arm_linux_copy_svc (struct gdbarch *gdbarch, struct regcache *regs, |
894 | struct displaced_step_closure *dsc) | |
cca44b1b | 895 | { |
25b41d01 YQ |
896 | CORE_ADDR return_to = 0; |
897 | ||
cca44b1b | 898 | struct frame_info *frame; |
36073a92 | 899 | unsigned int svc_number = displaced_read_reg (regs, dsc, 7); |
25b41d01 | 900 | int is_sigreturn = 0; |
18819fa6 | 901 | int is_thumb; |
cca44b1b | 902 | |
cca44b1b JB |
903 | frame = get_current_frame (); |
904 | ||
25b41d01 | 905 | is_sigreturn = arm_linux_sigreturn_return_addr(frame, svc_number, |
18819fa6 | 906 | &return_to, &is_thumb); |
25b41d01 | 907 | if (is_sigreturn) |
cca44b1b | 908 | { |
cca44b1b JB |
909 | struct symtab_and_line sal; |
910 | ||
911 | if (debug_displaced) | |
912 | fprintf_unfiltered (gdb_stdlog, "displaced: found " | |
0963b4bd | 913 | "sigreturn/rt_sigreturn SVC call. PC in frame = %lx\n", |
cca44b1b JB |
914 | (unsigned long) get_frame_pc (frame)); |
915 | ||
cca44b1b | 916 | if (debug_displaced) |
0963b4bd | 917 | fprintf_unfiltered (gdb_stdlog, "displaced: unwind pc = %lx. " |
cca44b1b JB |
918 | "Setting momentary breakpoint.\n", (unsigned long) return_to); |
919 | ||
8358c15c JK |
920 | gdb_assert (inferior_thread ()->control.step_resume_breakpoint |
921 | == NULL); | |
cca44b1b JB |
922 | |
923 | sal = find_pc_line (return_to, 0); | |
924 | sal.pc = return_to; | |
925 | sal.section = find_pc_overlay (return_to); | |
926 | sal.explicit_pc = 1; | |
927 | ||
928 | frame = get_prev_frame (frame); | |
929 | ||
930 | if (frame) | |
931 | { | |
8358c15c | 932 | inferior_thread ()->control.step_resume_breakpoint |
cca44b1b JB |
933 | = set_momentary_breakpoint (gdbarch, sal, get_frame_id (frame), |
934 | bp_step_resume); | |
935 | ||
936 | /* We need to make sure we actually insert the momentary | |
937 | breakpoint set above. */ | |
938 | insert_breakpoints (); | |
939 | } | |
940 | else if (debug_displaced) | |
941 | fprintf_unfiltered (gdb_stderr, "displaced: couldn't find previous " | |
942 | "frame to set momentary breakpoint for " | |
943 | "sigreturn/rt_sigreturn\n"); | |
944 | } | |
945 | else if (debug_displaced) | |
946 | fprintf_unfiltered (gdb_stdlog, "displaced: sigreturn/rt_sigreturn " | |
947 | "SVC call not in signal trampoline frame\n"); | |
25b41d01 | 948 | |
cca44b1b JB |
949 | |
950 | /* Preparation: If we detect sigreturn, set momentary breakpoint at resume | |
951 | location, else nothing. | |
952 | Insn: unmodified svc. | |
953 | Cleanup: if pc lands in scratch space, pc <- insn_addr + 4 | |
954 | else leave pc alone. */ | |
955 | ||
cca44b1b JB |
956 | |
957 | dsc->cleanup = &arm_linux_cleanup_svc; | |
958 | /* Pretend we wrote to the PC, so cleanup doesn't set PC to the next | |
959 | instruction. */ | |
960 | dsc->wrote_to_pc = 1; | |
961 | ||
962 | return 0; | |
963 | } | |
964 | ||
965 | ||
966 | /* The following two functions implement single-stepping over calls to Linux | |
967 | kernel helper routines, which perform e.g. atomic operations on architecture | |
968 | variants which don't support them natively. | |
969 | ||
970 | When this function is called, the PC will be pointing at the kernel helper | |
971 | (at an address inaccessible to GDB), and r14 will point to the return | |
972 | address. Displaced stepping always executes code in the copy area: | |
973 | so, make the copy-area instruction branch back to the kernel helper (the | |
974 | "from" address), and make r14 point to the breakpoint in the copy area. In | |
975 | that way, we regain control once the kernel helper returns, and can clean | |
976 | up appropriately (as if we had just returned from the kernel helper as it | |
977 | would have been called from the non-displaced location). */ | |
978 | ||
979 | static void | |
6e39997a | 980 | cleanup_kernel_helper_return (struct gdbarch *gdbarch, |
cca44b1b JB |
981 | struct regcache *regs, |
982 | struct displaced_step_closure *dsc) | |
983 | { | |
984 | displaced_write_reg (regs, dsc, ARM_LR_REGNUM, dsc->tmp[0], CANNOT_WRITE_PC); | |
985 | displaced_write_reg (regs, dsc, ARM_PC_REGNUM, dsc->tmp[0], BRANCH_WRITE_PC); | |
986 | } | |
987 | ||
988 | static void | |
989 | arm_catch_kernel_helper_return (struct gdbarch *gdbarch, CORE_ADDR from, | |
990 | CORE_ADDR to, struct regcache *regs, | |
991 | struct displaced_step_closure *dsc) | |
992 | { | |
993 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
994 | ||
995 | dsc->numinsns = 1; | |
996 | dsc->insn_addr = from; | |
997 | dsc->cleanup = &cleanup_kernel_helper_return; | |
998 | /* Say we wrote to the PC, else cleanup will set PC to the next | |
999 | instruction in the helper, which isn't helpful. */ | |
1000 | dsc->wrote_to_pc = 1; | |
1001 | ||
1002 | /* Preparation: tmp[0] <- r14 | |
1003 | r14 <- <scratch space>+4 | |
1004 | *(<scratch space>+8) <- from | |
1005 | Insn: ldr pc, [r14, #4] | |
1006 | Cleanup: r14 <- tmp[0], pc <- tmp[0]. */ | |
1007 | ||
36073a92 | 1008 | dsc->tmp[0] = displaced_read_reg (regs, dsc, ARM_LR_REGNUM); |
cca44b1b JB |
1009 | displaced_write_reg (regs, dsc, ARM_LR_REGNUM, (ULONGEST) to + 4, |
1010 | CANNOT_WRITE_PC); | |
1011 | write_memory_unsigned_integer (to + 8, 4, byte_order, from); | |
1012 | ||
1013 | dsc->modinsn[0] = 0xe59ef004; /* ldr pc, [lr, #4]. */ | |
1014 | } | |
1015 | ||
1016 | /* Linux-specific displaced step instruction copying function. Detects when | |
1017 | the program has stepped into a Linux kernel helper routine (which must be | |
1018 | handled as a special case), falling back to arm_displaced_step_copy_insn() | |
1019 | if it hasn't. */ | |
1020 | ||
1021 | static struct displaced_step_closure * | |
1022 | arm_linux_displaced_step_copy_insn (struct gdbarch *gdbarch, | |
1023 | CORE_ADDR from, CORE_ADDR to, | |
1024 | struct regcache *regs) | |
1025 | { | |
1026 | struct displaced_step_closure *dsc | |
1027 | = xmalloc (sizeof (struct displaced_step_closure)); | |
1028 | ||
1029 | /* Detect when we enter an (inaccessible by GDB) Linux kernel helper, and | |
1030 | stop at the return location. */ | |
1031 | if (from > 0xffff0000) | |
1032 | { | |
1033 | if (debug_displaced) | |
1034 | fprintf_unfiltered (gdb_stdlog, "displaced: detected kernel helper " | |
1035 | "at %.8lx\n", (unsigned long) from); | |
1036 | ||
1037 | arm_catch_kernel_helper_return (gdbarch, from, to, regs, dsc); | |
1038 | } | |
1039 | else | |
1040 | { | |
cca44b1b JB |
1041 | /* Override the default handling of SVC instructions. */ |
1042 | dsc->u.svc.copy_svc_os = arm_linux_copy_svc; | |
1043 | ||
b434a28f | 1044 | arm_process_displaced_insn (gdbarch, from, to, regs, dsc); |
cca44b1b JB |
1045 | } |
1046 | ||
1047 | arm_displaced_init_closure (gdbarch, from, to, dsc); | |
1048 | ||
1049 | return dsc; | |
1050 | } | |
1051 | ||
97e03143 RE |
1052 | static void |
1053 | arm_linux_init_abi (struct gdbarch_info info, | |
1054 | struct gdbarch *gdbarch) | |
1055 | { | |
1056 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
1057 | ||
a5ee0f0c PA |
1058 | linux_init_abi (info, gdbarch); |
1059 | ||
97e03143 | 1060 | tdep->lowest_pc = 0x8000; |
2ef47cd0 | 1061 | if (info.byte_order == BFD_ENDIAN_BIG) |
498b1f87 | 1062 | { |
c75a2cc8 DJ |
1063 | if (tdep->arm_abi == ARM_ABI_AAPCS) |
1064 | tdep->arm_breakpoint = eabi_linux_arm_be_breakpoint; | |
1065 | else | |
1066 | tdep->arm_breakpoint = arm_linux_arm_be_breakpoint; | |
498b1f87 | 1067 | tdep->thumb_breakpoint = arm_linux_thumb_be_breakpoint; |
177321bd | 1068 | tdep->thumb2_breakpoint = arm_linux_thumb2_be_breakpoint; |
498b1f87 | 1069 | } |
2ef47cd0 | 1070 | else |
498b1f87 | 1071 | { |
c75a2cc8 DJ |
1072 | if (tdep->arm_abi == ARM_ABI_AAPCS) |
1073 | tdep->arm_breakpoint = eabi_linux_arm_le_breakpoint; | |
1074 | else | |
1075 | tdep->arm_breakpoint = arm_linux_arm_le_breakpoint; | |
498b1f87 | 1076 | tdep->thumb_breakpoint = arm_linux_thumb_le_breakpoint; |
177321bd | 1077 | tdep->thumb2_breakpoint = arm_linux_thumb2_le_breakpoint; |
498b1f87 | 1078 | } |
66e810cd | 1079 | tdep->arm_breakpoint_size = sizeof (arm_linux_arm_le_breakpoint); |
498b1f87 | 1080 | tdep->thumb_breakpoint_size = sizeof (arm_linux_thumb_le_breakpoint); |
177321bd | 1081 | tdep->thumb2_breakpoint_size = sizeof (arm_linux_thumb2_le_breakpoint); |
9df628e0 | 1082 | |
28e97307 DJ |
1083 | if (tdep->fp_model == ARM_FLOAT_AUTO) |
1084 | tdep->fp_model = ARM_FLOAT_FPA; | |
fd50bc42 | 1085 | |
f8624c62 MGD |
1086 | switch (tdep->fp_model) |
1087 | { | |
1088 | case ARM_FLOAT_FPA: | |
1089 | tdep->jb_pc = ARM_LINUX_JB_PC_FPA; | |
1090 | break; | |
1091 | case ARM_FLOAT_SOFT_FPA: | |
1092 | case ARM_FLOAT_SOFT_VFP: | |
1093 | case ARM_FLOAT_VFP: | |
1094 | tdep->jb_pc = ARM_LINUX_JB_PC_EABI; | |
1095 | break; | |
1096 | default: | |
1097 | internal_error | |
1098 | (__FILE__, __LINE__, | |
1099 | _("arm_linux_init_abi: Floating point model not supported")); | |
1100 | break; | |
1101 | } | |
a6cdd8c5 | 1102 | tdep->jb_elt_size = ARM_LINUX_JB_ELEMENT_SIZE; |
19d3fc80 | 1103 | |
7aa1783e | 1104 | set_solib_svr4_fetch_link_map_offsets |
76a9d10f | 1105 | (gdbarch, svr4_ilp32_fetch_link_map_offsets); |
7aa1783e | 1106 | |
190dce09 | 1107 | /* Single stepping. */ |
daddc3c1 | 1108 | set_gdbarch_software_single_step (gdbarch, arm_linux_software_single_step); |
190dce09 | 1109 | |
0e18d038 | 1110 | /* Shared library handling. */ |
0e18d038 | 1111 | set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target); |
bb41a796 | 1112 | set_gdbarch_skip_solib_resolver (gdbarch, glibc_skip_solib_resolver); |
b2756930 KB |
1113 | |
1114 | /* Enable TLS support. */ | |
1115 | set_gdbarch_fetch_tls_load_module_address (gdbarch, | |
1116 | svr4_fetch_objfile_link_map); | |
8e9d1a24 DJ |
1117 | |
1118 | tramp_frame_prepend_unwinder (gdbarch, | |
1119 | &arm_linux_sigreturn_tramp_frame); | |
1120 | tramp_frame_prepend_unwinder (gdbarch, | |
1121 | &arm_linux_rt_sigreturn_tramp_frame); | |
1122 | tramp_frame_prepend_unwinder (gdbarch, | |
1123 | &arm_eabi_linux_sigreturn_tramp_frame); | |
1124 | tramp_frame_prepend_unwinder (gdbarch, | |
1125 | &arm_eabi_linux_rt_sigreturn_tramp_frame); | |
f1973203 MR |
1126 | tramp_frame_prepend_unwinder (gdbarch, |
1127 | &arm_linux_restart_syscall_tramp_frame); | |
478fd957 UW |
1128 | tramp_frame_prepend_unwinder (gdbarch, |
1129 | &arm_kernel_linux_restart_syscall_tramp_frame); | |
cb587d83 DJ |
1130 | |
1131 | /* Core file support. */ | |
1132 | set_gdbarch_regset_from_core_section (gdbarch, | |
1133 | arm_linux_regset_from_core_section); | |
ef7e8358 UW |
1134 | set_gdbarch_core_read_description (gdbarch, arm_linux_core_read_description); |
1135 | ||
1136 | if (tdep->have_vfp_registers) | |
1137 | set_gdbarch_core_regset_sections (gdbarch, arm_linux_vfp_regset_sections); | |
1138 | else if (tdep->have_fpa_registers) | |
1139 | set_gdbarch_core_regset_sections (gdbarch, arm_linux_fpa_regset_sections); | |
4aa995e1 PA |
1140 | |
1141 | set_gdbarch_get_siginfo_type (gdbarch, linux_get_siginfo_type); | |
cca44b1b JB |
1142 | |
1143 | /* Displaced stepping. */ | |
1144 | set_gdbarch_displaced_step_copy_insn (gdbarch, | |
1145 | arm_linux_displaced_step_copy_insn); | |
1146 | set_gdbarch_displaced_step_fixup (gdbarch, arm_displaced_step_fixup); | |
1147 | set_gdbarch_displaced_step_free_closure (gdbarch, | |
1148 | simple_displaced_step_free_closure); | |
1149 | set_gdbarch_displaced_step_location (gdbarch, displaced_step_at_entry_point); | |
25b41d01 YQ |
1150 | |
1151 | ||
1152 | tdep->syscall_next_pc = arm_linux_syscall_next_pc; | |
97e03143 RE |
1153 | } |
1154 | ||
63807e1d PA |
1155 | /* Provide a prototype to silence -Wmissing-prototypes. */ |
1156 | extern initialize_file_ftype _initialize_arm_linux_tdep; | |
1157 | ||
faf5f7ad SB |
1158 | void |
1159 | _initialize_arm_linux_tdep (void) | |
1160 | { | |
05816f70 MK |
1161 | gdbarch_register_osabi (bfd_arch_arm, 0, GDB_OSABI_LINUX, |
1162 | arm_linux_init_abi); | |
faf5f7ad | 1163 | } |