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faf5f7ad | 1 | /* GNU/Linux on ARM target support. |
0fd88904 AC |
2 | |
3 | Copyright 1999, 2000, 2001, 2002, 2003, 2005 Free Software | |
4 | Foundation, Inc. | |
faf5f7ad SB |
5 | |
6 | This file is part of GDB. | |
7 | ||
8 | This program is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2 of the License, or | |
11 | (at your option) any later version. | |
12 | ||
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with this program; if not, write to the Free Software | |
20 | Foundation, Inc., 59 Temple Place - Suite 330, | |
21 | Boston, MA 02111-1307, USA. */ | |
22 | ||
23 | #include "defs.h" | |
c20f6dea SB |
24 | #include "target.h" |
25 | #include "value.h" | |
faf5f7ad | 26 | #include "gdbtypes.h" |
134e61c4 | 27 | #include "floatformat.h" |
2a451106 KB |
28 | #include "gdbcore.h" |
29 | #include "frame.h" | |
4e052eda | 30 | #include "regcache.h" |
d16aafd8 | 31 | #include "doublest.h" |
7aa1783e | 32 | #include "solib-svr4.h" |
4be87837 | 33 | #include "osabi.h" |
faf5f7ad | 34 | |
34e8f22d | 35 | #include "arm-tdep.h" |
0670c0aa | 36 | #include "glibc-tdep.h" |
a52e6aac | 37 | |
fdf39c9a RE |
38 | /* Under ARM GNU/Linux the traditional way of performing a breakpoint |
39 | is to execute a particular software interrupt, rather than use a | |
40 | particular undefined instruction to provoke a trap. Upon exection | |
41 | of the software interrupt the kernel stops the inferior with a | |
498b1f87 | 42 | SIGTRAP, and wakes the debugger. */ |
66e810cd | 43 | |
2ef47cd0 DJ |
44 | static const char arm_linux_arm_le_breakpoint[] = { 0x01, 0x00, 0x9f, 0xef }; |
45 | ||
46 | static const char arm_linux_arm_be_breakpoint[] = { 0xef, 0x9f, 0x00, 0x01 }; | |
66e810cd | 47 | |
498b1f87 DJ |
48 | static const char arm_linux_thumb_be_breakpoint[] = {0xde, 0x01}; |
49 | ||
50 | static const char arm_linux_thumb_le_breakpoint[] = {0x01, 0xde}; | |
51 | ||
9df628e0 | 52 | /* Description of the longjmp buffer. */ |
7a5ea0d4 | 53 | #define ARM_LINUX_JB_ELEMENT_SIZE INT_REGISTER_SIZE |
a6cdd8c5 | 54 | #define ARM_LINUX_JB_PC 21 |
faf5f7ad | 55 | |
faf5f7ad SB |
56 | /* Extract from an array REGBUF containing the (raw) register state |
57 | a function return value of type TYPE, and copy that, in virtual format, | |
58 | into VALBUF. */ | |
19d3fc80 RE |
59 | /* FIXME rearnsha/2002-02-23: This function shouldn't be necessary. |
60 | The ARM generic one should be able to handle the model used by | |
61 | linux and the low-level formatting of the registers should be | |
62 | hidden behind the regcache abstraction. */ | |
63 | static void | |
faf5f7ad | 64 | arm_linux_extract_return_value (struct type *type, |
b8b527c5 | 65 | char regbuf[], |
faf5f7ad SB |
66 | char *valbuf) |
67 | { | |
68 | /* ScottB: This needs to be looked at to handle the different | |
fdf39c9a | 69 | floating point emulators on ARM GNU/Linux. Right now the code |
faf5f7ad SB |
70 | assumes that fetch inferior registers does the right thing for |
71 | GDB. I suspect this won't handle NWFPE registers correctly, nor | |
72 | will the default ARM version (arm_extract_return_value()). */ | |
73 | ||
34e8f22d RE |
74 | int regnum = ((TYPE_CODE_FLT == TYPE_CODE (type)) |
75 | ? ARM_F0_REGNUM : ARM_A1_REGNUM); | |
62700349 | 76 | memcpy (valbuf, ®buf[DEPRECATED_REGISTER_BYTE (regnum)], TYPE_LENGTH (type)); |
faf5f7ad | 77 | } |
134e61c4 | 78 | |
f38e884d | 79 | /* |
fdf39c9a RE |
80 | Dynamic Linking on ARM GNU/Linux |
81 | -------------------------------- | |
f38e884d SB |
82 | |
83 | Note: PLT = procedure linkage table | |
84 | GOT = global offset table | |
85 | ||
86 | As much as possible, ELF dynamic linking defers the resolution of | |
87 | jump/call addresses until the last minute. The technique used is | |
88 | inspired by the i386 ELF design, and is based on the following | |
89 | constraints. | |
90 | ||
91 | 1) The calling technique should not force a change in the assembly | |
92 | code produced for apps; it MAY cause changes in the way assembly | |
93 | code is produced for position independent code (i.e. shared | |
94 | libraries). | |
95 | ||
96 | 2) The technique must be such that all executable areas must not be | |
97 | modified; and any modified areas must not be executed. | |
98 | ||
99 | To do this, there are three steps involved in a typical jump: | |
100 | ||
101 | 1) in the code | |
102 | 2) through the PLT | |
103 | 3) using a pointer from the GOT | |
104 | ||
105 | When the executable or library is first loaded, each GOT entry is | |
106 | initialized to point to the code which implements dynamic name | |
107 | resolution and code finding. This is normally a function in the | |
fdf39c9a RE |
108 | program interpreter (on ARM GNU/Linux this is usually |
109 | ld-linux.so.2, but it does not have to be). On the first | |
110 | invocation, the function is located and the GOT entry is replaced | |
111 | with the real function address. Subsequent calls go through steps | |
112 | 1, 2 and 3 and end up calling the real code. | |
f38e884d SB |
113 | |
114 | 1) In the code: | |
115 | ||
116 | b function_call | |
117 | bl function_call | |
118 | ||
119 | This is typical ARM code using the 26 bit relative branch or branch | |
120 | and link instructions. The target of the instruction | |
121 | (function_call is usually the address of the function to be called. | |
122 | In position independent code, the target of the instruction is | |
123 | actually an entry in the PLT when calling functions in a shared | |
124 | library. Note that this call is identical to a normal function | |
125 | call, only the target differs. | |
126 | ||
127 | 2) In the PLT: | |
128 | ||
129 | The PLT is a synthetic area, created by the linker. It exists in | |
130 | both executables and libraries. It is an array of stubs, one per | |
131 | imported function call. It looks like this: | |
132 | ||
133 | PLT[0]: | |
134 | str lr, [sp, #-4]! @push the return address (lr) | |
135 | ldr lr, [pc, #16] @load from 6 words ahead | |
136 | add lr, pc, lr @form an address for GOT[0] | |
137 | ldr pc, [lr, #8]! @jump to the contents of that addr | |
138 | ||
139 | The return address (lr) is pushed on the stack and used for | |
140 | calculations. The load on the second line loads the lr with | |
141 | &GOT[3] - . - 20. The addition on the third leaves: | |
142 | ||
143 | lr = (&GOT[3] - . - 20) + (. + 8) | |
144 | lr = (&GOT[3] - 12) | |
145 | lr = &GOT[0] | |
146 | ||
147 | On the fourth line, the pc and lr are both updated, so that: | |
148 | ||
149 | pc = GOT[2] | |
150 | lr = &GOT[0] + 8 | |
151 | = &GOT[2] | |
152 | ||
153 | NOTE: PLT[0] borrows an offset .word from PLT[1]. This is a little | |
154 | "tight", but allows us to keep all the PLT entries the same size. | |
155 | ||
156 | PLT[n+1]: | |
157 | ldr ip, [pc, #4] @load offset from gotoff | |
158 | add ip, pc, ip @add the offset to the pc | |
159 | ldr pc, [ip] @jump to that address | |
160 | gotoff: .word GOT[n+3] - . | |
161 | ||
162 | The load on the first line, gets an offset from the fourth word of | |
163 | the PLT entry. The add on the second line makes ip = &GOT[n+3], | |
164 | which contains either a pointer to PLT[0] (the fixup trampoline) or | |
165 | a pointer to the actual code. | |
166 | ||
167 | 3) In the GOT: | |
168 | ||
169 | The GOT contains helper pointers for both code (PLT) fixups and | |
170 | data fixups. The first 3 entries of the GOT are special. The next | |
171 | M entries (where M is the number of entries in the PLT) belong to | |
172 | the PLT fixups. The next D (all remaining) entries belong to | |
173 | various data fixups. The actual size of the GOT is 3 + M + D. | |
174 | ||
175 | The GOT is also a synthetic area, created by the linker. It exists | |
176 | in both executables and libraries. When the GOT is first | |
177 | initialized , all the GOT entries relating to PLT fixups are | |
178 | pointing to code back at PLT[0]. | |
179 | ||
180 | The special entries in the GOT are: | |
181 | ||
182 | GOT[0] = linked list pointer used by the dynamic loader | |
183 | GOT[1] = pointer to the reloc table for this module | |
184 | GOT[2] = pointer to the fixup/resolver code | |
185 | ||
186 | The first invocation of function call comes through and uses the | |
187 | fixup/resolver code. On the entry to the fixup/resolver code: | |
188 | ||
189 | ip = &GOT[n+3] | |
190 | lr = &GOT[2] | |
191 | stack[0] = return address (lr) of the function call | |
192 | [r0, r1, r2, r3] are still the arguments to the function call | |
193 | ||
194 | This is enough information for the fixup/resolver code to work | |
195 | with. Before the fixup/resolver code returns, it actually calls | |
196 | the requested function and repairs &GOT[n+3]. */ | |
197 | ||
7aa1783e RE |
198 | /* Fetch, and possibly build, an appropriate link_map_offsets structure |
199 | for ARM linux targets using the struct offsets defined in <link.h>. | |
200 | Note, however, that link.h is not actually referred to in this file. | |
201 | Instead, the relevant structs offsets were obtained from examining | |
202 | link.h. (We can't refer to link.h from this file because the host | |
203 | system won't necessarily have it, or if it does, the structs which | |
204 | it defines will refer to the host system, not the target). */ | |
205 | ||
206 | static struct link_map_offsets * | |
207 | arm_linux_svr4_fetch_link_map_offsets (void) | |
208 | { | |
209 | static struct link_map_offsets lmo; | |
210 | static struct link_map_offsets *lmp = 0; | |
211 | ||
212 | if (lmp == 0) | |
213 | { | |
214 | lmp = &lmo; | |
215 | ||
216 | lmo.r_debug_size = 8; /* Actual size is 20, but this is all we | |
217 | need. */ | |
218 | ||
219 | lmo.r_map_offset = 4; | |
220 | lmo.r_map_size = 4; | |
221 | ||
222 | lmo.link_map_size = 20; /* Actual size is 552, but this is all we | |
223 | need. */ | |
224 | ||
225 | lmo.l_addr_offset = 0; | |
226 | lmo.l_addr_size = 4; | |
227 | ||
228 | lmo.l_name_offset = 4; | |
229 | lmo.l_name_size = 4; | |
230 | ||
231 | lmo.l_next_offset = 12; | |
232 | lmo.l_next_size = 4; | |
233 | ||
234 | lmo.l_prev_offset = 16; | |
235 | lmo.l_prev_size = 4; | |
236 | } | |
237 | ||
238 | return lmp; | |
239 | } | |
240 | ||
2a451106 KB |
241 | /* The constants below were determined by examining the following files |
242 | in the linux kernel sources: | |
243 | ||
244 | arch/arm/kernel/signal.c | |
245 | - see SWI_SYS_SIGRETURN and SWI_SYS_RT_SIGRETURN | |
246 | include/asm-arm/unistd.h | |
247 | - see __NR_sigreturn, __NR_rt_sigreturn, and __NR_SYSCALL_BASE */ | |
248 | ||
249 | #define ARM_LINUX_SIGRETURN_INSTR 0xef900077 | |
250 | #define ARM_LINUX_RT_SIGRETURN_INSTR 0xef9000ad | |
251 | ||
252 | /* arm_linux_in_sigtramp determines if PC points at one of the | |
253 | instructions which cause control to return to the Linux kernel upon | |
254 | return from a signal handler. FUNC_NAME is unused. */ | |
255 | ||
256 | int | |
257 | arm_linux_in_sigtramp (CORE_ADDR pc, char *func_name) | |
258 | { | |
259 | unsigned long inst; | |
260 | ||
261 | inst = read_memory_integer (pc, 4); | |
262 | ||
263 | return (inst == ARM_LINUX_SIGRETURN_INSTR | |
264 | || inst == ARM_LINUX_RT_SIGRETURN_INSTR); | |
265 | ||
266 | } | |
267 | ||
268 | /* arm_linux_sigcontext_register_address returns the address in the | |
269 | sigcontext of register REGNO given a stack pointer value SP and | |
270 | program counter value PC. The value 0 is returned if PC is not | |
271 | pointing at one of the signal return instructions or if REGNO is | |
272 | not saved in the sigcontext struct. */ | |
273 | ||
274 | CORE_ADDR | |
275 | arm_linux_sigcontext_register_address (CORE_ADDR sp, CORE_ADDR pc, int regno) | |
276 | { | |
277 | unsigned long inst; | |
278 | CORE_ADDR reg_addr = 0; | |
279 | ||
280 | inst = read_memory_integer (pc, 4); | |
281 | ||
fdf39c9a RE |
282 | if (inst == ARM_LINUX_SIGRETURN_INSTR |
283 | || inst == ARM_LINUX_RT_SIGRETURN_INSTR) | |
2a451106 KB |
284 | { |
285 | CORE_ADDR sigcontext_addr; | |
286 | ||
287 | /* The sigcontext structure is at different places for the two | |
288 | signal return instructions. For ARM_LINUX_SIGRETURN_INSTR, | |
289 | it starts at the SP value. For ARM_LINUX_RT_SIGRETURN_INSTR, | |
290 | it is at SP+8. For the latter instruction, it may also be | |
291 | the case that the address of this structure may be determined | |
292 | by reading the 4 bytes at SP, but I'm not convinced this is | |
293 | reliable. | |
294 | ||
295 | In any event, these magic constants (0 and 8) may be | |
296 | determined by examining struct sigframe and struct | |
297 | rt_sigframe in arch/arm/kernel/signal.c in the Linux kernel | |
298 | sources. */ | |
299 | ||
300 | if (inst == ARM_LINUX_RT_SIGRETURN_INSTR) | |
301 | sigcontext_addr = sp + 8; | |
302 | else /* inst == ARM_LINUX_SIGRETURN_INSTR */ | |
303 | sigcontext_addr = sp + 0; | |
304 | ||
305 | /* The layout of the sigcontext structure for ARM GNU/Linux is | |
306 | in include/asm-arm/sigcontext.h in the Linux kernel sources. | |
307 | ||
308 | There are three 4-byte fields which precede the saved r0 | |
309 | field. (This accounts for the 12 in the code below.) The | |
310 | sixteen registers (4 bytes per field) follow in order. The | |
311 | PSR value follows the sixteen registers which accounts for | |
312 | the constant 19 below. */ | |
313 | ||
34e8f22d | 314 | if (0 <= regno && regno <= ARM_PC_REGNUM) |
2a451106 | 315 | reg_addr = sigcontext_addr + 12 + (4 * regno); |
34e8f22d | 316 | else if (regno == ARM_PS_REGNUM) |
2a451106 KB |
317 | reg_addr = sigcontext_addr + 19 * 4; |
318 | } | |
319 | ||
320 | return reg_addr; | |
321 | } | |
322 | ||
97e03143 RE |
323 | static void |
324 | arm_linux_init_abi (struct gdbarch_info info, | |
325 | struct gdbarch *gdbarch) | |
326 | { | |
327 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
328 | ||
329 | tdep->lowest_pc = 0x8000; | |
2ef47cd0 | 330 | if (info.byte_order == BFD_ENDIAN_BIG) |
498b1f87 DJ |
331 | { |
332 | tdep->arm_breakpoint = arm_linux_arm_be_breakpoint; | |
333 | tdep->thumb_breakpoint = arm_linux_thumb_be_breakpoint; | |
334 | } | |
2ef47cd0 | 335 | else |
498b1f87 DJ |
336 | { |
337 | tdep->arm_breakpoint = arm_linux_arm_le_breakpoint; | |
338 | tdep->thumb_breakpoint = arm_linux_thumb_le_breakpoint; | |
339 | } | |
66e810cd | 340 | tdep->arm_breakpoint_size = sizeof (arm_linux_arm_le_breakpoint); |
498b1f87 | 341 | tdep->thumb_breakpoint_size = sizeof (arm_linux_thumb_le_breakpoint); |
9df628e0 | 342 | |
28e97307 DJ |
343 | if (tdep->fp_model == ARM_FLOAT_AUTO) |
344 | tdep->fp_model = ARM_FLOAT_FPA; | |
fd50bc42 | 345 | |
a6cdd8c5 RE |
346 | tdep->jb_pc = ARM_LINUX_JB_PC; |
347 | tdep->jb_elt_size = ARM_LINUX_JB_ELEMENT_SIZE; | |
19d3fc80 | 348 | |
7aa1783e RE |
349 | set_solib_svr4_fetch_link_map_offsets |
350 | (gdbarch, arm_linux_svr4_fetch_link_map_offsets); | |
351 | ||
84320456 | 352 | /* The following override shouldn't be needed. */ |
26e9b323 | 353 | set_gdbarch_deprecated_extract_return_value (gdbarch, arm_linux_extract_return_value); |
0e18d038 RE |
354 | |
355 | /* Shared library handling. */ | |
0e18d038 | 356 | set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target); |
bb41a796 | 357 | set_gdbarch_skip_solib_resolver (gdbarch, glibc_skip_solib_resolver); |
b2756930 KB |
358 | |
359 | /* Enable TLS support. */ | |
360 | set_gdbarch_fetch_tls_load_module_address (gdbarch, | |
361 | svr4_fetch_objfile_link_map); | |
97e03143 RE |
362 | } |
363 | ||
faf5f7ad SB |
364 | void |
365 | _initialize_arm_linux_tdep (void) | |
366 | { | |
05816f70 MK |
367 | gdbarch_register_osabi (bfd_arch_arm, 0, GDB_OSABI_LINUX, |
368 | arm_linux_init_abi); | |
faf5f7ad | 369 | } |