[deliverable/binutils-gdb.git] / gdb / armnbsd-nat.c

/* Native-dependent code for BSD Unix running on ARM's, for GDB.
   Copyright 1988, 1989, 1991, 1992, 1994, 1996, 1999, 2002
   Free Software Foundation, Inc.

   This file is part of GDB.

   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 2 of the License, or
   (at your option) any later version.

   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with this program; if not, write to the Free Software
   Foundation, Inc., 59 Temple Place - Suite 330,
   Boston, MA 02111-1307, USA.  */

#include "defs.h"

#ifndef FETCH_INFERIOR_REGISTERS
#error Not FETCH_INFERIOR_REGISTERS 
#endif /* !FETCH_INFERIOR_REGISTERS */

#include "arm-tdep.h"

#include <sys/types.h>
#include <sys/ptrace.h>
#include <machine/reg.h>
#include <machine/frame.h>
#include "inferior.h"
#include "regcache.h"
#include "gdbcore.h"

extern int arm_apcs_32;

static void
supply_gregset (struct reg *gregset)
{
  int regno;
  CORE_ADDR r_pc;

  /* Integer registers.  */
  for (regno = ARM_A1_REGNUM; regno < ARM_SP_REGNUM; regno++)
    regcache_raw_supply (current_regcache, regno, (char *) &gregset->r[regno]);

  regcache_raw_supply (current_regcache, ARM_SP_REGNUM,
		       (char *) &gregset->r_sp);
  regcache_raw_supply (current_regcache, ARM_LR_REGNUM,
		       (char *) &gregset->r_lr);
  /* This is ok: we're running native...  */
  r_pc = ADDR_BITS_REMOVE (gregset->r_pc);
  regcache_raw_supply (current_regcache, ARM_PC_REGNUM, (char *) &r_pc);

  if (arm_apcs_32)
    regcache_raw_supply (current_regcache, ARM_PS_REGNUM,
			 (char *) &gregset->r_cpsr);
  else
    regcache_raw_supply (current_regcache, ARM_PS_REGNUM,
			 (char *) &gregset->r_pc);
}

static void
supply_fparegset (struct fpreg *fparegset)
{
  int regno;

  for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
    regcache_raw_supply (current_regcache, regno,
			 (char *) &fparegset->fpr[regno - ARM_F0_REGNUM]);

  regcache_raw_supply (current_regcache, ARM_FPS_REGNUM,
		       (char *) &fparegset->fpr_fpsr);
}

static void
fetch_register (int regno)
{
  struct reg inferior_registers;
  int ret;

  ret = ptrace (PT_GETREGS, PIDGET (inferior_ptid),
		(PTRACE_ARG3_TYPE) &inferior_registers, 0);

  if (ret < 0)
    {
      warning ("unable to fetch general register");
      return;
    }

  switch (regno)
    {
    case ARM_SP_REGNUM:
      regcache_raw_supply (current_regcache, ARM_SP_REGNUM,
			   (char *) &inferior_registers.r_sp);
      break;

    case ARM_LR_REGNUM:
      regcache_raw_supply (current_regcache, ARM_LR_REGNUM,
			   (char *) &inferior_registers.r_lr);
      break;

    case ARM_PC_REGNUM:
      /* This is ok: we're running native... */
      inferior_registers.r_pc = ADDR_BITS_REMOVE (inferior_registers.r_pc);
      regcache_raw_supply (current_regcache, ARM_PC_REGNUM,
			   (char *) &inferior_registers.r_pc);
      break;

    case ARM_PS_REGNUM:
      if (arm_apcs_32)
	regcache_raw_supply (current_regcache, ARM_PS_REGNUM,
			     (char *) &inferior_registers.r_cpsr);
      else
	regcache_raw_supply (current_regcache, ARM_PS_REGNUM,
			     (char *) &inferior_registers.r_pc);
      break;

    default:
      regcache_raw_supply (current_regcache, regno,
			   (char *) &inferior_registers.r[regno]);
      break;
    }
}

static void
fetch_regs (void)
{
  struct reg inferior_registers;
  int ret;
  int regno;

  ret = ptrace (PT_GETREGS, PIDGET (inferior_ptid),
		(PTRACE_ARG3_TYPE) &inferior_registers, 0);

  if (ret < 0)
    {
      warning ("unable to fetch general registers");
      return;
    }

  supply_gregset (&inferior_registers);
}

static void
fetch_fp_register (int regno)
{
  struct fpreg inferior_fp_registers;
  int ret;

  ret = ptrace (PT_GETFPREGS, PIDGET (inferior_ptid),
		(PTRACE_ARG3_TYPE) &inferior_fp_registers, 0);

  if (ret < 0)
    {
      warning ("unable to fetch floating-point register");
      return;
    }

  switch (regno)
    {
    case ARM_FPS_REGNUM:
      regcache_raw_supply (current_regcache, ARM_FPS_REGNUM,
			   (char *) &inferior_fp_registers.fpr_fpsr);
      break;

    default:
      regcache_raw_supply (current_regcache, regno,
			   (char *) &inferior_fp_registers.fpr[regno - ARM_F0_REGNUM]);
      break;
    }
}

static void
fetch_fp_regs (void)
{
  struct fpreg inferior_fp_registers;
  int ret;
  int regno;

  ret = ptrace (PT_GETFPREGS, PIDGET (inferior_ptid),
		(PTRACE_ARG3_TYPE) &inferior_fp_registers, 0);

  if (ret < 0)
    {
      warning ("unable to fetch general registers");
      return;
    }

  supply_fparegset (&inferior_fp_registers);
}

void
fetch_inferior_registers (int regno)
{
  if (regno >= 0)
    {
      if (regno < ARM_F0_REGNUM || regno > ARM_FPS_REGNUM)
	fetch_register (regno);
      else
	fetch_fp_register (regno);
    }
  else
    {
      fetch_regs ();
      fetch_fp_regs ();
    }
}


static void
store_register (int regno)
{
  struct reg inferior_registers;
  int ret;

  ret = ptrace (PT_GETREGS, PIDGET (inferior_ptid),
		(PTRACE_ARG3_TYPE) &inferior_registers, 0);

  if (ret < 0)
    {
      warning ("unable to fetch general registers");
      return;
    }

  switch (regno)
    {
    case ARM_SP_REGNUM:
      regcache_collect (ARM_SP_REGNUM, (char *) &inferior_registers.r_sp);
      break;

    case ARM_LR_REGNUM:
      regcache_collect (ARM_LR_REGNUM, (char *) &inferior_registers.r_lr);
      break;

    case ARM_PC_REGNUM:
      if (arm_apcs_32)
	regcache_collect (ARM_PC_REGNUM, (char *) &inferior_registers.r_pc);
      else
	{
	  unsigned pc_val;

	  regcache_collect (ARM_PC_REGNUM, (char *) &pc_val);
	  
	  pc_val = ADDR_BITS_REMOVE (pc_val);
	  inferior_registers.r_pc
	    ^= ADDR_BITS_REMOVE (inferior_registers.r_pc);
	  inferior_registers.r_pc |= pc_val;
	}
      break;

    case ARM_PS_REGNUM:
      if (arm_apcs_32)
	regcache_collect (ARM_PS_REGNUM, (char *) &inferior_registers.r_cpsr);
      else
	{
	  unsigned psr_val;

	  regcache_collect (ARM_PS_REGNUM, (char *) &psr_val);

	  psr_val ^= ADDR_BITS_REMOVE (psr_val);
	  inferior_registers.r_pc = ADDR_BITS_REMOVE (inferior_registers.r_pc);
	  inferior_registers.r_pc |= psr_val;
	}
      break;

    default:
      regcache_collect (regno, (char *) &inferior_registers.r[regno]);
      break;
    }

  ret = ptrace (PT_SETREGS, PIDGET (inferior_ptid),
		(PTRACE_ARG3_TYPE) &inferior_registers, 0);

  if (ret < 0)
    warning ("unable to write register %d to inferior", regno);
}

static void
store_regs (void)
{
  struct reg inferior_registers;
  int ret;
  int regno;


  for (regno = ARM_A1_REGNUM; regno < ARM_SP_REGNUM; regno++)
    regcache_collect (regno, (char *) &inferior_registers.r[regno]);

  regcache_collect (ARM_SP_REGNUM, (char *) &inferior_registers.r_sp);
  regcache_collect (ARM_LR_REGNUM, (char *) &inferior_registers.r_lr);

  if (arm_apcs_32)
    {
      regcache_collect (ARM_PC_REGNUM, (char *) &inferior_registers.r_pc);
      regcache_collect (ARM_PS_REGNUM, (char *) &inferior_registers.r_cpsr);
    }
  else
    {
      unsigned pc_val;
      unsigned psr_val;

      regcache_collect (ARM_PC_REGNUM, (char *) &pc_val);
      regcache_collect (ARM_PS_REGNUM, (char *) &psr_val);
	  
      pc_val = ADDR_BITS_REMOVE (pc_val);
      psr_val ^= ADDR_BITS_REMOVE (psr_val);

      inferior_registers.r_pc = pc_val | psr_val;
    }

  ret = ptrace (PT_SETREGS, PIDGET (inferior_ptid),
		(PTRACE_ARG3_TYPE) &inferior_registers, 0);

  if (ret < 0)
    warning ("unable to store general registers");
}

static void
store_fp_register (int regno)
{
  struct fpreg inferior_fp_registers;
  int ret;

  ret = ptrace (PT_GETFPREGS, PIDGET (inferior_ptid),
		(PTRACE_ARG3_TYPE) &inferior_fp_registers, 0);

  if (ret < 0)
    {
      warning ("unable to fetch floating-point registers");
      return;
    }

  switch (regno)
    {
    case ARM_FPS_REGNUM:
      regcache_collect (ARM_FPS_REGNUM,
			(char *) &inferior_fp_registers.fpr_fpsr);
      break;

    default:
      regcache_collect
	(regno, (char *) &inferior_fp_registers.fpr[regno - ARM_F0_REGNUM]);
      break;
    }

  ret = ptrace (PT_SETFPREGS, PIDGET (inferior_ptid),
		(PTRACE_ARG3_TYPE) &inferior_fp_registers, 0);

  if (ret < 0)
    warning ("unable to write register %d to inferior", regno);
}

static void
store_fp_regs (void)
{
  struct fpreg inferior_fp_registers;
  int ret;
  int regno;


  for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
    regcache_collect
      (regno, (char *) &inferior_fp_registers.fpr[regno - ARM_F0_REGNUM]);

  regcache_collect (ARM_FPS_REGNUM, (char *) &inferior_fp_registers.fpr_fpsr);

  ret = ptrace (PT_SETFPREGS, PIDGET (inferior_ptid),
		(PTRACE_ARG3_TYPE) &inferior_fp_registers, 0);

  if (ret < 0)
    warning ("unable to store floating-point registers");
}

void
store_inferior_registers (int regno)
{
  if (regno >= 0)
    {
      if (regno < ARM_F0_REGNUM || regno > ARM_FPS_REGNUM)
	store_register (regno);
      else
	store_fp_register (regno);
    }
  else
    {
      store_regs ();
      store_fp_regs ();
    }
}

struct md_core
{
  struct reg intreg;
  struct fpreg freg;
};

static void
fetch_core_registers (char *core_reg_sect, unsigned core_reg_size,
		      int which, CORE_ADDR ignore)
{
  struct md_core *core_reg = (struct md_core *) core_reg_sect;
  int regno;
  CORE_ADDR r_pc;

  supply_gregset (&core_reg->intreg);
  supply_fparegset (&core_reg->freg);
}

static void
fetch_elfcore_registers (char *core_reg_sect, unsigned core_reg_size,
			 int which, CORE_ADDR ignore)
{
  struct reg gregset;
  struct fpreg fparegset;

  switch (which)
    {
    case 0:	/* Integer registers.  */
      if (core_reg_size != sizeof (struct reg))
	warning ("wrong size of register set in core file");
      else
	{
	  /* The memcpy may be unnecessary, but we can't really be sure
	     of the alignment of the data in the core file.  */
	  memcpy (&gregset, core_reg_sect, sizeof (gregset));
	  supply_gregset (&gregset);
	}
      break;

    case 2:
      if (core_reg_size != sizeof (struct fpreg))
	warning ("wrong size of FPA register set in core file");
      else
	{
	  /* The memcpy may be unnecessary, but we can't really be sure
	     of the alignment of the data in the core file.  */
	  memcpy (&fparegset, core_reg_sect, sizeof (fparegset));
	  supply_fparegset (&fparegset);
	}
      break;

    default:
      /* Don't know what kind of register request this is; just ignore it.  */
      break;
    }
}

static struct core_fns arm_netbsd_core_fns =
{
  bfd_target_unknown_flavour,		/* core_flovour.  */
  default_check_format,			/* check_format.  */
  default_core_sniffer,			/* core_sniffer.  */
  fetch_core_registers,			/* core_read_registers.  */
  NULL
};

static struct core_fns arm_netbsd_elfcore_fns =
{
  bfd_target_elf_flavour,		/* core_flovour.  */
  default_check_format,			/* check_format.  */
  default_core_sniffer,			/* core_sniffer.  */
  fetch_elfcore_registers,		/* core_read_registers.  */
  NULL
};

void
_initialize_arm_netbsd_nat (void)
{
  deprecated_add_core_fns (&arm_netbsd_core_fns);
  deprecated_add_core_fns (&arm_netbsd_elfcore_fns);
}
Commit	Line	Data
e7a42bc8	1	/* Native-dependent code for BSD Unix running on ARM's, for GDB.
34e8f22d RE	2	Copyright 1988, 1989, 1991, 1992, 1994, 1996, 1999, 2002
34e8f22d RE	3	Free Software Foundation, Inc.
e7a42bc8 FN	4
	5	This file is part of GDB.
	6
	7	This program is free software; you can redistribute it and/or modify
	8	it under the terms of the GNU General Public License as published by
	9	the Free Software Foundation; either version 2 of the License, or
	10	(at your option) any later version.
	11
	12	This program is distributed in the hope that it will be useful,
	13	but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	GNU General Public License for more details.
	16
	17	You should have received a copy of the GNU General Public License
	18	along with this program; if not, write to the Free Software
	19	Foundation, Inc., 59 Temple Place - Suite 330,
	20	Boston, MA 02111-1307, USA. */
	21
	22	#include "defs.h"
	23
3e56fc4b RE	24	#ifndef FETCH_INFERIOR_REGISTERS
	25	#error Not FETCH_INFERIOR_REGISTERS
	26	#endif /* !FETCH_INFERIOR_REGISTERS */
	27
34e8f22d RE	28	#include "arm-tdep.h"
34e8f22d RE	29
e7a42bc8 FN	30	#include <sys/types.h>
	31	#include <sys/ptrace.h>
	32	#include <machine/reg.h>
	33	#include <machine/frame.h>
	34	#include "inferior.h"
97e03143	35	#include "regcache.h"
3e56fc4b	36	#include "gdbcore.h"
e7a42bc8	37
47221191 RE	38	extern int arm_apcs_32;
47221191 RE	39
b34db576 RE	40	static void
	41	supply_gregset (struct reg *gregset)
	42	{
	43	int regno;
	44	CORE_ADDR r_pc;
	45
	46	/* Integer registers. */
	47	for (regno = ARM_A1_REGNUM; regno < ARM_SP_REGNUM; regno++)
23a6d369	48	regcache_raw_supply (current_regcache, regno, (char *) &gregset->r[regno]);
b34db576	49
23a6d369 AC	50	regcache_raw_supply (current_regcache, ARM_SP_REGNUM,
	51	(char *) &gregset->r_sp);
	52	regcache_raw_supply (current_regcache, ARM_LR_REGNUM,
	53	(char *) &gregset->r_lr);
b34db576 RE	54	/* This is ok: we're running native... */
b34db576 RE	55	r_pc = ADDR_BITS_REMOVE (gregset->r_pc);
23a6d369	56	regcache_raw_supply (current_regcache, ARM_PC_REGNUM, (char *) &r_pc);
b34db576 RE	57
b34db576 RE	58	if (arm_apcs_32)
23a6d369 AC	59	regcache_raw_supply (current_regcache, ARM_PS_REGNUM,
23a6d369 AC	60	(char *) &gregset->r_cpsr);
b34db576	61	else
23a6d369 AC	62	regcache_raw_supply (current_regcache, ARM_PS_REGNUM,
23a6d369 AC	63	(char *) &gregset->r_pc);
b34db576 RE	64	}
	65
	66	static void
	67	supply_fparegset (struct fpreg *fparegset)
	68	{
	69	int regno;
	70
	71	for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
23a6d369 AC	72	regcache_raw_supply (current_regcache, regno,
23a6d369 AC	73	(char *) &fparegset->fpr[regno - ARM_F0_REGNUM]);
b34db576	74
23a6d369 AC	75	regcache_raw_supply (current_regcache, ARM_FPS_REGNUM,
23a6d369 AC	76	(char *) &fparegset->fpr_fpsr);
b34db576 RE	77	}
b34db576 RE	78
47221191 RE	79	static void
	80	fetch_register (int regno)
	81	{
	82	struct reg inferior_registers;
	83	int ret;
	84
	85	ret = ptrace (PT_GETREGS, PIDGET (inferior_ptid),
	86	(PTRACE_ARG3_TYPE) &inferior_registers, 0);
	87
	88	if (ret < 0)
	89	{
	90	warning ("unable to fetch general register");
	91	return;
	92	}
	93
	94	switch (regno)
	95	{
	96	case ARM_SP_REGNUM:
23a6d369 AC	97	regcache_raw_supply (current_regcache, ARM_SP_REGNUM,
23a6d369 AC	98	(char *) &inferior_registers.r_sp);
47221191 RE	99	break;
	100
	101	case ARM_LR_REGNUM:
23a6d369 AC	102	regcache_raw_supply (current_regcache, ARM_LR_REGNUM,
23a6d369 AC	103	(char *) &inferior_registers.r_lr);
47221191 RE	104	break;
	105
	106	case ARM_PC_REGNUM:
	107	/* This is ok: we're running native... */
	108	inferior_registers.r_pc = ADDR_BITS_REMOVE (inferior_registers.r_pc);
23a6d369 AC	109	regcache_raw_supply (current_regcache, ARM_PC_REGNUM,
23a6d369 AC	110	(char *) &inferior_registers.r_pc);
47221191 RE	111	break;
	112
	113	case ARM_PS_REGNUM:
	114	if (arm_apcs_32)
23a6d369 AC	115	regcache_raw_supply (current_regcache, ARM_PS_REGNUM,
23a6d369 AC	116	(char *) &inferior_registers.r_cpsr);
47221191	117	else
23a6d369 AC	118	regcache_raw_supply (current_regcache, ARM_PS_REGNUM,
23a6d369 AC	119	(char *) &inferior_registers.r_pc);
47221191 RE	120	break;
	121
	122	default:
23a6d369 AC	123	regcache_raw_supply (current_regcache, regno,
23a6d369 AC	124	(char *) &inferior_registers.r[regno]);
47221191 RE	125	break;
	126	}
	127	}
	128
	129	static void
3e56fc4b	130	fetch_regs (void)
e7a42bc8 FN	131	{
e7a42bc8 FN	132	struct reg inferior_registers;
47221191 RE	133	int ret;
	134	int regno;
	135
	136	ret = ptrace (PT_GETREGS, PIDGET (inferior_ptid),
	137	(PTRACE_ARG3_TYPE) &inferior_registers, 0);
	138
	139	if (ret < 0)
	140	{
	141	warning ("unable to fetch general registers");
	142	return;
	143	}
	144
b34db576	145	supply_gregset (&inferior_registers);
47221191 RE	146	}
	147
	148	static void
	149	fetch_fp_register (int regno)
	150	{
	151	struct fpreg inferior_fp_registers;
	152	int ret;
	153
	154	ret = ptrace (PT_GETFPREGS, PIDGET (inferior_ptid),
	155	(PTRACE_ARG3_TYPE) &inferior_fp_registers, 0);
	156
	157	if (ret < 0)
	158	{
	159	warning ("unable to fetch floating-point register");
	160	return;
	161	}
	162
	163	switch (regno)
	164	{
	165	case ARM_FPS_REGNUM:
23a6d369 AC	166	regcache_raw_supply (current_regcache, ARM_FPS_REGNUM,
23a6d369 AC	167	(char *) &inferior_fp_registers.fpr_fpsr);
47221191 RE	168	break;
	169
	170	default:
23a6d369 AC	171	regcache_raw_supply (current_regcache, regno,
23a6d369 AC	172	(char *) &inferior_fp_registers.fpr[regno - ARM_F0_REGNUM]);
47221191 RE	173	break;
	174	}
	175	}
	176
	177	static void
3e56fc4b	178	fetch_fp_regs (void)
47221191 RE	179	{
	180	struct fpreg inferior_fp_registers;
	181	int ret;
	182	int regno;
	183
	184	ret = ptrace (PT_GETFPREGS, PIDGET (inferior_ptid),
	185	(PTRACE_ARG3_TYPE) &inferior_fp_registers, 0);
	186
	187	if (ret < 0)
	188	{
	189	warning ("unable to fetch general registers");
	190	return;
	191	}
	192
b34db576	193	supply_fparegset (&inferior_fp_registers);
e7a42bc8 FN	194	}
	195
	196	void
47221191 RE	197	fetch_inferior_registers (int regno)
	198	{
	199	if (regno >= 0)
	200	{
	201	if (regno < ARM_F0_REGNUM \|\| regno > ARM_FPS_REGNUM)
	202	fetch_register (regno);
	203	else
	204	fetch_fp_register (regno);
	205	}
	206	else
	207	{
	208	fetch_regs ();
	209	fetch_fp_regs ();
	210	}
	211	}
	212
	213
	214	static void
	215	store_register (int regno)
e7a42bc8 FN	216	{
e7a42bc8 FN	217	struct reg inferior_registers;
47221191 RE	218	int ret;
	219
	220	ret = ptrace (PT_GETREGS, PIDGET (inferior_ptid),
	221	(PTRACE_ARG3_TYPE) &inferior_registers, 0);
	222
	223	if (ret < 0)
	224	{
	225	warning ("unable to fetch general registers");
	226	return;
	227	}
	228
	229	switch (regno)
	230	{
	231	case ARM_SP_REGNUM:
	232	regcache_collect (ARM_SP_REGNUM, (char *) &inferior_registers.r_sp);
	233	break;
	234
	235	case ARM_LR_REGNUM:
	236	regcache_collect (ARM_LR_REGNUM, (char *) &inferior_registers.r_lr);
	237	break;
e7a42bc8	238
47221191 RE	239	case ARM_PC_REGNUM:
	240	if (arm_apcs_32)
	241	regcache_collect (ARM_PC_REGNUM, (char *) &inferior_registers.r_pc);
	242	else
	243	{
	244	unsigned pc_val;
e7a42bc8	245
47221191 RE	246	regcache_collect (ARM_PC_REGNUM, (char *) &pc_val);
	247
	248	pc_val = ADDR_BITS_REMOVE (pc_val);
	249	inferior_registers.r_pc
	250	^= ADDR_BITS_REMOVE (inferior_registers.r_pc);
	251	inferior_registers.r_pc \|= pc_val;
	252	}
	253	break;
	254
	255	case ARM_PS_REGNUM:
	256	if (arm_apcs_32)
	257	regcache_collect (ARM_PS_REGNUM, (char *) &inferior_registers.r_cpsr);
	258	else
	259	{
	260	unsigned psr_val;
	261
	262	regcache_collect (ARM_PS_REGNUM, (char *) &psr_val);
	263
	264	psr_val ^= ADDR_BITS_REMOVE (psr_val);
	265	inferior_registers.r_pc = ADDR_BITS_REMOVE (inferior_registers.r_pc);
	266	inferior_registers.r_pc \|= psr_val;
	267	}
	268	break;
	269
	270	default:
	271	regcache_collect (regno, (char *) &inferior_registers.r[regno]);
	272	break;
	273	}
	274
	275	ret = ptrace (PT_SETREGS, PIDGET (inferior_ptid),
	276	(PTRACE_ARG3_TYPE) &inferior_registers, 0);
	277
	278	if (ret < 0)
	279	warning ("unable to write register %d to inferior", regno);
	280	}
	281
	282	static void
3e56fc4b	283	store_regs (void)
47221191 RE	284	{
	285	struct reg inferior_registers;
	286	int ret;
	287	int regno;
	288
	289
	290	for (regno = ARM_A1_REGNUM; regno < ARM_SP_REGNUM; regno++)
	291	regcache_collect (regno, (char *) &inferior_registers.r[regno]);
	292
	293	regcache_collect (ARM_SP_REGNUM, (char *) &inferior_registers.r_sp);
	294	regcache_collect (ARM_LR_REGNUM, (char *) &inferior_registers.r_lr);
	295
	296	if (arm_apcs_32)
	297	{
	298	regcache_collect (ARM_PC_REGNUM, (char *) &inferior_registers.r_pc);
	299	regcache_collect (ARM_PS_REGNUM, (char *) &inferior_registers.r_cpsr);
	300	}
	301	else
	302	{
	303	unsigned pc_val;
	304	unsigned psr_val;
	305
	306	regcache_collect (ARM_PC_REGNUM, (char *) &pc_val);
	307	regcache_collect (ARM_PS_REGNUM, (char *) &psr_val);
	308
	309	pc_val = ADDR_BITS_REMOVE (pc_val);
	310	psr_val ^= ADDR_BITS_REMOVE (psr_val);
	311
	312	inferior_registers.r_pc = pc_val \| psr_val;
	313	}
	314
	315	ret = ptrace (PT_SETREGS, PIDGET (inferior_ptid),
	316	(PTRACE_ARG3_TYPE) &inferior_registers, 0);
	317
	318	if (ret < 0)
	319	warning ("unable to store general registers");
	320	}
	321
	322	static void
	323	store_fp_register (int regno)
	324	{
	325	struct fpreg inferior_fp_registers;
	326	int ret;
	327
	328	ret = ptrace (PT_GETFPREGS, PIDGET (inferior_ptid),
	329	(PTRACE_ARG3_TYPE) &inferior_fp_registers, 0);
	330
	331	if (ret < 0)
	332	{
	333	warning ("unable to fetch floating-point registers");
	334	return;
	335	}
	336
	337	switch (regno)
	338	{
	339	case ARM_FPS_REGNUM:
	340	regcache_collect (ARM_FPS_REGNUM,
	341	(char *) &inferior_fp_registers.fpr_fpsr);
	342	break;
	343
	344	default:
	345	regcache_collect
	346	(regno, (char *) &inferior_fp_registers.fpr[regno - ARM_F0_REGNUM]);
	347	break;
348	}
349
350	ret = ptrace (PT_SETFPREGS, PIDGET (inferior_ptid),
351	(PTRACE_ARG3_TYPE) &inferior_fp_registers, 0);
352
353	if (ret < 0)
354	warning ("unable to write register %d to inferior", regno);
355	}
356
357	static void
3e56fc4b	358	store_fp_regs (void)
47221191 RE	359	{
	360	struct fpreg inferior_fp_registers;
	361	int ret;
	362	int regno;
	363
	364
	365	for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
	366	regcache_collect
	367	(regno, (char *) &inferior_fp_registers.fpr[regno - ARM_F0_REGNUM]);
	368
	369	regcache_collect (ARM_FPS_REGNUM, (char *) &inferior_fp_registers.fpr_fpsr);
	370
	371	ret = ptrace (PT_SETFPREGS, PIDGET (inferior_ptid),
	372	(PTRACE_ARG3_TYPE) &inferior_fp_registers, 0);
	373
	374	if (ret < 0)
	375	warning ("unable to store floating-point registers");
	376	}
	377
	378	void
	379	store_inferior_registers (int regno)
	380	{
	381	if (regno >= 0)
	382	{
	383	if (regno < ARM_F0_REGNUM \|\| regno > ARM_FPS_REGNUM)
	384	store_register (regno);
	385	else
	386	store_fp_register (regno);
	387	}
	388	else
	389	{
	390	store_regs ();
	391	store_fp_regs ();
	392	}
e7a42bc8 FN	393	}
	394
	395	struct md_core
	396	{
	397	struct reg intreg;
	398	struct fpreg freg;
	399	};
	400
3e56fc4b	401	static void
47221191 RE	402	fetch_core_registers (char *core_reg_sect, unsigned core_reg_size,
47221191 RE	403	int which, CORE_ADDR ignore)
e7a42bc8 FN	404	{
e7a42bc8 FN	405	struct md_core core_reg = (struct md_core ) core_reg_sect;
3e56fc4b RE	406	int regno;
3e56fc4b RE	407	CORE_ADDR r_pc;
3e56fc4b	408
b34db576 RE	409	supply_gregset (&core_reg->intreg);
	410	supply_fparegset (&core_reg->freg);
	411	}
3e56fc4b	412
b34db576 RE	413	static void
	414	fetch_elfcore_registers (char *core_reg_sect, unsigned core_reg_size,
	415	int which, CORE_ADDR ignore)
	416	{
	417	struct reg gregset;
	418	struct fpreg fparegset;
e7a42bc8	419
b34db576 RE	420	switch (which)
	421	{
	422	case 0: /* Integer registers. */
	423	if (core_reg_size != sizeof (struct reg))
	424	warning ("wrong size of register set in core file");
	425	else
	426	{
	427	/* The memcpy may be unnecessary, but we can't really be sure
	428	of the alignment of the data in the core file. */
	429	memcpy (&gregset, core_reg_sect, sizeof (gregset));
	430	supply_gregset (&gregset);
	431	}
	432	break;
	433
	434	case 2:
	435	if (core_reg_size != sizeof (struct fpreg))
	436	warning ("wrong size of FPA register set in core file");
	437	else
	438	{
	439	/* The memcpy may be unnecessary, but we can't really be sure
	440	of the alignment of the data in the core file. */
	441	memcpy (&fparegset, core_reg_sect, sizeof (fparegset));
	442	supply_fparegset (&fparegset);
	443	}
	444	break;
3e56fc4b	445
b34db576 RE	446	default:
	447	/* Don't know what kind of register request this is; just ignore it. */
	448	break;
	449	}
e7a42bc8 FN	450	}
e7a42bc8 FN	451
3e56fc4b RE	452	static struct core_fns arm_netbsd_core_fns =
	453	{
	454	bfd_target_unknown_flavour, /* core_flovour. */
	455	default_check_format, /* check_format. */
	456	default_core_sniffer, /* core_sniffer. */
	457	fetch_core_registers, /* core_read_registers. */
	458	NULL
	459	};
	460
b34db576 RE	461	static struct core_fns arm_netbsd_elfcore_fns =
	462	{
	463	bfd_target_elf_flavour, /* core_flovour. */
	464	default_check_format, /* check_format. */
	465	default_core_sniffer, /* core_sniffer. */
	466	fetch_elfcore_registers, /* core_read_registers. */
	467	NULL
	468	};
	469
3e56fc4b RE	470	void
	471	_initialize_arm_netbsd_nat (void)
	472	{
00e32a35 AC	473	deprecated_add_core_fns (&arm_netbsd_core_fns);
00e32a35 AC	474	deprecated_add_core_fns (&arm_netbsd_elfcore_fns);
3e56fc4b	475	}