Commit | Line | Data |
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8818c391 | 1 | /* Target-dependent code for Atmel AVR, for GDB. |
0fd88904 | 2 | |
6aba47ca | 3 | Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, |
0fb0cc75 | 4 | 2006, 2007, 2008, 2009 Free Software Foundation, Inc. |
8818c391 TR |
5 | |
6 | This file is part of GDB. | |
7 | ||
8 | This program is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 10 | the Free Software Foundation; either version 3 of the License, or |
8818c391 TR |
11 | (at your option) any later version. |
12 | ||
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
a9762ec7 | 19 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
8818c391 | 20 | |
de18ac1f | 21 | /* Contributed by Theodore A. Roth, troth@openavr.org */ |
8818c391 TR |
22 | |
23 | /* Portions of this file were taken from the original gdb-4.18 patch developed | |
24 | by Denis Chertykov, denisc@overta.ru */ | |
25 | ||
26 | #include "defs.h" | |
4add8633 TR |
27 | #include "frame.h" |
28 | #include "frame-unwind.h" | |
29 | #include "frame-base.h" | |
30 | #include "trad-frame.h" | |
8818c391 TR |
31 | #include "gdbcmd.h" |
32 | #include "gdbcore.h" | |
e6bb342a | 33 | #include "gdbtypes.h" |
8818c391 TR |
34 | #include "inferior.h" |
35 | #include "symfile.h" | |
36 | #include "arch-utils.h" | |
37 | #include "regcache.h" | |
5f8a3188 | 38 | #include "gdb_string.h" |
a89aa300 | 39 | #include "dis-asm.h" |
8818c391 TR |
40 | |
41 | /* AVR Background: | |
42 | ||
43 | (AVR micros are pure Harvard Architecture processors.) | |
44 | ||
45 | The AVR family of microcontrollers have three distinctly different memory | |
46 | spaces: flash, sram and eeprom. The flash is 16 bits wide and is used for | |
47 | the most part to store program instructions. The sram is 8 bits wide and is | |
48 | used for the stack and the heap. Some devices lack sram and some can have | |
49 | an additional external sram added on as a peripheral. | |
50 | ||
51 | The eeprom is 8 bits wide and is used to store data when the device is | |
52 | powered down. Eeprom is not directly accessible, it can only be accessed | |
53 | via io-registers using a special algorithm. Accessing eeprom via gdb's | |
54 | remote serial protocol ('m' or 'M' packets) looks difficult to do and is | |
55 | not included at this time. | |
56 | ||
57 | [The eeprom could be read manually via ``x/b <eaddr + AVR_EMEM_START>'' or | |
58 | written using ``set {unsigned char}<eaddr + AVR_EMEM_START>''. For this to | |
59 | work, the remote target must be able to handle eeprom accesses and perform | |
60 | the address translation.] | |
61 | ||
62 | All three memory spaces have physical addresses beginning at 0x0. In | |
63 | addition, the flash is addressed by gcc/binutils/gdb with respect to 8 bit | |
64 | bytes instead of the 16 bit wide words used by the real device for the | |
65 | Program Counter. | |
66 | ||
67 | In order for remote targets to work correctly, extra bits must be added to | |
68 | addresses before they are send to the target or received from the target | |
69 | via the remote serial protocol. The extra bits are the MSBs and are used to | |
70 | decode which memory space the address is referring to. */ | |
71 | ||
72 | #undef XMALLOC | |
73 | #define XMALLOC(TYPE) ((TYPE*) xmalloc (sizeof (TYPE))) | |
74 | ||
8818c391 TR |
75 | /* Constants: prefixed with AVR_ to avoid name space clashes */ |
76 | ||
77 | enum | |
2e5ff58c TR |
78 | { |
79 | AVR_REG_W = 24, | |
80 | AVR_REG_X = 26, | |
81 | AVR_REG_Y = 28, | |
82 | AVR_FP_REGNUM = 28, | |
83 | AVR_REG_Z = 30, | |
84 | ||
85 | AVR_SREG_REGNUM = 32, | |
86 | AVR_SP_REGNUM = 33, | |
87 | AVR_PC_REGNUM = 34, | |
88 | ||
89 | AVR_NUM_REGS = 32 + 1 /*SREG*/ + 1 /*SP*/ + 1 /*PC*/, | |
90 | AVR_NUM_REG_BYTES = 32 + 1 /*SREG*/ + 2 /*SP*/ + 4 /*PC*/, | |
91 | ||
92 | AVR_PC_REG_INDEX = 35, /* index into array of registers */ | |
93 | ||
4add8633 | 94 | AVR_MAX_PROLOGUE_SIZE = 64, /* bytes */ |
2e5ff58c TR |
95 | |
96 | /* Count of pushed registers. From r2 to r17 (inclusively), r28, r29 */ | |
97 | AVR_MAX_PUSHES = 18, | |
98 | ||
99 | /* Number of the last pushed register. r17 for current avr-gcc */ | |
100 | AVR_LAST_PUSHED_REGNUM = 17, | |
101 | ||
4add8633 TR |
102 | AVR_ARG1_REGNUM = 24, /* Single byte argument */ |
103 | AVR_ARGN_REGNUM = 25, /* Multi byte argments */ | |
104 | ||
105 | AVR_RET1_REGNUM = 24, /* Single byte return value */ | |
106 | AVR_RETN_REGNUM = 25, /* Multi byte return value */ | |
107 | ||
2e5ff58c TR |
108 | /* FIXME: TRoth/2002-01-??: Can we shift all these memory masks left 8 |
109 | bits? Do these have to match the bfd vma values?. It sure would make | |
110 | things easier in the future if they didn't need to match. | |
111 | ||
112 | Note: I chose these values so as to be consistent with bfd vma | |
113 | addresses. | |
114 | ||
115 | TRoth/2002-04-08: There is already a conflict with very large programs | |
116 | in the mega128. The mega128 has 128K instruction bytes (64K words), | |
117 | thus the Most Significant Bit is 0x10000 which gets masked off my | |
118 | AVR_MEM_MASK. | |
119 | ||
120 | The problem manifests itself when trying to set a breakpoint in a | |
121 | function which resides in the upper half of the instruction space and | |
122 | thus requires a 17-bit address. | |
123 | ||
124 | For now, I've just removed the EEPROM mask and changed AVR_MEM_MASK | |
125 | from 0x00ff0000 to 0x00f00000. Eeprom is not accessible from gdb yet, | |
126 | but could be for some remote targets by just adding the correct offset | |
127 | to the address and letting the remote target handle the low-level | |
128 | details of actually accessing the eeprom. */ | |
129 | ||
130 | AVR_IMEM_START = 0x00000000, /* INSN memory */ | |
131 | AVR_SMEM_START = 0x00800000, /* SRAM memory */ | |
8818c391 | 132 | #if 1 |
2e5ff58c TR |
133 | /* No eeprom mask defined */ |
134 | AVR_MEM_MASK = 0x00f00000, /* mask to determine memory space */ | |
8818c391 | 135 | #else |
2e5ff58c TR |
136 | AVR_EMEM_START = 0x00810000, /* EEPROM memory */ |
137 | AVR_MEM_MASK = 0x00ff0000, /* mask to determine memory space */ | |
8818c391 | 138 | #endif |
2e5ff58c | 139 | }; |
8818c391 | 140 | |
4add8633 TR |
141 | /* Prologue types: |
142 | ||
143 | NORMAL and CALL are the typical types (the -mcall-prologues gcc option | |
144 | causes the generation of the CALL type prologues). */ | |
145 | ||
146 | enum { | |
147 | AVR_PROLOGUE_NONE, /* No prologue */ | |
148 | AVR_PROLOGUE_NORMAL, | |
149 | AVR_PROLOGUE_CALL, /* -mcall-prologues */ | |
150 | AVR_PROLOGUE_MAIN, | |
151 | AVR_PROLOGUE_INTR, /* interrupt handler */ | |
152 | AVR_PROLOGUE_SIG, /* signal handler */ | |
153 | }; | |
154 | ||
8818c391 TR |
155 | /* Any function with a frame looks like this |
156 | ....... <-SP POINTS HERE | |
157 | LOCALS1 <-FP POINTS HERE | |
158 | LOCALS0 | |
159 | SAVED FP | |
160 | SAVED R3 | |
161 | SAVED R2 | |
162 | RET PC | |
163 | FIRST ARG | |
164 | SECOND ARG */ | |
165 | ||
4add8633 | 166 | struct avr_unwind_cache |
2e5ff58c | 167 | { |
4add8633 TR |
168 | /* The previous frame's inner most stack address. Used as this |
169 | frame ID's stack_addr. */ | |
170 | CORE_ADDR prev_sp; | |
171 | /* The frame's base, optionally used by the high-level debug info. */ | |
172 | CORE_ADDR base; | |
173 | int size; | |
174 | int prologue_type; | |
175 | /* Table indicating the location of each and every register. */ | |
176 | struct trad_frame_saved_reg *saved_regs; | |
2e5ff58c | 177 | }; |
8818c391 TR |
178 | |
179 | struct gdbarch_tdep | |
2e5ff58c | 180 | { |
4e99ad69 TG |
181 | /* Number of bytes stored to the stack by call instructions. |
182 | 2 bytes for avr1-5, 3 bytes for avr6. */ | |
183 | int call_length; | |
2e5ff58c | 184 | }; |
8818c391 TR |
185 | |
186 | /* Lookup the name of a register given it's number. */ | |
187 | ||
fa88f677 | 188 | static const char * |
d93859e2 | 189 | avr_register_name (struct gdbarch *gdbarch, int regnum) |
8818c391 | 190 | { |
4e99ad69 | 191 | static const char * const register_names[] = { |
2e5ff58c TR |
192 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", |
193 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", | |
8818c391 TR |
194 | "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", |
195 | "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", | |
196 | "SREG", "SP", "PC" | |
197 | }; | |
198 | if (regnum < 0) | |
199 | return NULL; | |
200 | if (regnum >= (sizeof (register_names) / sizeof (*register_names))) | |
201 | return NULL; | |
202 | return register_names[regnum]; | |
203 | } | |
204 | ||
8818c391 TR |
205 | /* Return the GDB type object for the "standard" data type |
206 | of data in register N. */ | |
207 | ||
208 | static struct type * | |
866b76ea | 209 | avr_register_type (struct gdbarch *gdbarch, int reg_nr) |
8818c391 | 210 | { |
866b76ea | 211 | if (reg_nr == AVR_PC_REGNUM) |
df4df182 | 212 | return builtin_type (gdbarch)->builtin_uint32; |
866b76ea | 213 | if (reg_nr == AVR_SP_REGNUM) |
0dfff4cb | 214 | return builtin_type (gdbarch)->builtin_data_ptr; |
866b76ea | 215 | else |
df4df182 | 216 | return builtin_type (gdbarch)->builtin_uint8; |
8818c391 TR |
217 | } |
218 | ||
219 | /* Instruction address checks and convertions. */ | |
220 | ||
221 | static CORE_ADDR | |
222 | avr_make_iaddr (CORE_ADDR x) | |
223 | { | |
224 | return ((x) | AVR_IMEM_START); | |
225 | } | |
226 | ||
8818c391 TR |
227 | /* FIXME: TRoth: Really need to use a larger mask for instructions. Some |
228 | devices are already up to 128KBytes of flash space. | |
229 | ||
230 | TRoth/2002-04-8: See comment above where AVR_IMEM_START is defined. */ | |
231 | ||
232 | static CORE_ADDR | |
233 | avr_convert_iaddr_to_raw (CORE_ADDR x) | |
234 | { | |
235 | return ((x) & 0xffffffff); | |
236 | } | |
237 | ||
238 | /* SRAM address checks and convertions. */ | |
239 | ||
240 | static CORE_ADDR | |
241 | avr_make_saddr (CORE_ADDR x) | |
242 | { | |
243 | return ((x) | AVR_SMEM_START); | |
244 | } | |
245 | ||
8818c391 TR |
246 | static CORE_ADDR |
247 | avr_convert_saddr_to_raw (CORE_ADDR x) | |
248 | { | |
249 | return ((x) & 0xffffffff); | |
250 | } | |
251 | ||
252 | /* EEPROM address checks and convertions. I don't know if these will ever | |
253 | actually be used, but I've added them just the same. TRoth */ | |
254 | ||
255 | /* TRoth/2002-04-08: Commented out for now to allow fix for problem with large | |
256 | programs in the mega128. */ | |
257 | ||
258 | /* static CORE_ADDR */ | |
259 | /* avr_make_eaddr (CORE_ADDR x) */ | |
260 | /* { */ | |
261 | /* return ((x) | AVR_EMEM_START); */ | |
262 | /* } */ | |
263 | ||
264 | /* static int */ | |
265 | /* avr_eaddr_p (CORE_ADDR x) */ | |
266 | /* { */ | |
267 | /* return (((x) & AVR_MEM_MASK) == AVR_EMEM_START); */ | |
268 | /* } */ | |
269 | ||
270 | /* static CORE_ADDR */ | |
271 | /* avr_convert_eaddr_to_raw (CORE_ADDR x) */ | |
272 | /* { */ | |
273 | /* return ((x) & 0xffffffff); */ | |
274 | /* } */ | |
275 | ||
276 | /* Convert from address to pointer and vice-versa. */ | |
277 | ||
278 | static void | |
9898f801 UW |
279 | avr_address_to_pointer (struct gdbarch *gdbarch, |
280 | struct type *type, gdb_byte *buf, CORE_ADDR addr) | |
8818c391 | 281 | { |
e17a4113 UW |
282 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
283 | ||
8818c391 TR |
284 | /* Is it a code address? */ |
285 | if (TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC | |
286 | || TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_METHOD) | |
287 | { | |
e17a4113 | 288 | store_unsigned_integer (buf, TYPE_LENGTH (type), byte_order, |
4ea2465e | 289 | avr_convert_iaddr_to_raw (addr >> 1)); |
8818c391 TR |
290 | } |
291 | else | |
292 | { | |
293 | /* Strip off any upper segment bits. */ | |
e17a4113 | 294 | store_unsigned_integer (buf, TYPE_LENGTH (type), byte_order, |
2e5ff58c | 295 | avr_convert_saddr_to_raw (addr)); |
8818c391 TR |
296 | } |
297 | } | |
298 | ||
299 | static CORE_ADDR | |
9898f801 UW |
300 | avr_pointer_to_address (struct gdbarch *gdbarch, |
301 | struct type *type, const gdb_byte *buf) | |
8818c391 | 302 | { |
e17a4113 UW |
303 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
304 | CORE_ADDR addr | |
305 | = extract_unsigned_integer (buf, TYPE_LENGTH (type), byte_order); | |
8818c391 | 306 | |
8818c391 TR |
307 | /* Is it a code address? */ |
308 | if (TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC | |
309 | || TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_METHOD | |
2e5ff58c | 310 | || TYPE_CODE_SPACE (TYPE_TARGET_TYPE (type))) |
4ea2465e | 311 | return avr_make_iaddr (addr << 1); |
8818c391 TR |
312 | else |
313 | return avr_make_saddr (addr); | |
314 | } | |
315 | ||
316 | static CORE_ADDR | |
61a1198a | 317 | avr_read_pc (struct regcache *regcache) |
8818c391 | 318 | { |
8619218d | 319 | ULONGEST pc; |
61a1198a UW |
320 | regcache_cooked_read_unsigned (regcache, AVR_PC_REGNUM, &pc); |
321 | return avr_make_iaddr (pc); | |
8818c391 TR |
322 | } |
323 | ||
324 | static void | |
61a1198a | 325 | avr_write_pc (struct regcache *regcache, CORE_ADDR val) |
8818c391 | 326 | { |
61a1198a UW |
327 | regcache_cooked_write_unsigned (regcache, AVR_PC_REGNUM, |
328 | avr_convert_iaddr_to_raw (val)); | |
8818c391 TR |
329 | } |
330 | ||
4add8633 | 331 | /* Function: avr_scan_prologue |
8818c391 | 332 | |
4add8633 | 333 | This function decodes an AVR function prologue to determine: |
8818c391 TR |
334 | 1) the size of the stack frame |
335 | 2) which registers are saved on it | |
336 | 3) the offsets of saved regs | |
4add8633 | 337 | This information is stored in the avr_unwind_cache structure. |
8818c391 | 338 | |
e3d8b004 TR |
339 | Some devices lack the sbiw instruction, so on those replace this: |
340 | sbiw r28, XX | |
341 | with this: | |
342 | subi r28,lo8(XX) | |
343 | sbci r29,hi8(XX) | |
344 | ||
345 | A typical AVR function prologue with a frame pointer might look like this: | |
346 | push rXX ; saved regs | |
347 | ... | |
348 | push r28 | |
349 | push r29 | |
350 | in r28,__SP_L__ | |
351 | in r29,__SP_H__ | |
352 | sbiw r28,<LOCALS_SIZE> | |
353 | in __tmp_reg__,__SREG__ | |
8818c391 | 354 | cli |
e3d8b004 | 355 | out __SP_H__,r29 |
72fab697 TR |
356 | out __SREG__,__tmp_reg__ |
357 | out __SP_L__,r28 | |
e3d8b004 TR |
358 | |
359 | A typical AVR function prologue without a frame pointer might look like | |
360 | this: | |
361 | push rXX ; saved regs | |
362 | ... | |
363 | ||
364 | A main function prologue looks like this: | |
365 | ldi r28,lo8(<RAM_ADDR> - <LOCALS_SIZE>) | |
366 | ldi r29,hi8(<RAM_ADDR> - <LOCALS_SIZE>) | |
367 | out __SP_H__,r29 | |
368 | out __SP_L__,r28 | |
369 | ||
370 | A signal handler prologue looks like this: | |
371 | push __zero_reg__ | |
372 | push __tmp_reg__ | |
373 | in __tmp_reg__, __SREG__ | |
374 | push __tmp_reg__ | |
375 | clr __zero_reg__ | |
376 | push rXX ; save registers r18:r27, r30:r31 | |
377 | ... | |
378 | push r28 ; save frame pointer | |
379 | push r29 | |
380 | in r28, __SP_L__ | |
381 | in r29, __SP_H__ | |
382 | sbiw r28, <LOCALS_SIZE> | |
383 | out __SP_H__, r29 | |
384 | out __SP_L__, r28 | |
385 | ||
386 | A interrupt handler prologue looks like this: | |
387 | sei | |
388 | push __zero_reg__ | |
389 | push __tmp_reg__ | |
390 | in __tmp_reg__, __SREG__ | |
391 | push __tmp_reg__ | |
392 | clr __zero_reg__ | |
393 | push rXX ; save registers r18:r27, r30:r31 | |
394 | ... | |
395 | push r28 ; save frame pointer | |
396 | push r29 | |
397 | in r28, __SP_L__ | |
398 | in r29, __SP_H__ | |
399 | sbiw r28, <LOCALS_SIZE> | |
400 | cli | |
401 | out __SP_H__, r29 | |
402 | sei | |
403 | out __SP_L__, r28 | |
404 | ||
405 | A `-mcall-prologues' prologue looks like this (Note that the megas use a | |
406 | jmp instead of a rjmp, thus the prologue is one word larger since jmp is a | |
407 | 32 bit insn and rjmp is a 16 bit insn): | |
408 | ldi r26,lo8(<LOCALS_SIZE>) | |
409 | ldi r27,hi8(<LOCALS_SIZE>) | |
410 | ldi r30,pm_lo8(.L_foo_body) | |
411 | ldi r31,pm_hi8(.L_foo_body) | |
412 | rjmp __prologue_saves__+RRR | |
413 | .L_foo_body: */ | |
8818c391 | 414 | |
4add8633 TR |
415 | /* Not really part of a prologue, but still need to scan for it, is when a |
416 | function prologue moves values passed via registers as arguments to new | |
417 | registers. In this case, all local variables live in registers, so there | |
418 | may be some register saves. This is what it looks like: | |
419 | movw rMM, rNN | |
420 | ... | |
421 | ||
422 | There could be multiple movw's. If the target doesn't have a movw insn, it | |
423 | will use two mov insns. This could be done after any of the above prologue | |
424 | types. */ | |
425 | ||
426 | static CORE_ADDR | |
e17a4113 | 427 | avr_scan_prologue (struct gdbarch *gdbarch, CORE_ADDR pc_beg, CORE_ADDR pc_end, |
4e99ad69 | 428 | struct avr_unwind_cache *info) |
8818c391 | 429 | { |
e17a4113 | 430 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
2e5ff58c TR |
431 | int i; |
432 | unsigned short insn; | |
2e5ff58c | 433 | int scan_stage = 0; |
8818c391 | 434 | struct minimal_symbol *msymbol; |
8818c391 TR |
435 | unsigned char prologue[AVR_MAX_PROLOGUE_SIZE]; |
436 | int vpc = 0; | |
4e99ad69 TG |
437 | int len; |
438 | ||
439 | len = pc_end - pc_beg; | |
440 | if (len > AVR_MAX_PROLOGUE_SIZE) | |
441 | len = AVR_MAX_PROLOGUE_SIZE; | |
8818c391 | 442 | |
4add8633 TR |
443 | /* FIXME: TRoth/2003-06-11: This could be made more efficient by only |
444 | reading in the bytes of the prologue. The problem is that the figuring | |
445 | out where the end of the prologue is is a bit difficult. The old code | |
446 | tried to do that, but failed quite often. */ | |
4e99ad69 | 447 | read_memory (pc_beg, prologue, len); |
8818c391 TR |
448 | |
449 | /* Scanning main()'s prologue | |
450 | ldi r28,lo8(<RAM_ADDR> - <LOCALS_SIZE>) | |
451 | ldi r29,hi8(<RAM_ADDR> - <LOCALS_SIZE>) | |
452 | out __SP_H__,r29 | |
453 | out __SP_L__,r28 */ | |
454 | ||
4e99ad69 | 455 | if (len >= 4) |
8818c391 TR |
456 | { |
457 | CORE_ADDR locals; | |
4e99ad69 | 458 | static const unsigned char img[] = { |
2e5ff58c TR |
459 | 0xde, 0xbf, /* out __SP_H__,r29 */ |
460 | 0xcd, 0xbf /* out __SP_L__,r28 */ | |
8818c391 TR |
461 | }; |
462 | ||
e17a4113 | 463 | insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order); |
8818c391 | 464 | /* ldi r28,lo8(<RAM_ADDR> - <LOCALS_SIZE>) */ |
2e5ff58c TR |
465 | if ((insn & 0xf0f0) == 0xe0c0) |
466 | { | |
467 | locals = (insn & 0xf) | ((insn & 0x0f00) >> 4); | |
e17a4113 | 468 | insn = extract_unsigned_integer (&prologue[vpc + 2], 2, byte_order); |
2e5ff58c TR |
469 | /* ldi r29,hi8(<RAM_ADDR> - <LOCALS_SIZE>) */ |
470 | if ((insn & 0xf0f0) == 0xe0d0) | |
471 | { | |
472 | locals |= ((insn & 0xf) | ((insn & 0x0f00) >> 4)) << 8; | |
4e99ad69 TG |
473 | if (vpc + 4 + sizeof (img) < len |
474 | && memcmp (prologue + vpc + 4, img, sizeof (img)) == 0) | |
2e5ff58c | 475 | { |
4add8633 TR |
476 | info->prologue_type = AVR_PROLOGUE_MAIN; |
477 | info->base = locals; | |
4e99ad69 | 478 | return pc_beg + 4; |
2e5ff58c TR |
479 | } |
480 | } | |
481 | } | |
8818c391 | 482 | } |
2e5ff58c | 483 | |
4add8633 TR |
484 | /* Scanning `-mcall-prologues' prologue |
485 | Classic prologue is 10 bytes, mega prologue is a 12 bytes long */ | |
8818c391 | 486 | |
e3d8b004 | 487 | while (1) /* Using a while to avoid many goto's */ |
8818c391 TR |
488 | { |
489 | int loc_size; | |
490 | int body_addr; | |
491 | unsigned num_pushes; | |
4add8633 | 492 | int pc_offset = 0; |
2e5ff58c | 493 | |
4e99ad69 TG |
494 | /* At least the fifth instruction must have been executed to |
495 | modify frame shape. */ | |
496 | if (len < 10) | |
497 | break; | |
498 | ||
e17a4113 | 499 | insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order); |
8818c391 | 500 | /* ldi r26,<LOCALS_SIZE> */ |
2e5ff58c TR |
501 | if ((insn & 0xf0f0) != 0xe0a0) |
502 | break; | |
8818c391 | 503 | loc_size = (insn & 0xf) | ((insn & 0x0f00) >> 4); |
4add8633 | 504 | pc_offset += 2; |
2e5ff58c | 505 | |
e17a4113 | 506 | insn = extract_unsigned_integer (&prologue[vpc + 2], 2, byte_order); |
8818c391 TR |
507 | /* ldi r27,<LOCALS_SIZE> / 256 */ |
508 | if ((insn & 0xf0f0) != 0xe0b0) | |
2e5ff58c | 509 | break; |
8818c391 | 510 | loc_size |= ((insn & 0xf) | ((insn & 0x0f00) >> 4)) << 8; |
4add8633 | 511 | pc_offset += 2; |
2e5ff58c | 512 | |
e17a4113 | 513 | insn = extract_unsigned_integer (&prologue[vpc + 4], 2, byte_order); |
8818c391 TR |
514 | /* ldi r30,pm_lo8(.L_foo_body) */ |
515 | if ((insn & 0xf0f0) != 0xe0e0) | |
2e5ff58c | 516 | break; |
8818c391 | 517 | body_addr = (insn & 0xf) | ((insn & 0x0f00) >> 4); |
4add8633 | 518 | pc_offset += 2; |
8818c391 | 519 | |
e17a4113 | 520 | insn = extract_unsigned_integer (&prologue[vpc + 6], 2, byte_order); |
8818c391 TR |
521 | /* ldi r31,pm_hi8(.L_foo_body) */ |
522 | if ((insn & 0xf0f0) != 0xe0f0) | |
2e5ff58c | 523 | break; |
8818c391 | 524 | body_addr |= ((insn & 0xf) | ((insn & 0x0f00) >> 4)) << 8; |
4add8633 | 525 | pc_offset += 2; |
8818c391 | 526 | |
8818c391 TR |
527 | msymbol = lookup_minimal_symbol ("__prologue_saves__", NULL, NULL); |
528 | if (!msymbol) | |
2e5ff58c | 529 | break; |
8818c391 | 530 | |
e17a4113 | 531 | insn = extract_unsigned_integer (&prologue[vpc + 8], 2, byte_order); |
8818c391 | 532 | /* rjmp __prologue_saves__+RRR */ |
e3d8b004 TR |
533 | if ((insn & 0xf000) == 0xc000) |
534 | { | |
535 | /* Extract PC relative offset from RJMP */ | |
536 | i = (insn & 0xfff) | (insn & 0x800 ? (-1 ^ 0xfff) : 0); | |
537 | /* Convert offset to byte addressable mode */ | |
538 | i *= 2; | |
539 | /* Destination address */ | |
4e99ad69 | 540 | i += pc_beg + 10; |
e3d8b004 | 541 | |
4e99ad69 | 542 | if (body_addr != (pc_beg + 10)/2) |
e3d8b004 | 543 | break; |
4add8633 TR |
544 | |
545 | pc_offset += 2; | |
e3d8b004 | 546 | } |
e3d8b004 TR |
547 | else if ((insn & 0xfe0e) == 0x940c) |
548 | { | |
549 | /* Extract absolute PC address from JMP */ | |
550 | i = (((insn & 0x1) | ((insn & 0x1f0) >> 3) << 16) | |
e17a4113 UW |
551 | | (extract_unsigned_integer (&prologue[vpc + 10], 2, byte_order) |
552 | & 0xffff)); | |
e3d8b004 TR |
553 | /* Convert address to byte addressable mode */ |
554 | i *= 2; | |
555 | ||
4e99ad69 | 556 | if (body_addr != (pc_beg + 12)/2) |
e3d8b004 | 557 | break; |
4add8633 TR |
558 | |
559 | pc_offset += 4; | |
e3d8b004 TR |
560 | } |
561 | else | |
562 | break; | |
2e5ff58c | 563 | |
4add8633 | 564 | /* Resolve offset (in words) from __prologue_saves__ symbol. |
8818c391 TR |
565 | Which is a pushes count in `-mcall-prologues' mode */ |
566 | num_pushes = AVR_MAX_PUSHES - (i - SYMBOL_VALUE_ADDRESS (msymbol)) / 2; | |
567 | ||
568 | if (num_pushes > AVR_MAX_PUSHES) | |
4add8633 | 569 | { |
edefbb7c | 570 | fprintf_unfiltered (gdb_stderr, _("Num pushes too large: %d\n"), |
4add8633 TR |
571 | num_pushes); |
572 | num_pushes = 0; | |
573 | } | |
2e5ff58c | 574 | |
8818c391 | 575 | if (num_pushes) |
2e5ff58c TR |
576 | { |
577 | int from; | |
4add8633 TR |
578 | |
579 | info->saved_regs[AVR_FP_REGNUM + 1].addr = num_pushes; | |
2e5ff58c | 580 | if (num_pushes >= 2) |
4add8633 TR |
581 | info->saved_regs[AVR_FP_REGNUM].addr = num_pushes - 1; |
582 | ||
2e5ff58c TR |
583 | i = 0; |
584 | for (from = AVR_LAST_PUSHED_REGNUM + 1 - (num_pushes - 2); | |
585 | from <= AVR_LAST_PUSHED_REGNUM; ++from) | |
4add8633 | 586 | info->saved_regs [from].addr = ++i; |
2e5ff58c | 587 | } |
4add8633 TR |
588 | info->size = loc_size + num_pushes; |
589 | info->prologue_type = AVR_PROLOGUE_CALL; | |
590 | ||
4e99ad69 | 591 | return pc_beg + pc_offset; |
8818c391 TR |
592 | } |
593 | ||
4add8633 TR |
594 | /* Scan for the beginning of the prologue for an interrupt or signal |
595 | function. Note that we have to set the prologue type here since the | |
596 | third stage of the prologue may not be present (e.g. no saved registered | |
597 | or changing of the SP register). */ | |
8818c391 | 598 | |
4add8633 | 599 | if (1) |
8818c391 | 600 | { |
4e99ad69 | 601 | static const unsigned char img[] = { |
2e5ff58c TR |
602 | 0x78, 0x94, /* sei */ |
603 | 0x1f, 0x92, /* push r1 */ | |
604 | 0x0f, 0x92, /* push r0 */ | |
605 | 0x0f, 0xb6, /* in r0,0x3f SREG */ | |
606 | 0x0f, 0x92, /* push r0 */ | |
607 | 0x11, 0x24 /* clr r1 */ | |
8818c391 | 608 | }; |
4e99ad69 TG |
609 | if (len >= sizeof (img) |
610 | && memcmp (prologue, img, sizeof (img)) == 0) | |
2e5ff58c | 611 | { |
4add8633 | 612 | info->prologue_type = AVR_PROLOGUE_INTR; |
2e5ff58c | 613 | vpc += sizeof (img); |
4add8633 TR |
614 | info->saved_regs[AVR_SREG_REGNUM].addr = 3; |
615 | info->saved_regs[0].addr = 2; | |
616 | info->saved_regs[1].addr = 1; | |
617 | info->size += 3; | |
2e5ff58c | 618 | } |
4e99ad69 TG |
619 | else if (len >= sizeof (img) - 2 |
620 | && memcmp (img + 2, prologue, sizeof (img) - 2) == 0) | |
2e5ff58c | 621 | { |
4add8633 TR |
622 | info->prologue_type = AVR_PROLOGUE_SIG; |
623 | vpc += sizeof (img) - 2; | |
624 | info->saved_regs[AVR_SREG_REGNUM].addr = 3; | |
625 | info->saved_regs[0].addr = 2; | |
626 | info->saved_regs[1].addr = 1; | |
627 | info->size += 3; | |
2e5ff58c | 628 | } |
8818c391 TR |
629 | } |
630 | ||
631 | /* First stage of the prologue scanning. | |
4add8633 | 632 | Scan pushes (saved registers) */ |
8818c391 | 633 | |
4e99ad69 | 634 | for (; vpc < len; vpc += 2) |
8818c391 | 635 | { |
e17a4113 | 636 | insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order); |
2e5ff58c TR |
637 | if ((insn & 0xfe0f) == 0x920f) /* push rXX */ |
638 | { | |
639 | /* Bits 4-9 contain a mask for registers R0-R32. */ | |
4add8633 TR |
640 | int regno = (insn & 0x1f0) >> 4; |
641 | info->size++; | |
642 | info->saved_regs[regno].addr = info->size; | |
2e5ff58c TR |
643 | scan_stage = 1; |
644 | } | |
8818c391 | 645 | else |
2e5ff58c | 646 | break; |
8818c391 TR |
647 | } |
648 | ||
4add8633 TR |
649 | if (vpc >= AVR_MAX_PROLOGUE_SIZE) |
650 | fprintf_unfiltered (gdb_stderr, | |
edefbb7c | 651 | _("Hit end of prologue while scanning pushes\n")); |
4add8633 | 652 | |
8818c391 TR |
653 | /* Second stage of the prologue scanning. |
654 | Scan: | |
655 | in r28,__SP_L__ | |
656 | in r29,__SP_H__ */ | |
657 | ||
4e99ad69 | 658 | if (scan_stage == 1 && vpc < len) |
8818c391 | 659 | { |
4e99ad69 | 660 | static const unsigned char img[] = { |
2e5ff58c TR |
661 | 0xcd, 0xb7, /* in r28,__SP_L__ */ |
662 | 0xde, 0xb7 /* in r29,__SP_H__ */ | |
8818c391 TR |
663 | }; |
664 | unsigned short insn1; | |
2e5ff58c | 665 | |
4e99ad69 TG |
666 | if (vpc + sizeof (img) < len |
667 | && memcmp (prologue + vpc, img, sizeof (img)) == 0) | |
2e5ff58c TR |
668 | { |
669 | vpc += 4; | |
2e5ff58c TR |
670 | scan_stage = 2; |
671 | } | |
8818c391 TR |
672 | } |
673 | ||
674 | /* Third stage of the prologue scanning. (Really two stages) | |
675 | Scan for: | |
676 | sbiw r28,XX or subi r28,lo8(XX) | |
72fab697 | 677 | sbci r29,hi8(XX) |
8818c391 TR |
678 | in __tmp_reg__,__SREG__ |
679 | cli | |
e3d8b004 | 680 | out __SP_H__,r29 |
8818c391 | 681 | out __SREG__,__tmp_reg__ |
e3d8b004 | 682 | out __SP_L__,r28 */ |
8818c391 | 683 | |
4e99ad69 | 684 | if (scan_stage == 2 && vpc < len) |
8818c391 TR |
685 | { |
686 | int locals_size = 0; | |
4e99ad69 | 687 | static const unsigned char img[] = { |
2e5ff58c TR |
688 | 0x0f, 0xb6, /* in r0,0x3f */ |
689 | 0xf8, 0x94, /* cli */ | |
e3d8b004 | 690 | 0xde, 0xbf, /* out 0x3e,r29 ; SPH */ |
2e5ff58c | 691 | 0x0f, 0xbe, /* out 0x3f,r0 ; SREG */ |
e3d8b004 | 692 | 0xcd, 0xbf /* out 0x3d,r28 ; SPL */ |
8818c391 | 693 | }; |
4e99ad69 | 694 | static const unsigned char img_sig[] = { |
e3d8b004 TR |
695 | 0xde, 0xbf, /* out 0x3e,r29 ; SPH */ |
696 | 0xcd, 0xbf /* out 0x3d,r28 ; SPL */ | |
8818c391 | 697 | }; |
4e99ad69 | 698 | static const unsigned char img_int[] = { |
2e5ff58c | 699 | 0xf8, 0x94, /* cli */ |
e3d8b004 | 700 | 0xde, 0xbf, /* out 0x3e,r29 ; SPH */ |
2e5ff58c | 701 | 0x78, 0x94, /* sei */ |
e3d8b004 | 702 | 0xcd, 0xbf /* out 0x3d,r28 ; SPL */ |
8818c391 | 703 | }; |
2e5ff58c | 704 | |
e17a4113 | 705 | insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order); |
8818c391 | 706 | vpc += 2; |
2e5ff58c TR |
707 | if ((insn & 0xff30) == 0x9720) /* sbiw r28,XXX */ |
708 | locals_size = (insn & 0xf) | ((insn & 0xc0) >> 2); | |
709 | else if ((insn & 0xf0f0) == 0x50c0) /* subi r28,lo8(XX) */ | |
710 | { | |
711 | locals_size = (insn & 0xf) | ((insn & 0xf00) >> 4); | |
e17a4113 | 712 | insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order); |
2e5ff58c TR |
713 | vpc += 2; |
714 | locals_size += ((insn & 0xf) | ((insn & 0xf00) >> 4) << 8); | |
715 | } | |
8818c391 | 716 | else |
4e99ad69 | 717 | return pc_beg + vpc; |
4add8633 TR |
718 | |
719 | /* Scan the last part of the prologue. May not be present for interrupt | |
720 | or signal handler functions, which is why we set the prologue type | |
721 | when we saw the beginning of the prologue previously. */ | |
722 | ||
4e99ad69 TG |
723 | if (vpc + sizeof (img_sig) < len |
724 | && memcmp (prologue + vpc, img_sig, sizeof (img_sig)) == 0) | |
4add8633 TR |
725 | { |
726 | vpc += sizeof (img_sig); | |
727 | } | |
4e99ad69 TG |
728 | else if (vpc + sizeof (img_int) < len |
729 | && memcmp (prologue + vpc, img_int, sizeof (img_int)) == 0) | |
4add8633 TR |
730 | { |
731 | vpc += sizeof (img_int); | |
732 | } | |
4e99ad69 TG |
733 | if (vpc + sizeof (img) < len |
734 | && memcmp (prologue + vpc, img, sizeof (img)) == 0) | |
4add8633 TR |
735 | { |
736 | info->prologue_type = AVR_PROLOGUE_NORMAL; | |
737 | vpc += sizeof (img); | |
738 | } | |
739 | ||
740 | info->size += locals_size; | |
741 | ||
4e99ad69 | 742 | /* Fall through. */ |
8818c391 | 743 | } |
4add8633 TR |
744 | |
745 | /* If we got this far, we could not scan the prologue, so just return the pc | |
746 | of the frame plus an adjustment for argument move insns. */ | |
747 | ||
4e99ad69 TG |
748 | for (; vpc < len; vpc += 2) |
749 | { | |
e17a4113 | 750 | insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order); |
4e99ad69 TG |
751 | if ((insn & 0xff00) == 0x0100) /* movw rXX, rYY */ |
752 | continue; | |
753 | else if ((insn & 0xfc00) == 0x2c00) /* mov rXX, rYY */ | |
754 | continue; | |
755 | else | |
756 | break; | |
757 | } | |
758 | ||
759 | return pc_beg + vpc; | |
8818c391 TR |
760 | } |
761 | ||
4add8633 | 762 | static CORE_ADDR |
6093d2eb | 763 | avr_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) |
4add8633 TR |
764 | { |
765 | CORE_ADDR func_addr, func_end; | |
766 | CORE_ADDR prologue_end = pc; | |
8818c391 | 767 | |
4add8633 | 768 | /* See what the symbol table says */ |
8818c391 | 769 | |
4add8633 TR |
770 | if (find_pc_partial_function (pc, NULL, &func_addr, &func_end)) |
771 | { | |
772 | struct symtab_and_line sal; | |
773 | struct avr_unwind_cache info = {0}; | |
774 | struct trad_frame_saved_reg saved_regs[AVR_NUM_REGS]; | |
2e5ff58c | 775 | |
4add8633 | 776 | info.saved_regs = saved_regs; |
8818c391 | 777 | |
4add8633 TR |
778 | /* Need to run the prologue scanner to figure out if the function has a |
779 | prologue and possibly skip over moving arguments passed via registers | |
780 | to other registers. */ | |
2e5ff58c | 781 | |
e17a4113 | 782 | prologue_end = avr_scan_prologue (gdbarch, func_addr, func_end, &info); |
8818c391 | 783 | |
3b85b0f1 TR |
784 | if (info.prologue_type == AVR_PROLOGUE_NONE) |
785 | return pc; | |
786 | else | |
4add8633 TR |
787 | { |
788 | sal = find_pc_line (func_addr, 0); | |
8818c391 | 789 | |
4add8633 TR |
790 | if (sal.line != 0 && sal.end < func_end) |
791 | return sal.end; | |
792 | } | |
793 | } | |
2e5ff58c | 794 | |
4e99ad69 TG |
795 | /* Either we didn't find the start of this function (nothing we can do), |
796 | or there's no line info, or the line after the prologue is after | |
797 | the end of the function (there probably isn't a prologue). */ | |
2e5ff58c | 798 | |
4add8633 TR |
799 | return prologue_end; |
800 | } | |
8818c391 | 801 | |
4add8633 TR |
802 | /* Not all avr devices support the BREAK insn. Those that don't should treat |
803 | it as a NOP. Thus, it should be ok. Since the avr is currently a remote | |
804 | only target, this shouldn't be a problem (I hope). TRoth/2003-05-14 */ | |
8818c391 | 805 | |
4add8633 | 806 | static const unsigned char * |
67d57894 | 807 | avr_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR * pcptr, int *lenptr) |
4add8633 | 808 | { |
4e99ad69 | 809 | static const unsigned char avr_break_insn [] = { 0x98, 0x95 }; |
4add8633 TR |
810 | *lenptr = sizeof (avr_break_insn); |
811 | return avr_break_insn; | |
8818c391 TR |
812 | } |
813 | ||
4e99ad69 | 814 | /* Given a return value in `regcache' with a type `type', |
4add8633 TR |
815 | extract and copy its value into `valbuf'. |
816 | ||
817 | Return values are always passed via registers r25:r24:... */ | |
8818c391 TR |
818 | |
819 | static void | |
4add8633 | 820 | avr_extract_return_value (struct type *type, struct regcache *regcache, |
1f3a99d5 | 821 | gdb_byte *valbuf) |
8818c391 | 822 | { |
e17a4113 UW |
823 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
824 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
4add8633 TR |
825 | ULONGEST r24, r25; |
826 | ULONGEST c; | |
827 | int len; | |
828 | if (TYPE_LENGTH (type) == 1) | |
8818c391 | 829 | { |
4add8633 | 830 | regcache_cooked_read_unsigned (regcache, 24, &c); |
e17a4113 | 831 | store_unsigned_integer (valbuf, 1, byte_order, c); |
8818c391 TR |
832 | } |
833 | else | |
834 | { | |
4add8633 TR |
835 | int i; |
836 | /* The MSB of the return value is always in r25, calculate which | |
837 | register holds the LSB. */ | |
838 | int lsb_reg = 25 - TYPE_LENGTH (type) + 1; | |
8818c391 | 839 | |
4add8633 TR |
840 | for (i=0; i< TYPE_LENGTH (type); i++) |
841 | { | |
842 | regcache_cooked_read (regcache, lsb_reg + i, | |
843 | (bfd_byte *) valbuf + i); | |
4add8633 TR |
844 | } |
845 | } | |
846 | } | |
8818c391 | 847 | |
4c8b6ae0 UW |
848 | /* Determine, for architecture GDBARCH, how a return value of TYPE |
849 | should be returned. If it is supposed to be returned in registers, | |
850 | and READBUF is non-zero, read the appropriate value from REGCACHE, | |
851 | and copy it into READBUF. If WRITEBUF is non-zero, write the value | |
852 | from WRITEBUF into REGCACHE. */ | |
853 | ||
63807e1d | 854 | static enum return_value_convention |
c055b101 CV |
855 | avr_return_value (struct gdbarch *gdbarch, struct type *func_type, |
856 | struct type *valtype, struct regcache *regcache, | |
857 | gdb_byte *readbuf, const gdb_byte *writebuf) | |
4c8b6ae0 UW |
858 | { |
859 | int struct_return = ((TYPE_CODE (valtype) == TYPE_CODE_STRUCT | |
860 | || TYPE_CODE (valtype) == TYPE_CODE_UNION | |
861 | || TYPE_CODE (valtype) == TYPE_CODE_ARRAY) | |
862 | && !(TYPE_LENGTH (valtype) == 1 | |
863 | || TYPE_LENGTH (valtype) == 2 | |
864 | || TYPE_LENGTH (valtype) == 4 | |
865 | || TYPE_LENGTH (valtype) == 8)); | |
866 | ||
867 | if (writebuf != NULL) | |
868 | { | |
869 | gdb_assert (!struct_return); | |
870 | error (_("Cannot store return value.")); | |
871 | } | |
872 | ||
873 | if (readbuf != NULL) | |
874 | { | |
875 | gdb_assert (!struct_return); | |
876 | avr_extract_return_value (valtype, regcache, readbuf); | |
877 | } | |
878 | ||
879 | if (struct_return) | |
880 | return RETURN_VALUE_STRUCT_CONVENTION; | |
881 | else | |
882 | return RETURN_VALUE_REGISTER_CONVENTION; | |
883 | } | |
884 | ||
885 | ||
4add8633 TR |
886 | /* Put here the code to store, into fi->saved_regs, the addresses of |
887 | the saved registers of frame described by FRAME_INFO. This | |
888 | includes special registers such as pc and fp saved in special ways | |
889 | in the stack frame. sp is even more special: the address we return | |
890 | for it IS the sp for the next frame. */ | |
8818c391 | 891 | |
63807e1d | 892 | static struct avr_unwind_cache * |
94afd7a6 | 893 | avr_frame_unwind_cache (struct frame_info *this_frame, |
4add8633 | 894 | void **this_prologue_cache) |
8818c391 | 895 | { |
4e99ad69 | 896 | CORE_ADDR start_pc, current_pc; |
4add8633 TR |
897 | ULONGEST prev_sp; |
898 | ULONGEST this_base; | |
899 | struct avr_unwind_cache *info; | |
4e99ad69 TG |
900 | struct gdbarch *gdbarch; |
901 | struct gdbarch_tdep *tdep; | |
4add8633 TR |
902 | int i; |
903 | ||
4e99ad69 TG |
904 | if (*this_prologue_cache) |
905 | return *this_prologue_cache; | |
4add8633 TR |
906 | |
907 | info = FRAME_OBSTACK_ZALLOC (struct avr_unwind_cache); | |
4e99ad69 | 908 | *this_prologue_cache = info; |
94afd7a6 | 909 | info->saved_regs = trad_frame_alloc_saved_regs (this_frame); |
4add8633 TR |
910 | |
911 | info->size = 0; | |
912 | info->prologue_type = AVR_PROLOGUE_NONE; | |
913 | ||
4e99ad69 TG |
914 | start_pc = get_frame_func (this_frame); |
915 | current_pc = get_frame_pc (this_frame); | |
916 | if ((start_pc > 0) && (start_pc <= current_pc)) | |
e17a4113 UW |
917 | avr_scan_prologue (get_frame_arch (this_frame), |
918 | start_pc, current_pc, info); | |
4add8633 | 919 | |
3b85b0f1 TR |
920 | if ((info->prologue_type != AVR_PROLOGUE_NONE) |
921 | && (info->prologue_type != AVR_PROLOGUE_MAIN)) | |
4add8633 TR |
922 | { |
923 | ULONGEST high_base; /* High byte of FP */ | |
924 | ||
925 | /* The SP was moved to the FP. This indicates that a new frame | |
926 | was created. Get THIS frame's FP value by unwinding it from | |
927 | the next frame. */ | |
94afd7a6 | 928 | this_base = get_frame_register_unsigned (this_frame, AVR_FP_REGNUM); |
4e99ad69 | 929 | high_base = get_frame_register_unsigned (this_frame, AVR_FP_REGNUM + 1); |
4add8633 TR |
930 | this_base += (high_base << 8); |
931 | ||
932 | /* The FP points at the last saved register. Adjust the FP back | |
933 | to before the first saved register giving the SP. */ | |
934 | prev_sp = this_base + info->size; | |
935 | } | |
8818c391 | 936 | else |
4add8633 TR |
937 | { |
938 | /* Assume that the FP is this frame's SP but with that pushed | |
939 | stack space added back. */ | |
94afd7a6 | 940 | this_base = get_frame_register_unsigned (this_frame, AVR_SP_REGNUM); |
4add8633 TR |
941 | prev_sp = this_base + info->size; |
942 | } | |
943 | ||
944 | /* Add 1 here to adjust for the post-decrement nature of the push | |
945 | instruction.*/ | |
4e99ad69 | 946 | info->prev_sp = avr_make_saddr (prev_sp + 1); |
4add8633 TR |
947 | info->base = avr_make_saddr (this_base); |
948 | ||
4e99ad69 TG |
949 | gdbarch = get_frame_arch (this_frame); |
950 | ||
4add8633 | 951 | /* Adjust all the saved registers so that they contain addresses and not |
3b85b0f1 | 952 | offsets. */ |
4e99ad69 TG |
953 | for (i = 0; i < gdbarch_num_regs (gdbarch) - 1; i++) |
954 | if (info->saved_regs[i].addr > 0) | |
955 | info->saved_regs[i].addr = info->prev_sp - info->saved_regs[i].addr; | |
4add8633 TR |
956 | |
957 | /* Except for the main and startup code, the return PC is always saved on | |
958 | the stack and is at the base of the frame. */ | |
959 | ||
960 | if (info->prologue_type != AVR_PROLOGUE_MAIN) | |
4e99ad69 | 961 | info->saved_regs[AVR_PC_REGNUM].addr = info->prev_sp; |
4add8633 | 962 | |
3b85b0f1 TR |
963 | /* The previous frame's SP needed to be computed. Save the computed |
964 | value. */ | |
4e99ad69 TG |
965 | tdep = gdbarch_tdep (gdbarch); |
966 | trad_frame_set_value (info->saved_regs, AVR_SP_REGNUM, | |
967 | info->prev_sp - 1 + tdep->call_length); | |
3b85b0f1 | 968 | |
4add8633 | 969 | return info; |
8818c391 TR |
970 | } |
971 | ||
972 | static CORE_ADDR | |
4add8633 | 973 | avr_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) |
8818c391 | 974 | { |
4add8633 TR |
975 | ULONGEST pc; |
976 | ||
11411de3 | 977 | pc = frame_unwind_register_unsigned (next_frame, AVR_PC_REGNUM); |
4add8633 TR |
978 | |
979 | return avr_make_iaddr (pc); | |
8818c391 TR |
980 | } |
981 | ||
30244cd8 UW |
982 | static CORE_ADDR |
983 | avr_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
984 | { | |
985 | ULONGEST sp; | |
986 | ||
11411de3 | 987 | sp = frame_unwind_register_unsigned (next_frame, AVR_SP_REGNUM); |
30244cd8 UW |
988 | |
989 | return avr_make_saddr (sp); | |
990 | } | |
991 | ||
4add8633 TR |
992 | /* Given a GDB frame, determine the address of the calling function's |
993 | frame. This will be used to create a new GDB frame struct. */ | |
8818c391 | 994 | |
4add8633 | 995 | static void |
94afd7a6 | 996 | avr_frame_this_id (struct frame_info *this_frame, |
4add8633 TR |
997 | void **this_prologue_cache, |
998 | struct frame_id *this_id) | |
8818c391 | 999 | { |
4add8633 | 1000 | struct avr_unwind_cache *info |
94afd7a6 | 1001 | = avr_frame_unwind_cache (this_frame, this_prologue_cache); |
4add8633 TR |
1002 | CORE_ADDR base; |
1003 | CORE_ADDR func; | |
1004 | struct frame_id id; | |
1005 | ||
1006 | /* The FUNC is easy. */ | |
94afd7a6 | 1007 | func = get_frame_func (this_frame); |
4add8633 | 1008 | |
4add8633 TR |
1009 | /* Hopefully the prologue analysis either correctly determined the |
1010 | frame's base (which is the SP from the previous frame), or set | |
1011 | that base to "NULL". */ | |
1012 | base = info->prev_sp; | |
1013 | if (base == 0) | |
1014 | return; | |
1015 | ||
1016 | id = frame_id_build (base, func); | |
4add8633 | 1017 | (*this_id) = id; |
8818c391 TR |
1018 | } |
1019 | ||
94afd7a6 UW |
1020 | static struct value * |
1021 | avr_frame_prev_register (struct frame_info *this_frame, | |
4e99ad69 | 1022 | void **this_prologue_cache, int regnum) |
8818c391 | 1023 | { |
e17a4113 UW |
1024 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
1025 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
4add8633 | 1026 | struct avr_unwind_cache *info |
94afd7a6 | 1027 | = avr_frame_unwind_cache (this_frame, this_prologue_cache); |
8818c391 | 1028 | |
3b85b0f1 TR |
1029 | if (regnum == AVR_PC_REGNUM) |
1030 | { | |
1031 | if (trad_frame_addr_p (info->saved_regs, regnum)) | |
1032 | { | |
94afd7a6 UW |
1033 | /* Reading the return PC from the PC register is slightly |
1034 | abnormal. register_size(AVR_PC_REGNUM) says it is 4 bytes, | |
1035 | but in reality, only two bytes (3 in upcoming mega256) are | |
1036 | stored on the stack. | |
1037 | ||
1038 | Also, note that the value on the stack is an addr to a word | |
1039 | not a byte, so we will need to multiply it by two at some | |
1040 | point. | |
1041 | ||
1042 | And to confuse matters even more, the return address stored | |
1043 | on the stack is in big endian byte order, even though most | |
1044 | everything else about the avr is little endian. Ick! */ | |
94afd7a6 | 1045 | ULONGEST pc; |
4e99ad69 TG |
1046 | int i; |
1047 | unsigned char buf[3]; | |
1048 | struct gdbarch *gdbarch = get_frame_arch (this_frame); | |
1049 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
94afd7a6 | 1050 | |
4e99ad69 | 1051 | read_memory (info->saved_regs[regnum].addr, buf, tdep->call_length); |
94afd7a6 | 1052 | |
4e99ad69 TG |
1053 | /* Extract the PC read from memory as a big-endian. */ |
1054 | pc = 0; | |
1055 | for (i = 0; i < tdep->call_length; i++) | |
1056 | pc = (pc << 8) | buf[i]; | |
94afd7a6 | 1057 | |
4e99ad69 | 1058 | return frame_unwind_got_constant (this_frame, regnum, pc << 1); |
3b85b0f1 | 1059 | } |
94afd7a6 UW |
1060 | |
1061 | return frame_unwind_got_optimized (this_frame, regnum); | |
3b85b0f1 | 1062 | } |
94afd7a6 UW |
1063 | |
1064 | return trad_frame_get_prev_register (this_frame, info->saved_regs, regnum); | |
4add8633 | 1065 | } |
8818c391 | 1066 | |
4add8633 TR |
1067 | static const struct frame_unwind avr_frame_unwind = { |
1068 | NORMAL_FRAME, | |
1069 | avr_frame_this_id, | |
94afd7a6 UW |
1070 | avr_frame_prev_register, |
1071 | NULL, | |
1072 | default_frame_sniffer | |
4add8633 TR |
1073 | }; |
1074 | ||
8818c391 | 1075 | static CORE_ADDR |
94afd7a6 | 1076 | avr_frame_base_address (struct frame_info *this_frame, void **this_cache) |
8818c391 | 1077 | { |
4add8633 | 1078 | struct avr_unwind_cache *info |
94afd7a6 | 1079 | = avr_frame_unwind_cache (this_frame, this_cache); |
8818c391 | 1080 | |
4add8633 TR |
1081 | return info->base; |
1082 | } | |
8818c391 | 1083 | |
4add8633 TR |
1084 | static const struct frame_base avr_frame_base = { |
1085 | &avr_frame_unwind, | |
1086 | avr_frame_base_address, | |
1087 | avr_frame_base_address, | |
1088 | avr_frame_base_address | |
1089 | }; | |
ced15480 | 1090 | |
94afd7a6 UW |
1091 | /* Assuming THIS_FRAME is a dummy, return the frame ID of that dummy |
1092 | frame. The frame ID's base needs to match the TOS value saved by | |
1093 | save_dummy_frame_tos(), and the PC match the dummy frame's breakpoint. */ | |
8818c391 | 1094 | |
4add8633 | 1095 | static struct frame_id |
94afd7a6 | 1096 | avr_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame) |
4add8633 TR |
1097 | { |
1098 | ULONGEST base; | |
8818c391 | 1099 | |
94afd7a6 UW |
1100 | base = get_frame_register_unsigned (this_frame, AVR_SP_REGNUM); |
1101 | return frame_id_build (avr_make_saddr (base), get_frame_pc (this_frame)); | |
8818c391 TR |
1102 | } |
1103 | ||
4add8633 TR |
1104 | /* When arguments must be pushed onto the stack, they go on in reverse |
1105 | order. The below implements a FILO (stack) to do this. */ | |
8818c391 | 1106 | |
4add8633 TR |
1107 | struct stack_item |
1108 | { | |
1109 | int len; | |
1110 | struct stack_item *prev; | |
1111 | void *data; | |
1112 | }; | |
8818c391 | 1113 | |
4add8633 | 1114 | static struct stack_item * |
0fd88904 | 1115 | push_stack_item (struct stack_item *prev, const bfd_byte *contents, int len) |
8818c391 | 1116 | { |
4add8633 TR |
1117 | struct stack_item *si; |
1118 | si = xmalloc (sizeof (struct stack_item)); | |
1119 | si->data = xmalloc (len); | |
1120 | si->len = len; | |
1121 | si->prev = prev; | |
1122 | memcpy (si->data, contents, len); | |
1123 | return si; | |
8818c391 TR |
1124 | } |
1125 | ||
4add8633 TR |
1126 | static struct stack_item *pop_stack_item (struct stack_item *si); |
1127 | static struct stack_item * | |
1128 | pop_stack_item (struct stack_item *si) | |
8818c391 | 1129 | { |
4add8633 TR |
1130 | struct stack_item *dead = si; |
1131 | si = si->prev; | |
1132 | xfree (dead->data); | |
1133 | xfree (dead); | |
1134 | return si; | |
8818c391 TR |
1135 | } |
1136 | ||
8818c391 TR |
1137 | /* Setup the function arguments for calling a function in the inferior. |
1138 | ||
1139 | On the AVR architecture, there are 18 registers (R25 to R8) which are | |
1140 | dedicated for passing function arguments. Up to the first 18 arguments | |
1141 | (depending on size) may go into these registers. The rest go on the stack. | |
1142 | ||
4add8633 TR |
1143 | All arguments are aligned to start in even-numbered registers (odd-sized |
1144 | arguments, including char, have one free register above them). For example, | |
1145 | an int in arg1 and a char in arg2 would be passed as such: | |
1146 | ||
1147 | arg1 -> r25:r24 | |
1148 | arg2 -> r22 | |
1149 | ||
1150 | Arguments that are larger than 2 bytes will be split between two or more | |
1151 | registers as available, but will NOT be split between a register and the | |
1152 | stack. Arguments that go onto the stack are pushed last arg first (this is | |
1153 | similar to the d10v). */ | |
1154 | ||
1155 | /* NOTE: TRoth/2003-06-17: The rest of this comment is old looks to be | |
1156 | inaccurate. | |
8818c391 TR |
1157 | |
1158 | An exceptional case exists for struct arguments (and possibly other | |
1159 | aggregates such as arrays) -- if the size is larger than WORDSIZE bytes but | |
1160 | not a multiple of WORDSIZE bytes. In this case the argument is never split | |
1161 | between the registers and the stack, but instead is copied in its entirety | |
1162 | onto the stack, AND also copied into as many registers as there is room | |
1163 | for. In other words, space in registers permitting, two copies of the same | |
1164 | argument are passed in. As far as I can tell, only the one on the stack is | |
1165 | used, although that may be a function of the level of compiler | |
1166 | optimization. I suspect this is a compiler bug. Arguments of these odd | |
1167 | sizes are left-justified within the word (as opposed to arguments smaller | |
1168 | than WORDSIZE bytes, which are right-justified). | |
1169 | ||
1170 | If the function is to return an aggregate type such as a struct, the caller | |
1171 | must allocate space into which the callee will copy the return value. In | |
1172 | this case, a pointer to the return value location is passed into the callee | |
1173 | in register R0, which displaces one of the other arguments passed in via | |
1174 | registers R0 to R2. */ | |
1175 | ||
1176 | static CORE_ADDR | |
7d9b040b | 1177 | avr_push_dummy_call (struct gdbarch *gdbarch, struct value *function, |
4add8633 TR |
1178 | struct regcache *regcache, CORE_ADDR bp_addr, |
1179 | int nargs, struct value **args, CORE_ADDR sp, | |
1180 | int struct_return, CORE_ADDR struct_addr) | |
8818c391 | 1181 | { |
e17a4113 | 1182 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
4add8633 | 1183 | int i; |
6d1915d4 TG |
1184 | unsigned char buf[3]; |
1185 | int call_length = gdbarch_tdep (gdbarch)->call_length; | |
4add8633 TR |
1186 | CORE_ADDR return_pc = avr_convert_iaddr_to_raw (bp_addr); |
1187 | int regnum = AVR_ARGN_REGNUM; | |
1188 | struct stack_item *si = NULL; | |
8818c391 | 1189 | |
8818c391 | 1190 | #if 0 |
4add8633 TR |
1191 | /* FIXME: TRoth/2003-06-18: Not sure what to do when returning a struct. */ |
1192 | if (struct_return) | |
8818c391 | 1193 | { |
4add8633 | 1194 | fprintf_unfiltered (gdb_stderr, "struct_return: 0x%lx\n", struct_addr); |
9c9acae0 UW |
1195 | regcache_cooked_write_unsigned (regcache, argreg--, struct_addr & 0xff); |
1196 | regcache_cooked_write_unsigned (regcache, argreg--, (struct_addr >>8) & 0xff); | |
8818c391 | 1197 | } |
4add8633 | 1198 | #endif |
8818c391 | 1199 | |
4add8633 | 1200 | for (i = 0; i < nargs; i++) |
8818c391 | 1201 | { |
4add8633 TR |
1202 | int last_regnum; |
1203 | int j; | |
1204 | struct value *arg = args[i]; | |
4991999e | 1205 | struct type *type = check_typedef (value_type (arg)); |
0fd88904 | 1206 | const bfd_byte *contents = value_contents (arg); |
4add8633 TR |
1207 | int len = TYPE_LENGTH (type); |
1208 | ||
1209 | /* Calculate the potential last register needed. */ | |
1210 | last_regnum = regnum - (len + (len & 1)); | |
1211 | ||
1212 | /* If there are registers available, use them. Once we start putting | |
1213 | stuff on the stack, all subsequent args go on stack. */ | |
1214 | if ((si == NULL) && (last_regnum >= 8)) | |
1215 | { | |
1216 | ULONGEST val; | |
1217 | ||
1218 | /* Skip a register for odd length args. */ | |
1219 | if (len & 1) | |
1220 | regnum--; | |
1221 | ||
e17a4113 | 1222 | val = extract_unsigned_integer (contents, len, byte_order); |
6d1915d4 TG |
1223 | for (j = 0; j < len; j++) |
1224 | regcache_cooked_write_unsigned | |
1225 | (regcache, regnum--, val >> (8 * (len - j - 1))); | |
4add8633 TR |
1226 | } |
1227 | /* No registers available, push the args onto the stack. */ | |
1228 | else | |
1229 | { | |
1230 | /* From here on, we don't care about regnum. */ | |
1231 | si = push_stack_item (si, contents, len); | |
1232 | } | |
8818c391 | 1233 | } |
909cd28e | 1234 | |
4add8633 TR |
1235 | /* Push args onto the stack. */ |
1236 | while (si) | |
1237 | { | |
1238 | sp -= si->len; | |
1239 | /* Add 1 to sp here to account for post decr nature of pushes. */ | |
4e99ad69 | 1240 | write_memory (sp + 1, si->data, si->len); |
4add8633 TR |
1241 | si = pop_stack_item (si); |
1242 | } | |
3605c34a | 1243 | |
4add8633 TR |
1244 | /* Set the return address. For the avr, the return address is the BP_ADDR. |
1245 | Need to push the return address onto the stack noting that it needs to be | |
1246 | in big-endian order on the stack. */ | |
6d1915d4 TG |
1247 | for (i = 1; i <= call_length; i++) |
1248 | { | |
1249 | buf[call_length - i] = return_pc & 0xff; | |
1250 | return_pc >>= 8; | |
1251 | } | |
3605c34a | 1252 | |
6d1915d4 TG |
1253 | sp -= call_length; |
1254 | /* Use 'sp + 1' since pushes are post decr ops. */ | |
1255 | write_memory (sp + 1, buf, call_length); | |
3605c34a | 1256 | |
4add8633 TR |
1257 | /* Finally, update the SP register. */ |
1258 | regcache_cooked_write_unsigned (regcache, AVR_SP_REGNUM, | |
1259 | avr_convert_saddr_to_raw (sp)); | |
3605c34a | 1260 | |
6d1915d4 TG |
1261 | /* Return SP value for the dummy frame, where the return address hasn't been |
1262 | pushed. */ | |
1263 | return sp + call_length; | |
3605c34a TR |
1264 | } |
1265 | ||
8818c391 TR |
1266 | /* Initialize the gdbarch structure for the AVR's. */ |
1267 | ||
1268 | static struct gdbarch * | |
2e5ff58c TR |
1269 | avr_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) |
1270 | { | |
2e5ff58c TR |
1271 | struct gdbarch *gdbarch; |
1272 | struct gdbarch_tdep *tdep; | |
4e99ad69 TG |
1273 | struct gdbarch_list *best_arch; |
1274 | int call_length; | |
8818c391 | 1275 | |
4e99ad69 | 1276 | /* Avr-6 call instructions save 3 bytes. */ |
8818c391 TR |
1277 | switch (info.bfd_arch_info->mach) |
1278 | { | |
1279 | case bfd_mach_avr1: | |
1280 | case bfd_mach_avr2: | |
1281 | case bfd_mach_avr3: | |
1282 | case bfd_mach_avr4: | |
1283 | case bfd_mach_avr5: | |
4e99ad69 TG |
1284 | default: |
1285 | call_length = 2; | |
1286 | break; | |
1287 | case bfd_mach_avr6: | |
1288 | call_length = 3; | |
8818c391 TR |
1289 | break; |
1290 | } | |
1291 | ||
4e99ad69 TG |
1292 | /* If there is already a candidate, use it. */ |
1293 | for (best_arch = gdbarch_list_lookup_by_info (arches, &info); | |
1294 | best_arch != NULL; | |
1295 | best_arch = gdbarch_list_lookup_by_info (best_arch->next, &info)) | |
1296 | { | |
1297 | if (gdbarch_tdep (best_arch->gdbarch)->call_length == call_length) | |
1298 | return best_arch->gdbarch; | |
1299 | } | |
1300 | ||
1301 | /* None found, create a new architecture from the information provided. */ | |
1302 | tdep = XMALLOC (struct gdbarch_tdep); | |
1303 | gdbarch = gdbarch_alloc (&info, tdep); | |
1304 | ||
1305 | tdep->call_length = call_length; | |
1306 | ||
8818c391 TR |
1307 | set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT); |
1308 | set_gdbarch_int_bit (gdbarch, 2 * TARGET_CHAR_BIT); | |
1309 | set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
1310 | set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT); | |
1311 | set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT); | |
1312 | set_gdbarch_addr_bit (gdbarch, 32); | |
8818c391 TR |
1313 | |
1314 | set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
1315 | set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
1316 | set_gdbarch_long_double_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
1317 | ||
8da61cc4 DJ |
1318 | set_gdbarch_float_format (gdbarch, floatformats_ieee_single); |
1319 | set_gdbarch_double_format (gdbarch, floatformats_ieee_single); | |
1320 | set_gdbarch_long_double_format (gdbarch, floatformats_ieee_single); | |
8818c391 TR |
1321 | |
1322 | set_gdbarch_read_pc (gdbarch, avr_read_pc); | |
1323 | set_gdbarch_write_pc (gdbarch, avr_write_pc); | |
8818c391 TR |
1324 | |
1325 | set_gdbarch_num_regs (gdbarch, AVR_NUM_REGS); | |
1326 | ||
1327 | set_gdbarch_sp_regnum (gdbarch, AVR_SP_REGNUM); | |
8818c391 TR |
1328 | set_gdbarch_pc_regnum (gdbarch, AVR_PC_REGNUM); |
1329 | ||
1330 | set_gdbarch_register_name (gdbarch, avr_register_name); | |
866b76ea | 1331 | set_gdbarch_register_type (gdbarch, avr_register_type); |
8818c391 | 1332 | |
4c8b6ae0 | 1333 | set_gdbarch_return_value (gdbarch, avr_return_value); |
8818c391 TR |
1334 | set_gdbarch_print_insn (gdbarch, print_insn_avr); |
1335 | ||
4add8633 | 1336 | set_gdbarch_push_dummy_call (gdbarch, avr_push_dummy_call); |
8818c391 TR |
1337 | |
1338 | set_gdbarch_address_to_pointer (gdbarch, avr_address_to_pointer); | |
1339 | set_gdbarch_pointer_to_address (gdbarch, avr_pointer_to_address); | |
8818c391 | 1340 | |
8818c391 | 1341 | set_gdbarch_skip_prologue (gdbarch, avr_skip_prologue); |
8818c391 TR |
1342 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); |
1343 | ||
909cd28e | 1344 | set_gdbarch_breakpoint_from_pc (gdbarch, avr_breakpoint_from_pc); |
8818c391 | 1345 | |
94afd7a6 | 1346 | frame_unwind_append_unwinder (gdbarch, &avr_frame_unwind); |
4add8633 TR |
1347 | frame_base_set_default (gdbarch, &avr_frame_base); |
1348 | ||
94afd7a6 | 1349 | set_gdbarch_dummy_id (gdbarch, avr_dummy_id); |
4add8633 TR |
1350 | |
1351 | set_gdbarch_unwind_pc (gdbarch, avr_unwind_pc); | |
30244cd8 | 1352 | set_gdbarch_unwind_sp (gdbarch, avr_unwind_sp); |
8818c391 | 1353 | |
8818c391 TR |
1354 | return gdbarch; |
1355 | } | |
1356 | ||
1357 | /* Send a query request to the avr remote target asking for values of the io | |
1358 | registers. If args parameter is not NULL, then the user has requested info | |
1359 | on a specific io register [This still needs implemented and is ignored for | |
1360 | now]. The query string should be one of these forms: | |
1361 | ||
1362 | "Ravr.io_reg" -> reply is "NN" number of io registers | |
1363 | ||
1364 | "Ravr.io_reg:addr,len" where addr is first register and len is number of | |
1365 | registers to be read. The reply should be "<NAME>,VV;" for each io register | |
1366 | where, <NAME> is a string, and VV is the hex value of the register. | |
1367 | ||
1368 | All io registers are 8-bit. */ | |
1369 | ||
1370 | static void | |
1371 | avr_io_reg_read_command (char *args, int from_tty) | |
1372 | { | |
1e3ff5ad | 1373 | LONGEST bufsiz = 0; |
13547ab6 | 1374 | gdb_byte *buf; |
2e5ff58c TR |
1375 | char query[400]; |
1376 | char *p; | |
1377 | unsigned int nreg = 0; | |
1378 | unsigned int val; | |
1379 | int i, j, k, step; | |
8818c391 | 1380 | |
8818c391 | 1381 | /* Find out how many io registers the target has. */ |
13547ab6 DJ |
1382 | bufsiz = target_read_alloc (¤t_target, TARGET_OBJECT_AVR, |
1383 | "avr.io_reg", &buf); | |
8818c391 | 1384 | |
13547ab6 | 1385 | if (bufsiz <= 0) |
8818c391 | 1386 | { |
2e5ff58c | 1387 | fprintf_unfiltered (gdb_stderr, |
13547ab6 DJ |
1388 | _("ERR: info io_registers NOT supported " |
1389 | "by current target\n")); | |
8818c391 TR |
1390 | return; |
1391 | } | |
1392 | ||
2e5ff58c | 1393 | if (sscanf (buf, "%x", &nreg) != 1) |
8818c391 | 1394 | { |
2e5ff58c | 1395 | fprintf_unfiltered (gdb_stderr, |
edefbb7c | 1396 | _("Error fetching number of io registers\n")); |
13547ab6 | 1397 | xfree (buf); |
8818c391 TR |
1398 | return; |
1399 | } | |
1400 | ||
13547ab6 DJ |
1401 | xfree (buf); |
1402 | ||
2e5ff58c | 1403 | reinitialize_more_filter (); |
8818c391 | 1404 | |
edefbb7c | 1405 | printf_unfiltered (_("Target has %u io registers:\n\n"), nreg); |
8818c391 TR |
1406 | |
1407 | /* only fetch up to 8 registers at a time to keep the buffer small */ | |
1408 | step = 8; | |
1409 | ||
2e5ff58c | 1410 | for (i = 0; i < nreg; i += step) |
8818c391 | 1411 | { |
91ccbfc1 TR |
1412 | /* how many registers this round? */ |
1413 | j = step; | |
1414 | if ((i+j) >= nreg) | |
1415 | j = nreg - i; /* last block is less than 8 registers */ | |
8818c391 | 1416 | |
2e5ff58c | 1417 | snprintf (query, sizeof (query) - 1, "avr.io_reg:%x,%x", i, j); |
13547ab6 DJ |
1418 | bufsiz = target_read_alloc (¤t_target, TARGET_OBJECT_AVR, |
1419 | query, &buf); | |
8818c391 TR |
1420 | |
1421 | p = buf; | |
2e5ff58c TR |
1422 | for (k = i; k < (i + j); k++) |
1423 | { | |
1424 | if (sscanf (p, "%[^,],%x;", query, &val) == 2) | |
1425 | { | |
1426 | printf_filtered ("[%02x] %-15s : %02x\n", k, query, val); | |
1427 | while ((*p != ';') && (*p != '\0')) | |
1428 | p++; | |
1429 | p++; /* skip over ';' */ | |
1430 | if (*p == '\0') | |
1431 | break; | |
1432 | } | |
1433 | } | |
13547ab6 DJ |
1434 | |
1435 | xfree (buf); | |
8818c391 TR |
1436 | } |
1437 | } | |
1438 | ||
a78f21af AC |
1439 | extern initialize_file_ftype _initialize_avr_tdep; /* -Wmissing-prototypes */ |
1440 | ||
8818c391 TR |
1441 | void |
1442 | _initialize_avr_tdep (void) | |
1443 | { | |
1444 | register_gdbarch_init (bfd_arch_avr, avr_gdbarch_init); | |
1445 | ||
1446 | /* Add a new command to allow the user to query the avr remote target for | |
1447 | the values of the io space registers in a saner way than just using | |
1448 | `x/NNNb ADDR`. */ | |
1449 | ||
1450 | /* FIXME: TRoth/2002-02-18: This should probably be changed to 'info avr | |
1451 | io_registers' to signify it is not available on other platforms. */ | |
1452 | ||
1453 | add_cmd ("io_registers", class_info, avr_io_reg_read_command, | |
1a966eab AC |
1454 | _("query remote avr target for io space register values"), |
1455 | &infolist); | |
8818c391 | 1456 | } |