Commit | Line | Data |
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8818c391 | 1 | /* Target-dependent code for Atmel AVR, for GDB. |
0fd88904 | 2 | |
28e7fd62 | 3 | Copyright (C) 1996-2013 Free Software Foundation, Inc. |
8818c391 TR |
4 | |
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 9 | the Free Software Foundation; either version 3 of the License, or |
8818c391 TR |
10 | (at your option) any later version. |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
a9762ec7 | 18 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
8818c391 | 19 | |
de18ac1f | 20 | /* Contributed by Theodore A. Roth, troth@openavr.org */ |
8818c391 TR |
21 | |
22 | /* Portions of this file were taken from the original gdb-4.18 patch developed | |
23 | by Denis Chertykov, denisc@overta.ru */ | |
24 | ||
25 | #include "defs.h" | |
4add8633 TR |
26 | #include "frame.h" |
27 | #include "frame-unwind.h" | |
28 | #include "frame-base.h" | |
29 | #include "trad-frame.h" | |
8818c391 TR |
30 | #include "gdbcmd.h" |
31 | #include "gdbcore.h" | |
e6bb342a | 32 | #include "gdbtypes.h" |
8818c391 TR |
33 | #include "inferior.h" |
34 | #include "symfile.h" | |
35 | #include "arch-utils.h" | |
36 | #include "regcache.h" | |
5f8a3188 | 37 | #include "gdb_string.h" |
a89aa300 | 38 | #include "dis-asm.h" |
eb14d406 | 39 | #include "linux-tdep.h" |
8818c391 TR |
40 | |
41 | /* AVR Background: | |
42 | ||
43 | (AVR micros are pure Harvard Architecture processors.) | |
44 | ||
45 | The AVR family of microcontrollers have three distinctly different memory | |
0963b4bd MS |
46 | spaces: flash, sram and eeprom. The flash is 16 bits wide and is used for |
47 | the most part to store program instructions. The sram is 8 bits wide and is | |
48 | used for the stack and the heap. Some devices lack sram and some can have | |
8818c391 TR |
49 | an additional external sram added on as a peripheral. |
50 | ||
51 | The eeprom is 8 bits wide and is used to store data when the device is | |
0963b4bd MS |
52 | powered down. Eeprom is not directly accessible, it can only be accessed |
53 | via io-registers using a special algorithm. Accessing eeprom via gdb's | |
8818c391 TR |
54 | remote serial protocol ('m' or 'M' packets) looks difficult to do and is |
55 | not included at this time. | |
56 | ||
57 | [The eeprom could be read manually via ``x/b <eaddr + AVR_EMEM_START>'' or | |
58 | written using ``set {unsigned char}<eaddr + AVR_EMEM_START>''. For this to | |
59 | work, the remote target must be able to handle eeprom accesses and perform | |
60 | the address translation.] | |
61 | ||
0963b4bd | 62 | All three memory spaces have physical addresses beginning at 0x0. In |
8818c391 TR |
63 | addition, the flash is addressed by gcc/binutils/gdb with respect to 8 bit |
64 | bytes instead of the 16 bit wide words used by the real device for the | |
65 | Program Counter. | |
66 | ||
67 | In order for remote targets to work correctly, extra bits must be added to | |
68 | addresses before they are send to the target or received from the target | |
0963b4bd MS |
69 | via the remote serial protocol. The extra bits are the MSBs and are used to |
70 | decode which memory space the address is referring to. */ | |
8818c391 | 71 | |
8818c391 TR |
72 | /* Constants: prefixed with AVR_ to avoid name space clashes */ |
73 | ||
74 | enum | |
2e5ff58c TR |
75 | { |
76 | AVR_REG_W = 24, | |
77 | AVR_REG_X = 26, | |
78 | AVR_REG_Y = 28, | |
79 | AVR_FP_REGNUM = 28, | |
80 | AVR_REG_Z = 30, | |
81 | ||
82 | AVR_SREG_REGNUM = 32, | |
83 | AVR_SP_REGNUM = 33, | |
84 | AVR_PC_REGNUM = 34, | |
85 | ||
86 | AVR_NUM_REGS = 32 + 1 /*SREG*/ + 1 /*SP*/ + 1 /*PC*/, | |
87 | AVR_NUM_REG_BYTES = 32 + 1 /*SREG*/ + 2 /*SP*/ + 4 /*PC*/, | |
88 | ||
7d2552b4 TG |
89 | /* Pseudo registers. */ |
90 | AVR_PSEUDO_PC_REGNUM = 35, | |
91 | AVR_NUM_PSEUDO_REGS = 1, | |
92 | ||
2e5ff58c TR |
93 | AVR_PC_REG_INDEX = 35, /* index into array of registers */ |
94 | ||
4add8633 | 95 | AVR_MAX_PROLOGUE_SIZE = 64, /* bytes */ |
2e5ff58c | 96 | |
0963b4bd | 97 | /* Count of pushed registers. From r2 to r17 (inclusively), r28, r29 */ |
2e5ff58c TR |
98 | AVR_MAX_PUSHES = 18, |
99 | ||
0963b4bd | 100 | /* Number of the last pushed register. r17 for current avr-gcc */ |
2e5ff58c TR |
101 | AVR_LAST_PUSHED_REGNUM = 17, |
102 | ||
4add8633 TR |
103 | AVR_ARG1_REGNUM = 24, /* Single byte argument */ |
104 | AVR_ARGN_REGNUM = 25, /* Multi byte argments */ | |
105 | ||
106 | AVR_RET1_REGNUM = 24, /* Single byte return value */ | |
107 | AVR_RETN_REGNUM = 25, /* Multi byte return value */ | |
108 | ||
2e5ff58c | 109 | /* FIXME: TRoth/2002-01-??: Can we shift all these memory masks left 8 |
0963b4bd | 110 | bits? Do these have to match the bfd vma values? It sure would make |
2e5ff58c TR |
111 | things easier in the future if they didn't need to match. |
112 | ||
113 | Note: I chose these values so as to be consistent with bfd vma | |
114 | addresses. | |
115 | ||
116 | TRoth/2002-04-08: There is already a conflict with very large programs | |
0963b4bd | 117 | in the mega128. The mega128 has 128K instruction bytes (64K words), |
2e5ff58c TR |
118 | thus the Most Significant Bit is 0x10000 which gets masked off my |
119 | AVR_MEM_MASK. | |
120 | ||
121 | The problem manifests itself when trying to set a breakpoint in a | |
122 | function which resides in the upper half of the instruction space and | |
123 | thus requires a 17-bit address. | |
124 | ||
125 | For now, I've just removed the EEPROM mask and changed AVR_MEM_MASK | |
0963b4bd | 126 | from 0x00ff0000 to 0x00f00000. Eeprom is not accessible from gdb yet, |
2e5ff58c TR |
127 | but could be for some remote targets by just adding the correct offset |
128 | to the address and letting the remote target handle the low-level | |
0963b4bd | 129 | details of actually accessing the eeprom. */ |
2e5ff58c TR |
130 | |
131 | AVR_IMEM_START = 0x00000000, /* INSN memory */ | |
132 | AVR_SMEM_START = 0x00800000, /* SRAM memory */ | |
8818c391 | 133 | #if 1 |
2e5ff58c TR |
134 | /* No eeprom mask defined */ |
135 | AVR_MEM_MASK = 0x00f00000, /* mask to determine memory space */ | |
8818c391 | 136 | #else |
2e5ff58c TR |
137 | AVR_EMEM_START = 0x00810000, /* EEPROM memory */ |
138 | AVR_MEM_MASK = 0x00ff0000, /* mask to determine memory space */ | |
8818c391 | 139 | #endif |
2e5ff58c | 140 | }; |
8818c391 | 141 | |
4add8633 TR |
142 | /* Prologue types: |
143 | ||
144 | NORMAL and CALL are the typical types (the -mcall-prologues gcc option | |
145 | causes the generation of the CALL type prologues). */ | |
146 | ||
147 | enum { | |
148 | AVR_PROLOGUE_NONE, /* No prologue */ | |
149 | AVR_PROLOGUE_NORMAL, | |
150 | AVR_PROLOGUE_CALL, /* -mcall-prologues */ | |
151 | AVR_PROLOGUE_MAIN, | |
152 | AVR_PROLOGUE_INTR, /* interrupt handler */ | |
153 | AVR_PROLOGUE_SIG, /* signal handler */ | |
154 | }; | |
155 | ||
8818c391 TR |
156 | /* Any function with a frame looks like this |
157 | ....... <-SP POINTS HERE | |
158 | LOCALS1 <-FP POINTS HERE | |
159 | LOCALS0 | |
160 | SAVED FP | |
161 | SAVED R3 | |
162 | SAVED R2 | |
163 | RET PC | |
164 | FIRST ARG | |
165 | SECOND ARG */ | |
166 | ||
4add8633 | 167 | struct avr_unwind_cache |
2e5ff58c | 168 | { |
4add8633 TR |
169 | /* The previous frame's inner most stack address. Used as this |
170 | frame ID's stack_addr. */ | |
171 | CORE_ADDR prev_sp; | |
172 | /* The frame's base, optionally used by the high-level debug info. */ | |
173 | CORE_ADDR base; | |
174 | int size; | |
175 | int prologue_type; | |
176 | /* Table indicating the location of each and every register. */ | |
177 | struct trad_frame_saved_reg *saved_regs; | |
2e5ff58c | 178 | }; |
8818c391 TR |
179 | |
180 | struct gdbarch_tdep | |
2e5ff58c | 181 | { |
4e99ad69 TG |
182 | /* Number of bytes stored to the stack by call instructions. |
183 | 2 bytes for avr1-5, 3 bytes for avr6. */ | |
184 | int call_length; | |
7d2552b4 TG |
185 | |
186 | /* Type for void. */ | |
187 | struct type *void_type; | |
188 | /* Type for a function returning void. */ | |
189 | struct type *func_void_type; | |
190 | /* Type for a pointer to a function. Used for the type of PC. */ | |
191 | struct type *pc_type; | |
2e5ff58c | 192 | }; |
8818c391 | 193 | |
eb14d406 SDJ |
194 | /* This enum represents the signals' numbers on the AVR |
195 | architecture. It just contains the signal definitions which are | |
196 | different from the generic implementation. | |
197 | ||
198 | It is derived from the file <arch/avr32/include/uapi/asm/signal.h>, | |
199 | from the Linux kernel tree. */ | |
200 | ||
201 | enum | |
202 | { | |
203 | AVR_LINUX_SIGRTMIN = 32, | |
204 | AVR_LINUX_SIGRTMAX = 63, | |
205 | }; | |
206 | ||
0963b4bd | 207 | /* Lookup the name of a register given it's number. */ |
8818c391 | 208 | |
fa88f677 | 209 | static const char * |
d93859e2 | 210 | avr_register_name (struct gdbarch *gdbarch, int regnum) |
8818c391 | 211 | { |
4e99ad69 | 212 | static const char * const register_names[] = { |
2e5ff58c TR |
213 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", |
214 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", | |
8818c391 TR |
215 | "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", |
216 | "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", | |
7d2552b4 TG |
217 | "SREG", "SP", "PC2", |
218 | "pc" | |
8818c391 TR |
219 | }; |
220 | if (regnum < 0) | |
221 | return NULL; | |
222 | if (regnum >= (sizeof (register_names) / sizeof (*register_names))) | |
223 | return NULL; | |
224 | return register_names[regnum]; | |
225 | } | |
226 | ||
8818c391 TR |
227 | /* Return the GDB type object for the "standard" data type |
228 | of data in register N. */ | |
229 | ||
230 | static struct type * | |
866b76ea | 231 | avr_register_type (struct gdbarch *gdbarch, int reg_nr) |
8818c391 | 232 | { |
866b76ea | 233 | if (reg_nr == AVR_PC_REGNUM) |
df4df182 | 234 | return builtin_type (gdbarch)->builtin_uint32; |
7d2552b4 TG |
235 | if (reg_nr == AVR_PSEUDO_PC_REGNUM) |
236 | return gdbarch_tdep (gdbarch)->pc_type; | |
866b76ea | 237 | if (reg_nr == AVR_SP_REGNUM) |
0dfff4cb | 238 | return builtin_type (gdbarch)->builtin_data_ptr; |
7d2552b4 | 239 | return builtin_type (gdbarch)->builtin_uint8; |
8818c391 TR |
240 | } |
241 | ||
0963b4bd | 242 | /* Instruction address checks and convertions. */ |
8818c391 TR |
243 | |
244 | static CORE_ADDR | |
245 | avr_make_iaddr (CORE_ADDR x) | |
246 | { | |
247 | return ((x) | AVR_IMEM_START); | |
248 | } | |
249 | ||
0963b4bd | 250 | /* FIXME: TRoth: Really need to use a larger mask for instructions. Some |
8818c391 TR |
251 | devices are already up to 128KBytes of flash space. |
252 | ||
0963b4bd | 253 | TRoth/2002-04-8: See comment above where AVR_IMEM_START is defined. */ |
8818c391 TR |
254 | |
255 | static CORE_ADDR | |
256 | avr_convert_iaddr_to_raw (CORE_ADDR x) | |
257 | { | |
258 | return ((x) & 0xffffffff); | |
259 | } | |
260 | ||
0963b4bd | 261 | /* SRAM address checks and convertions. */ |
8818c391 TR |
262 | |
263 | static CORE_ADDR | |
264 | avr_make_saddr (CORE_ADDR x) | |
265 | { | |
ee143e81 TG |
266 | /* Return 0 for NULL. */ |
267 | if (x == 0) | |
268 | return 0; | |
269 | ||
8818c391 TR |
270 | return ((x) | AVR_SMEM_START); |
271 | } | |
272 | ||
8818c391 TR |
273 | static CORE_ADDR |
274 | avr_convert_saddr_to_raw (CORE_ADDR x) | |
275 | { | |
276 | return ((x) & 0xffffffff); | |
277 | } | |
278 | ||
0963b4bd MS |
279 | /* EEPROM address checks and convertions. I don't know if these will ever |
280 | actually be used, but I've added them just the same. TRoth */ | |
8818c391 TR |
281 | |
282 | /* TRoth/2002-04-08: Commented out for now to allow fix for problem with large | |
0963b4bd | 283 | programs in the mega128. */ |
8818c391 TR |
284 | |
285 | /* static CORE_ADDR */ | |
286 | /* avr_make_eaddr (CORE_ADDR x) */ | |
287 | /* { */ | |
288 | /* return ((x) | AVR_EMEM_START); */ | |
289 | /* } */ | |
290 | ||
291 | /* static int */ | |
292 | /* avr_eaddr_p (CORE_ADDR x) */ | |
293 | /* { */ | |
294 | /* return (((x) & AVR_MEM_MASK) == AVR_EMEM_START); */ | |
295 | /* } */ | |
296 | ||
297 | /* static CORE_ADDR */ | |
298 | /* avr_convert_eaddr_to_raw (CORE_ADDR x) */ | |
299 | /* { */ | |
300 | /* return ((x) & 0xffffffff); */ | |
301 | /* } */ | |
302 | ||
0963b4bd | 303 | /* Convert from address to pointer and vice-versa. */ |
8818c391 TR |
304 | |
305 | static void | |
9898f801 UW |
306 | avr_address_to_pointer (struct gdbarch *gdbarch, |
307 | struct type *type, gdb_byte *buf, CORE_ADDR addr) | |
8818c391 | 308 | { |
e17a4113 UW |
309 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
310 | ||
8818c391 TR |
311 | /* Is it a code address? */ |
312 | if (TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC | |
313 | || TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_METHOD) | |
314 | { | |
e17a4113 | 315 | store_unsigned_integer (buf, TYPE_LENGTH (type), byte_order, |
4ea2465e | 316 | avr_convert_iaddr_to_raw (addr >> 1)); |
8818c391 TR |
317 | } |
318 | else | |
319 | { | |
320 | /* Strip off any upper segment bits. */ | |
e17a4113 | 321 | store_unsigned_integer (buf, TYPE_LENGTH (type), byte_order, |
2e5ff58c | 322 | avr_convert_saddr_to_raw (addr)); |
8818c391 TR |
323 | } |
324 | } | |
325 | ||
326 | static CORE_ADDR | |
9898f801 UW |
327 | avr_pointer_to_address (struct gdbarch *gdbarch, |
328 | struct type *type, const gdb_byte *buf) | |
8818c391 | 329 | { |
e17a4113 UW |
330 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
331 | CORE_ADDR addr | |
332 | = extract_unsigned_integer (buf, TYPE_LENGTH (type), byte_order); | |
8818c391 | 333 | |
8818c391 TR |
334 | /* Is it a code address? */ |
335 | if (TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC | |
336 | || TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_METHOD | |
2e5ff58c | 337 | || TYPE_CODE_SPACE (TYPE_TARGET_TYPE (type))) |
4ea2465e | 338 | return avr_make_iaddr (addr << 1); |
8818c391 TR |
339 | else |
340 | return avr_make_saddr (addr); | |
341 | } | |
342 | ||
8a1d23b2 TG |
343 | static CORE_ADDR |
344 | avr_integer_to_address (struct gdbarch *gdbarch, | |
345 | struct type *type, const gdb_byte *buf) | |
346 | { | |
347 | ULONGEST addr = unpack_long (type, buf); | |
348 | ||
349 | return avr_make_saddr (addr); | |
350 | } | |
351 | ||
8818c391 | 352 | static CORE_ADDR |
61a1198a | 353 | avr_read_pc (struct regcache *regcache) |
8818c391 | 354 | { |
8619218d | 355 | ULONGEST pc; |
61a1198a UW |
356 | regcache_cooked_read_unsigned (regcache, AVR_PC_REGNUM, &pc); |
357 | return avr_make_iaddr (pc); | |
8818c391 TR |
358 | } |
359 | ||
360 | static void | |
61a1198a | 361 | avr_write_pc (struct regcache *regcache, CORE_ADDR val) |
8818c391 | 362 | { |
61a1198a | 363 | regcache_cooked_write_unsigned (regcache, AVR_PC_REGNUM, |
7d2552b4 TG |
364 | avr_convert_iaddr_to_raw (val)); |
365 | } | |
366 | ||
05d1431c | 367 | static enum register_status |
7d2552b4 TG |
368 | avr_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache, |
369 | int regnum, gdb_byte *buf) | |
370 | { | |
371 | ULONGEST val; | |
05d1431c | 372 | enum register_status status; |
7d2552b4 TG |
373 | |
374 | switch (regnum) | |
375 | { | |
376 | case AVR_PSEUDO_PC_REGNUM: | |
05d1431c PA |
377 | status = regcache_raw_read_unsigned (regcache, AVR_PC_REGNUM, &val); |
378 | if (status != REG_VALID) | |
379 | return status; | |
7d2552b4 TG |
380 | val >>= 1; |
381 | store_unsigned_integer (buf, 4, gdbarch_byte_order (gdbarch), val); | |
05d1431c | 382 | return status; |
7d2552b4 TG |
383 | default: |
384 | internal_error (__FILE__, __LINE__, _("invalid regnum")); | |
385 | } | |
386 | } | |
387 | ||
388 | static void | |
389 | avr_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache, | |
390 | int regnum, const gdb_byte *buf) | |
391 | { | |
392 | ULONGEST val; | |
393 | ||
394 | switch (regnum) | |
395 | { | |
396 | case AVR_PSEUDO_PC_REGNUM: | |
397 | val = extract_unsigned_integer (buf, 4, gdbarch_byte_order (gdbarch)); | |
398 | val <<= 1; | |
399 | regcache_raw_write_unsigned (regcache, AVR_PC_REGNUM, val); | |
400 | break; | |
401 | default: | |
402 | internal_error (__FILE__, __LINE__, _("invalid regnum")); | |
403 | } | |
8818c391 TR |
404 | } |
405 | ||
4add8633 | 406 | /* Function: avr_scan_prologue |
8818c391 | 407 | |
4add8633 | 408 | This function decodes an AVR function prologue to determine: |
8818c391 TR |
409 | 1) the size of the stack frame |
410 | 2) which registers are saved on it | |
411 | 3) the offsets of saved regs | |
4add8633 | 412 | This information is stored in the avr_unwind_cache structure. |
8818c391 | 413 | |
e3d8b004 TR |
414 | Some devices lack the sbiw instruction, so on those replace this: |
415 | sbiw r28, XX | |
416 | with this: | |
417 | subi r28,lo8(XX) | |
418 | sbci r29,hi8(XX) | |
419 | ||
420 | A typical AVR function prologue with a frame pointer might look like this: | |
421 | push rXX ; saved regs | |
422 | ... | |
423 | push r28 | |
424 | push r29 | |
425 | in r28,__SP_L__ | |
426 | in r29,__SP_H__ | |
427 | sbiw r28,<LOCALS_SIZE> | |
428 | in __tmp_reg__,__SREG__ | |
8818c391 | 429 | cli |
e3d8b004 | 430 | out __SP_H__,r29 |
72fab697 TR |
431 | out __SREG__,__tmp_reg__ |
432 | out __SP_L__,r28 | |
e3d8b004 TR |
433 | |
434 | A typical AVR function prologue without a frame pointer might look like | |
435 | this: | |
436 | push rXX ; saved regs | |
437 | ... | |
438 | ||
439 | A main function prologue looks like this: | |
440 | ldi r28,lo8(<RAM_ADDR> - <LOCALS_SIZE>) | |
441 | ldi r29,hi8(<RAM_ADDR> - <LOCALS_SIZE>) | |
442 | out __SP_H__,r29 | |
443 | out __SP_L__,r28 | |
444 | ||
445 | A signal handler prologue looks like this: | |
446 | push __zero_reg__ | |
447 | push __tmp_reg__ | |
448 | in __tmp_reg__, __SREG__ | |
449 | push __tmp_reg__ | |
450 | clr __zero_reg__ | |
451 | push rXX ; save registers r18:r27, r30:r31 | |
452 | ... | |
453 | push r28 ; save frame pointer | |
454 | push r29 | |
455 | in r28, __SP_L__ | |
456 | in r29, __SP_H__ | |
457 | sbiw r28, <LOCALS_SIZE> | |
458 | out __SP_H__, r29 | |
459 | out __SP_L__, r28 | |
460 | ||
461 | A interrupt handler prologue looks like this: | |
462 | sei | |
463 | push __zero_reg__ | |
464 | push __tmp_reg__ | |
465 | in __tmp_reg__, __SREG__ | |
466 | push __tmp_reg__ | |
467 | clr __zero_reg__ | |
468 | push rXX ; save registers r18:r27, r30:r31 | |
469 | ... | |
470 | push r28 ; save frame pointer | |
471 | push r29 | |
472 | in r28, __SP_L__ | |
473 | in r29, __SP_H__ | |
474 | sbiw r28, <LOCALS_SIZE> | |
475 | cli | |
476 | out __SP_H__, r29 | |
477 | sei | |
478 | out __SP_L__, r28 | |
479 | ||
480 | A `-mcall-prologues' prologue looks like this (Note that the megas use a | |
481 | jmp instead of a rjmp, thus the prologue is one word larger since jmp is a | |
482 | 32 bit insn and rjmp is a 16 bit insn): | |
483 | ldi r26,lo8(<LOCALS_SIZE>) | |
484 | ldi r27,hi8(<LOCALS_SIZE>) | |
485 | ldi r30,pm_lo8(.L_foo_body) | |
486 | ldi r31,pm_hi8(.L_foo_body) | |
487 | rjmp __prologue_saves__+RRR | |
488 | .L_foo_body: */ | |
8818c391 | 489 | |
4add8633 TR |
490 | /* Not really part of a prologue, but still need to scan for it, is when a |
491 | function prologue moves values passed via registers as arguments to new | |
0963b4bd MS |
492 | registers. In this case, all local variables live in registers, so there |
493 | may be some register saves. This is what it looks like: | |
4add8633 TR |
494 | movw rMM, rNN |
495 | ... | |
496 | ||
0963b4bd MS |
497 | There could be multiple movw's. If the target doesn't have a movw insn, it |
498 | will use two mov insns. This could be done after any of the above prologue | |
4add8633 TR |
499 | types. */ |
500 | ||
501 | static CORE_ADDR | |
e17a4113 | 502 | avr_scan_prologue (struct gdbarch *gdbarch, CORE_ADDR pc_beg, CORE_ADDR pc_end, |
4e99ad69 | 503 | struct avr_unwind_cache *info) |
8818c391 | 504 | { |
e17a4113 | 505 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
2e5ff58c TR |
506 | int i; |
507 | unsigned short insn; | |
2e5ff58c | 508 | int scan_stage = 0; |
8818c391 | 509 | struct minimal_symbol *msymbol; |
8818c391 TR |
510 | unsigned char prologue[AVR_MAX_PROLOGUE_SIZE]; |
511 | int vpc = 0; | |
4e99ad69 TG |
512 | int len; |
513 | ||
514 | len = pc_end - pc_beg; | |
515 | if (len > AVR_MAX_PROLOGUE_SIZE) | |
516 | len = AVR_MAX_PROLOGUE_SIZE; | |
8818c391 | 517 | |
4add8633 | 518 | /* FIXME: TRoth/2003-06-11: This could be made more efficient by only |
0963b4bd MS |
519 | reading in the bytes of the prologue. The problem is that the figuring |
520 | out where the end of the prologue is is a bit difficult. The old code | |
4add8633 | 521 | tried to do that, but failed quite often. */ |
4e99ad69 | 522 | read_memory (pc_beg, prologue, len); |
8818c391 TR |
523 | |
524 | /* Scanning main()'s prologue | |
525 | ldi r28,lo8(<RAM_ADDR> - <LOCALS_SIZE>) | |
526 | ldi r29,hi8(<RAM_ADDR> - <LOCALS_SIZE>) | |
527 | out __SP_H__,r29 | |
528 | out __SP_L__,r28 */ | |
529 | ||
4e99ad69 | 530 | if (len >= 4) |
8818c391 TR |
531 | { |
532 | CORE_ADDR locals; | |
4e99ad69 | 533 | static const unsigned char img[] = { |
2e5ff58c TR |
534 | 0xde, 0xbf, /* out __SP_H__,r29 */ |
535 | 0xcd, 0xbf /* out __SP_L__,r28 */ | |
8818c391 TR |
536 | }; |
537 | ||
e17a4113 | 538 | insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order); |
8818c391 | 539 | /* ldi r28,lo8(<RAM_ADDR> - <LOCALS_SIZE>) */ |
2e5ff58c TR |
540 | if ((insn & 0xf0f0) == 0xe0c0) |
541 | { | |
542 | locals = (insn & 0xf) | ((insn & 0x0f00) >> 4); | |
e17a4113 | 543 | insn = extract_unsigned_integer (&prologue[vpc + 2], 2, byte_order); |
2e5ff58c TR |
544 | /* ldi r29,hi8(<RAM_ADDR> - <LOCALS_SIZE>) */ |
545 | if ((insn & 0xf0f0) == 0xe0d0) | |
546 | { | |
547 | locals |= ((insn & 0xf) | ((insn & 0x0f00) >> 4)) << 8; | |
4e99ad69 TG |
548 | if (vpc + 4 + sizeof (img) < len |
549 | && memcmp (prologue + vpc + 4, img, sizeof (img)) == 0) | |
2e5ff58c | 550 | { |
4add8633 TR |
551 | info->prologue_type = AVR_PROLOGUE_MAIN; |
552 | info->base = locals; | |
4e99ad69 | 553 | return pc_beg + 4; |
2e5ff58c TR |
554 | } |
555 | } | |
556 | } | |
8818c391 | 557 | } |
2e5ff58c | 558 | |
4add8633 TR |
559 | /* Scanning `-mcall-prologues' prologue |
560 | Classic prologue is 10 bytes, mega prologue is a 12 bytes long */ | |
8818c391 | 561 | |
e3d8b004 | 562 | while (1) /* Using a while to avoid many goto's */ |
8818c391 TR |
563 | { |
564 | int loc_size; | |
565 | int body_addr; | |
566 | unsigned num_pushes; | |
4add8633 | 567 | int pc_offset = 0; |
2e5ff58c | 568 | |
4e99ad69 TG |
569 | /* At least the fifth instruction must have been executed to |
570 | modify frame shape. */ | |
571 | if (len < 10) | |
572 | break; | |
573 | ||
e17a4113 | 574 | insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order); |
8818c391 | 575 | /* ldi r26,<LOCALS_SIZE> */ |
2e5ff58c TR |
576 | if ((insn & 0xf0f0) != 0xe0a0) |
577 | break; | |
8818c391 | 578 | loc_size = (insn & 0xf) | ((insn & 0x0f00) >> 4); |
4add8633 | 579 | pc_offset += 2; |
2e5ff58c | 580 | |
e17a4113 | 581 | insn = extract_unsigned_integer (&prologue[vpc + 2], 2, byte_order); |
8818c391 TR |
582 | /* ldi r27,<LOCALS_SIZE> / 256 */ |
583 | if ((insn & 0xf0f0) != 0xe0b0) | |
2e5ff58c | 584 | break; |
8818c391 | 585 | loc_size |= ((insn & 0xf) | ((insn & 0x0f00) >> 4)) << 8; |
4add8633 | 586 | pc_offset += 2; |
2e5ff58c | 587 | |
e17a4113 | 588 | insn = extract_unsigned_integer (&prologue[vpc + 4], 2, byte_order); |
8818c391 TR |
589 | /* ldi r30,pm_lo8(.L_foo_body) */ |
590 | if ((insn & 0xf0f0) != 0xe0e0) | |
2e5ff58c | 591 | break; |
8818c391 | 592 | body_addr = (insn & 0xf) | ((insn & 0x0f00) >> 4); |
4add8633 | 593 | pc_offset += 2; |
8818c391 | 594 | |
e17a4113 | 595 | insn = extract_unsigned_integer (&prologue[vpc + 6], 2, byte_order); |
8818c391 TR |
596 | /* ldi r31,pm_hi8(.L_foo_body) */ |
597 | if ((insn & 0xf0f0) != 0xe0f0) | |
2e5ff58c | 598 | break; |
8818c391 | 599 | body_addr |= ((insn & 0xf) | ((insn & 0x0f00) >> 4)) << 8; |
4add8633 | 600 | pc_offset += 2; |
8818c391 | 601 | |
8818c391 TR |
602 | msymbol = lookup_minimal_symbol ("__prologue_saves__", NULL, NULL); |
603 | if (!msymbol) | |
2e5ff58c | 604 | break; |
8818c391 | 605 | |
e17a4113 | 606 | insn = extract_unsigned_integer (&prologue[vpc + 8], 2, byte_order); |
8818c391 | 607 | /* rjmp __prologue_saves__+RRR */ |
e3d8b004 TR |
608 | if ((insn & 0xf000) == 0xc000) |
609 | { | |
610 | /* Extract PC relative offset from RJMP */ | |
611 | i = (insn & 0xfff) | (insn & 0x800 ? (-1 ^ 0xfff) : 0); | |
612 | /* Convert offset to byte addressable mode */ | |
613 | i *= 2; | |
614 | /* Destination address */ | |
4e99ad69 | 615 | i += pc_beg + 10; |
e3d8b004 | 616 | |
4e99ad69 | 617 | if (body_addr != (pc_beg + 10)/2) |
e3d8b004 | 618 | break; |
4add8633 TR |
619 | |
620 | pc_offset += 2; | |
e3d8b004 | 621 | } |
e3d8b004 TR |
622 | else if ((insn & 0xfe0e) == 0x940c) |
623 | { | |
624 | /* Extract absolute PC address from JMP */ | |
625 | i = (((insn & 0x1) | ((insn & 0x1f0) >> 3) << 16) | |
e17a4113 UW |
626 | | (extract_unsigned_integer (&prologue[vpc + 10], 2, byte_order) |
627 | & 0xffff)); | |
e3d8b004 TR |
628 | /* Convert address to byte addressable mode */ |
629 | i *= 2; | |
630 | ||
4e99ad69 | 631 | if (body_addr != (pc_beg + 12)/2) |
e3d8b004 | 632 | break; |
4add8633 TR |
633 | |
634 | pc_offset += 4; | |
e3d8b004 TR |
635 | } |
636 | else | |
637 | break; | |
2e5ff58c | 638 | |
4add8633 | 639 | /* Resolve offset (in words) from __prologue_saves__ symbol. |
8818c391 TR |
640 | Which is a pushes count in `-mcall-prologues' mode */ |
641 | num_pushes = AVR_MAX_PUSHES - (i - SYMBOL_VALUE_ADDRESS (msymbol)) / 2; | |
642 | ||
643 | if (num_pushes > AVR_MAX_PUSHES) | |
4add8633 | 644 | { |
edefbb7c | 645 | fprintf_unfiltered (gdb_stderr, _("Num pushes too large: %d\n"), |
4add8633 TR |
646 | num_pushes); |
647 | num_pushes = 0; | |
648 | } | |
2e5ff58c | 649 | |
8818c391 | 650 | if (num_pushes) |
2e5ff58c TR |
651 | { |
652 | int from; | |
4add8633 TR |
653 | |
654 | info->saved_regs[AVR_FP_REGNUM + 1].addr = num_pushes; | |
2e5ff58c | 655 | if (num_pushes >= 2) |
4add8633 TR |
656 | info->saved_regs[AVR_FP_REGNUM].addr = num_pushes - 1; |
657 | ||
2e5ff58c TR |
658 | i = 0; |
659 | for (from = AVR_LAST_PUSHED_REGNUM + 1 - (num_pushes - 2); | |
660 | from <= AVR_LAST_PUSHED_REGNUM; ++from) | |
4add8633 | 661 | info->saved_regs [from].addr = ++i; |
2e5ff58c | 662 | } |
4add8633 TR |
663 | info->size = loc_size + num_pushes; |
664 | info->prologue_type = AVR_PROLOGUE_CALL; | |
665 | ||
4e99ad69 | 666 | return pc_beg + pc_offset; |
8818c391 TR |
667 | } |
668 | ||
4add8633 TR |
669 | /* Scan for the beginning of the prologue for an interrupt or signal |
670 | function. Note that we have to set the prologue type here since the | |
671 | third stage of the prologue may not be present (e.g. no saved registered | |
672 | or changing of the SP register). */ | |
8818c391 | 673 | |
4add8633 | 674 | if (1) |
8818c391 | 675 | { |
4e99ad69 | 676 | static const unsigned char img[] = { |
2e5ff58c TR |
677 | 0x78, 0x94, /* sei */ |
678 | 0x1f, 0x92, /* push r1 */ | |
679 | 0x0f, 0x92, /* push r0 */ | |
680 | 0x0f, 0xb6, /* in r0,0x3f SREG */ | |
681 | 0x0f, 0x92, /* push r0 */ | |
682 | 0x11, 0x24 /* clr r1 */ | |
8818c391 | 683 | }; |
4e99ad69 TG |
684 | if (len >= sizeof (img) |
685 | && memcmp (prologue, img, sizeof (img)) == 0) | |
2e5ff58c | 686 | { |
4add8633 | 687 | info->prologue_type = AVR_PROLOGUE_INTR; |
2e5ff58c | 688 | vpc += sizeof (img); |
4add8633 TR |
689 | info->saved_regs[AVR_SREG_REGNUM].addr = 3; |
690 | info->saved_regs[0].addr = 2; | |
691 | info->saved_regs[1].addr = 1; | |
692 | info->size += 3; | |
2e5ff58c | 693 | } |
4e99ad69 TG |
694 | else if (len >= sizeof (img) - 2 |
695 | && memcmp (img + 2, prologue, sizeof (img) - 2) == 0) | |
2e5ff58c | 696 | { |
4add8633 TR |
697 | info->prologue_type = AVR_PROLOGUE_SIG; |
698 | vpc += sizeof (img) - 2; | |
699 | info->saved_regs[AVR_SREG_REGNUM].addr = 3; | |
700 | info->saved_regs[0].addr = 2; | |
701 | info->saved_regs[1].addr = 1; | |
243e2c5d | 702 | info->size += 2; |
2e5ff58c | 703 | } |
8818c391 TR |
704 | } |
705 | ||
706 | /* First stage of the prologue scanning. | |
4add8633 | 707 | Scan pushes (saved registers) */ |
8818c391 | 708 | |
4e99ad69 | 709 | for (; vpc < len; vpc += 2) |
8818c391 | 710 | { |
e17a4113 | 711 | insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order); |
2e5ff58c TR |
712 | if ((insn & 0xfe0f) == 0x920f) /* push rXX */ |
713 | { | |
0963b4bd | 714 | /* Bits 4-9 contain a mask for registers R0-R32. */ |
4add8633 TR |
715 | int regno = (insn & 0x1f0) >> 4; |
716 | info->size++; | |
717 | info->saved_regs[regno].addr = info->size; | |
2e5ff58c TR |
718 | scan_stage = 1; |
719 | } | |
8818c391 | 720 | else |
2e5ff58c | 721 | break; |
8818c391 TR |
722 | } |
723 | ||
243e2c5d | 724 | gdb_assert (vpc < AVR_MAX_PROLOGUE_SIZE); |
4add8633 | 725 | |
1bd0bb72 TG |
726 | /* Handle static small stack allocation using rcall or push. */ |
727 | ||
728 | while (scan_stage == 1 && vpc < len) | |
729 | { | |
730 | insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order); | |
731 | if (insn == 0xd000) /* rcall .+0 */ | |
732 | { | |
733 | info->size += gdbarch_tdep (gdbarch)->call_length; | |
734 | vpc += 2; | |
735 | } | |
736 | else if (insn == 0x920f) /* push r0 */ | |
737 | { | |
738 | info->size += 1; | |
739 | vpc += 2; | |
740 | } | |
741 | else | |
742 | break; | |
743 | } | |
744 | ||
8818c391 TR |
745 | /* Second stage of the prologue scanning. |
746 | Scan: | |
747 | in r28,__SP_L__ | |
748 | in r29,__SP_H__ */ | |
749 | ||
4e99ad69 | 750 | if (scan_stage == 1 && vpc < len) |
8818c391 | 751 | { |
4e99ad69 | 752 | static const unsigned char img[] = { |
2e5ff58c TR |
753 | 0xcd, 0xb7, /* in r28,__SP_L__ */ |
754 | 0xde, 0xb7 /* in r29,__SP_H__ */ | |
8818c391 | 755 | }; |
2e5ff58c | 756 | |
4e99ad69 TG |
757 | if (vpc + sizeof (img) < len |
758 | && memcmp (prologue + vpc, img, sizeof (img)) == 0) | |
2e5ff58c TR |
759 | { |
760 | vpc += 4; | |
2e5ff58c TR |
761 | scan_stage = 2; |
762 | } | |
8818c391 TR |
763 | } |
764 | ||
0963b4bd | 765 | /* Third stage of the prologue scanning. (Really two stages). |
8818c391 TR |
766 | Scan for: |
767 | sbiw r28,XX or subi r28,lo8(XX) | |
72fab697 | 768 | sbci r29,hi8(XX) |
8818c391 TR |
769 | in __tmp_reg__,__SREG__ |
770 | cli | |
e3d8b004 | 771 | out __SP_H__,r29 |
8818c391 | 772 | out __SREG__,__tmp_reg__ |
e3d8b004 | 773 | out __SP_L__,r28 */ |
8818c391 | 774 | |
4e99ad69 | 775 | if (scan_stage == 2 && vpc < len) |
8818c391 TR |
776 | { |
777 | int locals_size = 0; | |
4e99ad69 | 778 | static const unsigned char img[] = { |
2e5ff58c TR |
779 | 0x0f, 0xb6, /* in r0,0x3f */ |
780 | 0xf8, 0x94, /* cli */ | |
e3d8b004 | 781 | 0xde, 0xbf, /* out 0x3e,r29 ; SPH */ |
2e5ff58c | 782 | 0x0f, 0xbe, /* out 0x3f,r0 ; SREG */ |
e3d8b004 | 783 | 0xcd, 0xbf /* out 0x3d,r28 ; SPL */ |
8818c391 | 784 | }; |
4e99ad69 | 785 | static const unsigned char img_sig[] = { |
e3d8b004 TR |
786 | 0xde, 0xbf, /* out 0x3e,r29 ; SPH */ |
787 | 0xcd, 0xbf /* out 0x3d,r28 ; SPL */ | |
8818c391 | 788 | }; |
4e99ad69 | 789 | static const unsigned char img_int[] = { |
2e5ff58c | 790 | 0xf8, 0x94, /* cli */ |
e3d8b004 | 791 | 0xde, 0xbf, /* out 0x3e,r29 ; SPH */ |
2e5ff58c | 792 | 0x78, 0x94, /* sei */ |
e3d8b004 | 793 | 0xcd, 0xbf /* out 0x3d,r28 ; SPL */ |
8818c391 | 794 | }; |
2e5ff58c | 795 | |
e17a4113 | 796 | insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order); |
2e5ff58c | 797 | if ((insn & 0xff30) == 0x9720) /* sbiw r28,XXX */ |
1bd0bb72 TG |
798 | { |
799 | locals_size = (insn & 0xf) | ((insn & 0xc0) >> 2); | |
800 | vpc += 2; | |
801 | } | |
2e5ff58c TR |
802 | else if ((insn & 0xf0f0) == 0x50c0) /* subi r28,lo8(XX) */ |
803 | { | |
804 | locals_size = (insn & 0xf) | ((insn & 0xf00) >> 4); | |
1bd0bb72 | 805 | vpc += 2; |
e17a4113 | 806 | insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order); |
2e5ff58c | 807 | vpc += 2; |
1bd0bb72 | 808 | locals_size += ((insn & 0xf) | ((insn & 0xf00) >> 4)) << 8; |
2e5ff58c | 809 | } |
8818c391 | 810 | else |
1bd0bb72 | 811 | return pc_beg + vpc; |
4add8633 | 812 | |
0963b4bd | 813 | /* Scan the last part of the prologue. May not be present for interrupt |
4add8633 TR |
814 | or signal handler functions, which is why we set the prologue type |
815 | when we saw the beginning of the prologue previously. */ | |
816 | ||
4e99ad69 TG |
817 | if (vpc + sizeof (img_sig) < len |
818 | && memcmp (prologue + vpc, img_sig, sizeof (img_sig)) == 0) | |
4add8633 TR |
819 | { |
820 | vpc += sizeof (img_sig); | |
821 | } | |
4e99ad69 TG |
822 | else if (vpc + sizeof (img_int) < len |
823 | && memcmp (prologue + vpc, img_int, sizeof (img_int)) == 0) | |
4add8633 TR |
824 | { |
825 | vpc += sizeof (img_int); | |
826 | } | |
4e99ad69 TG |
827 | if (vpc + sizeof (img) < len |
828 | && memcmp (prologue + vpc, img, sizeof (img)) == 0) | |
4add8633 TR |
829 | { |
830 | info->prologue_type = AVR_PROLOGUE_NORMAL; | |
831 | vpc += sizeof (img); | |
832 | } | |
833 | ||
834 | info->size += locals_size; | |
835 | ||
4e99ad69 | 836 | /* Fall through. */ |
8818c391 | 837 | } |
4add8633 TR |
838 | |
839 | /* If we got this far, we could not scan the prologue, so just return the pc | |
840 | of the frame plus an adjustment for argument move insns. */ | |
841 | ||
4e99ad69 TG |
842 | for (; vpc < len; vpc += 2) |
843 | { | |
e17a4113 | 844 | insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order); |
4e99ad69 TG |
845 | if ((insn & 0xff00) == 0x0100) /* movw rXX, rYY */ |
846 | continue; | |
847 | else if ((insn & 0xfc00) == 0x2c00) /* mov rXX, rYY */ | |
848 | continue; | |
849 | else | |
850 | break; | |
851 | } | |
852 | ||
853 | return pc_beg + vpc; | |
8818c391 TR |
854 | } |
855 | ||
4add8633 | 856 | static CORE_ADDR |
6093d2eb | 857 | avr_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) |
4add8633 TR |
858 | { |
859 | CORE_ADDR func_addr, func_end; | |
8c201e54 | 860 | CORE_ADDR post_prologue_pc; |
8818c391 | 861 | |
4add8633 | 862 | /* See what the symbol table says */ |
8818c391 | 863 | |
8c201e54 TG |
864 | if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end)) |
865 | return pc; | |
2e5ff58c | 866 | |
8c201e54 TG |
867 | post_prologue_pc = skip_prologue_using_sal (gdbarch, func_addr); |
868 | if (post_prologue_pc != 0) | |
869 | return max (pc, post_prologue_pc); | |
8818c391 | 870 | |
8c201e54 TG |
871 | { |
872 | CORE_ADDR prologue_end = pc; | |
873 | struct avr_unwind_cache info = {0}; | |
874 | struct trad_frame_saved_reg saved_regs[AVR_NUM_REGS]; | |
8818c391 | 875 | |
8c201e54 TG |
876 | info.saved_regs = saved_regs; |
877 | ||
878 | /* Need to run the prologue scanner to figure out if the function has a | |
879 | prologue and possibly skip over moving arguments passed via registers | |
880 | to other registers. */ | |
881 | ||
882 | prologue_end = avr_scan_prologue (gdbarch, func_addr, func_end, &info); | |
883 | ||
884 | if (info.prologue_type != AVR_PROLOGUE_NONE) | |
885 | return prologue_end; | |
886 | } | |
2e5ff58c | 887 | |
4e99ad69 TG |
888 | /* Either we didn't find the start of this function (nothing we can do), |
889 | or there's no line info, or the line after the prologue is after | |
0963b4bd | 890 | the end of the function (there probably isn't a prologue). */ |
2e5ff58c | 891 | |
8c201e54 | 892 | return pc; |
4add8633 | 893 | } |
8818c391 | 894 | |
0963b4bd MS |
895 | /* Not all avr devices support the BREAK insn. Those that don't should treat |
896 | it as a NOP. Thus, it should be ok. Since the avr is currently a remote | |
897 | only target, this shouldn't be a problem (I hope). TRoth/2003-05-14 */ | |
8818c391 | 898 | |
4add8633 | 899 | static const unsigned char * |
0963b4bd MS |
900 | avr_breakpoint_from_pc (struct gdbarch *gdbarch, |
901 | CORE_ADDR *pcptr, int *lenptr) | |
4add8633 | 902 | { |
4e99ad69 | 903 | static const unsigned char avr_break_insn [] = { 0x98, 0x95 }; |
4add8633 TR |
904 | *lenptr = sizeof (avr_break_insn); |
905 | return avr_break_insn; | |
8818c391 TR |
906 | } |
907 | ||
4c8b6ae0 UW |
908 | /* Determine, for architecture GDBARCH, how a return value of TYPE |
909 | should be returned. If it is supposed to be returned in registers, | |
910 | and READBUF is non-zero, read the appropriate value from REGCACHE, | |
911 | and copy it into READBUF. If WRITEBUF is non-zero, write the value | |
912 | from WRITEBUF into REGCACHE. */ | |
913 | ||
63807e1d | 914 | static enum return_value_convention |
6a3a010b | 915 | avr_return_value (struct gdbarch *gdbarch, struct value *function, |
c055b101 CV |
916 | struct type *valtype, struct regcache *regcache, |
917 | gdb_byte *readbuf, const gdb_byte *writebuf) | |
4c8b6ae0 | 918 | { |
1bd0bb72 TG |
919 | int i; |
920 | /* Single byte are returned in r24. | |
921 | Otherwise, the MSB of the return value is always in r25, calculate which | |
922 | register holds the LSB. */ | |
923 | int lsb_reg; | |
924 | ||
925 | if ((TYPE_CODE (valtype) == TYPE_CODE_STRUCT | |
926 | || TYPE_CODE (valtype) == TYPE_CODE_UNION | |
927 | || TYPE_CODE (valtype) == TYPE_CODE_ARRAY) | |
928 | && TYPE_LENGTH (valtype) > 8) | |
929 | return RETURN_VALUE_STRUCT_CONVENTION; | |
930 | ||
931 | if (TYPE_LENGTH (valtype) <= 2) | |
932 | lsb_reg = 24; | |
933 | else if (TYPE_LENGTH (valtype) <= 4) | |
934 | lsb_reg = 22; | |
935 | else if (TYPE_LENGTH (valtype) <= 8) | |
936 | lsb_reg = 18; | |
937 | else | |
f3574227 | 938 | gdb_assert_not_reached ("unexpected type length"); |
4c8b6ae0 UW |
939 | |
940 | if (writebuf != NULL) | |
941 | { | |
1bd0bb72 TG |
942 | for (i = 0; i < TYPE_LENGTH (valtype); i++) |
943 | regcache_cooked_write (regcache, lsb_reg + i, writebuf + i); | |
4c8b6ae0 UW |
944 | } |
945 | ||
946 | if (readbuf != NULL) | |
947 | { | |
1bd0bb72 TG |
948 | for (i = 0; i < TYPE_LENGTH (valtype); i++) |
949 | regcache_cooked_read (regcache, lsb_reg + i, readbuf + i); | |
4c8b6ae0 UW |
950 | } |
951 | ||
1bd0bb72 | 952 | return RETURN_VALUE_REGISTER_CONVENTION; |
4c8b6ae0 UW |
953 | } |
954 | ||
955 | ||
4add8633 TR |
956 | /* Put here the code to store, into fi->saved_regs, the addresses of |
957 | the saved registers of frame described by FRAME_INFO. This | |
958 | includes special registers such as pc and fp saved in special ways | |
959 | in the stack frame. sp is even more special: the address we return | |
0963b4bd | 960 | for it IS the sp for the next frame. */ |
8818c391 | 961 | |
63807e1d | 962 | static struct avr_unwind_cache * |
94afd7a6 | 963 | avr_frame_unwind_cache (struct frame_info *this_frame, |
4add8633 | 964 | void **this_prologue_cache) |
8818c391 | 965 | { |
4e99ad69 | 966 | CORE_ADDR start_pc, current_pc; |
4add8633 TR |
967 | ULONGEST prev_sp; |
968 | ULONGEST this_base; | |
969 | struct avr_unwind_cache *info; | |
4e99ad69 TG |
970 | struct gdbarch *gdbarch; |
971 | struct gdbarch_tdep *tdep; | |
4add8633 TR |
972 | int i; |
973 | ||
4e99ad69 TG |
974 | if (*this_prologue_cache) |
975 | return *this_prologue_cache; | |
4add8633 TR |
976 | |
977 | info = FRAME_OBSTACK_ZALLOC (struct avr_unwind_cache); | |
4e99ad69 | 978 | *this_prologue_cache = info; |
94afd7a6 | 979 | info->saved_regs = trad_frame_alloc_saved_regs (this_frame); |
4add8633 TR |
980 | |
981 | info->size = 0; | |
982 | info->prologue_type = AVR_PROLOGUE_NONE; | |
983 | ||
4e99ad69 TG |
984 | start_pc = get_frame_func (this_frame); |
985 | current_pc = get_frame_pc (this_frame); | |
986 | if ((start_pc > 0) && (start_pc <= current_pc)) | |
e17a4113 UW |
987 | avr_scan_prologue (get_frame_arch (this_frame), |
988 | start_pc, current_pc, info); | |
4add8633 | 989 | |
3b85b0f1 TR |
990 | if ((info->prologue_type != AVR_PROLOGUE_NONE) |
991 | && (info->prologue_type != AVR_PROLOGUE_MAIN)) | |
4add8633 TR |
992 | { |
993 | ULONGEST high_base; /* High byte of FP */ | |
994 | ||
995 | /* The SP was moved to the FP. This indicates that a new frame | |
996 | was created. Get THIS frame's FP value by unwinding it from | |
997 | the next frame. */ | |
94afd7a6 | 998 | this_base = get_frame_register_unsigned (this_frame, AVR_FP_REGNUM); |
4e99ad69 | 999 | high_base = get_frame_register_unsigned (this_frame, AVR_FP_REGNUM + 1); |
4add8633 TR |
1000 | this_base += (high_base << 8); |
1001 | ||
1002 | /* The FP points at the last saved register. Adjust the FP back | |
1003 | to before the first saved register giving the SP. */ | |
1004 | prev_sp = this_base + info->size; | |
1005 | } | |
8818c391 | 1006 | else |
4add8633 TR |
1007 | { |
1008 | /* Assume that the FP is this frame's SP but with that pushed | |
1009 | stack space added back. */ | |
94afd7a6 | 1010 | this_base = get_frame_register_unsigned (this_frame, AVR_SP_REGNUM); |
4add8633 TR |
1011 | prev_sp = this_base + info->size; |
1012 | } | |
1013 | ||
1014 | /* Add 1 here to adjust for the post-decrement nature of the push | |
1015 | instruction.*/ | |
4e99ad69 | 1016 | info->prev_sp = avr_make_saddr (prev_sp + 1); |
4add8633 TR |
1017 | info->base = avr_make_saddr (this_base); |
1018 | ||
4e99ad69 TG |
1019 | gdbarch = get_frame_arch (this_frame); |
1020 | ||
4add8633 | 1021 | /* Adjust all the saved registers so that they contain addresses and not |
3b85b0f1 | 1022 | offsets. */ |
4e99ad69 TG |
1023 | for (i = 0; i < gdbarch_num_regs (gdbarch) - 1; i++) |
1024 | if (info->saved_regs[i].addr > 0) | |
1025 | info->saved_regs[i].addr = info->prev_sp - info->saved_regs[i].addr; | |
4add8633 TR |
1026 | |
1027 | /* Except for the main and startup code, the return PC is always saved on | |
0963b4bd | 1028 | the stack and is at the base of the frame. */ |
4add8633 TR |
1029 | |
1030 | if (info->prologue_type != AVR_PROLOGUE_MAIN) | |
4e99ad69 | 1031 | info->saved_regs[AVR_PC_REGNUM].addr = info->prev_sp; |
4add8633 | 1032 | |
3b85b0f1 TR |
1033 | /* The previous frame's SP needed to be computed. Save the computed |
1034 | value. */ | |
4e99ad69 TG |
1035 | tdep = gdbarch_tdep (gdbarch); |
1036 | trad_frame_set_value (info->saved_regs, AVR_SP_REGNUM, | |
1037 | info->prev_sp - 1 + tdep->call_length); | |
3b85b0f1 | 1038 | |
4add8633 | 1039 | return info; |
8818c391 TR |
1040 | } |
1041 | ||
1042 | static CORE_ADDR | |
4add8633 | 1043 | avr_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) |
8818c391 | 1044 | { |
4add8633 TR |
1045 | ULONGEST pc; |
1046 | ||
11411de3 | 1047 | pc = frame_unwind_register_unsigned (next_frame, AVR_PC_REGNUM); |
4add8633 TR |
1048 | |
1049 | return avr_make_iaddr (pc); | |
8818c391 TR |
1050 | } |
1051 | ||
30244cd8 UW |
1052 | static CORE_ADDR |
1053 | avr_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
1054 | { | |
1055 | ULONGEST sp; | |
1056 | ||
11411de3 | 1057 | sp = frame_unwind_register_unsigned (next_frame, AVR_SP_REGNUM); |
30244cd8 UW |
1058 | |
1059 | return avr_make_saddr (sp); | |
1060 | } | |
1061 | ||
4add8633 TR |
1062 | /* Given a GDB frame, determine the address of the calling function's |
1063 | frame. This will be used to create a new GDB frame struct. */ | |
8818c391 | 1064 | |
4add8633 | 1065 | static void |
94afd7a6 | 1066 | avr_frame_this_id (struct frame_info *this_frame, |
4add8633 TR |
1067 | void **this_prologue_cache, |
1068 | struct frame_id *this_id) | |
8818c391 | 1069 | { |
4add8633 | 1070 | struct avr_unwind_cache *info |
94afd7a6 | 1071 | = avr_frame_unwind_cache (this_frame, this_prologue_cache); |
4add8633 TR |
1072 | CORE_ADDR base; |
1073 | CORE_ADDR func; | |
1074 | struct frame_id id; | |
1075 | ||
1076 | /* The FUNC is easy. */ | |
94afd7a6 | 1077 | func = get_frame_func (this_frame); |
4add8633 | 1078 | |
4add8633 TR |
1079 | /* Hopefully the prologue analysis either correctly determined the |
1080 | frame's base (which is the SP from the previous frame), or set | |
1081 | that base to "NULL". */ | |
1082 | base = info->prev_sp; | |
1083 | if (base == 0) | |
1084 | return; | |
1085 | ||
1086 | id = frame_id_build (base, func); | |
4add8633 | 1087 | (*this_id) = id; |
8818c391 TR |
1088 | } |
1089 | ||
94afd7a6 UW |
1090 | static struct value * |
1091 | avr_frame_prev_register (struct frame_info *this_frame, | |
4e99ad69 | 1092 | void **this_prologue_cache, int regnum) |
8818c391 | 1093 | { |
e17a4113 UW |
1094 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
1095 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
4add8633 | 1096 | struct avr_unwind_cache *info |
94afd7a6 | 1097 | = avr_frame_unwind_cache (this_frame, this_prologue_cache); |
8818c391 | 1098 | |
7d2552b4 | 1099 | if (regnum == AVR_PC_REGNUM || regnum == AVR_PSEUDO_PC_REGNUM) |
3b85b0f1 | 1100 | { |
7d2552b4 | 1101 | if (trad_frame_addr_p (info->saved_regs, AVR_PC_REGNUM)) |
3b85b0f1 | 1102 | { |
94afd7a6 UW |
1103 | /* Reading the return PC from the PC register is slightly |
1104 | abnormal. register_size(AVR_PC_REGNUM) says it is 4 bytes, | |
1105 | but in reality, only two bytes (3 in upcoming mega256) are | |
1106 | stored on the stack. | |
1107 | ||
1108 | Also, note that the value on the stack is an addr to a word | |
1109 | not a byte, so we will need to multiply it by two at some | |
1110 | point. | |
1111 | ||
1112 | And to confuse matters even more, the return address stored | |
1113 | on the stack is in big endian byte order, even though most | |
0963b4bd | 1114 | everything else about the avr is little endian. Ick! */ |
94afd7a6 | 1115 | ULONGEST pc; |
4e99ad69 | 1116 | int i; |
e362b510 | 1117 | gdb_byte buf[3]; |
4e99ad69 TG |
1118 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
1119 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
94afd7a6 | 1120 | |
7d2552b4 TG |
1121 | read_memory (info->saved_regs[AVR_PC_REGNUM].addr, |
1122 | buf, tdep->call_length); | |
94afd7a6 | 1123 | |
4e99ad69 TG |
1124 | /* Extract the PC read from memory as a big-endian. */ |
1125 | pc = 0; | |
1126 | for (i = 0; i < tdep->call_length; i++) | |
1127 | pc = (pc << 8) | buf[i]; | |
94afd7a6 | 1128 | |
7d2552b4 TG |
1129 | if (regnum == AVR_PC_REGNUM) |
1130 | pc <<= 1; | |
1131 | ||
1132 | return frame_unwind_got_constant (this_frame, regnum, pc); | |
3b85b0f1 | 1133 | } |
94afd7a6 UW |
1134 | |
1135 | return frame_unwind_got_optimized (this_frame, regnum); | |
3b85b0f1 | 1136 | } |
94afd7a6 UW |
1137 | |
1138 | return trad_frame_get_prev_register (this_frame, info->saved_regs, regnum); | |
4add8633 | 1139 | } |
8818c391 | 1140 | |
4add8633 TR |
1141 | static const struct frame_unwind avr_frame_unwind = { |
1142 | NORMAL_FRAME, | |
8fbca658 | 1143 | default_frame_unwind_stop_reason, |
4add8633 | 1144 | avr_frame_this_id, |
94afd7a6 UW |
1145 | avr_frame_prev_register, |
1146 | NULL, | |
1147 | default_frame_sniffer | |
4add8633 TR |
1148 | }; |
1149 | ||
8818c391 | 1150 | static CORE_ADDR |
94afd7a6 | 1151 | avr_frame_base_address (struct frame_info *this_frame, void **this_cache) |
8818c391 | 1152 | { |
4add8633 | 1153 | struct avr_unwind_cache *info |
94afd7a6 | 1154 | = avr_frame_unwind_cache (this_frame, this_cache); |
8818c391 | 1155 | |
4add8633 TR |
1156 | return info->base; |
1157 | } | |
8818c391 | 1158 | |
4add8633 TR |
1159 | static const struct frame_base avr_frame_base = { |
1160 | &avr_frame_unwind, | |
1161 | avr_frame_base_address, | |
1162 | avr_frame_base_address, | |
1163 | avr_frame_base_address | |
1164 | }; | |
ced15480 | 1165 | |
94afd7a6 UW |
1166 | /* Assuming THIS_FRAME is a dummy, return the frame ID of that dummy |
1167 | frame. The frame ID's base needs to match the TOS value saved by | |
1168 | save_dummy_frame_tos(), and the PC match the dummy frame's breakpoint. */ | |
8818c391 | 1169 | |
4add8633 | 1170 | static struct frame_id |
94afd7a6 | 1171 | avr_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame) |
4add8633 TR |
1172 | { |
1173 | ULONGEST base; | |
8818c391 | 1174 | |
94afd7a6 UW |
1175 | base = get_frame_register_unsigned (this_frame, AVR_SP_REGNUM); |
1176 | return frame_id_build (avr_make_saddr (base), get_frame_pc (this_frame)); | |
8818c391 TR |
1177 | } |
1178 | ||
4add8633 | 1179 | /* When arguments must be pushed onto the stack, they go on in reverse |
0963b4bd | 1180 | order. The below implements a FILO (stack) to do this. */ |
8818c391 | 1181 | |
4add8633 TR |
1182 | struct stack_item |
1183 | { | |
1184 | int len; | |
1185 | struct stack_item *prev; | |
1186 | void *data; | |
1187 | }; | |
8818c391 | 1188 | |
4add8633 | 1189 | static struct stack_item * |
0fd88904 | 1190 | push_stack_item (struct stack_item *prev, const bfd_byte *contents, int len) |
8818c391 | 1191 | { |
4add8633 TR |
1192 | struct stack_item *si; |
1193 | si = xmalloc (sizeof (struct stack_item)); | |
1194 | si->data = xmalloc (len); | |
1195 | si->len = len; | |
1196 | si->prev = prev; | |
1197 | memcpy (si->data, contents, len); | |
1198 | return si; | |
8818c391 TR |
1199 | } |
1200 | ||
4add8633 TR |
1201 | static struct stack_item *pop_stack_item (struct stack_item *si); |
1202 | static struct stack_item * | |
1203 | pop_stack_item (struct stack_item *si) | |
8818c391 | 1204 | { |
4add8633 TR |
1205 | struct stack_item *dead = si; |
1206 | si = si->prev; | |
1207 | xfree (dead->data); | |
1208 | xfree (dead); | |
1209 | return si; | |
8818c391 TR |
1210 | } |
1211 | ||
8818c391 TR |
1212 | /* Setup the function arguments for calling a function in the inferior. |
1213 | ||
1214 | On the AVR architecture, there are 18 registers (R25 to R8) which are | |
1215 | dedicated for passing function arguments. Up to the first 18 arguments | |
1216 | (depending on size) may go into these registers. The rest go on the stack. | |
1217 | ||
4add8633 | 1218 | All arguments are aligned to start in even-numbered registers (odd-sized |
0963b4bd | 1219 | arguments, including char, have one free register above them). For example, |
4add8633 TR |
1220 | an int in arg1 and a char in arg2 would be passed as such: |
1221 | ||
1222 | arg1 -> r25:r24 | |
1223 | arg2 -> r22 | |
1224 | ||
1225 | Arguments that are larger than 2 bytes will be split between two or more | |
1226 | registers as available, but will NOT be split between a register and the | |
0963b4bd | 1227 | stack. Arguments that go onto the stack are pushed last arg first (this is |
4add8633 TR |
1228 | similar to the d10v). */ |
1229 | ||
1230 | /* NOTE: TRoth/2003-06-17: The rest of this comment is old looks to be | |
1231 | inaccurate. | |
8818c391 TR |
1232 | |
1233 | An exceptional case exists for struct arguments (and possibly other | |
1234 | aggregates such as arrays) -- if the size is larger than WORDSIZE bytes but | |
1235 | not a multiple of WORDSIZE bytes. In this case the argument is never split | |
1236 | between the registers and the stack, but instead is copied in its entirety | |
1237 | onto the stack, AND also copied into as many registers as there is room | |
1238 | for. In other words, space in registers permitting, two copies of the same | |
1239 | argument are passed in. As far as I can tell, only the one on the stack is | |
1240 | used, although that may be a function of the level of compiler | |
1241 | optimization. I suspect this is a compiler bug. Arguments of these odd | |
1242 | sizes are left-justified within the word (as opposed to arguments smaller | |
1243 | than WORDSIZE bytes, which are right-justified). | |
1244 | ||
1245 | If the function is to return an aggregate type such as a struct, the caller | |
1246 | must allocate space into which the callee will copy the return value. In | |
1247 | this case, a pointer to the return value location is passed into the callee | |
1248 | in register R0, which displaces one of the other arguments passed in via | |
0963b4bd | 1249 | registers R0 to R2. */ |
8818c391 TR |
1250 | |
1251 | static CORE_ADDR | |
7d9b040b | 1252 | avr_push_dummy_call (struct gdbarch *gdbarch, struct value *function, |
4add8633 TR |
1253 | struct regcache *regcache, CORE_ADDR bp_addr, |
1254 | int nargs, struct value **args, CORE_ADDR sp, | |
1255 | int struct_return, CORE_ADDR struct_addr) | |
8818c391 | 1256 | { |
e17a4113 | 1257 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
4add8633 | 1258 | int i; |
e362b510 | 1259 | gdb_byte buf[3]; |
6d1915d4 | 1260 | int call_length = gdbarch_tdep (gdbarch)->call_length; |
4add8633 TR |
1261 | CORE_ADDR return_pc = avr_convert_iaddr_to_raw (bp_addr); |
1262 | int regnum = AVR_ARGN_REGNUM; | |
1263 | struct stack_item *si = NULL; | |
8818c391 | 1264 | |
4add8633 | 1265 | if (struct_return) |
8818c391 | 1266 | { |
fd6d6815 TG |
1267 | regcache_cooked_write_unsigned |
1268 | (regcache, regnum--, (struct_addr >> 8) & 0xff); | |
1269 | regcache_cooked_write_unsigned | |
1270 | (regcache, regnum--, struct_addr & 0xff); | |
1271 | /* SP being post decremented, we need to reserve one byte so that the | |
1272 | return address won't overwrite the result (or vice-versa). */ | |
1273 | if (sp == struct_addr) | |
1274 | sp--; | |
8818c391 TR |
1275 | } |
1276 | ||
4add8633 | 1277 | for (i = 0; i < nargs; i++) |
8818c391 | 1278 | { |
4add8633 TR |
1279 | int last_regnum; |
1280 | int j; | |
1281 | struct value *arg = args[i]; | |
4991999e | 1282 | struct type *type = check_typedef (value_type (arg)); |
0fd88904 | 1283 | const bfd_byte *contents = value_contents (arg); |
4add8633 TR |
1284 | int len = TYPE_LENGTH (type); |
1285 | ||
0963b4bd | 1286 | /* Calculate the potential last register needed. */ |
4add8633 TR |
1287 | last_regnum = regnum - (len + (len & 1)); |
1288 | ||
0963b4bd MS |
1289 | /* If there are registers available, use them. Once we start putting |
1290 | stuff on the stack, all subsequent args go on stack. */ | |
4add8633 TR |
1291 | if ((si == NULL) && (last_regnum >= 8)) |
1292 | { | |
1293 | ULONGEST val; | |
1294 | ||
0963b4bd | 1295 | /* Skip a register for odd length args. */ |
4add8633 TR |
1296 | if (len & 1) |
1297 | regnum--; | |
1298 | ||
e17a4113 | 1299 | val = extract_unsigned_integer (contents, len, byte_order); |
6d1915d4 TG |
1300 | for (j = 0; j < len; j++) |
1301 | regcache_cooked_write_unsigned | |
1302 | (regcache, regnum--, val >> (8 * (len - j - 1))); | |
4add8633 | 1303 | } |
0963b4bd | 1304 | /* No registers available, push the args onto the stack. */ |
4add8633 TR |
1305 | else |
1306 | { | |
0963b4bd | 1307 | /* From here on, we don't care about regnum. */ |
4add8633 TR |
1308 | si = push_stack_item (si, contents, len); |
1309 | } | |
8818c391 | 1310 | } |
909cd28e | 1311 | |
0963b4bd | 1312 | /* Push args onto the stack. */ |
4add8633 TR |
1313 | while (si) |
1314 | { | |
1315 | sp -= si->len; | |
0963b4bd | 1316 | /* Add 1 to sp here to account for post decr nature of pushes. */ |
4e99ad69 | 1317 | write_memory (sp + 1, si->data, si->len); |
4add8633 TR |
1318 | si = pop_stack_item (si); |
1319 | } | |
3605c34a | 1320 | |
4add8633 TR |
1321 | /* Set the return address. For the avr, the return address is the BP_ADDR. |
1322 | Need to push the return address onto the stack noting that it needs to be | |
1323 | in big-endian order on the stack. */ | |
6d1915d4 TG |
1324 | for (i = 1; i <= call_length; i++) |
1325 | { | |
1326 | buf[call_length - i] = return_pc & 0xff; | |
1327 | return_pc >>= 8; | |
1328 | } | |
3605c34a | 1329 | |
6d1915d4 | 1330 | sp -= call_length; |
0963b4bd | 1331 | /* Use 'sp + 1' since pushes are post decr ops. */ |
6d1915d4 | 1332 | write_memory (sp + 1, buf, call_length); |
3605c34a | 1333 | |
0963b4bd | 1334 | /* Finally, update the SP register. */ |
4add8633 TR |
1335 | regcache_cooked_write_unsigned (regcache, AVR_SP_REGNUM, |
1336 | avr_convert_saddr_to_raw (sp)); | |
3605c34a | 1337 | |
6d1915d4 TG |
1338 | /* Return SP value for the dummy frame, where the return address hasn't been |
1339 | pushed. */ | |
1340 | return sp + call_length; | |
3605c34a TR |
1341 | } |
1342 | ||
53f6a2c9 TG |
1343 | /* Unfortunately dwarf2 register for SP is 32. */ |
1344 | ||
1345 | static int | |
1346 | avr_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg) | |
1347 | { | |
1348 | if (reg >= 0 && reg < 32) | |
1349 | return reg; | |
1350 | if (reg == 32) | |
1351 | return AVR_SP_REGNUM; | |
1352 | ||
1353 | warning (_("Unmapped DWARF Register #%d encountered."), reg); | |
1354 | ||
1355 | return -1; | |
1356 | } | |
1357 | ||
eb14d406 SDJ |
1358 | /* Implementation of `gdbarch_gdb_signal_from_target', as defined in |
1359 | gdbarch.h. */ | |
1360 | ||
1361 | static enum gdb_signal | |
1362 | avr_linux_gdb_signal_from_target (struct gdbarch *gdbarch, int signal) | |
1363 | { | |
1364 | if (signal >= AVR_LINUX_SIGRTMIN && signal <= AVR_LINUX_SIGRTMAX) | |
1365 | { | |
1366 | int offset = signal - AVR_LINUX_SIGRTMIN; | |
1367 | ||
1368 | if (offset == 0) | |
1369 | return GDB_SIGNAL_REALTIME_32; | |
1370 | else | |
1371 | return (enum gdb_signal) (offset - 1 | |
1372 | + (int) GDB_SIGNAL_REALTIME_33); | |
1373 | } | |
1374 | else if (signal > AVR_LINUX_SIGRTMAX) | |
1375 | return GDB_SIGNAL_UNKNOWN; | |
1376 | ||
1377 | return linux_gdb_signal_from_target (gdbarch, signal); | |
1378 | } | |
1379 | ||
1380 | /* Implementation of `gdbarch_gdb_signal_to_target', as defined in | |
1381 | gdbarch.h. */ | |
1382 | ||
1383 | static int | |
1384 | avr_linux_gdb_signal_to_target (struct gdbarch *gdbarch, | |
1385 | enum gdb_signal signal) | |
1386 | { | |
1387 | switch (signal) | |
1388 | { | |
1389 | /* GDB_SIGNAL_REALTIME_32 is not continuous in <gdb/signals.def>, | |
1390 | therefore we have to handle it here. */ | |
1391 | case GDB_SIGNAL_REALTIME_32: | |
1392 | return AVR_LINUX_SIGRTMIN; | |
1393 | ||
1394 | /* GDB_SIGNAL_REALTIME_64 is not valid on AVR. */ | |
1395 | case GDB_SIGNAL_REALTIME_64: | |
1396 | return -1; | |
1397 | } | |
1398 | ||
1399 | /* GDB_SIGNAL_REALTIME_33 to _63 are continuous. | |
1400 | AVR does not have _64. */ | |
1401 | if (signal >= GDB_SIGNAL_REALTIME_33 | |
1402 | && signal <= GDB_SIGNAL_REALTIME_63) | |
1403 | { | |
1404 | int offset = signal - GDB_SIGNAL_REALTIME_33; | |
1405 | ||
1406 | return AVR_LINUX_SIGRTMIN + 1 + offset; | |
1407 | } | |
1408 | ||
1409 | return linux_gdb_signal_to_target (gdbarch, signal); | |
1410 | } | |
1411 | ||
0963b4bd | 1412 | /* Initialize the gdbarch structure for the AVR's. */ |
8818c391 TR |
1413 | |
1414 | static struct gdbarch * | |
2e5ff58c TR |
1415 | avr_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) |
1416 | { | |
2e5ff58c TR |
1417 | struct gdbarch *gdbarch; |
1418 | struct gdbarch_tdep *tdep; | |
4e99ad69 TG |
1419 | struct gdbarch_list *best_arch; |
1420 | int call_length; | |
8818c391 | 1421 | |
4e99ad69 | 1422 | /* Avr-6 call instructions save 3 bytes. */ |
8818c391 TR |
1423 | switch (info.bfd_arch_info->mach) |
1424 | { | |
1425 | case bfd_mach_avr1: | |
1426 | case bfd_mach_avr2: | |
1427 | case bfd_mach_avr3: | |
1428 | case bfd_mach_avr4: | |
1429 | case bfd_mach_avr5: | |
4e99ad69 TG |
1430 | default: |
1431 | call_length = 2; | |
1432 | break; | |
1433 | case bfd_mach_avr6: | |
1434 | call_length = 3; | |
8818c391 TR |
1435 | break; |
1436 | } | |
1437 | ||
4e99ad69 TG |
1438 | /* If there is already a candidate, use it. */ |
1439 | for (best_arch = gdbarch_list_lookup_by_info (arches, &info); | |
1440 | best_arch != NULL; | |
1441 | best_arch = gdbarch_list_lookup_by_info (best_arch->next, &info)) | |
1442 | { | |
1443 | if (gdbarch_tdep (best_arch->gdbarch)->call_length == call_length) | |
1444 | return best_arch->gdbarch; | |
1445 | } | |
1446 | ||
0963b4bd | 1447 | /* None found, create a new architecture from the information provided. */ |
4e99ad69 TG |
1448 | tdep = XMALLOC (struct gdbarch_tdep); |
1449 | gdbarch = gdbarch_alloc (&info, tdep); | |
1450 | ||
1451 | tdep->call_length = call_length; | |
1452 | ||
7d2552b4 TG |
1453 | /* Create a type for PC. We can't use builtin types here, as they may not |
1454 | be defined. */ | |
1455 | tdep->void_type = arch_type (gdbarch, TYPE_CODE_VOID, 1, "void"); | |
1456 | tdep->func_void_type = make_function_type (tdep->void_type, NULL); | |
1457 | tdep->pc_type = arch_type (gdbarch, TYPE_CODE_PTR, 4, NULL); | |
1458 | TYPE_TARGET_TYPE (tdep->pc_type) = tdep->func_void_type; | |
1459 | TYPE_UNSIGNED (tdep->pc_type) = 1; | |
1460 | ||
8818c391 TR |
1461 | set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT); |
1462 | set_gdbarch_int_bit (gdbarch, 2 * TARGET_CHAR_BIT); | |
1463 | set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
1464 | set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT); | |
1465 | set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT); | |
1466 | set_gdbarch_addr_bit (gdbarch, 32); | |
8818c391 TR |
1467 | |
1468 | set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
1469 | set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
1470 | set_gdbarch_long_double_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
1471 | ||
8da61cc4 DJ |
1472 | set_gdbarch_float_format (gdbarch, floatformats_ieee_single); |
1473 | set_gdbarch_double_format (gdbarch, floatformats_ieee_single); | |
1474 | set_gdbarch_long_double_format (gdbarch, floatformats_ieee_single); | |
8818c391 TR |
1475 | |
1476 | set_gdbarch_read_pc (gdbarch, avr_read_pc); | |
1477 | set_gdbarch_write_pc (gdbarch, avr_write_pc); | |
8818c391 TR |
1478 | |
1479 | set_gdbarch_num_regs (gdbarch, AVR_NUM_REGS); | |
1480 | ||
1481 | set_gdbarch_sp_regnum (gdbarch, AVR_SP_REGNUM); | |
8818c391 TR |
1482 | set_gdbarch_pc_regnum (gdbarch, AVR_PC_REGNUM); |
1483 | ||
1484 | set_gdbarch_register_name (gdbarch, avr_register_name); | |
866b76ea | 1485 | set_gdbarch_register_type (gdbarch, avr_register_type); |
8818c391 | 1486 | |
7d2552b4 TG |
1487 | set_gdbarch_num_pseudo_regs (gdbarch, AVR_NUM_PSEUDO_REGS); |
1488 | set_gdbarch_pseudo_register_read (gdbarch, avr_pseudo_register_read); | |
1489 | set_gdbarch_pseudo_register_write (gdbarch, avr_pseudo_register_write); | |
1490 | ||
4c8b6ae0 | 1491 | set_gdbarch_return_value (gdbarch, avr_return_value); |
8818c391 TR |
1492 | set_gdbarch_print_insn (gdbarch, print_insn_avr); |
1493 | ||
4add8633 | 1494 | set_gdbarch_push_dummy_call (gdbarch, avr_push_dummy_call); |
8818c391 | 1495 | |
53f6a2c9 TG |
1496 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, avr_dwarf_reg_to_regnum); |
1497 | ||
8818c391 TR |
1498 | set_gdbarch_address_to_pointer (gdbarch, avr_address_to_pointer); |
1499 | set_gdbarch_pointer_to_address (gdbarch, avr_pointer_to_address); | |
8a1d23b2 | 1500 | set_gdbarch_integer_to_address (gdbarch, avr_integer_to_address); |
8818c391 | 1501 | |
8818c391 | 1502 | set_gdbarch_skip_prologue (gdbarch, avr_skip_prologue); |
8818c391 TR |
1503 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); |
1504 | ||
909cd28e | 1505 | set_gdbarch_breakpoint_from_pc (gdbarch, avr_breakpoint_from_pc); |
8818c391 | 1506 | |
94afd7a6 | 1507 | frame_unwind_append_unwinder (gdbarch, &avr_frame_unwind); |
4add8633 TR |
1508 | frame_base_set_default (gdbarch, &avr_frame_base); |
1509 | ||
94afd7a6 | 1510 | set_gdbarch_dummy_id (gdbarch, avr_dummy_id); |
4add8633 TR |
1511 | |
1512 | set_gdbarch_unwind_pc (gdbarch, avr_unwind_pc); | |
30244cd8 | 1513 | set_gdbarch_unwind_sp (gdbarch, avr_unwind_sp); |
8818c391 | 1514 | |
eb14d406 SDJ |
1515 | set_gdbarch_gdb_signal_from_target (gdbarch, |
1516 | avr_linux_gdb_signal_from_target); | |
1517 | set_gdbarch_gdb_signal_to_target (gdbarch, | |
1518 | avr_linux_gdb_signal_to_target); | |
1519 | ||
8818c391 TR |
1520 | return gdbarch; |
1521 | } | |
1522 | ||
1523 | /* Send a query request to the avr remote target asking for values of the io | |
0963b4bd | 1524 | registers. If args parameter is not NULL, then the user has requested info |
8818c391 | 1525 | on a specific io register [This still needs implemented and is ignored for |
0963b4bd | 1526 | now]. The query string should be one of these forms: |
8818c391 TR |
1527 | |
1528 | "Ravr.io_reg" -> reply is "NN" number of io registers | |
1529 | ||
1530 | "Ravr.io_reg:addr,len" where addr is first register and len is number of | |
0963b4bd | 1531 | registers to be read. The reply should be "<NAME>,VV;" for each io register |
8818c391 TR |
1532 | where, <NAME> is a string, and VV is the hex value of the register. |
1533 | ||
0963b4bd | 1534 | All io registers are 8-bit. */ |
8818c391 TR |
1535 | |
1536 | static void | |
1537 | avr_io_reg_read_command (char *args, int from_tty) | |
1538 | { | |
1e3ff5ad | 1539 | LONGEST bufsiz = 0; |
13547ab6 | 1540 | gdb_byte *buf; |
001f13d8 | 1541 | const char *bufstr; |
2e5ff58c | 1542 | char query[400]; |
001f13d8 | 1543 | const char *p; |
2e5ff58c TR |
1544 | unsigned int nreg = 0; |
1545 | unsigned int val; | |
1546 | int i, j, k, step; | |
8818c391 | 1547 | |
0963b4bd | 1548 | /* Find out how many io registers the target has. */ |
13547ab6 DJ |
1549 | bufsiz = target_read_alloc (¤t_target, TARGET_OBJECT_AVR, |
1550 | "avr.io_reg", &buf); | |
001f13d8 | 1551 | bufstr = (const char *) buf; |
8818c391 | 1552 | |
13547ab6 | 1553 | if (bufsiz <= 0) |
8818c391 | 1554 | { |
2e5ff58c | 1555 | fprintf_unfiltered (gdb_stderr, |
13547ab6 DJ |
1556 | _("ERR: info io_registers NOT supported " |
1557 | "by current target\n")); | |
8818c391 TR |
1558 | return; |
1559 | } | |
1560 | ||
001f13d8 | 1561 | if (sscanf (bufstr, "%x", &nreg) != 1) |
8818c391 | 1562 | { |
2e5ff58c | 1563 | fprintf_unfiltered (gdb_stderr, |
edefbb7c | 1564 | _("Error fetching number of io registers\n")); |
13547ab6 | 1565 | xfree (buf); |
8818c391 TR |
1566 | return; |
1567 | } | |
1568 | ||
13547ab6 DJ |
1569 | xfree (buf); |
1570 | ||
2e5ff58c | 1571 | reinitialize_more_filter (); |
8818c391 | 1572 | |
edefbb7c | 1573 | printf_unfiltered (_("Target has %u io registers:\n\n"), nreg); |
8818c391 TR |
1574 | |
1575 | /* only fetch up to 8 registers at a time to keep the buffer small */ | |
1576 | step = 8; | |
1577 | ||
2e5ff58c | 1578 | for (i = 0; i < nreg; i += step) |
8818c391 | 1579 | { |
91ccbfc1 TR |
1580 | /* how many registers this round? */ |
1581 | j = step; | |
1582 | if ((i+j) >= nreg) | |
1583 | j = nreg - i; /* last block is less than 8 registers */ | |
8818c391 | 1584 | |
2e5ff58c | 1585 | snprintf (query, sizeof (query) - 1, "avr.io_reg:%x,%x", i, j); |
13547ab6 DJ |
1586 | bufsiz = target_read_alloc (¤t_target, TARGET_OBJECT_AVR, |
1587 | query, &buf); | |
8818c391 | 1588 | |
001f13d8 | 1589 | p = (const char *) buf; |
2e5ff58c TR |
1590 | for (k = i; k < (i + j); k++) |
1591 | { | |
1592 | if (sscanf (p, "%[^,],%x;", query, &val) == 2) | |
1593 | { | |
1594 | printf_filtered ("[%02x] %-15s : %02x\n", k, query, val); | |
1595 | while ((*p != ';') && (*p != '\0')) | |
1596 | p++; | |
1597 | p++; /* skip over ';' */ | |
1598 | if (*p == '\0') | |
1599 | break; | |
1600 | } | |
1601 | } | |
13547ab6 DJ |
1602 | |
1603 | xfree (buf); | |
8818c391 TR |
1604 | } |
1605 | } | |
1606 | ||
a78f21af AC |
1607 | extern initialize_file_ftype _initialize_avr_tdep; /* -Wmissing-prototypes */ |
1608 | ||
8818c391 TR |
1609 | void |
1610 | _initialize_avr_tdep (void) | |
1611 | { | |
1612 | register_gdbarch_init (bfd_arch_avr, avr_gdbarch_init); | |
1613 | ||
1614 | /* Add a new command to allow the user to query the avr remote target for | |
1615 | the values of the io space registers in a saner way than just using | |
0963b4bd | 1616 | `x/NNNb ADDR`. */ |
8818c391 TR |
1617 | |
1618 | /* FIXME: TRoth/2002-02-18: This should probably be changed to 'info avr | |
0963b4bd | 1619 | io_registers' to signify it is not available on other platforms. */ |
8818c391 TR |
1620 | |
1621 | add_cmd ("io_registers", class_info, avr_io_reg_read_command, | |
1a966eab AC |
1622 | _("query remote avr target for io space register values"), |
1623 | &infolist); | |
8818c391 | 1624 | } |