Commit | Line | Data |
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8818c391 | 1 | /* Target-dependent code for Atmel AVR, for GDB. |
0fd88904 | 2 | |
6aba47ca DJ |
3 | Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, |
4 | 2006, 2007 Free Software Foundation, Inc. | |
8818c391 TR |
5 | |
6 | This file is part of GDB. | |
7 | ||
8 | This program is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2 of the License, or | |
11 | (at your option) any later version. | |
12 | ||
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with this program; if not, write to the Free Software | |
197e01b6 EZ |
20 | Foundation, Inc., 51 Franklin Street, Fifth Floor, |
21 | Boston, MA 02110-1301, USA. */ | |
8818c391 | 22 | |
de18ac1f | 23 | /* Contributed by Theodore A. Roth, troth@openavr.org */ |
8818c391 TR |
24 | |
25 | /* Portions of this file were taken from the original gdb-4.18 patch developed | |
26 | by Denis Chertykov, denisc@overta.ru */ | |
27 | ||
28 | #include "defs.h" | |
4add8633 TR |
29 | #include "frame.h" |
30 | #include "frame-unwind.h" | |
31 | #include "frame-base.h" | |
32 | #include "trad-frame.h" | |
8818c391 TR |
33 | #include "gdbcmd.h" |
34 | #include "gdbcore.h" | |
e6bb342a | 35 | #include "gdbtypes.h" |
8818c391 TR |
36 | #include "inferior.h" |
37 | #include "symfile.h" | |
38 | #include "arch-utils.h" | |
39 | #include "regcache.h" | |
5f8a3188 | 40 | #include "gdb_string.h" |
a89aa300 | 41 | #include "dis-asm.h" |
8818c391 TR |
42 | |
43 | /* AVR Background: | |
44 | ||
45 | (AVR micros are pure Harvard Architecture processors.) | |
46 | ||
47 | The AVR family of microcontrollers have three distinctly different memory | |
48 | spaces: flash, sram and eeprom. The flash is 16 bits wide and is used for | |
49 | the most part to store program instructions. The sram is 8 bits wide and is | |
50 | used for the stack and the heap. Some devices lack sram and some can have | |
51 | an additional external sram added on as a peripheral. | |
52 | ||
53 | The eeprom is 8 bits wide and is used to store data when the device is | |
54 | powered down. Eeprom is not directly accessible, it can only be accessed | |
55 | via io-registers using a special algorithm. Accessing eeprom via gdb's | |
56 | remote serial protocol ('m' or 'M' packets) looks difficult to do and is | |
57 | not included at this time. | |
58 | ||
59 | [The eeprom could be read manually via ``x/b <eaddr + AVR_EMEM_START>'' or | |
60 | written using ``set {unsigned char}<eaddr + AVR_EMEM_START>''. For this to | |
61 | work, the remote target must be able to handle eeprom accesses and perform | |
62 | the address translation.] | |
63 | ||
64 | All three memory spaces have physical addresses beginning at 0x0. In | |
65 | addition, the flash is addressed by gcc/binutils/gdb with respect to 8 bit | |
66 | bytes instead of the 16 bit wide words used by the real device for the | |
67 | Program Counter. | |
68 | ||
69 | In order for remote targets to work correctly, extra bits must be added to | |
70 | addresses before they are send to the target or received from the target | |
71 | via the remote serial protocol. The extra bits are the MSBs and are used to | |
72 | decode which memory space the address is referring to. */ | |
73 | ||
74 | #undef XMALLOC | |
75 | #define XMALLOC(TYPE) ((TYPE*) xmalloc (sizeof (TYPE))) | |
76 | ||
77 | #undef EXTRACT_INSN | |
78 | #define EXTRACT_INSN(addr) extract_unsigned_integer(addr,2) | |
79 | ||
80 | /* Constants: prefixed with AVR_ to avoid name space clashes */ | |
81 | ||
82 | enum | |
2e5ff58c TR |
83 | { |
84 | AVR_REG_W = 24, | |
85 | AVR_REG_X = 26, | |
86 | AVR_REG_Y = 28, | |
87 | AVR_FP_REGNUM = 28, | |
88 | AVR_REG_Z = 30, | |
89 | ||
90 | AVR_SREG_REGNUM = 32, | |
91 | AVR_SP_REGNUM = 33, | |
92 | AVR_PC_REGNUM = 34, | |
93 | ||
94 | AVR_NUM_REGS = 32 + 1 /*SREG*/ + 1 /*SP*/ + 1 /*PC*/, | |
95 | AVR_NUM_REG_BYTES = 32 + 1 /*SREG*/ + 2 /*SP*/ + 4 /*PC*/, | |
96 | ||
97 | AVR_PC_REG_INDEX = 35, /* index into array of registers */ | |
98 | ||
4add8633 | 99 | AVR_MAX_PROLOGUE_SIZE = 64, /* bytes */ |
2e5ff58c TR |
100 | |
101 | /* Count of pushed registers. From r2 to r17 (inclusively), r28, r29 */ | |
102 | AVR_MAX_PUSHES = 18, | |
103 | ||
104 | /* Number of the last pushed register. r17 for current avr-gcc */ | |
105 | AVR_LAST_PUSHED_REGNUM = 17, | |
106 | ||
4add8633 TR |
107 | AVR_ARG1_REGNUM = 24, /* Single byte argument */ |
108 | AVR_ARGN_REGNUM = 25, /* Multi byte argments */ | |
109 | ||
110 | AVR_RET1_REGNUM = 24, /* Single byte return value */ | |
111 | AVR_RETN_REGNUM = 25, /* Multi byte return value */ | |
112 | ||
2e5ff58c TR |
113 | /* FIXME: TRoth/2002-01-??: Can we shift all these memory masks left 8 |
114 | bits? Do these have to match the bfd vma values?. It sure would make | |
115 | things easier in the future if they didn't need to match. | |
116 | ||
117 | Note: I chose these values so as to be consistent with bfd vma | |
118 | addresses. | |
119 | ||
120 | TRoth/2002-04-08: There is already a conflict with very large programs | |
121 | in the mega128. The mega128 has 128K instruction bytes (64K words), | |
122 | thus the Most Significant Bit is 0x10000 which gets masked off my | |
123 | AVR_MEM_MASK. | |
124 | ||
125 | The problem manifests itself when trying to set a breakpoint in a | |
126 | function which resides in the upper half of the instruction space and | |
127 | thus requires a 17-bit address. | |
128 | ||
129 | For now, I've just removed the EEPROM mask and changed AVR_MEM_MASK | |
130 | from 0x00ff0000 to 0x00f00000. Eeprom is not accessible from gdb yet, | |
131 | but could be for some remote targets by just adding the correct offset | |
132 | to the address and letting the remote target handle the low-level | |
133 | details of actually accessing the eeprom. */ | |
134 | ||
135 | AVR_IMEM_START = 0x00000000, /* INSN memory */ | |
136 | AVR_SMEM_START = 0x00800000, /* SRAM memory */ | |
8818c391 | 137 | #if 1 |
2e5ff58c TR |
138 | /* No eeprom mask defined */ |
139 | AVR_MEM_MASK = 0x00f00000, /* mask to determine memory space */ | |
8818c391 | 140 | #else |
2e5ff58c TR |
141 | AVR_EMEM_START = 0x00810000, /* EEPROM memory */ |
142 | AVR_MEM_MASK = 0x00ff0000, /* mask to determine memory space */ | |
8818c391 | 143 | #endif |
2e5ff58c | 144 | }; |
8818c391 | 145 | |
4add8633 TR |
146 | /* Prologue types: |
147 | ||
148 | NORMAL and CALL are the typical types (the -mcall-prologues gcc option | |
149 | causes the generation of the CALL type prologues). */ | |
150 | ||
151 | enum { | |
152 | AVR_PROLOGUE_NONE, /* No prologue */ | |
153 | AVR_PROLOGUE_NORMAL, | |
154 | AVR_PROLOGUE_CALL, /* -mcall-prologues */ | |
155 | AVR_PROLOGUE_MAIN, | |
156 | AVR_PROLOGUE_INTR, /* interrupt handler */ | |
157 | AVR_PROLOGUE_SIG, /* signal handler */ | |
158 | }; | |
159 | ||
8818c391 TR |
160 | /* Any function with a frame looks like this |
161 | ....... <-SP POINTS HERE | |
162 | LOCALS1 <-FP POINTS HERE | |
163 | LOCALS0 | |
164 | SAVED FP | |
165 | SAVED R3 | |
166 | SAVED R2 | |
167 | RET PC | |
168 | FIRST ARG | |
169 | SECOND ARG */ | |
170 | ||
4add8633 | 171 | struct avr_unwind_cache |
2e5ff58c | 172 | { |
4add8633 TR |
173 | /* The previous frame's inner most stack address. Used as this |
174 | frame ID's stack_addr. */ | |
175 | CORE_ADDR prev_sp; | |
176 | /* The frame's base, optionally used by the high-level debug info. */ | |
177 | CORE_ADDR base; | |
178 | int size; | |
179 | int prologue_type; | |
180 | /* Table indicating the location of each and every register. */ | |
181 | struct trad_frame_saved_reg *saved_regs; | |
2e5ff58c | 182 | }; |
8818c391 TR |
183 | |
184 | struct gdbarch_tdep | |
2e5ff58c TR |
185 | { |
186 | /* FIXME: TRoth: is there anything to put here? */ | |
187 | int foo; | |
188 | }; | |
8818c391 TR |
189 | |
190 | /* Lookup the name of a register given it's number. */ | |
191 | ||
fa88f677 | 192 | static const char * |
8818c391 TR |
193 | avr_register_name (int regnum) |
194 | { | |
2e5ff58c TR |
195 | static char *register_names[] = { |
196 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", | |
197 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", | |
8818c391 TR |
198 | "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", |
199 | "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", | |
200 | "SREG", "SP", "PC" | |
201 | }; | |
202 | if (regnum < 0) | |
203 | return NULL; | |
204 | if (regnum >= (sizeof (register_names) / sizeof (*register_names))) | |
205 | return NULL; | |
206 | return register_names[regnum]; | |
207 | } | |
208 | ||
8818c391 TR |
209 | /* Return the GDB type object for the "standard" data type |
210 | of data in register N. */ | |
211 | ||
212 | static struct type * | |
866b76ea | 213 | avr_register_type (struct gdbarch *gdbarch, int reg_nr) |
8818c391 | 214 | { |
866b76ea TR |
215 | if (reg_nr == AVR_PC_REGNUM) |
216 | return builtin_type_uint32; | |
866b76ea TR |
217 | if (reg_nr == AVR_SP_REGNUM) |
218 | return builtin_type_void_data_ptr; | |
219 | else | |
220 | return builtin_type_uint8; | |
8818c391 TR |
221 | } |
222 | ||
223 | /* Instruction address checks and convertions. */ | |
224 | ||
225 | static CORE_ADDR | |
226 | avr_make_iaddr (CORE_ADDR x) | |
227 | { | |
228 | return ((x) | AVR_IMEM_START); | |
229 | } | |
230 | ||
8818c391 TR |
231 | /* FIXME: TRoth: Really need to use a larger mask for instructions. Some |
232 | devices are already up to 128KBytes of flash space. | |
233 | ||
234 | TRoth/2002-04-8: See comment above where AVR_IMEM_START is defined. */ | |
235 | ||
236 | static CORE_ADDR | |
237 | avr_convert_iaddr_to_raw (CORE_ADDR x) | |
238 | { | |
239 | return ((x) & 0xffffffff); | |
240 | } | |
241 | ||
242 | /* SRAM address checks and convertions. */ | |
243 | ||
244 | static CORE_ADDR | |
245 | avr_make_saddr (CORE_ADDR x) | |
246 | { | |
247 | return ((x) | AVR_SMEM_START); | |
248 | } | |
249 | ||
8818c391 TR |
250 | static CORE_ADDR |
251 | avr_convert_saddr_to_raw (CORE_ADDR x) | |
252 | { | |
253 | return ((x) & 0xffffffff); | |
254 | } | |
255 | ||
256 | /* EEPROM address checks and convertions. I don't know if these will ever | |
257 | actually be used, but I've added them just the same. TRoth */ | |
258 | ||
259 | /* TRoth/2002-04-08: Commented out for now to allow fix for problem with large | |
260 | programs in the mega128. */ | |
261 | ||
262 | /* static CORE_ADDR */ | |
263 | /* avr_make_eaddr (CORE_ADDR x) */ | |
264 | /* { */ | |
265 | /* return ((x) | AVR_EMEM_START); */ | |
266 | /* } */ | |
267 | ||
268 | /* static int */ | |
269 | /* avr_eaddr_p (CORE_ADDR x) */ | |
270 | /* { */ | |
271 | /* return (((x) & AVR_MEM_MASK) == AVR_EMEM_START); */ | |
272 | /* } */ | |
273 | ||
274 | /* static CORE_ADDR */ | |
275 | /* avr_convert_eaddr_to_raw (CORE_ADDR x) */ | |
276 | /* { */ | |
277 | /* return ((x) & 0xffffffff); */ | |
278 | /* } */ | |
279 | ||
280 | /* Convert from address to pointer and vice-versa. */ | |
281 | ||
282 | static void | |
1f3a99d5 | 283 | avr_address_to_pointer (struct type *type, gdb_byte *buf, CORE_ADDR addr) |
8818c391 TR |
284 | { |
285 | /* Is it a code address? */ | |
286 | if (TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC | |
287 | || TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_METHOD) | |
288 | { | |
2e5ff58c | 289 | store_unsigned_integer (buf, TYPE_LENGTH (type), |
4ea2465e | 290 | avr_convert_iaddr_to_raw (addr >> 1)); |
8818c391 TR |
291 | } |
292 | else | |
293 | { | |
294 | /* Strip off any upper segment bits. */ | |
2e5ff58c TR |
295 | store_unsigned_integer (buf, TYPE_LENGTH (type), |
296 | avr_convert_saddr_to_raw (addr)); | |
8818c391 TR |
297 | } |
298 | } | |
299 | ||
300 | static CORE_ADDR | |
1f3a99d5 | 301 | avr_pointer_to_address (struct type *type, const gdb_byte *buf) |
8818c391 | 302 | { |
7c0b4a20 | 303 | CORE_ADDR addr = extract_unsigned_integer (buf, TYPE_LENGTH (type)); |
8818c391 | 304 | |
8818c391 TR |
305 | /* Is it a code address? */ |
306 | if (TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC | |
307 | || TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_METHOD | |
2e5ff58c | 308 | || TYPE_CODE_SPACE (TYPE_TARGET_TYPE (type))) |
4ea2465e | 309 | return avr_make_iaddr (addr << 1); |
8818c391 TR |
310 | else |
311 | return avr_make_saddr (addr); | |
312 | } | |
313 | ||
314 | static CORE_ADDR | |
61a1198a | 315 | avr_read_pc (struct regcache *regcache) |
8818c391 | 316 | { |
8619218d | 317 | ULONGEST pc; |
61a1198a UW |
318 | regcache_cooked_read_unsigned (regcache, AVR_PC_REGNUM, &pc); |
319 | return avr_make_iaddr (pc); | |
8818c391 TR |
320 | } |
321 | ||
322 | static void | |
61a1198a | 323 | avr_write_pc (struct regcache *regcache, CORE_ADDR val) |
8818c391 | 324 | { |
61a1198a UW |
325 | regcache_cooked_write_unsigned (regcache, AVR_PC_REGNUM, |
326 | avr_convert_iaddr_to_raw (val)); | |
8818c391 TR |
327 | } |
328 | ||
4add8633 TR |
329 | static int |
330 | avr_scan_arg_moves (int vpc, unsigned char *prologue) | |
8818c391 | 331 | { |
4add8633 | 332 | unsigned short insn; |
866b76ea | 333 | |
4add8633 TR |
334 | for (; vpc < AVR_MAX_PROLOGUE_SIZE; vpc += 2) |
335 | { | |
336 | insn = EXTRACT_INSN (&prologue[vpc]); | |
337 | if ((insn & 0xff00) == 0x0100) /* movw rXX, rYY */ | |
338 | continue; | |
339 | else if ((insn & 0xfc00) == 0x2c00) /* mov rXX, rYY */ | |
340 | continue; | |
341 | else | |
342 | break; | |
343 | } | |
344 | ||
345 | return vpc; | |
8818c391 TR |
346 | } |
347 | ||
4add8633 | 348 | /* Function: avr_scan_prologue |
8818c391 | 349 | |
4add8633 | 350 | This function decodes an AVR function prologue to determine: |
8818c391 TR |
351 | 1) the size of the stack frame |
352 | 2) which registers are saved on it | |
353 | 3) the offsets of saved regs | |
4add8633 | 354 | This information is stored in the avr_unwind_cache structure. |
8818c391 | 355 | |
e3d8b004 TR |
356 | Some devices lack the sbiw instruction, so on those replace this: |
357 | sbiw r28, XX | |
358 | with this: | |
359 | subi r28,lo8(XX) | |
360 | sbci r29,hi8(XX) | |
361 | ||
362 | A typical AVR function prologue with a frame pointer might look like this: | |
363 | push rXX ; saved regs | |
364 | ... | |
365 | push r28 | |
366 | push r29 | |
367 | in r28,__SP_L__ | |
368 | in r29,__SP_H__ | |
369 | sbiw r28,<LOCALS_SIZE> | |
370 | in __tmp_reg__,__SREG__ | |
8818c391 | 371 | cli |
e3d8b004 | 372 | out __SP_H__,r29 |
72fab697 TR |
373 | out __SREG__,__tmp_reg__ |
374 | out __SP_L__,r28 | |
e3d8b004 TR |
375 | |
376 | A typical AVR function prologue without a frame pointer might look like | |
377 | this: | |
378 | push rXX ; saved regs | |
379 | ... | |
380 | ||
381 | A main function prologue looks like this: | |
382 | ldi r28,lo8(<RAM_ADDR> - <LOCALS_SIZE>) | |
383 | ldi r29,hi8(<RAM_ADDR> - <LOCALS_SIZE>) | |
384 | out __SP_H__,r29 | |
385 | out __SP_L__,r28 | |
386 | ||
387 | A signal handler prologue looks like this: | |
388 | push __zero_reg__ | |
389 | push __tmp_reg__ | |
390 | in __tmp_reg__, __SREG__ | |
391 | push __tmp_reg__ | |
392 | clr __zero_reg__ | |
393 | push rXX ; save registers r18:r27, r30:r31 | |
394 | ... | |
395 | push r28 ; save frame pointer | |
396 | push r29 | |
397 | in r28, __SP_L__ | |
398 | in r29, __SP_H__ | |
399 | sbiw r28, <LOCALS_SIZE> | |
400 | out __SP_H__, r29 | |
401 | out __SP_L__, r28 | |
402 | ||
403 | A interrupt handler prologue looks like this: | |
404 | sei | |
405 | push __zero_reg__ | |
406 | push __tmp_reg__ | |
407 | in __tmp_reg__, __SREG__ | |
408 | push __tmp_reg__ | |
409 | clr __zero_reg__ | |
410 | push rXX ; save registers r18:r27, r30:r31 | |
411 | ... | |
412 | push r28 ; save frame pointer | |
413 | push r29 | |
414 | in r28, __SP_L__ | |
415 | in r29, __SP_H__ | |
416 | sbiw r28, <LOCALS_SIZE> | |
417 | cli | |
418 | out __SP_H__, r29 | |
419 | sei | |
420 | out __SP_L__, r28 | |
421 | ||
422 | A `-mcall-prologues' prologue looks like this (Note that the megas use a | |
423 | jmp instead of a rjmp, thus the prologue is one word larger since jmp is a | |
424 | 32 bit insn and rjmp is a 16 bit insn): | |
425 | ldi r26,lo8(<LOCALS_SIZE>) | |
426 | ldi r27,hi8(<LOCALS_SIZE>) | |
427 | ldi r30,pm_lo8(.L_foo_body) | |
428 | ldi r31,pm_hi8(.L_foo_body) | |
429 | rjmp __prologue_saves__+RRR | |
430 | .L_foo_body: */ | |
8818c391 | 431 | |
4add8633 TR |
432 | /* Not really part of a prologue, but still need to scan for it, is when a |
433 | function prologue moves values passed via registers as arguments to new | |
434 | registers. In this case, all local variables live in registers, so there | |
435 | may be some register saves. This is what it looks like: | |
436 | movw rMM, rNN | |
437 | ... | |
438 | ||
439 | There could be multiple movw's. If the target doesn't have a movw insn, it | |
440 | will use two mov insns. This could be done after any of the above prologue | |
441 | types. */ | |
442 | ||
443 | static CORE_ADDR | |
444 | avr_scan_prologue (CORE_ADDR pc, struct avr_unwind_cache *info) | |
8818c391 | 445 | { |
2e5ff58c TR |
446 | int i; |
447 | unsigned short insn; | |
2e5ff58c | 448 | int scan_stage = 0; |
8818c391 | 449 | struct minimal_symbol *msymbol; |
8818c391 TR |
450 | unsigned char prologue[AVR_MAX_PROLOGUE_SIZE]; |
451 | int vpc = 0; | |
452 | ||
4add8633 TR |
453 | /* FIXME: TRoth/2003-06-11: This could be made more efficient by only |
454 | reading in the bytes of the prologue. The problem is that the figuring | |
455 | out where the end of the prologue is is a bit difficult. The old code | |
456 | tried to do that, but failed quite often. */ | |
457 | read_memory (pc, prologue, AVR_MAX_PROLOGUE_SIZE); | |
8818c391 TR |
458 | |
459 | /* Scanning main()'s prologue | |
460 | ldi r28,lo8(<RAM_ADDR> - <LOCALS_SIZE>) | |
461 | ldi r29,hi8(<RAM_ADDR> - <LOCALS_SIZE>) | |
462 | out __SP_H__,r29 | |
463 | out __SP_L__,r28 */ | |
464 | ||
4add8633 | 465 | if (1) |
8818c391 TR |
466 | { |
467 | CORE_ADDR locals; | |
2e5ff58c TR |
468 | unsigned char img[] = { |
469 | 0xde, 0xbf, /* out __SP_H__,r29 */ | |
470 | 0xcd, 0xbf /* out __SP_L__,r28 */ | |
8818c391 TR |
471 | }; |
472 | ||
8818c391 TR |
473 | insn = EXTRACT_INSN (&prologue[vpc]); |
474 | /* ldi r28,lo8(<RAM_ADDR> - <LOCALS_SIZE>) */ | |
2e5ff58c TR |
475 | if ((insn & 0xf0f0) == 0xe0c0) |
476 | { | |
477 | locals = (insn & 0xf) | ((insn & 0x0f00) >> 4); | |
478 | insn = EXTRACT_INSN (&prologue[vpc + 2]); | |
479 | /* ldi r29,hi8(<RAM_ADDR> - <LOCALS_SIZE>) */ | |
480 | if ((insn & 0xf0f0) == 0xe0d0) | |
481 | { | |
482 | locals |= ((insn & 0xf) | ((insn & 0x0f00) >> 4)) << 8; | |
483 | if (memcmp (prologue + vpc + 4, img, sizeof (img)) == 0) | |
484 | { | |
4add8633 TR |
485 | info->prologue_type = AVR_PROLOGUE_MAIN; |
486 | info->base = locals; | |
487 | return pc + 4; | |
2e5ff58c TR |
488 | } |
489 | } | |
490 | } | |
8818c391 | 491 | } |
2e5ff58c | 492 | |
4add8633 TR |
493 | /* Scanning `-mcall-prologues' prologue |
494 | Classic prologue is 10 bytes, mega prologue is a 12 bytes long */ | |
8818c391 | 495 | |
e3d8b004 | 496 | while (1) /* Using a while to avoid many goto's */ |
8818c391 TR |
497 | { |
498 | int loc_size; | |
499 | int body_addr; | |
500 | unsigned num_pushes; | |
4add8633 | 501 | int pc_offset = 0; |
2e5ff58c | 502 | |
8818c391 TR |
503 | insn = EXTRACT_INSN (&prologue[vpc]); |
504 | /* ldi r26,<LOCALS_SIZE> */ | |
2e5ff58c TR |
505 | if ((insn & 0xf0f0) != 0xe0a0) |
506 | break; | |
8818c391 | 507 | loc_size = (insn & 0xf) | ((insn & 0x0f00) >> 4); |
4add8633 | 508 | pc_offset += 2; |
2e5ff58c | 509 | |
8818c391 TR |
510 | insn = EXTRACT_INSN (&prologue[vpc + 2]); |
511 | /* ldi r27,<LOCALS_SIZE> / 256 */ | |
512 | if ((insn & 0xf0f0) != 0xe0b0) | |
2e5ff58c | 513 | break; |
8818c391 | 514 | loc_size |= ((insn & 0xf) | ((insn & 0x0f00) >> 4)) << 8; |
4add8633 | 515 | pc_offset += 2; |
2e5ff58c | 516 | |
8818c391 TR |
517 | insn = EXTRACT_INSN (&prologue[vpc + 4]); |
518 | /* ldi r30,pm_lo8(.L_foo_body) */ | |
519 | if ((insn & 0xf0f0) != 0xe0e0) | |
2e5ff58c | 520 | break; |
8818c391 | 521 | body_addr = (insn & 0xf) | ((insn & 0x0f00) >> 4); |
4add8633 | 522 | pc_offset += 2; |
8818c391 TR |
523 | |
524 | insn = EXTRACT_INSN (&prologue[vpc + 6]); | |
525 | /* ldi r31,pm_hi8(.L_foo_body) */ | |
526 | if ((insn & 0xf0f0) != 0xe0f0) | |
2e5ff58c | 527 | break; |
8818c391 | 528 | body_addr |= ((insn & 0xf) | ((insn & 0x0f00) >> 4)) << 8; |
4add8633 | 529 | pc_offset += 2; |
8818c391 | 530 | |
8818c391 TR |
531 | msymbol = lookup_minimal_symbol ("__prologue_saves__", NULL, NULL); |
532 | if (!msymbol) | |
2e5ff58c | 533 | break; |
8818c391 | 534 | |
8818c391 TR |
535 | insn = EXTRACT_INSN (&prologue[vpc + 8]); |
536 | /* rjmp __prologue_saves__+RRR */ | |
e3d8b004 TR |
537 | if ((insn & 0xf000) == 0xc000) |
538 | { | |
539 | /* Extract PC relative offset from RJMP */ | |
540 | i = (insn & 0xfff) | (insn & 0x800 ? (-1 ^ 0xfff) : 0); | |
541 | /* Convert offset to byte addressable mode */ | |
542 | i *= 2; | |
543 | /* Destination address */ | |
4add8633 | 544 | i += pc + 10; |
e3d8b004 | 545 | |
4add8633 | 546 | if (body_addr != (pc + 10)/2) |
e3d8b004 | 547 | break; |
4add8633 TR |
548 | |
549 | pc_offset += 2; | |
e3d8b004 | 550 | } |
e3d8b004 TR |
551 | else if ((insn & 0xfe0e) == 0x940c) |
552 | { | |
553 | /* Extract absolute PC address from JMP */ | |
554 | i = (((insn & 0x1) | ((insn & 0x1f0) >> 3) << 16) | |
555 | | (EXTRACT_INSN (&prologue[vpc + 10]) & 0xffff)); | |
556 | /* Convert address to byte addressable mode */ | |
557 | i *= 2; | |
558 | ||
4add8633 | 559 | if (body_addr != (pc + 12)/2) |
e3d8b004 | 560 | break; |
4add8633 TR |
561 | |
562 | pc_offset += 4; | |
e3d8b004 TR |
563 | } |
564 | else | |
565 | break; | |
2e5ff58c | 566 | |
4add8633 | 567 | /* Resolve offset (in words) from __prologue_saves__ symbol. |
8818c391 TR |
568 | Which is a pushes count in `-mcall-prologues' mode */ |
569 | num_pushes = AVR_MAX_PUSHES - (i - SYMBOL_VALUE_ADDRESS (msymbol)) / 2; | |
570 | ||
571 | if (num_pushes > AVR_MAX_PUSHES) | |
4add8633 | 572 | { |
edefbb7c | 573 | fprintf_unfiltered (gdb_stderr, _("Num pushes too large: %d\n"), |
4add8633 TR |
574 | num_pushes); |
575 | num_pushes = 0; | |
576 | } | |
2e5ff58c | 577 | |
8818c391 | 578 | if (num_pushes) |
2e5ff58c TR |
579 | { |
580 | int from; | |
4add8633 TR |
581 | |
582 | info->saved_regs[AVR_FP_REGNUM + 1].addr = num_pushes; | |
2e5ff58c | 583 | if (num_pushes >= 2) |
4add8633 TR |
584 | info->saved_regs[AVR_FP_REGNUM].addr = num_pushes - 1; |
585 | ||
2e5ff58c TR |
586 | i = 0; |
587 | for (from = AVR_LAST_PUSHED_REGNUM + 1 - (num_pushes - 2); | |
588 | from <= AVR_LAST_PUSHED_REGNUM; ++from) | |
4add8633 | 589 | info->saved_regs [from].addr = ++i; |
2e5ff58c | 590 | } |
4add8633 TR |
591 | info->size = loc_size + num_pushes; |
592 | info->prologue_type = AVR_PROLOGUE_CALL; | |
593 | ||
594 | return pc + pc_offset; | |
8818c391 TR |
595 | } |
596 | ||
4add8633 TR |
597 | /* Scan for the beginning of the prologue for an interrupt or signal |
598 | function. Note that we have to set the prologue type here since the | |
599 | third stage of the prologue may not be present (e.g. no saved registered | |
600 | or changing of the SP register). */ | |
8818c391 | 601 | |
4add8633 | 602 | if (1) |
8818c391 | 603 | { |
2e5ff58c TR |
604 | unsigned char img[] = { |
605 | 0x78, 0x94, /* sei */ | |
606 | 0x1f, 0x92, /* push r1 */ | |
607 | 0x0f, 0x92, /* push r0 */ | |
608 | 0x0f, 0xb6, /* in r0,0x3f SREG */ | |
609 | 0x0f, 0x92, /* push r0 */ | |
610 | 0x11, 0x24 /* clr r1 */ | |
8818c391 TR |
611 | }; |
612 | if (memcmp (prologue, img, sizeof (img)) == 0) | |
2e5ff58c | 613 | { |
4add8633 | 614 | info->prologue_type = AVR_PROLOGUE_INTR; |
2e5ff58c | 615 | vpc += sizeof (img); |
4add8633 TR |
616 | info->saved_regs[AVR_SREG_REGNUM].addr = 3; |
617 | info->saved_regs[0].addr = 2; | |
618 | info->saved_regs[1].addr = 1; | |
619 | info->size += 3; | |
2e5ff58c | 620 | } |
4add8633 | 621 | else if (memcmp (img + 2, prologue, sizeof (img) - 2) == 0) |
2e5ff58c | 622 | { |
4add8633 TR |
623 | info->prologue_type = AVR_PROLOGUE_SIG; |
624 | vpc += sizeof (img) - 2; | |
625 | info->saved_regs[AVR_SREG_REGNUM].addr = 3; | |
626 | info->saved_regs[0].addr = 2; | |
627 | info->saved_regs[1].addr = 1; | |
628 | info->size += 3; | |
2e5ff58c | 629 | } |
8818c391 TR |
630 | } |
631 | ||
632 | /* First stage of the prologue scanning. | |
4add8633 | 633 | Scan pushes (saved registers) */ |
8818c391 | 634 | |
4add8633 | 635 | for (; vpc < AVR_MAX_PROLOGUE_SIZE; vpc += 2) |
8818c391 TR |
636 | { |
637 | insn = EXTRACT_INSN (&prologue[vpc]); | |
2e5ff58c TR |
638 | if ((insn & 0xfe0f) == 0x920f) /* push rXX */ |
639 | { | |
640 | /* Bits 4-9 contain a mask for registers R0-R32. */ | |
4add8633 TR |
641 | int regno = (insn & 0x1f0) >> 4; |
642 | info->size++; | |
643 | info->saved_regs[regno].addr = info->size; | |
2e5ff58c TR |
644 | scan_stage = 1; |
645 | } | |
8818c391 | 646 | else |
2e5ff58c | 647 | break; |
8818c391 TR |
648 | } |
649 | ||
4add8633 TR |
650 | if (vpc >= AVR_MAX_PROLOGUE_SIZE) |
651 | fprintf_unfiltered (gdb_stderr, | |
edefbb7c | 652 | _("Hit end of prologue while scanning pushes\n")); |
4add8633 | 653 | |
8818c391 TR |
654 | /* Second stage of the prologue scanning. |
655 | Scan: | |
656 | in r28,__SP_L__ | |
657 | in r29,__SP_H__ */ | |
658 | ||
4add8633 | 659 | if (scan_stage == 1 && vpc < AVR_MAX_PROLOGUE_SIZE) |
8818c391 | 660 | { |
2e5ff58c TR |
661 | unsigned char img[] = { |
662 | 0xcd, 0xb7, /* in r28,__SP_L__ */ | |
663 | 0xde, 0xb7 /* in r29,__SP_H__ */ | |
8818c391 TR |
664 | }; |
665 | unsigned short insn1; | |
2e5ff58c | 666 | |
8818c391 | 667 | if (memcmp (prologue + vpc, img, sizeof (img)) == 0) |
2e5ff58c TR |
668 | { |
669 | vpc += 4; | |
2e5ff58c TR |
670 | scan_stage = 2; |
671 | } | |
8818c391 TR |
672 | } |
673 | ||
674 | /* Third stage of the prologue scanning. (Really two stages) | |
675 | Scan for: | |
676 | sbiw r28,XX or subi r28,lo8(XX) | |
72fab697 | 677 | sbci r29,hi8(XX) |
8818c391 TR |
678 | in __tmp_reg__,__SREG__ |
679 | cli | |
e3d8b004 | 680 | out __SP_H__,r29 |
8818c391 | 681 | out __SREG__,__tmp_reg__ |
e3d8b004 | 682 | out __SP_L__,r28 */ |
8818c391 | 683 | |
4add8633 | 684 | if (scan_stage == 2 && vpc < AVR_MAX_PROLOGUE_SIZE) |
8818c391 TR |
685 | { |
686 | int locals_size = 0; | |
2e5ff58c TR |
687 | unsigned char img[] = { |
688 | 0x0f, 0xb6, /* in r0,0x3f */ | |
689 | 0xf8, 0x94, /* cli */ | |
e3d8b004 | 690 | 0xde, 0xbf, /* out 0x3e,r29 ; SPH */ |
2e5ff58c | 691 | 0x0f, 0xbe, /* out 0x3f,r0 ; SREG */ |
e3d8b004 | 692 | 0xcd, 0xbf /* out 0x3d,r28 ; SPL */ |
8818c391 | 693 | }; |
2e5ff58c | 694 | unsigned char img_sig[] = { |
e3d8b004 TR |
695 | 0xde, 0xbf, /* out 0x3e,r29 ; SPH */ |
696 | 0xcd, 0xbf /* out 0x3d,r28 ; SPL */ | |
8818c391 | 697 | }; |
2e5ff58c TR |
698 | unsigned char img_int[] = { |
699 | 0xf8, 0x94, /* cli */ | |
e3d8b004 | 700 | 0xde, 0xbf, /* out 0x3e,r29 ; SPH */ |
2e5ff58c | 701 | 0x78, 0x94, /* sei */ |
e3d8b004 | 702 | 0xcd, 0xbf /* out 0x3d,r28 ; SPL */ |
8818c391 | 703 | }; |
2e5ff58c | 704 | |
8818c391 TR |
705 | insn = EXTRACT_INSN (&prologue[vpc]); |
706 | vpc += 2; | |
2e5ff58c TR |
707 | if ((insn & 0xff30) == 0x9720) /* sbiw r28,XXX */ |
708 | locals_size = (insn & 0xf) | ((insn & 0xc0) >> 2); | |
709 | else if ((insn & 0xf0f0) == 0x50c0) /* subi r28,lo8(XX) */ | |
710 | { | |
711 | locals_size = (insn & 0xf) | ((insn & 0xf00) >> 4); | |
712 | insn = EXTRACT_INSN (&prologue[vpc]); | |
713 | vpc += 2; | |
714 | locals_size += ((insn & 0xf) | ((insn & 0xf00) >> 4) << 8); | |
715 | } | |
8818c391 | 716 | else |
4add8633 TR |
717 | return pc + vpc; |
718 | ||
719 | /* Scan the last part of the prologue. May not be present for interrupt | |
720 | or signal handler functions, which is why we set the prologue type | |
721 | when we saw the beginning of the prologue previously. */ | |
722 | ||
723 | if (memcmp (prologue + vpc, img_sig, sizeof (img_sig)) == 0) | |
724 | { | |
725 | vpc += sizeof (img_sig); | |
726 | } | |
727 | else if (memcmp (prologue + vpc, img_int, sizeof (img_int)) == 0) | |
728 | { | |
729 | vpc += sizeof (img_int); | |
730 | } | |
731 | if (memcmp (prologue + vpc, img, sizeof (img)) == 0) | |
732 | { | |
733 | info->prologue_type = AVR_PROLOGUE_NORMAL; | |
734 | vpc += sizeof (img); | |
735 | } | |
736 | ||
737 | info->size += locals_size; | |
738 | ||
739 | return pc + avr_scan_arg_moves (vpc, prologue); | |
8818c391 | 740 | } |
4add8633 TR |
741 | |
742 | /* If we got this far, we could not scan the prologue, so just return the pc | |
743 | of the frame plus an adjustment for argument move insns. */ | |
744 | ||
745 | return pc + avr_scan_arg_moves (vpc, prologue);; | |
8818c391 TR |
746 | } |
747 | ||
4add8633 TR |
748 | static CORE_ADDR |
749 | avr_skip_prologue (CORE_ADDR pc) | |
750 | { | |
751 | CORE_ADDR func_addr, func_end; | |
752 | CORE_ADDR prologue_end = pc; | |
8818c391 | 753 | |
4add8633 | 754 | /* See what the symbol table says */ |
8818c391 | 755 | |
4add8633 TR |
756 | if (find_pc_partial_function (pc, NULL, &func_addr, &func_end)) |
757 | { | |
758 | struct symtab_and_line sal; | |
759 | struct avr_unwind_cache info = {0}; | |
760 | struct trad_frame_saved_reg saved_regs[AVR_NUM_REGS]; | |
2e5ff58c | 761 | |
4add8633 | 762 | info.saved_regs = saved_regs; |
8818c391 | 763 | |
4add8633 TR |
764 | /* Need to run the prologue scanner to figure out if the function has a |
765 | prologue and possibly skip over moving arguments passed via registers | |
766 | to other registers. */ | |
2e5ff58c | 767 | |
4add8633 | 768 | prologue_end = avr_scan_prologue (pc, &info); |
8818c391 | 769 | |
3b85b0f1 TR |
770 | if (info.prologue_type == AVR_PROLOGUE_NONE) |
771 | return pc; | |
772 | else | |
4add8633 TR |
773 | { |
774 | sal = find_pc_line (func_addr, 0); | |
8818c391 | 775 | |
4add8633 TR |
776 | if (sal.line != 0 && sal.end < func_end) |
777 | return sal.end; | |
778 | } | |
779 | } | |
2e5ff58c | 780 | |
4add8633 TR |
781 | /* Either we didn't find the start of this function (nothing we can do), |
782 | or there's no line info, or the line after the prologue is after | |
783 | the end of the function (there probably isn't a prologue). */ | |
2e5ff58c | 784 | |
4add8633 TR |
785 | return prologue_end; |
786 | } | |
8818c391 | 787 | |
4add8633 TR |
788 | /* Not all avr devices support the BREAK insn. Those that don't should treat |
789 | it as a NOP. Thus, it should be ok. Since the avr is currently a remote | |
790 | only target, this shouldn't be a problem (I hope). TRoth/2003-05-14 */ | |
8818c391 | 791 | |
4add8633 TR |
792 | static const unsigned char * |
793 | avr_breakpoint_from_pc (CORE_ADDR * pcptr, int *lenptr) | |
794 | { | |
795 | static unsigned char avr_break_insn [] = { 0x98, 0x95 }; | |
796 | *lenptr = sizeof (avr_break_insn); | |
797 | return avr_break_insn; | |
8818c391 TR |
798 | } |
799 | ||
4add8633 TR |
800 | /* Given a return value in `regbuf' with a type `valtype', |
801 | extract and copy its value into `valbuf'. | |
802 | ||
803 | Return values are always passed via registers r25:r24:... */ | |
8818c391 TR |
804 | |
805 | static void | |
4add8633 | 806 | avr_extract_return_value (struct type *type, struct regcache *regcache, |
1f3a99d5 | 807 | gdb_byte *valbuf) |
8818c391 | 808 | { |
4add8633 TR |
809 | ULONGEST r24, r25; |
810 | ULONGEST c; | |
811 | int len; | |
812 | if (TYPE_LENGTH (type) == 1) | |
8818c391 | 813 | { |
4add8633 TR |
814 | regcache_cooked_read_unsigned (regcache, 24, &c); |
815 | store_unsigned_integer (valbuf, 1, c); | |
8818c391 TR |
816 | } |
817 | else | |
818 | { | |
4add8633 TR |
819 | int i; |
820 | /* The MSB of the return value is always in r25, calculate which | |
821 | register holds the LSB. */ | |
822 | int lsb_reg = 25 - TYPE_LENGTH (type) + 1; | |
8818c391 | 823 | |
4add8633 TR |
824 | for (i=0; i< TYPE_LENGTH (type); i++) |
825 | { | |
826 | regcache_cooked_read (regcache, lsb_reg + i, | |
827 | (bfd_byte *) valbuf + i); | |
4add8633 TR |
828 | } |
829 | } | |
830 | } | |
8818c391 | 831 | |
4add8633 TR |
832 | /* Put here the code to store, into fi->saved_regs, the addresses of |
833 | the saved registers of frame described by FRAME_INFO. This | |
834 | includes special registers such as pc and fp saved in special ways | |
835 | in the stack frame. sp is even more special: the address we return | |
836 | for it IS the sp for the next frame. */ | |
8818c391 | 837 | |
4add8633 TR |
838 | struct avr_unwind_cache * |
839 | avr_frame_unwind_cache (struct frame_info *next_frame, | |
840 | void **this_prologue_cache) | |
8818c391 | 841 | { |
4add8633 TR |
842 | CORE_ADDR pc; |
843 | ULONGEST prev_sp; | |
844 | ULONGEST this_base; | |
845 | struct avr_unwind_cache *info; | |
846 | int i; | |
847 | ||
848 | if ((*this_prologue_cache)) | |
849 | return (*this_prologue_cache); | |
850 | ||
851 | info = FRAME_OBSTACK_ZALLOC (struct avr_unwind_cache); | |
852 | (*this_prologue_cache) = info; | |
853 | info->saved_regs = trad_frame_alloc_saved_regs (next_frame); | |
854 | ||
855 | info->size = 0; | |
856 | info->prologue_type = AVR_PROLOGUE_NONE; | |
857 | ||
93d42b30 | 858 | pc = frame_func_unwind (next_frame, NORMAL_FRAME); |
4add8633 TR |
859 | |
860 | if ((pc > 0) && (pc < frame_pc_unwind (next_frame))) | |
861 | avr_scan_prologue (pc, info); | |
862 | ||
3b85b0f1 TR |
863 | if ((info->prologue_type != AVR_PROLOGUE_NONE) |
864 | && (info->prologue_type != AVR_PROLOGUE_MAIN)) | |
4add8633 TR |
865 | { |
866 | ULONGEST high_base; /* High byte of FP */ | |
867 | ||
868 | /* The SP was moved to the FP. This indicates that a new frame | |
869 | was created. Get THIS frame's FP value by unwinding it from | |
870 | the next frame. */ | |
871 | frame_unwind_unsigned_register (next_frame, AVR_FP_REGNUM, &this_base); | |
872 | frame_unwind_unsigned_register (next_frame, AVR_FP_REGNUM+1, &high_base); | |
873 | this_base += (high_base << 8); | |
874 | ||
875 | /* The FP points at the last saved register. Adjust the FP back | |
876 | to before the first saved register giving the SP. */ | |
877 | prev_sp = this_base + info->size; | |
878 | } | |
8818c391 | 879 | else |
4add8633 TR |
880 | { |
881 | /* Assume that the FP is this frame's SP but with that pushed | |
882 | stack space added back. */ | |
883 | frame_unwind_unsigned_register (next_frame, AVR_SP_REGNUM, &this_base); | |
884 | prev_sp = this_base + info->size; | |
885 | } | |
886 | ||
887 | /* Add 1 here to adjust for the post-decrement nature of the push | |
888 | instruction.*/ | |
889 | info->prev_sp = avr_make_saddr (prev_sp+1); | |
890 | ||
891 | info->base = avr_make_saddr (this_base); | |
892 | ||
893 | /* Adjust all the saved registers so that they contain addresses and not | |
3b85b0f1 | 894 | offsets. */ |
f57d151a | 895 | for (i = 0; i < gdbarch_num_regs (current_gdbarch) - 1; i++) |
4add8633 TR |
896 | if (info->saved_regs[i].addr) |
897 | { | |
898 | info->saved_regs[i].addr = (info->prev_sp - info->saved_regs[i].addr); | |
899 | } | |
900 | ||
901 | /* Except for the main and startup code, the return PC is always saved on | |
902 | the stack and is at the base of the frame. */ | |
903 | ||
904 | if (info->prologue_type != AVR_PROLOGUE_MAIN) | |
905 | { | |
906 | info->saved_regs[AVR_PC_REGNUM].addr = info->prev_sp; | |
907 | } | |
908 | ||
3b85b0f1 TR |
909 | /* The previous frame's SP needed to be computed. Save the computed |
910 | value. */ | |
911 | trad_frame_set_value (info->saved_regs, AVR_SP_REGNUM, info->prev_sp+1); | |
912 | ||
4add8633 | 913 | return info; |
8818c391 TR |
914 | } |
915 | ||
916 | static CORE_ADDR | |
4add8633 | 917 | avr_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) |
8818c391 | 918 | { |
4add8633 TR |
919 | ULONGEST pc; |
920 | ||
921 | frame_unwind_unsigned_register (next_frame, AVR_PC_REGNUM, &pc); | |
922 | ||
923 | return avr_make_iaddr (pc); | |
8818c391 TR |
924 | } |
925 | ||
30244cd8 UW |
926 | static CORE_ADDR |
927 | avr_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
928 | { | |
929 | ULONGEST sp; | |
930 | ||
931 | frame_unwind_unsigned_register (next_frame, AVR_SP_REGNUM, &sp); | |
932 | ||
933 | return avr_make_saddr (sp); | |
934 | } | |
935 | ||
4add8633 TR |
936 | /* Given a GDB frame, determine the address of the calling function's |
937 | frame. This will be used to create a new GDB frame struct. */ | |
8818c391 | 938 | |
4add8633 TR |
939 | static void |
940 | avr_frame_this_id (struct frame_info *next_frame, | |
941 | void **this_prologue_cache, | |
942 | struct frame_id *this_id) | |
8818c391 | 943 | { |
4add8633 TR |
944 | struct avr_unwind_cache *info |
945 | = avr_frame_unwind_cache (next_frame, this_prologue_cache); | |
946 | CORE_ADDR base; | |
947 | CORE_ADDR func; | |
948 | struct frame_id id; | |
949 | ||
950 | /* The FUNC is easy. */ | |
93d42b30 | 951 | func = frame_func_unwind (next_frame, NORMAL_FRAME); |
4add8633 | 952 | |
4add8633 TR |
953 | /* Hopefully the prologue analysis either correctly determined the |
954 | frame's base (which is the SP from the previous frame), or set | |
955 | that base to "NULL". */ | |
956 | base = info->prev_sp; | |
957 | if (base == 0) | |
958 | return; | |
959 | ||
960 | id = frame_id_build (base, func); | |
4add8633 | 961 | (*this_id) = id; |
8818c391 TR |
962 | } |
963 | ||
4add8633 TR |
964 | static void |
965 | avr_frame_prev_register (struct frame_info *next_frame, | |
966 | void **this_prologue_cache, | |
967 | int regnum, int *optimizedp, | |
968 | enum lval_type *lvalp, CORE_ADDR *addrp, | |
1f3a99d5 | 969 | int *realnump, gdb_byte *bufferp) |
8818c391 | 970 | { |
4add8633 TR |
971 | struct avr_unwind_cache *info |
972 | = avr_frame_unwind_cache (next_frame, this_prologue_cache); | |
8818c391 | 973 | |
3b85b0f1 TR |
974 | if (regnum == AVR_PC_REGNUM) |
975 | { | |
976 | if (trad_frame_addr_p (info->saved_regs, regnum)) | |
977 | { | |
978 | *optimizedp = 0; | |
979 | *lvalp = lval_memory; | |
980 | *addrp = info->saved_regs[regnum].addr; | |
981 | *realnump = -1; | |
982 | if (bufferp != NULL) | |
983 | { | |
984 | /* Reading the return PC from the PC register is slightly | |
985 | abnormal. register_size(AVR_PC_REGNUM) says it is 4 bytes, | |
986 | but in reality, only two bytes (3 in upcoming mega256) are | |
987 | stored on the stack. | |
988 | ||
989 | Also, note that the value on the stack is an addr to a word | |
990 | not a byte, so we will need to multiply it by two at some | |
991 | point. | |
992 | ||
993 | And to confuse matters even more, the return address stored | |
994 | on the stack is in big endian byte order, even though most | |
995 | everything else about the avr is little endian. Ick! */ | |
996 | ||
997 | /* FIXME: number of bytes read here will need updated for the | |
998 | mega256 when it is available. */ | |
999 | ||
1000 | ULONGEST pc; | |
1001 | unsigned char tmp; | |
1002 | unsigned char buf[2]; | |
1003 | ||
1004 | read_memory (info->saved_regs[regnum].addr, buf, 2); | |
1005 | ||
1006 | /* Convert the PC read from memory as a big-endian to | |
1007 | little-endian order. */ | |
1008 | tmp = buf[0]; | |
1009 | buf[0] = buf[1]; | |
1010 | buf[1] = tmp; | |
1011 | ||
1012 | pc = (extract_unsigned_integer (buf, 2) * 2); | |
1013 | store_unsigned_integer (bufferp, | |
1014 | register_size (current_gdbarch, regnum), | |
1015 | pc); | |
1016 | } | |
1017 | } | |
1018 | } | |
1019 | else | |
1f67027d AC |
1020 | trad_frame_get_prev_register (next_frame, info->saved_regs, regnum, |
1021 | optimizedp, lvalp, addrp, realnump, bufferp); | |
4add8633 | 1022 | } |
8818c391 | 1023 | |
4add8633 TR |
1024 | static const struct frame_unwind avr_frame_unwind = { |
1025 | NORMAL_FRAME, | |
1026 | avr_frame_this_id, | |
1027 | avr_frame_prev_register | |
1028 | }; | |
1029 | ||
1030 | const struct frame_unwind * | |
336d1bba | 1031 | avr_frame_sniffer (struct frame_info *next_frame) |
4add8633 TR |
1032 | { |
1033 | return &avr_frame_unwind; | |
8818c391 TR |
1034 | } |
1035 | ||
1036 | static CORE_ADDR | |
4add8633 | 1037 | avr_frame_base_address (struct frame_info *next_frame, void **this_cache) |
8818c391 | 1038 | { |
4add8633 TR |
1039 | struct avr_unwind_cache *info |
1040 | = avr_frame_unwind_cache (next_frame, this_cache); | |
8818c391 | 1041 | |
4add8633 TR |
1042 | return info->base; |
1043 | } | |
8818c391 | 1044 | |
4add8633 TR |
1045 | static const struct frame_base avr_frame_base = { |
1046 | &avr_frame_unwind, | |
1047 | avr_frame_base_address, | |
1048 | avr_frame_base_address, | |
1049 | avr_frame_base_address | |
1050 | }; | |
ced15480 | 1051 | |
4add8633 TR |
1052 | /* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that |
1053 | dummy frame. The frame ID's base needs to match the TOS value | |
1054 | saved by save_dummy_frame_tos(), and the PC match the dummy frame's | |
1055 | breakpoint. */ | |
8818c391 | 1056 | |
4add8633 TR |
1057 | static struct frame_id |
1058 | avr_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
1059 | { | |
1060 | ULONGEST base; | |
8818c391 | 1061 | |
4add8633 TR |
1062 | frame_unwind_unsigned_register (next_frame, AVR_SP_REGNUM, &base); |
1063 | return frame_id_build (avr_make_saddr (base), frame_pc_unwind (next_frame)); | |
8818c391 TR |
1064 | } |
1065 | ||
4add8633 TR |
1066 | /* When arguments must be pushed onto the stack, they go on in reverse |
1067 | order. The below implements a FILO (stack) to do this. */ | |
8818c391 | 1068 | |
4add8633 TR |
1069 | struct stack_item |
1070 | { | |
1071 | int len; | |
1072 | struct stack_item *prev; | |
1073 | void *data; | |
1074 | }; | |
8818c391 | 1075 | |
4add8633 | 1076 | static struct stack_item * |
0fd88904 | 1077 | push_stack_item (struct stack_item *prev, const bfd_byte *contents, int len) |
8818c391 | 1078 | { |
4add8633 TR |
1079 | struct stack_item *si; |
1080 | si = xmalloc (sizeof (struct stack_item)); | |
1081 | si->data = xmalloc (len); | |
1082 | si->len = len; | |
1083 | si->prev = prev; | |
1084 | memcpy (si->data, contents, len); | |
1085 | return si; | |
8818c391 TR |
1086 | } |
1087 | ||
4add8633 TR |
1088 | static struct stack_item *pop_stack_item (struct stack_item *si); |
1089 | static struct stack_item * | |
1090 | pop_stack_item (struct stack_item *si) | |
8818c391 | 1091 | { |
4add8633 TR |
1092 | struct stack_item *dead = si; |
1093 | si = si->prev; | |
1094 | xfree (dead->data); | |
1095 | xfree (dead); | |
1096 | return si; | |
8818c391 TR |
1097 | } |
1098 | ||
8818c391 TR |
1099 | /* Setup the function arguments for calling a function in the inferior. |
1100 | ||
1101 | On the AVR architecture, there are 18 registers (R25 to R8) which are | |
1102 | dedicated for passing function arguments. Up to the first 18 arguments | |
1103 | (depending on size) may go into these registers. The rest go on the stack. | |
1104 | ||
4add8633 TR |
1105 | All arguments are aligned to start in even-numbered registers (odd-sized |
1106 | arguments, including char, have one free register above them). For example, | |
1107 | an int in arg1 and a char in arg2 would be passed as such: | |
1108 | ||
1109 | arg1 -> r25:r24 | |
1110 | arg2 -> r22 | |
1111 | ||
1112 | Arguments that are larger than 2 bytes will be split between two or more | |
1113 | registers as available, but will NOT be split between a register and the | |
1114 | stack. Arguments that go onto the stack are pushed last arg first (this is | |
1115 | similar to the d10v). */ | |
1116 | ||
1117 | /* NOTE: TRoth/2003-06-17: The rest of this comment is old looks to be | |
1118 | inaccurate. | |
8818c391 TR |
1119 | |
1120 | An exceptional case exists for struct arguments (and possibly other | |
1121 | aggregates such as arrays) -- if the size is larger than WORDSIZE bytes but | |
1122 | not a multiple of WORDSIZE bytes. In this case the argument is never split | |
1123 | between the registers and the stack, but instead is copied in its entirety | |
1124 | onto the stack, AND also copied into as many registers as there is room | |
1125 | for. In other words, space in registers permitting, two copies of the same | |
1126 | argument are passed in. As far as I can tell, only the one on the stack is | |
1127 | used, although that may be a function of the level of compiler | |
1128 | optimization. I suspect this is a compiler bug. Arguments of these odd | |
1129 | sizes are left-justified within the word (as opposed to arguments smaller | |
1130 | than WORDSIZE bytes, which are right-justified). | |
1131 | ||
1132 | If the function is to return an aggregate type such as a struct, the caller | |
1133 | must allocate space into which the callee will copy the return value. In | |
1134 | this case, a pointer to the return value location is passed into the callee | |
1135 | in register R0, which displaces one of the other arguments passed in via | |
1136 | registers R0 to R2. */ | |
1137 | ||
1138 | static CORE_ADDR | |
7d9b040b | 1139 | avr_push_dummy_call (struct gdbarch *gdbarch, struct value *function, |
4add8633 TR |
1140 | struct regcache *regcache, CORE_ADDR bp_addr, |
1141 | int nargs, struct value **args, CORE_ADDR sp, | |
1142 | int struct_return, CORE_ADDR struct_addr) | |
8818c391 | 1143 | { |
4add8633 TR |
1144 | int i; |
1145 | unsigned char buf[2]; | |
1146 | CORE_ADDR return_pc = avr_convert_iaddr_to_raw (bp_addr); | |
1147 | int regnum = AVR_ARGN_REGNUM; | |
1148 | struct stack_item *si = NULL; | |
8818c391 | 1149 | |
8818c391 | 1150 | #if 0 |
4add8633 TR |
1151 | /* FIXME: TRoth/2003-06-18: Not sure what to do when returning a struct. */ |
1152 | if (struct_return) | |
8818c391 | 1153 | { |
4add8633 | 1154 | fprintf_unfiltered (gdb_stderr, "struct_return: 0x%lx\n", struct_addr); |
9c9acae0 UW |
1155 | regcache_cooked_write_unsigned (regcache, argreg--, struct_addr & 0xff); |
1156 | regcache_cooked_write_unsigned (regcache, argreg--, (struct_addr >>8) & 0xff); | |
8818c391 | 1157 | } |
4add8633 | 1158 | #endif |
8818c391 | 1159 | |
4add8633 | 1160 | for (i = 0; i < nargs; i++) |
8818c391 | 1161 | { |
4add8633 TR |
1162 | int last_regnum; |
1163 | int j; | |
1164 | struct value *arg = args[i]; | |
4991999e | 1165 | struct type *type = check_typedef (value_type (arg)); |
0fd88904 | 1166 | const bfd_byte *contents = value_contents (arg); |
4add8633 TR |
1167 | int len = TYPE_LENGTH (type); |
1168 | ||
1169 | /* Calculate the potential last register needed. */ | |
1170 | last_regnum = regnum - (len + (len & 1)); | |
1171 | ||
1172 | /* If there are registers available, use them. Once we start putting | |
1173 | stuff on the stack, all subsequent args go on stack. */ | |
1174 | if ((si == NULL) && (last_regnum >= 8)) | |
1175 | { | |
1176 | ULONGEST val; | |
1177 | ||
1178 | /* Skip a register for odd length args. */ | |
1179 | if (len & 1) | |
1180 | regnum--; | |
1181 | ||
1182 | val = extract_unsigned_integer (contents, len); | |
1183 | for (j=0; j<len; j++) | |
1184 | { | |
1185 | regcache_cooked_write_unsigned (regcache, regnum--, | |
1186 | val >> (8*(len-j-1))); | |
1187 | } | |
1188 | } | |
1189 | /* No registers available, push the args onto the stack. */ | |
1190 | else | |
1191 | { | |
1192 | /* From here on, we don't care about regnum. */ | |
1193 | si = push_stack_item (si, contents, len); | |
1194 | } | |
8818c391 | 1195 | } |
909cd28e | 1196 | |
4add8633 TR |
1197 | /* Push args onto the stack. */ |
1198 | while (si) | |
1199 | { | |
1200 | sp -= si->len; | |
1201 | /* Add 1 to sp here to account for post decr nature of pushes. */ | |
1202 | write_memory (sp+1, si->data, si->len); | |
1203 | si = pop_stack_item (si); | |
1204 | } | |
3605c34a | 1205 | |
4add8633 TR |
1206 | /* Set the return address. For the avr, the return address is the BP_ADDR. |
1207 | Need to push the return address onto the stack noting that it needs to be | |
1208 | in big-endian order on the stack. */ | |
1209 | buf[0] = (return_pc >> 8) & 0xff; | |
1210 | buf[1] = return_pc & 0xff; | |
3605c34a | 1211 | |
4add8633 TR |
1212 | sp -= 2; |
1213 | write_memory (sp+1, buf, 2); /* Add one since pushes are post decr ops. */ | |
3605c34a | 1214 | |
4add8633 TR |
1215 | /* Finally, update the SP register. */ |
1216 | regcache_cooked_write_unsigned (regcache, AVR_SP_REGNUM, | |
1217 | avr_convert_saddr_to_raw (sp)); | |
3605c34a | 1218 | |
4add8633 | 1219 | return sp; |
3605c34a TR |
1220 | } |
1221 | ||
8818c391 TR |
1222 | /* Initialize the gdbarch structure for the AVR's. */ |
1223 | ||
1224 | static struct gdbarch * | |
2e5ff58c TR |
1225 | avr_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) |
1226 | { | |
2e5ff58c TR |
1227 | struct gdbarch *gdbarch; |
1228 | struct gdbarch_tdep *tdep; | |
8818c391 TR |
1229 | |
1230 | /* Find a candidate among the list of pre-declared architectures. */ | |
1231 | arches = gdbarch_list_lookup_by_info (arches, &info); | |
1232 | if (arches != NULL) | |
1233 | return arches->gdbarch; | |
1234 | ||
1235 | /* None found, create a new architecture from the information provided. */ | |
1236 | tdep = XMALLOC (struct gdbarch_tdep); | |
1237 | gdbarch = gdbarch_alloc (&info, tdep); | |
1238 | ||
1239 | /* If we ever need to differentiate the device types, do it here. */ | |
1240 | switch (info.bfd_arch_info->mach) | |
1241 | { | |
1242 | case bfd_mach_avr1: | |
1243 | case bfd_mach_avr2: | |
1244 | case bfd_mach_avr3: | |
1245 | case bfd_mach_avr4: | |
1246 | case bfd_mach_avr5: | |
1247 | break; | |
1248 | } | |
1249 | ||
1250 | set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT); | |
1251 | set_gdbarch_int_bit (gdbarch, 2 * TARGET_CHAR_BIT); | |
1252 | set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
1253 | set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT); | |
1254 | set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT); | |
1255 | set_gdbarch_addr_bit (gdbarch, 32); | |
8818c391 TR |
1256 | |
1257 | set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
1258 | set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
1259 | set_gdbarch_long_double_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
1260 | ||
8da61cc4 DJ |
1261 | set_gdbarch_float_format (gdbarch, floatformats_ieee_single); |
1262 | set_gdbarch_double_format (gdbarch, floatformats_ieee_single); | |
1263 | set_gdbarch_long_double_format (gdbarch, floatformats_ieee_single); | |
8818c391 TR |
1264 | |
1265 | set_gdbarch_read_pc (gdbarch, avr_read_pc); | |
1266 | set_gdbarch_write_pc (gdbarch, avr_write_pc); | |
8818c391 TR |
1267 | |
1268 | set_gdbarch_num_regs (gdbarch, AVR_NUM_REGS); | |
1269 | ||
1270 | set_gdbarch_sp_regnum (gdbarch, AVR_SP_REGNUM); | |
8818c391 TR |
1271 | set_gdbarch_pc_regnum (gdbarch, AVR_PC_REGNUM); |
1272 | ||
1273 | set_gdbarch_register_name (gdbarch, avr_register_name); | |
866b76ea | 1274 | set_gdbarch_register_type (gdbarch, avr_register_type); |
8818c391 | 1275 | |
3605c34a | 1276 | set_gdbarch_extract_return_value (gdbarch, avr_extract_return_value); |
8818c391 TR |
1277 | set_gdbarch_print_insn (gdbarch, print_insn_avr); |
1278 | ||
4add8633 | 1279 | set_gdbarch_push_dummy_call (gdbarch, avr_push_dummy_call); |
8818c391 TR |
1280 | |
1281 | set_gdbarch_address_to_pointer (gdbarch, avr_address_to_pointer); | |
1282 | set_gdbarch_pointer_to_address (gdbarch, avr_pointer_to_address); | |
8818c391 | 1283 | |
8818c391 | 1284 | set_gdbarch_skip_prologue (gdbarch, avr_skip_prologue); |
8818c391 TR |
1285 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); |
1286 | ||
909cd28e | 1287 | set_gdbarch_breakpoint_from_pc (gdbarch, avr_breakpoint_from_pc); |
8818c391 | 1288 | |
336d1bba | 1289 | frame_unwind_append_sniffer (gdbarch, avr_frame_sniffer); |
4add8633 TR |
1290 | frame_base_set_default (gdbarch, &avr_frame_base); |
1291 | ||
1292 | set_gdbarch_unwind_dummy_id (gdbarch, avr_unwind_dummy_id); | |
1293 | ||
1294 | set_gdbarch_unwind_pc (gdbarch, avr_unwind_pc); | |
30244cd8 | 1295 | set_gdbarch_unwind_sp (gdbarch, avr_unwind_sp); |
8818c391 | 1296 | |
8818c391 TR |
1297 | return gdbarch; |
1298 | } | |
1299 | ||
1300 | /* Send a query request to the avr remote target asking for values of the io | |
1301 | registers. If args parameter is not NULL, then the user has requested info | |
1302 | on a specific io register [This still needs implemented and is ignored for | |
1303 | now]. The query string should be one of these forms: | |
1304 | ||
1305 | "Ravr.io_reg" -> reply is "NN" number of io registers | |
1306 | ||
1307 | "Ravr.io_reg:addr,len" where addr is first register and len is number of | |
1308 | registers to be read. The reply should be "<NAME>,VV;" for each io register | |
1309 | where, <NAME> is a string, and VV is the hex value of the register. | |
1310 | ||
1311 | All io registers are 8-bit. */ | |
1312 | ||
1313 | static void | |
1314 | avr_io_reg_read_command (char *args, int from_tty) | |
1315 | { | |
1e3ff5ad | 1316 | LONGEST bufsiz = 0; |
13547ab6 | 1317 | gdb_byte *buf; |
2e5ff58c TR |
1318 | char query[400]; |
1319 | char *p; | |
1320 | unsigned int nreg = 0; | |
1321 | unsigned int val; | |
1322 | int i, j, k, step; | |
8818c391 | 1323 | |
8818c391 | 1324 | /* Find out how many io registers the target has. */ |
13547ab6 DJ |
1325 | bufsiz = target_read_alloc (¤t_target, TARGET_OBJECT_AVR, |
1326 | "avr.io_reg", &buf); | |
8818c391 | 1327 | |
13547ab6 | 1328 | if (bufsiz <= 0) |
8818c391 | 1329 | { |
2e5ff58c | 1330 | fprintf_unfiltered (gdb_stderr, |
13547ab6 DJ |
1331 | _("ERR: info io_registers NOT supported " |
1332 | "by current target\n")); | |
8818c391 TR |
1333 | return; |
1334 | } | |
1335 | ||
2e5ff58c | 1336 | if (sscanf (buf, "%x", &nreg) != 1) |
8818c391 | 1337 | { |
2e5ff58c | 1338 | fprintf_unfiltered (gdb_stderr, |
edefbb7c | 1339 | _("Error fetching number of io registers\n")); |
13547ab6 | 1340 | xfree (buf); |
8818c391 TR |
1341 | return; |
1342 | } | |
1343 | ||
13547ab6 DJ |
1344 | xfree (buf); |
1345 | ||
2e5ff58c | 1346 | reinitialize_more_filter (); |
8818c391 | 1347 | |
edefbb7c | 1348 | printf_unfiltered (_("Target has %u io registers:\n\n"), nreg); |
8818c391 TR |
1349 | |
1350 | /* only fetch up to 8 registers at a time to keep the buffer small */ | |
1351 | step = 8; | |
1352 | ||
2e5ff58c | 1353 | for (i = 0; i < nreg; i += step) |
8818c391 | 1354 | { |
91ccbfc1 TR |
1355 | /* how many registers this round? */ |
1356 | j = step; | |
1357 | if ((i+j) >= nreg) | |
1358 | j = nreg - i; /* last block is less than 8 registers */ | |
8818c391 | 1359 | |
2e5ff58c | 1360 | snprintf (query, sizeof (query) - 1, "avr.io_reg:%x,%x", i, j); |
13547ab6 DJ |
1361 | bufsiz = target_read_alloc (¤t_target, TARGET_OBJECT_AVR, |
1362 | query, &buf); | |
8818c391 TR |
1363 | |
1364 | p = buf; | |
2e5ff58c TR |
1365 | for (k = i; k < (i + j); k++) |
1366 | { | |
1367 | if (sscanf (p, "%[^,],%x;", query, &val) == 2) | |
1368 | { | |
1369 | printf_filtered ("[%02x] %-15s : %02x\n", k, query, val); | |
1370 | while ((*p != ';') && (*p != '\0')) | |
1371 | p++; | |
1372 | p++; /* skip over ';' */ | |
1373 | if (*p == '\0') | |
1374 | break; | |
1375 | } | |
1376 | } | |
13547ab6 DJ |
1377 | |
1378 | xfree (buf); | |
8818c391 TR |
1379 | } |
1380 | } | |
1381 | ||
a78f21af AC |
1382 | extern initialize_file_ftype _initialize_avr_tdep; /* -Wmissing-prototypes */ |
1383 | ||
8818c391 TR |
1384 | void |
1385 | _initialize_avr_tdep (void) | |
1386 | { | |
1387 | register_gdbarch_init (bfd_arch_avr, avr_gdbarch_init); | |
1388 | ||
1389 | /* Add a new command to allow the user to query the avr remote target for | |
1390 | the values of the io space registers in a saner way than just using | |
1391 | `x/NNNb ADDR`. */ | |
1392 | ||
1393 | /* FIXME: TRoth/2002-02-18: This should probably be changed to 'info avr | |
1394 | io_registers' to signify it is not available on other platforms. */ | |
1395 | ||
1396 | add_cmd ("io_registers", class_info, avr_io_reg_read_command, | |
1a966eab AC |
1397 | _("query remote avr target for io space register values"), |
1398 | &infolist); | |
8818c391 | 1399 | } |