Commit | Line | Data |
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8818c391 | 1 | /* Target-dependent code for Atmel AVR, for GDB. |
51603483 | 2 | Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 |
8818c391 TR |
3 | Free Software Foundation, Inc. |
4 | ||
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the Free Software | |
19 | Foundation, Inc., 59 Temple Place - Suite 330, | |
20 | Boston, MA 02111-1307, USA. */ | |
21 | ||
de18ac1f | 22 | /* Contributed by Theodore A. Roth, troth@openavr.org */ |
8818c391 TR |
23 | |
24 | /* Portions of this file were taken from the original gdb-4.18 patch developed | |
25 | by Denis Chertykov, denisc@overta.ru */ | |
26 | ||
27 | #include "defs.h" | |
4add8633 TR |
28 | #include "frame.h" |
29 | #include "frame-unwind.h" | |
30 | #include "frame-base.h" | |
31 | #include "trad-frame.h" | |
8818c391 TR |
32 | #include "gdbcmd.h" |
33 | #include "gdbcore.h" | |
34 | #include "inferior.h" | |
35 | #include "symfile.h" | |
36 | #include "arch-utils.h" | |
37 | #include "regcache.h" | |
5f8a3188 | 38 | #include "gdb_string.h" |
a89aa300 | 39 | #include "dis-asm.h" |
8818c391 TR |
40 | |
41 | /* AVR Background: | |
42 | ||
43 | (AVR micros are pure Harvard Architecture processors.) | |
44 | ||
45 | The AVR family of microcontrollers have three distinctly different memory | |
46 | spaces: flash, sram and eeprom. The flash is 16 bits wide and is used for | |
47 | the most part to store program instructions. The sram is 8 bits wide and is | |
48 | used for the stack and the heap. Some devices lack sram and some can have | |
49 | an additional external sram added on as a peripheral. | |
50 | ||
51 | The eeprom is 8 bits wide and is used to store data when the device is | |
52 | powered down. Eeprom is not directly accessible, it can only be accessed | |
53 | via io-registers using a special algorithm. Accessing eeprom via gdb's | |
54 | remote serial protocol ('m' or 'M' packets) looks difficult to do and is | |
55 | not included at this time. | |
56 | ||
57 | [The eeprom could be read manually via ``x/b <eaddr + AVR_EMEM_START>'' or | |
58 | written using ``set {unsigned char}<eaddr + AVR_EMEM_START>''. For this to | |
59 | work, the remote target must be able to handle eeprom accesses and perform | |
60 | the address translation.] | |
61 | ||
62 | All three memory spaces have physical addresses beginning at 0x0. In | |
63 | addition, the flash is addressed by gcc/binutils/gdb with respect to 8 bit | |
64 | bytes instead of the 16 bit wide words used by the real device for the | |
65 | Program Counter. | |
66 | ||
67 | In order for remote targets to work correctly, extra bits must be added to | |
68 | addresses before they are send to the target or received from the target | |
69 | via the remote serial protocol. The extra bits are the MSBs and are used to | |
70 | decode which memory space the address is referring to. */ | |
71 | ||
72 | #undef XMALLOC | |
73 | #define XMALLOC(TYPE) ((TYPE*) xmalloc (sizeof (TYPE))) | |
74 | ||
75 | #undef EXTRACT_INSN | |
76 | #define EXTRACT_INSN(addr) extract_unsigned_integer(addr,2) | |
77 | ||
78 | /* Constants: prefixed with AVR_ to avoid name space clashes */ | |
79 | ||
80 | enum | |
2e5ff58c TR |
81 | { |
82 | AVR_REG_W = 24, | |
83 | AVR_REG_X = 26, | |
84 | AVR_REG_Y = 28, | |
85 | AVR_FP_REGNUM = 28, | |
86 | AVR_REG_Z = 30, | |
87 | ||
88 | AVR_SREG_REGNUM = 32, | |
89 | AVR_SP_REGNUM = 33, | |
90 | AVR_PC_REGNUM = 34, | |
91 | ||
92 | AVR_NUM_REGS = 32 + 1 /*SREG*/ + 1 /*SP*/ + 1 /*PC*/, | |
93 | AVR_NUM_REG_BYTES = 32 + 1 /*SREG*/ + 2 /*SP*/ + 4 /*PC*/, | |
94 | ||
95 | AVR_PC_REG_INDEX = 35, /* index into array of registers */ | |
96 | ||
4add8633 | 97 | AVR_MAX_PROLOGUE_SIZE = 64, /* bytes */ |
2e5ff58c TR |
98 | |
99 | /* Count of pushed registers. From r2 to r17 (inclusively), r28, r29 */ | |
100 | AVR_MAX_PUSHES = 18, | |
101 | ||
102 | /* Number of the last pushed register. r17 for current avr-gcc */ | |
103 | AVR_LAST_PUSHED_REGNUM = 17, | |
104 | ||
4add8633 TR |
105 | AVR_ARG1_REGNUM = 24, /* Single byte argument */ |
106 | AVR_ARGN_REGNUM = 25, /* Multi byte argments */ | |
107 | ||
108 | AVR_RET1_REGNUM = 24, /* Single byte return value */ | |
109 | AVR_RETN_REGNUM = 25, /* Multi byte return value */ | |
110 | ||
2e5ff58c TR |
111 | /* FIXME: TRoth/2002-01-??: Can we shift all these memory masks left 8 |
112 | bits? Do these have to match the bfd vma values?. It sure would make | |
113 | things easier in the future if they didn't need to match. | |
114 | ||
115 | Note: I chose these values so as to be consistent with bfd vma | |
116 | addresses. | |
117 | ||
118 | TRoth/2002-04-08: There is already a conflict with very large programs | |
119 | in the mega128. The mega128 has 128K instruction bytes (64K words), | |
120 | thus the Most Significant Bit is 0x10000 which gets masked off my | |
121 | AVR_MEM_MASK. | |
122 | ||
123 | The problem manifests itself when trying to set a breakpoint in a | |
124 | function which resides in the upper half of the instruction space and | |
125 | thus requires a 17-bit address. | |
126 | ||
127 | For now, I've just removed the EEPROM mask and changed AVR_MEM_MASK | |
128 | from 0x00ff0000 to 0x00f00000. Eeprom is not accessible from gdb yet, | |
129 | but could be for some remote targets by just adding the correct offset | |
130 | to the address and letting the remote target handle the low-level | |
131 | details of actually accessing the eeprom. */ | |
132 | ||
133 | AVR_IMEM_START = 0x00000000, /* INSN memory */ | |
134 | AVR_SMEM_START = 0x00800000, /* SRAM memory */ | |
8818c391 | 135 | #if 1 |
2e5ff58c TR |
136 | /* No eeprom mask defined */ |
137 | AVR_MEM_MASK = 0x00f00000, /* mask to determine memory space */ | |
8818c391 | 138 | #else |
2e5ff58c TR |
139 | AVR_EMEM_START = 0x00810000, /* EEPROM memory */ |
140 | AVR_MEM_MASK = 0x00ff0000, /* mask to determine memory space */ | |
8818c391 | 141 | #endif |
2e5ff58c | 142 | }; |
8818c391 | 143 | |
4add8633 TR |
144 | /* Prologue types: |
145 | ||
146 | NORMAL and CALL are the typical types (the -mcall-prologues gcc option | |
147 | causes the generation of the CALL type prologues). */ | |
148 | ||
149 | enum { | |
150 | AVR_PROLOGUE_NONE, /* No prologue */ | |
151 | AVR_PROLOGUE_NORMAL, | |
152 | AVR_PROLOGUE_CALL, /* -mcall-prologues */ | |
153 | AVR_PROLOGUE_MAIN, | |
154 | AVR_PROLOGUE_INTR, /* interrupt handler */ | |
155 | AVR_PROLOGUE_SIG, /* signal handler */ | |
156 | }; | |
157 | ||
8818c391 TR |
158 | /* Any function with a frame looks like this |
159 | ....... <-SP POINTS HERE | |
160 | LOCALS1 <-FP POINTS HERE | |
161 | LOCALS0 | |
162 | SAVED FP | |
163 | SAVED R3 | |
164 | SAVED R2 | |
165 | RET PC | |
166 | FIRST ARG | |
167 | SECOND ARG */ | |
168 | ||
4add8633 | 169 | struct avr_unwind_cache |
2e5ff58c | 170 | { |
4add8633 TR |
171 | /* The previous frame's inner most stack address. Used as this |
172 | frame ID's stack_addr. */ | |
173 | CORE_ADDR prev_sp; | |
174 | /* The frame's base, optionally used by the high-level debug info. */ | |
175 | CORE_ADDR base; | |
176 | int size; | |
177 | int prologue_type; | |
178 | /* Table indicating the location of each and every register. */ | |
179 | struct trad_frame_saved_reg *saved_regs; | |
2e5ff58c | 180 | }; |
8818c391 TR |
181 | |
182 | struct gdbarch_tdep | |
2e5ff58c TR |
183 | { |
184 | /* FIXME: TRoth: is there anything to put here? */ | |
185 | int foo; | |
186 | }; | |
8818c391 TR |
187 | |
188 | /* Lookup the name of a register given it's number. */ | |
189 | ||
fa88f677 | 190 | static const char * |
8818c391 TR |
191 | avr_register_name (int regnum) |
192 | { | |
2e5ff58c TR |
193 | static char *register_names[] = { |
194 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", | |
195 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", | |
8818c391 TR |
196 | "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", |
197 | "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", | |
198 | "SREG", "SP", "PC" | |
199 | }; | |
200 | if (regnum < 0) | |
201 | return NULL; | |
202 | if (regnum >= (sizeof (register_names) / sizeof (*register_names))) | |
203 | return NULL; | |
204 | return register_names[regnum]; | |
205 | } | |
206 | ||
8818c391 TR |
207 | /* Return the GDB type object for the "standard" data type |
208 | of data in register N. */ | |
209 | ||
210 | static struct type * | |
866b76ea | 211 | avr_register_type (struct gdbarch *gdbarch, int reg_nr) |
8818c391 | 212 | { |
866b76ea TR |
213 | if (reg_nr == AVR_PC_REGNUM) |
214 | return builtin_type_uint32; | |
866b76ea TR |
215 | if (reg_nr == AVR_SP_REGNUM) |
216 | return builtin_type_void_data_ptr; | |
217 | else | |
218 | return builtin_type_uint8; | |
8818c391 TR |
219 | } |
220 | ||
221 | /* Instruction address checks and convertions. */ | |
222 | ||
223 | static CORE_ADDR | |
224 | avr_make_iaddr (CORE_ADDR x) | |
225 | { | |
226 | return ((x) | AVR_IMEM_START); | |
227 | } | |
228 | ||
229 | static int | |
230 | avr_iaddr_p (CORE_ADDR x) | |
231 | { | |
232 | return (((x) & AVR_MEM_MASK) == AVR_IMEM_START); | |
233 | } | |
234 | ||
235 | /* FIXME: TRoth: Really need to use a larger mask for instructions. Some | |
236 | devices are already up to 128KBytes of flash space. | |
237 | ||
238 | TRoth/2002-04-8: See comment above where AVR_IMEM_START is defined. */ | |
239 | ||
240 | static CORE_ADDR | |
241 | avr_convert_iaddr_to_raw (CORE_ADDR x) | |
242 | { | |
243 | return ((x) & 0xffffffff); | |
244 | } | |
245 | ||
246 | /* SRAM address checks and convertions. */ | |
247 | ||
248 | static CORE_ADDR | |
249 | avr_make_saddr (CORE_ADDR x) | |
250 | { | |
251 | return ((x) | AVR_SMEM_START); | |
252 | } | |
253 | ||
254 | static int | |
255 | avr_saddr_p (CORE_ADDR x) | |
256 | { | |
257 | return (((x) & AVR_MEM_MASK) == AVR_SMEM_START); | |
258 | } | |
259 | ||
260 | static CORE_ADDR | |
261 | avr_convert_saddr_to_raw (CORE_ADDR x) | |
262 | { | |
263 | return ((x) & 0xffffffff); | |
264 | } | |
265 | ||
266 | /* EEPROM address checks and convertions. I don't know if these will ever | |
267 | actually be used, but I've added them just the same. TRoth */ | |
268 | ||
269 | /* TRoth/2002-04-08: Commented out for now to allow fix for problem with large | |
270 | programs in the mega128. */ | |
271 | ||
272 | /* static CORE_ADDR */ | |
273 | /* avr_make_eaddr (CORE_ADDR x) */ | |
274 | /* { */ | |
275 | /* return ((x) | AVR_EMEM_START); */ | |
276 | /* } */ | |
277 | ||
278 | /* static int */ | |
279 | /* avr_eaddr_p (CORE_ADDR x) */ | |
280 | /* { */ | |
281 | /* return (((x) & AVR_MEM_MASK) == AVR_EMEM_START); */ | |
282 | /* } */ | |
283 | ||
284 | /* static CORE_ADDR */ | |
285 | /* avr_convert_eaddr_to_raw (CORE_ADDR x) */ | |
286 | /* { */ | |
287 | /* return ((x) & 0xffffffff); */ | |
288 | /* } */ | |
289 | ||
290 | /* Convert from address to pointer and vice-versa. */ | |
291 | ||
292 | static void | |
293 | avr_address_to_pointer (struct type *type, void *buf, CORE_ADDR addr) | |
294 | { | |
295 | /* Is it a code address? */ | |
296 | if (TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC | |
297 | || TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_METHOD) | |
298 | { | |
2e5ff58c | 299 | store_unsigned_integer (buf, TYPE_LENGTH (type), |
4ea2465e | 300 | avr_convert_iaddr_to_raw (addr >> 1)); |
8818c391 TR |
301 | } |
302 | else | |
303 | { | |
304 | /* Strip off any upper segment bits. */ | |
2e5ff58c TR |
305 | store_unsigned_integer (buf, TYPE_LENGTH (type), |
306 | avr_convert_saddr_to_raw (addr)); | |
8818c391 TR |
307 | } |
308 | } | |
309 | ||
310 | static CORE_ADDR | |
66140c26 | 311 | avr_pointer_to_address (struct type *type, const void *buf) |
8818c391 | 312 | { |
7c0b4a20 | 313 | CORE_ADDR addr = extract_unsigned_integer (buf, TYPE_LENGTH (type)); |
8818c391 | 314 | |
8818c391 TR |
315 | /* Is it a code address? */ |
316 | if (TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC | |
317 | || TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_METHOD | |
2e5ff58c | 318 | || TYPE_CODE_SPACE (TYPE_TARGET_TYPE (type))) |
4ea2465e | 319 | return avr_make_iaddr (addr << 1); |
8818c391 TR |
320 | else |
321 | return avr_make_saddr (addr); | |
322 | } | |
323 | ||
324 | static CORE_ADDR | |
325 | avr_read_pc (ptid_t ptid) | |
326 | { | |
327 | ptid_t save_ptid; | |
8619218d | 328 | ULONGEST pc; |
8818c391 TR |
329 | CORE_ADDR retval; |
330 | ||
331 | save_ptid = inferior_ptid; | |
332 | inferior_ptid = ptid; | |
8619218d | 333 | regcache_cooked_read_unsigned (current_regcache, AVR_PC_REGNUM, &pc); |
8818c391 TR |
334 | inferior_ptid = save_ptid; |
335 | retval = avr_make_iaddr (pc); | |
336 | return retval; | |
337 | } | |
338 | ||
339 | static void | |
340 | avr_write_pc (CORE_ADDR val, ptid_t ptid) | |
341 | { | |
342 | ptid_t save_ptid; | |
343 | ||
344 | save_ptid = inferior_ptid; | |
345 | inferior_ptid = ptid; | |
346 | write_register (AVR_PC_REGNUM, avr_convert_iaddr_to_raw (val)); | |
347 | inferior_ptid = save_ptid; | |
348 | } | |
349 | ||
350 | static CORE_ADDR | |
351 | avr_read_sp (void) | |
352 | { | |
8619218d TR |
353 | ULONGEST sp; |
354 | ||
355 | regcache_cooked_read_unsigned (current_regcache, AVR_SP_REGNUM, &sp); | |
356 | return (avr_make_saddr (sp)); | |
8818c391 TR |
357 | } |
358 | ||
4add8633 TR |
359 | static int |
360 | avr_scan_arg_moves (int vpc, unsigned char *prologue) | |
8818c391 | 361 | { |
4add8633 | 362 | unsigned short insn; |
866b76ea | 363 | |
4add8633 TR |
364 | for (; vpc < AVR_MAX_PROLOGUE_SIZE; vpc += 2) |
365 | { | |
366 | insn = EXTRACT_INSN (&prologue[vpc]); | |
367 | if ((insn & 0xff00) == 0x0100) /* movw rXX, rYY */ | |
368 | continue; | |
369 | else if ((insn & 0xfc00) == 0x2c00) /* mov rXX, rYY */ | |
370 | continue; | |
371 | else | |
372 | break; | |
373 | } | |
374 | ||
375 | return vpc; | |
8818c391 TR |
376 | } |
377 | ||
4add8633 | 378 | /* Function: avr_scan_prologue |
8818c391 | 379 | |
4add8633 | 380 | This function decodes an AVR function prologue to determine: |
8818c391 TR |
381 | 1) the size of the stack frame |
382 | 2) which registers are saved on it | |
383 | 3) the offsets of saved regs | |
4add8633 | 384 | This information is stored in the avr_unwind_cache structure. |
8818c391 | 385 | |
e3d8b004 TR |
386 | Some devices lack the sbiw instruction, so on those replace this: |
387 | sbiw r28, XX | |
388 | with this: | |
389 | subi r28,lo8(XX) | |
390 | sbci r29,hi8(XX) | |
391 | ||
392 | A typical AVR function prologue with a frame pointer might look like this: | |
393 | push rXX ; saved regs | |
394 | ... | |
395 | push r28 | |
396 | push r29 | |
397 | in r28,__SP_L__ | |
398 | in r29,__SP_H__ | |
399 | sbiw r28,<LOCALS_SIZE> | |
400 | in __tmp_reg__,__SREG__ | |
8818c391 | 401 | cli |
e3d8b004 | 402 | out __SP_H__,r29 |
72fab697 TR |
403 | out __SREG__,__tmp_reg__ |
404 | out __SP_L__,r28 | |
e3d8b004 TR |
405 | |
406 | A typical AVR function prologue without a frame pointer might look like | |
407 | this: | |
408 | push rXX ; saved regs | |
409 | ... | |
410 | ||
411 | A main function prologue looks like this: | |
412 | ldi r28,lo8(<RAM_ADDR> - <LOCALS_SIZE>) | |
413 | ldi r29,hi8(<RAM_ADDR> - <LOCALS_SIZE>) | |
414 | out __SP_H__,r29 | |
415 | out __SP_L__,r28 | |
416 | ||
417 | A signal handler prologue looks like this: | |
418 | push __zero_reg__ | |
419 | push __tmp_reg__ | |
420 | in __tmp_reg__, __SREG__ | |
421 | push __tmp_reg__ | |
422 | clr __zero_reg__ | |
423 | push rXX ; save registers r18:r27, r30:r31 | |
424 | ... | |
425 | push r28 ; save frame pointer | |
426 | push r29 | |
427 | in r28, __SP_L__ | |
428 | in r29, __SP_H__ | |
429 | sbiw r28, <LOCALS_SIZE> | |
430 | out __SP_H__, r29 | |
431 | out __SP_L__, r28 | |
432 | ||
433 | A interrupt handler prologue looks like this: | |
434 | sei | |
435 | push __zero_reg__ | |
436 | push __tmp_reg__ | |
437 | in __tmp_reg__, __SREG__ | |
438 | push __tmp_reg__ | |
439 | clr __zero_reg__ | |
440 | push rXX ; save registers r18:r27, r30:r31 | |
441 | ... | |
442 | push r28 ; save frame pointer | |
443 | push r29 | |
444 | in r28, __SP_L__ | |
445 | in r29, __SP_H__ | |
446 | sbiw r28, <LOCALS_SIZE> | |
447 | cli | |
448 | out __SP_H__, r29 | |
449 | sei | |
450 | out __SP_L__, r28 | |
451 | ||
452 | A `-mcall-prologues' prologue looks like this (Note that the megas use a | |
453 | jmp instead of a rjmp, thus the prologue is one word larger since jmp is a | |
454 | 32 bit insn and rjmp is a 16 bit insn): | |
455 | ldi r26,lo8(<LOCALS_SIZE>) | |
456 | ldi r27,hi8(<LOCALS_SIZE>) | |
457 | ldi r30,pm_lo8(.L_foo_body) | |
458 | ldi r31,pm_hi8(.L_foo_body) | |
459 | rjmp __prologue_saves__+RRR | |
460 | .L_foo_body: */ | |
8818c391 | 461 | |
4add8633 TR |
462 | /* Not really part of a prologue, but still need to scan for it, is when a |
463 | function prologue moves values passed via registers as arguments to new | |
464 | registers. In this case, all local variables live in registers, so there | |
465 | may be some register saves. This is what it looks like: | |
466 | movw rMM, rNN | |
467 | ... | |
468 | ||
469 | There could be multiple movw's. If the target doesn't have a movw insn, it | |
470 | will use two mov insns. This could be done after any of the above prologue | |
471 | types. */ | |
472 | ||
473 | static CORE_ADDR | |
474 | avr_scan_prologue (CORE_ADDR pc, struct avr_unwind_cache *info) | |
8818c391 | 475 | { |
2e5ff58c TR |
476 | int i; |
477 | unsigned short insn; | |
2e5ff58c | 478 | int scan_stage = 0; |
8818c391 | 479 | struct minimal_symbol *msymbol; |
8818c391 TR |
480 | unsigned char prologue[AVR_MAX_PROLOGUE_SIZE]; |
481 | int vpc = 0; | |
482 | ||
4add8633 TR |
483 | /* FIXME: TRoth/2003-06-11: This could be made more efficient by only |
484 | reading in the bytes of the prologue. The problem is that the figuring | |
485 | out where the end of the prologue is is a bit difficult. The old code | |
486 | tried to do that, but failed quite often. */ | |
487 | read_memory (pc, prologue, AVR_MAX_PROLOGUE_SIZE); | |
8818c391 TR |
488 | |
489 | /* Scanning main()'s prologue | |
490 | ldi r28,lo8(<RAM_ADDR> - <LOCALS_SIZE>) | |
491 | ldi r29,hi8(<RAM_ADDR> - <LOCALS_SIZE>) | |
492 | out __SP_H__,r29 | |
493 | out __SP_L__,r28 */ | |
494 | ||
4add8633 | 495 | if (1) |
8818c391 TR |
496 | { |
497 | CORE_ADDR locals; | |
2e5ff58c TR |
498 | unsigned char img[] = { |
499 | 0xde, 0xbf, /* out __SP_H__,r29 */ | |
500 | 0xcd, 0xbf /* out __SP_L__,r28 */ | |
8818c391 TR |
501 | }; |
502 | ||
8818c391 TR |
503 | insn = EXTRACT_INSN (&prologue[vpc]); |
504 | /* ldi r28,lo8(<RAM_ADDR> - <LOCALS_SIZE>) */ | |
2e5ff58c TR |
505 | if ((insn & 0xf0f0) == 0xe0c0) |
506 | { | |
507 | locals = (insn & 0xf) | ((insn & 0x0f00) >> 4); | |
508 | insn = EXTRACT_INSN (&prologue[vpc + 2]); | |
509 | /* ldi r29,hi8(<RAM_ADDR> - <LOCALS_SIZE>) */ | |
510 | if ((insn & 0xf0f0) == 0xe0d0) | |
511 | { | |
512 | locals |= ((insn & 0xf) | ((insn & 0x0f00) >> 4)) << 8; | |
513 | if (memcmp (prologue + vpc + 4, img, sizeof (img)) == 0) | |
514 | { | |
4add8633 TR |
515 | info->prologue_type = AVR_PROLOGUE_MAIN; |
516 | info->base = locals; | |
517 | return pc + 4; | |
2e5ff58c TR |
518 | } |
519 | } | |
520 | } | |
8818c391 | 521 | } |
2e5ff58c | 522 | |
4add8633 TR |
523 | /* Scanning `-mcall-prologues' prologue |
524 | Classic prologue is 10 bytes, mega prologue is a 12 bytes long */ | |
8818c391 | 525 | |
e3d8b004 | 526 | while (1) /* Using a while to avoid many goto's */ |
8818c391 TR |
527 | { |
528 | int loc_size; | |
529 | int body_addr; | |
530 | unsigned num_pushes; | |
4add8633 | 531 | int pc_offset = 0; |
2e5ff58c | 532 | |
8818c391 TR |
533 | insn = EXTRACT_INSN (&prologue[vpc]); |
534 | /* ldi r26,<LOCALS_SIZE> */ | |
2e5ff58c TR |
535 | if ((insn & 0xf0f0) != 0xe0a0) |
536 | break; | |
8818c391 | 537 | loc_size = (insn & 0xf) | ((insn & 0x0f00) >> 4); |
4add8633 | 538 | pc_offset += 2; |
2e5ff58c | 539 | |
8818c391 TR |
540 | insn = EXTRACT_INSN (&prologue[vpc + 2]); |
541 | /* ldi r27,<LOCALS_SIZE> / 256 */ | |
542 | if ((insn & 0xf0f0) != 0xe0b0) | |
2e5ff58c | 543 | break; |
8818c391 | 544 | loc_size |= ((insn & 0xf) | ((insn & 0x0f00) >> 4)) << 8; |
4add8633 | 545 | pc_offset += 2; |
2e5ff58c | 546 | |
8818c391 TR |
547 | insn = EXTRACT_INSN (&prologue[vpc + 4]); |
548 | /* ldi r30,pm_lo8(.L_foo_body) */ | |
549 | if ((insn & 0xf0f0) != 0xe0e0) | |
2e5ff58c | 550 | break; |
8818c391 | 551 | body_addr = (insn & 0xf) | ((insn & 0x0f00) >> 4); |
4add8633 | 552 | pc_offset += 2; |
8818c391 TR |
553 | |
554 | insn = EXTRACT_INSN (&prologue[vpc + 6]); | |
555 | /* ldi r31,pm_hi8(.L_foo_body) */ | |
556 | if ((insn & 0xf0f0) != 0xe0f0) | |
2e5ff58c | 557 | break; |
8818c391 | 558 | body_addr |= ((insn & 0xf) | ((insn & 0x0f00) >> 4)) << 8; |
4add8633 | 559 | pc_offset += 2; |
8818c391 | 560 | |
8818c391 TR |
561 | msymbol = lookup_minimal_symbol ("__prologue_saves__", NULL, NULL); |
562 | if (!msymbol) | |
2e5ff58c | 563 | break; |
8818c391 | 564 | |
8818c391 TR |
565 | insn = EXTRACT_INSN (&prologue[vpc + 8]); |
566 | /* rjmp __prologue_saves__+RRR */ | |
e3d8b004 TR |
567 | if ((insn & 0xf000) == 0xc000) |
568 | { | |
569 | /* Extract PC relative offset from RJMP */ | |
570 | i = (insn & 0xfff) | (insn & 0x800 ? (-1 ^ 0xfff) : 0); | |
571 | /* Convert offset to byte addressable mode */ | |
572 | i *= 2; | |
573 | /* Destination address */ | |
4add8633 | 574 | i += pc + 10; |
e3d8b004 | 575 | |
4add8633 | 576 | if (body_addr != (pc + 10)/2) |
e3d8b004 | 577 | break; |
4add8633 TR |
578 | |
579 | pc_offset += 2; | |
e3d8b004 | 580 | } |
e3d8b004 TR |
581 | else if ((insn & 0xfe0e) == 0x940c) |
582 | { | |
583 | /* Extract absolute PC address from JMP */ | |
584 | i = (((insn & 0x1) | ((insn & 0x1f0) >> 3) << 16) | |
585 | | (EXTRACT_INSN (&prologue[vpc + 10]) & 0xffff)); | |
586 | /* Convert address to byte addressable mode */ | |
587 | i *= 2; | |
588 | ||
4add8633 | 589 | if (body_addr != (pc + 12)/2) |
e3d8b004 | 590 | break; |
4add8633 TR |
591 | |
592 | pc_offset += 4; | |
e3d8b004 TR |
593 | } |
594 | else | |
595 | break; | |
2e5ff58c | 596 | |
4add8633 | 597 | /* Resolve offset (in words) from __prologue_saves__ symbol. |
8818c391 TR |
598 | Which is a pushes count in `-mcall-prologues' mode */ |
599 | num_pushes = AVR_MAX_PUSHES - (i - SYMBOL_VALUE_ADDRESS (msymbol)) / 2; | |
600 | ||
601 | if (num_pushes > AVR_MAX_PUSHES) | |
4add8633 TR |
602 | { |
603 | fprintf_unfiltered (gdb_stderr, "Num pushes too large: %d\n", | |
604 | num_pushes); | |
605 | num_pushes = 0; | |
606 | } | |
2e5ff58c | 607 | |
8818c391 | 608 | if (num_pushes) |
2e5ff58c TR |
609 | { |
610 | int from; | |
4add8633 TR |
611 | |
612 | info->saved_regs[AVR_FP_REGNUM + 1].addr = num_pushes; | |
2e5ff58c | 613 | if (num_pushes >= 2) |
4add8633 TR |
614 | info->saved_regs[AVR_FP_REGNUM].addr = num_pushes - 1; |
615 | ||
2e5ff58c TR |
616 | i = 0; |
617 | for (from = AVR_LAST_PUSHED_REGNUM + 1 - (num_pushes - 2); | |
618 | from <= AVR_LAST_PUSHED_REGNUM; ++from) | |
4add8633 | 619 | info->saved_regs [from].addr = ++i; |
2e5ff58c | 620 | } |
4add8633 TR |
621 | info->size = loc_size + num_pushes; |
622 | info->prologue_type = AVR_PROLOGUE_CALL; | |
623 | ||
624 | return pc + pc_offset; | |
8818c391 TR |
625 | } |
626 | ||
4add8633 TR |
627 | /* Scan for the beginning of the prologue for an interrupt or signal |
628 | function. Note that we have to set the prologue type here since the | |
629 | third stage of the prologue may not be present (e.g. no saved registered | |
630 | or changing of the SP register). */ | |
8818c391 | 631 | |
4add8633 | 632 | if (1) |
8818c391 | 633 | { |
2e5ff58c TR |
634 | unsigned char img[] = { |
635 | 0x78, 0x94, /* sei */ | |
636 | 0x1f, 0x92, /* push r1 */ | |
637 | 0x0f, 0x92, /* push r0 */ | |
638 | 0x0f, 0xb6, /* in r0,0x3f SREG */ | |
639 | 0x0f, 0x92, /* push r0 */ | |
640 | 0x11, 0x24 /* clr r1 */ | |
8818c391 TR |
641 | }; |
642 | if (memcmp (prologue, img, sizeof (img)) == 0) | |
2e5ff58c | 643 | { |
4add8633 | 644 | info->prologue_type = AVR_PROLOGUE_INTR; |
2e5ff58c | 645 | vpc += sizeof (img); |
4add8633 TR |
646 | info->saved_regs[AVR_SREG_REGNUM].addr = 3; |
647 | info->saved_regs[0].addr = 2; | |
648 | info->saved_regs[1].addr = 1; | |
649 | info->size += 3; | |
2e5ff58c | 650 | } |
4add8633 | 651 | else if (memcmp (img + 2, prologue, sizeof (img) - 2) == 0) |
2e5ff58c | 652 | { |
4add8633 TR |
653 | info->prologue_type = AVR_PROLOGUE_SIG; |
654 | vpc += sizeof (img) - 2; | |
655 | info->saved_regs[AVR_SREG_REGNUM].addr = 3; | |
656 | info->saved_regs[0].addr = 2; | |
657 | info->saved_regs[1].addr = 1; | |
658 | info->size += 3; | |
2e5ff58c | 659 | } |
8818c391 TR |
660 | } |
661 | ||
662 | /* First stage of the prologue scanning. | |
4add8633 | 663 | Scan pushes (saved registers) */ |
8818c391 | 664 | |
4add8633 | 665 | for (; vpc < AVR_MAX_PROLOGUE_SIZE; vpc += 2) |
8818c391 TR |
666 | { |
667 | insn = EXTRACT_INSN (&prologue[vpc]); | |
2e5ff58c TR |
668 | if ((insn & 0xfe0f) == 0x920f) /* push rXX */ |
669 | { | |
670 | /* Bits 4-9 contain a mask for registers R0-R32. */ | |
4add8633 TR |
671 | int regno = (insn & 0x1f0) >> 4; |
672 | info->size++; | |
673 | info->saved_regs[regno].addr = info->size; | |
2e5ff58c TR |
674 | scan_stage = 1; |
675 | } | |
8818c391 | 676 | else |
2e5ff58c | 677 | break; |
8818c391 TR |
678 | } |
679 | ||
4add8633 TR |
680 | if (vpc >= AVR_MAX_PROLOGUE_SIZE) |
681 | fprintf_unfiltered (gdb_stderr, | |
682 | "Hit end of prologue while scanning pushes\n"); | |
683 | ||
8818c391 TR |
684 | /* Second stage of the prologue scanning. |
685 | Scan: | |
686 | in r28,__SP_L__ | |
687 | in r29,__SP_H__ */ | |
688 | ||
4add8633 | 689 | if (scan_stage == 1 && vpc < AVR_MAX_PROLOGUE_SIZE) |
8818c391 | 690 | { |
2e5ff58c TR |
691 | unsigned char img[] = { |
692 | 0xcd, 0xb7, /* in r28,__SP_L__ */ | |
693 | 0xde, 0xb7 /* in r29,__SP_H__ */ | |
8818c391 TR |
694 | }; |
695 | unsigned short insn1; | |
2e5ff58c | 696 | |
8818c391 | 697 | if (memcmp (prologue + vpc, img, sizeof (img)) == 0) |
2e5ff58c TR |
698 | { |
699 | vpc += 4; | |
2e5ff58c TR |
700 | scan_stage = 2; |
701 | } | |
8818c391 TR |
702 | } |
703 | ||
704 | /* Third stage of the prologue scanning. (Really two stages) | |
705 | Scan for: | |
706 | sbiw r28,XX or subi r28,lo8(XX) | |
72fab697 | 707 | sbci r29,hi8(XX) |
8818c391 TR |
708 | in __tmp_reg__,__SREG__ |
709 | cli | |
e3d8b004 | 710 | out __SP_H__,r29 |
8818c391 | 711 | out __SREG__,__tmp_reg__ |
e3d8b004 | 712 | out __SP_L__,r28 */ |
8818c391 | 713 | |
4add8633 | 714 | if (scan_stage == 2 && vpc < AVR_MAX_PROLOGUE_SIZE) |
8818c391 TR |
715 | { |
716 | int locals_size = 0; | |
2e5ff58c TR |
717 | unsigned char img[] = { |
718 | 0x0f, 0xb6, /* in r0,0x3f */ | |
719 | 0xf8, 0x94, /* cli */ | |
e3d8b004 | 720 | 0xde, 0xbf, /* out 0x3e,r29 ; SPH */ |
2e5ff58c | 721 | 0x0f, 0xbe, /* out 0x3f,r0 ; SREG */ |
e3d8b004 | 722 | 0xcd, 0xbf /* out 0x3d,r28 ; SPL */ |
8818c391 | 723 | }; |
2e5ff58c | 724 | unsigned char img_sig[] = { |
e3d8b004 TR |
725 | 0xde, 0xbf, /* out 0x3e,r29 ; SPH */ |
726 | 0xcd, 0xbf /* out 0x3d,r28 ; SPL */ | |
8818c391 | 727 | }; |
2e5ff58c TR |
728 | unsigned char img_int[] = { |
729 | 0xf8, 0x94, /* cli */ | |
e3d8b004 | 730 | 0xde, 0xbf, /* out 0x3e,r29 ; SPH */ |
2e5ff58c | 731 | 0x78, 0x94, /* sei */ |
e3d8b004 | 732 | 0xcd, 0xbf /* out 0x3d,r28 ; SPL */ |
8818c391 | 733 | }; |
2e5ff58c | 734 | |
8818c391 TR |
735 | insn = EXTRACT_INSN (&prologue[vpc]); |
736 | vpc += 2; | |
2e5ff58c TR |
737 | if ((insn & 0xff30) == 0x9720) /* sbiw r28,XXX */ |
738 | locals_size = (insn & 0xf) | ((insn & 0xc0) >> 2); | |
739 | else if ((insn & 0xf0f0) == 0x50c0) /* subi r28,lo8(XX) */ | |
740 | { | |
741 | locals_size = (insn & 0xf) | ((insn & 0xf00) >> 4); | |
742 | insn = EXTRACT_INSN (&prologue[vpc]); | |
743 | vpc += 2; | |
744 | locals_size += ((insn & 0xf) | ((insn & 0xf00) >> 4) << 8); | |
745 | } | |
8818c391 | 746 | else |
4add8633 TR |
747 | return pc + vpc; |
748 | ||
749 | /* Scan the last part of the prologue. May not be present for interrupt | |
750 | or signal handler functions, which is why we set the prologue type | |
751 | when we saw the beginning of the prologue previously. */ | |
752 | ||
753 | if (memcmp (prologue + vpc, img_sig, sizeof (img_sig)) == 0) | |
754 | { | |
755 | vpc += sizeof (img_sig); | |
756 | } | |
757 | else if (memcmp (prologue + vpc, img_int, sizeof (img_int)) == 0) | |
758 | { | |
759 | vpc += sizeof (img_int); | |
760 | } | |
761 | if (memcmp (prologue + vpc, img, sizeof (img)) == 0) | |
762 | { | |
763 | info->prologue_type = AVR_PROLOGUE_NORMAL; | |
764 | vpc += sizeof (img); | |
765 | } | |
766 | ||
767 | info->size += locals_size; | |
768 | ||
769 | return pc + avr_scan_arg_moves (vpc, prologue); | |
8818c391 | 770 | } |
4add8633 TR |
771 | |
772 | /* If we got this far, we could not scan the prologue, so just return the pc | |
773 | of the frame plus an adjustment for argument move insns. */ | |
774 | ||
775 | return pc + avr_scan_arg_moves (vpc, prologue);; | |
8818c391 TR |
776 | } |
777 | ||
4add8633 TR |
778 | static CORE_ADDR |
779 | avr_skip_prologue (CORE_ADDR pc) | |
780 | { | |
781 | CORE_ADDR func_addr, func_end; | |
782 | CORE_ADDR prologue_end = pc; | |
8818c391 | 783 | |
4add8633 | 784 | /* See what the symbol table says */ |
8818c391 | 785 | |
4add8633 TR |
786 | if (find_pc_partial_function (pc, NULL, &func_addr, &func_end)) |
787 | { | |
788 | struct symtab_and_line sal; | |
789 | struct avr_unwind_cache info = {0}; | |
790 | struct trad_frame_saved_reg saved_regs[AVR_NUM_REGS]; | |
2e5ff58c | 791 | |
4add8633 | 792 | info.saved_regs = saved_regs; |
8818c391 | 793 | |
4add8633 TR |
794 | /* Need to run the prologue scanner to figure out if the function has a |
795 | prologue and possibly skip over moving arguments passed via registers | |
796 | to other registers. */ | |
2e5ff58c | 797 | |
4add8633 | 798 | prologue_end = avr_scan_prologue (pc, &info); |
8818c391 | 799 | |
3b85b0f1 TR |
800 | if (info.prologue_type == AVR_PROLOGUE_NONE) |
801 | return pc; | |
802 | else | |
4add8633 TR |
803 | { |
804 | sal = find_pc_line (func_addr, 0); | |
8818c391 | 805 | |
4add8633 TR |
806 | if (sal.line != 0 && sal.end < func_end) |
807 | return sal.end; | |
808 | } | |
809 | } | |
2e5ff58c | 810 | |
4add8633 TR |
811 | /* Either we didn't find the start of this function (nothing we can do), |
812 | or there's no line info, or the line after the prologue is after | |
813 | the end of the function (there probably isn't a prologue). */ | |
2e5ff58c | 814 | |
4add8633 TR |
815 | return prologue_end; |
816 | } | |
8818c391 | 817 | |
4add8633 TR |
818 | /* Not all avr devices support the BREAK insn. Those that don't should treat |
819 | it as a NOP. Thus, it should be ok. Since the avr is currently a remote | |
820 | only target, this shouldn't be a problem (I hope). TRoth/2003-05-14 */ | |
8818c391 | 821 | |
4add8633 TR |
822 | static const unsigned char * |
823 | avr_breakpoint_from_pc (CORE_ADDR * pcptr, int *lenptr) | |
824 | { | |
825 | static unsigned char avr_break_insn [] = { 0x98, 0x95 }; | |
826 | *lenptr = sizeof (avr_break_insn); | |
827 | return avr_break_insn; | |
8818c391 TR |
828 | } |
829 | ||
4add8633 TR |
830 | /* Given a return value in `regbuf' with a type `valtype', |
831 | extract and copy its value into `valbuf'. | |
832 | ||
833 | Return values are always passed via registers r25:r24:... */ | |
8818c391 TR |
834 | |
835 | static void | |
4add8633 TR |
836 | avr_extract_return_value (struct type *type, struct regcache *regcache, |
837 | void *valbuf) | |
8818c391 | 838 | { |
4add8633 TR |
839 | ULONGEST r24, r25; |
840 | ULONGEST c; | |
841 | int len; | |
842 | if (TYPE_LENGTH (type) == 1) | |
8818c391 | 843 | { |
4add8633 TR |
844 | regcache_cooked_read_unsigned (regcache, 24, &c); |
845 | store_unsigned_integer (valbuf, 1, c); | |
8818c391 TR |
846 | } |
847 | else | |
848 | { | |
4add8633 TR |
849 | int i; |
850 | /* The MSB of the return value is always in r25, calculate which | |
851 | register holds the LSB. */ | |
852 | int lsb_reg = 25 - TYPE_LENGTH (type) + 1; | |
8818c391 | 853 | |
4add8633 TR |
854 | for (i=0; i< TYPE_LENGTH (type); i++) |
855 | { | |
856 | regcache_cooked_read (regcache, lsb_reg + i, | |
857 | (bfd_byte *) valbuf + i); | |
4add8633 TR |
858 | } |
859 | } | |
860 | } | |
8818c391 | 861 | |
4add8633 TR |
862 | /* Put here the code to store, into fi->saved_regs, the addresses of |
863 | the saved registers of frame described by FRAME_INFO. This | |
864 | includes special registers such as pc and fp saved in special ways | |
865 | in the stack frame. sp is even more special: the address we return | |
866 | for it IS the sp for the next frame. */ | |
8818c391 | 867 | |
4add8633 TR |
868 | struct avr_unwind_cache * |
869 | avr_frame_unwind_cache (struct frame_info *next_frame, | |
870 | void **this_prologue_cache) | |
8818c391 | 871 | { |
4add8633 TR |
872 | CORE_ADDR pc; |
873 | ULONGEST prev_sp; | |
874 | ULONGEST this_base; | |
875 | struct avr_unwind_cache *info; | |
876 | int i; | |
877 | ||
878 | if ((*this_prologue_cache)) | |
879 | return (*this_prologue_cache); | |
880 | ||
881 | info = FRAME_OBSTACK_ZALLOC (struct avr_unwind_cache); | |
882 | (*this_prologue_cache) = info; | |
883 | info->saved_regs = trad_frame_alloc_saved_regs (next_frame); | |
884 | ||
885 | info->size = 0; | |
886 | info->prologue_type = AVR_PROLOGUE_NONE; | |
887 | ||
888 | pc = frame_func_unwind (next_frame); | |
889 | ||
890 | if ((pc > 0) && (pc < frame_pc_unwind (next_frame))) | |
891 | avr_scan_prologue (pc, info); | |
892 | ||
3b85b0f1 TR |
893 | if ((info->prologue_type != AVR_PROLOGUE_NONE) |
894 | && (info->prologue_type != AVR_PROLOGUE_MAIN)) | |
4add8633 TR |
895 | { |
896 | ULONGEST high_base; /* High byte of FP */ | |
897 | ||
898 | /* The SP was moved to the FP. This indicates that a new frame | |
899 | was created. Get THIS frame's FP value by unwinding it from | |
900 | the next frame. */ | |
901 | frame_unwind_unsigned_register (next_frame, AVR_FP_REGNUM, &this_base); | |
902 | frame_unwind_unsigned_register (next_frame, AVR_FP_REGNUM+1, &high_base); | |
903 | this_base += (high_base << 8); | |
904 | ||
905 | /* The FP points at the last saved register. Adjust the FP back | |
906 | to before the first saved register giving the SP. */ | |
907 | prev_sp = this_base + info->size; | |
908 | } | |
8818c391 | 909 | else |
4add8633 TR |
910 | { |
911 | /* Assume that the FP is this frame's SP but with that pushed | |
912 | stack space added back. */ | |
913 | frame_unwind_unsigned_register (next_frame, AVR_SP_REGNUM, &this_base); | |
914 | prev_sp = this_base + info->size; | |
915 | } | |
916 | ||
917 | /* Add 1 here to adjust for the post-decrement nature of the push | |
918 | instruction.*/ | |
919 | info->prev_sp = avr_make_saddr (prev_sp+1); | |
920 | ||
921 | info->base = avr_make_saddr (this_base); | |
922 | ||
923 | /* Adjust all the saved registers so that they contain addresses and not | |
3b85b0f1 | 924 | offsets. */ |
4add8633 TR |
925 | for (i = 0; i < NUM_REGS - 1; i++) |
926 | if (info->saved_regs[i].addr) | |
927 | { | |
928 | info->saved_regs[i].addr = (info->prev_sp - info->saved_regs[i].addr); | |
929 | } | |
930 | ||
931 | /* Except for the main and startup code, the return PC is always saved on | |
932 | the stack and is at the base of the frame. */ | |
933 | ||
934 | if (info->prologue_type != AVR_PROLOGUE_MAIN) | |
935 | { | |
936 | info->saved_regs[AVR_PC_REGNUM].addr = info->prev_sp; | |
937 | } | |
938 | ||
3b85b0f1 TR |
939 | /* The previous frame's SP needed to be computed. Save the computed |
940 | value. */ | |
941 | trad_frame_set_value (info->saved_regs, AVR_SP_REGNUM, info->prev_sp+1); | |
942 | ||
4add8633 | 943 | return info; |
8818c391 TR |
944 | } |
945 | ||
946 | static CORE_ADDR | |
4add8633 | 947 | avr_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) |
8818c391 | 948 | { |
4add8633 TR |
949 | ULONGEST pc; |
950 | ||
951 | frame_unwind_unsigned_register (next_frame, AVR_PC_REGNUM, &pc); | |
952 | ||
953 | return avr_make_iaddr (pc); | |
8818c391 TR |
954 | } |
955 | ||
4add8633 TR |
956 | /* Given a GDB frame, determine the address of the calling function's |
957 | frame. This will be used to create a new GDB frame struct. */ | |
8818c391 | 958 | |
4add8633 TR |
959 | static void |
960 | avr_frame_this_id (struct frame_info *next_frame, | |
961 | void **this_prologue_cache, | |
962 | struct frame_id *this_id) | |
8818c391 | 963 | { |
4add8633 TR |
964 | struct avr_unwind_cache *info |
965 | = avr_frame_unwind_cache (next_frame, this_prologue_cache); | |
966 | CORE_ADDR base; | |
967 | CORE_ADDR func; | |
968 | struct frame_id id; | |
969 | ||
970 | /* The FUNC is easy. */ | |
971 | func = frame_func_unwind (next_frame); | |
972 | ||
4add8633 TR |
973 | /* Hopefully the prologue analysis either correctly determined the |
974 | frame's base (which is the SP from the previous frame), or set | |
975 | that base to "NULL". */ | |
976 | base = info->prev_sp; | |
977 | if (base == 0) | |
978 | return; | |
979 | ||
980 | id = frame_id_build (base, func); | |
981 | ||
982 | /* Check that we're not going round in circles with the same frame | |
983 | ID (but avoid applying the test to sentinel frames which do go | |
984 | round in circles). Can't use frame_id_eq() as that doesn't yet | |
985 | compare the frame's PC value. */ | |
986 | if (frame_relative_level (next_frame) >= 0 | |
987 | && get_frame_type (next_frame) != DUMMY_FRAME | |
988 | && frame_id_eq (get_frame_id (next_frame), id)) | |
989 | return; | |
990 | ||
991 | (*this_id) = id; | |
8818c391 TR |
992 | } |
993 | ||
4add8633 TR |
994 | static void |
995 | avr_frame_prev_register (struct frame_info *next_frame, | |
996 | void **this_prologue_cache, | |
997 | int regnum, int *optimizedp, | |
998 | enum lval_type *lvalp, CORE_ADDR *addrp, | |
999 | int *realnump, void *bufferp) | |
8818c391 | 1000 | { |
4add8633 TR |
1001 | struct avr_unwind_cache *info |
1002 | = avr_frame_unwind_cache (next_frame, this_prologue_cache); | |
8818c391 | 1003 | |
3b85b0f1 TR |
1004 | if (regnum == AVR_PC_REGNUM) |
1005 | { | |
1006 | if (trad_frame_addr_p (info->saved_regs, regnum)) | |
1007 | { | |
1008 | *optimizedp = 0; | |
1009 | *lvalp = lval_memory; | |
1010 | *addrp = info->saved_regs[regnum].addr; | |
1011 | *realnump = -1; | |
1012 | if (bufferp != NULL) | |
1013 | { | |
1014 | /* Reading the return PC from the PC register is slightly | |
1015 | abnormal. register_size(AVR_PC_REGNUM) says it is 4 bytes, | |
1016 | but in reality, only two bytes (3 in upcoming mega256) are | |
1017 | stored on the stack. | |
1018 | ||
1019 | Also, note that the value on the stack is an addr to a word | |
1020 | not a byte, so we will need to multiply it by two at some | |
1021 | point. | |
1022 | ||
1023 | And to confuse matters even more, the return address stored | |
1024 | on the stack is in big endian byte order, even though most | |
1025 | everything else about the avr is little endian. Ick! */ | |
1026 | ||
1027 | /* FIXME: number of bytes read here will need updated for the | |
1028 | mega256 when it is available. */ | |
1029 | ||
1030 | ULONGEST pc; | |
1031 | unsigned char tmp; | |
1032 | unsigned char buf[2]; | |
1033 | ||
1034 | read_memory (info->saved_regs[regnum].addr, buf, 2); | |
1035 | ||
1036 | /* Convert the PC read from memory as a big-endian to | |
1037 | little-endian order. */ | |
1038 | tmp = buf[0]; | |
1039 | buf[0] = buf[1]; | |
1040 | buf[1] = tmp; | |
1041 | ||
1042 | pc = (extract_unsigned_integer (buf, 2) * 2); | |
1043 | store_unsigned_integer (bufferp, | |
1044 | register_size (current_gdbarch, regnum), | |
1045 | pc); | |
1046 | } | |
1047 | } | |
1048 | } | |
1049 | else | |
1050 | trad_frame_prev_register (next_frame, info->saved_regs, regnum, | |
1051 | optimizedp, lvalp, addrp, realnump, bufferp); | |
4add8633 | 1052 | } |
8818c391 | 1053 | |
4add8633 TR |
1054 | static const struct frame_unwind avr_frame_unwind = { |
1055 | NORMAL_FRAME, | |
1056 | avr_frame_this_id, | |
1057 | avr_frame_prev_register | |
1058 | }; | |
1059 | ||
1060 | const struct frame_unwind * | |
336d1bba | 1061 | avr_frame_sniffer (struct frame_info *next_frame) |
4add8633 TR |
1062 | { |
1063 | return &avr_frame_unwind; | |
8818c391 TR |
1064 | } |
1065 | ||
1066 | static CORE_ADDR | |
4add8633 | 1067 | avr_frame_base_address (struct frame_info *next_frame, void **this_cache) |
8818c391 | 1068 | { |
4add8633 TR |
1069 | struct avr_unwind_cache *info |
1070 | = avr_frame_unwind_cache (next_frame, this_cache); | |
8818c391 | 1071 | |
4add8633 TR |
1072 | return info->base; |
1073 | } | |
8818c391 | 1074 | |
4add8633 TR |
1075 | static const struct frame_base avr_frame_base = { |
1076 | &avr_frame_unwind, | |
1077 | avr_frame_base_address, | |
1078 | avr_frame_base_address, | |
1079 | avr_frame_base_address | |
1080 | }; | |
ced15480 | 1081 | |
4add8633 TR |
1082 | /* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that |
1083 | dummy frame. The frame ID's base needs to match the TOS value | |
1084 | saved by save_dummy_frame_tos(), and the PC match the dummy frame's | |
1085 | breakpoint. */ | |
8818c391 | 1086 | |
4add8633 TR |
1087 | static struct frame_id |
1088 | avr_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
1089 | { | |
1090 | ULONGEST base; | |
8818c391 | 1091 | |
4add8633 TR |
1092 | frame_unwind_unsigned_register (next_frame, AVR_SP_REGNUM, &base); |
1093 | return frame_id_build (avr_make_saddr (base), frame_pc_unwind (next_frame)); | |
8818c391 TR |
1094 | } |
1095 | ||
4add8633 TR |
1096 | /* When arguments must be pushed onto the stack, they go on in reverse |
1097 | order. The below implements a FILO (stack) to do this. */ | |
8818c391 | 1098 | |
4add8633 TR |
1099 | struct stack_item |
1100 | { | |
1101 | int len; | |
1102 | struct stack_item *prev; | |
1103 | void *data; | |
1104 | }; | |
8818c391 | 1105 | |
4add8633 TR |
1106 | static struct stack_item *push_stack_item (struct stack_item *prev, |
1107 | void *contents, int len); | |
1108 | static struct stack_item * | |
1109 | push_stack_item (struct stack_item *prev, void *contents, int len) | |
8818c391 | 1110 | { |
4add8633 TR |
1111 | struct stack_item *si; |
1112 | si = xmalloc (sizeof (struct stack_item)); | |
1113 | si->data = xmalloc (len); | |
1114 | si->len = len; | |
1115 | si->prev = prev; | |
1116 | memcpy (si->data, contents, len); | |
1117 | return si; | |
8818c391 TR |
1118 | } |
1119 | ||
4add8633 TR |
1120 | static struct stack_item *pop_stack_item (struct stack_item *si); |
1121 | static struct stack_item * | |
1122 | pop_stack_item (struct stack_item *si) | |
8818c391 | 1123 | { |
4add8633 TR |
1124 | struct stack_item *dead = si; |
1125 | si = si->prev; | |
1126 | xfree (dead->data); | |
1127 | xfree (dead); | |
1128 | return si; | |
8818c391 TR |
1129 | } |
1130 | ||
8818c391 TR |
1131 | /* Setup the function arguments for calling a function in the inferior. |
1132 | ||
1133 | On the AVR architecture, there are 18 registers (R25 to R8) which are | |
1134 | dedicated for passing function arguments. Up to the first 18 arguments | |
1135 | (depending on size) may go into these registers. The rest go on the stack. | |
1136 | ||
4add8633 TR |
1137 | All arguments are aligned to start in even-numbered registers (odd-sized |
1138 | arguments, including char, have one free register above them). For example, | |
1139 | an int in arg1 and a char in arg2 would be passed as such: | |
1140 | ||
1141 | arg1 -> r25:r24 | |
1142 | arg2 -> r22 | |
1143 | ||
1144 | Arguments that are larger than 2 bytes will be split between two or more | |
1145 | registers as available, but will NOT be split between a register and the | |
1146 | stack. Arguments that go onto the stack are pushed last arg first (this is | |
1147 | similar to the d10v). */ | |
1148 | ||
1149 | /* NOTE: TRoth/2003-06-17: The rest of this comment is old looks to be | |
1150 | inaccurate. | |
8818c391 TR |
1151 | |
1152 | An exceptional case exists for struct arguments (and possibly other | |
1153 | aggregates such as arrays) -- if the size is larger than WORDSIZE bytes but | |
1154 | not a multiple of WORDSIZE bytes. In this case the argument is never split | |
1155 | between the registers and the stack, but instead is copied in its entirety | |
1156 | onto the stack, AND also copied into as many registers as there is room | |
1157 | for. In other words, space in registers permitting, two copies of the same | |
1158 | argument are passed in. As far as I can tell, only the one on the stack is | |
1159 | used, although that may be a function of the level of compiler | |
1160 | optimization. I suspect this is a compiler bug. Arguments of these odd | |
1161 | sizes are left-justified within the word (as opposed to arguments smaller | |
1162 | than WORDSIZE bytes, which are right-justified). | |
1163 | ||
1164 | If the function is to return an aggregate type such as a struct, the caller | |
1165 | must allocate space into which the callee will copy the return value. In | |
1166 | this case, a pointer to the return value location is passed into the callee | |
1167 | in register R0, which displaces one of the other arguments passed in via | |
1168 | registers R0 to R2. */ | |
1169 | ||
1170 | static CORE_ADDR | |
4add8633 TR |
1171 | avr_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr, |
1172 | struct regcache *regcache, CORE_ADDR bp_addr, | |
1173 | int nargs, struct value **args, CORE_ADDR sp, | |
1174 | int struct_return, CORE_ADDR struct_addr) | |
8818c391 | 1175 | { |
4add8633 TR |
1176 | int i; |
1177 | unsigned char buf[2]; | |
1178 | CORE_ADDR return_pc = avr_convert_iaddr_to_raw (bp_addr); | |
1179 | int regnum = AVR_ARGN_REGNUM; | |
1180 | struct stack_item *si = NULL; | |
8818c391 | 1181 | |
8818c391 | 1182 | #if 0 |
4add8633 TR |
1183 | /* FIXME: TRoth/2003-06-18: Not sure what to do when returning a struct. */ |
1184 | if (struct_return) | |
8818c391 | 1185 | { |
4add8633 TR |
1186 | fprintf_unfiltered (gdb_stderr, "struct_return: 0x%lx\n", struct_addr); |
1187 | write_register (argreg--, struct_addr & 0xff); | |
1188 | write_register (argreg--, (struct_addr >>8) & 0xff); | |
8818c391 | 1189 | } |
4add8633 | 1190 | #endif |
8818c391 | 1191 | |
4add8633 | 1192 | for (i = 0; i < nargs; i++) |
8818c391 | 1193 | { |
4add8633 TR |
1194 | int last_regnum; |
1195 | int j; | |
1196 | struct value *arg = args[i]; | |
1197 | struct type *type = check_typedef (VALUE_TYPE (arg)); | |
1198 | char *contents = VALUE_CONTENTS (arg); | |
1199 | int len = TYPE_LENGTH (type); | |
1200 | ||
1201 | /* Calculate the potential last register needed. */ | |
1202 | last_regnum = regnum - (len + (len & 1)); | |
1203 | ||
1204 | /* If there are registers available, use them. Once we start putting | |
1205 | stuff on the stack, all subsequent args go on stack. */ | |
1206 | if ((si == NULL) && (last_regnum >= 8)) | |
1207 | { | |
1208 | ULONGEST val; | |
1209 | ||
1210 | /* Skip a register for odd length args. */ | |
1211 | if (len & 1) | |
1212 | regnum--; | |
1213 | ||
1214 | val = extract_unsigned_integer (contents, len); | |
1215 | for (j=0; j<len; j++) | |
1216 | { | |
1217 | regcache_cooked_write_unsigned (regcache, regnum--, | |
1218 | val >> (8*(len-j-1))); | |
1219 | } | |
1220 | } | |
1221 | /* No registers available, push the args onto the stack. */ | |
1222 | else | |
1223 | { | |
1224 | /* From here on, we don't care about regnum. */ | |
1225 | si = push_stack_item (si, contents, len); | |
1226 | } | |
8818c391 | 1227 | } |
909cd28e | 1228 | |
4add8633 TR |
1229 | /* Push args onto the stack. */ |
1230 | while (si) | |
1231 | { | |
1232 | sp -= si->len; | |
1233 | /* Add 1 to sp here to account for post decr nature of pushes. */ | |
1234 | write_memory (sp+1, si->data, si->len); | |
1235 | si = pop_stack_item (si); | |
1236 | } | |
3605c34a | 1237 | |
4add8633 TR |
1238 | /* Set the return address. For the avr, the return address is the BP_ADDR. |
1239 | Need to push the return address onto the stack noting that it needs to be | |
1240 | in big-endian order on the stack. */ | |
1241 | buf[0] = (return_pc >> 8) & 0xff; | |
1242 | buf[1] = return_pc & 0xff; | |
3605c34a | 1243 | |
4add8633 TR |
1244 | sp -= 2; |
1245 | write_memory (sp+1, buf, 2); /* Add one since pushes are post decr ops. */ | |
3605c34a | 1246 | |
4add8633 TR |
1247 | /* Finally, update the SP register. */ |
1248 | regcache_cooked_write_unsigned (regcache, AVR_SP_REGNUM, | |
1249 | avr_convert_saddr_to_raw (sp)); | |
3605c34a | 1250 | |
4add8633 | 1251 | return sp; |
3605c34a TR |
1252 | } |
1253 | ||
8818c391 TR |
1254 | /* Initialize the gdbarch structure for the AVR's. */ |
1255 | ||
1256 | static struct gdbarch * | |
2e5ff58c TR |
1257 | avr_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) |
1258 | { | |
2e5ff58c TR |
1259 | struct gdbarch *gdbarch; |
1260 | struct gdbarch_tdep *tdep; | |
8818c391 TR |
1261 | |
1262 | /* Find a candidate among the list of pre-declared architectures. */ | |
1263 | arches = gdbarch_list_lookup_by_info (arches, &info); | |
1264 | if (arches != NULL) | |
1265 | return arches->gdbarch; | |
1266 | ||
1267 | /* None found, create a new architecture from the information provided. */ | |
1268 | tdep = XMALLOC (struct gdbarch_tdep); | |
1269 | gdbarch = gdbarch_alloc (&info, tdep); | |
1270 | ||
1271 | /* If we ever need to differentiate the device types, do it here. */ | |
1272 | switch (info.bfd_arch_info->mach) | |
1273 | { | |
1274 | case bfd_mach_avr1: | |
1275 | case bfd_mach_avr2: | |
1276 | case bfd_mach_avr3: | |
1277 | case bfd_mach_avr4: | |
1278 | case bfd_mach_avr5: | |
1279 | break; | |
1280 | } | |
1281 | ||
1282 | set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT); | |
1283 | set_gdbarch_int_bit (gdbarch, 2 * TARGET_CHAR_BIT); | |
1284 | set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
1285 | set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT); | |
1286 | set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT); | |
1287 | set_gdbarch_addr_bit (gdbarch, 32); | |
8818c391 TR |
1288 | |
1289 | set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
1290 | set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
1291 | set_gdbarch_long_double_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
1292 | ||
1293 | set_gdbarch_float_format (gdbarch, &floatformat_ieee_single_little); | |
1294 | set_gdbarch_double_format (gdbarch, &floatformat_ieee_single_little); | |
1295 | set_gdbarch_long_double_format (gdbarch, &floatformat_ieee_single_little); | |
1296 | ||
1297 | set_gdbarch_read_pc (gdbarch, avr_read_pc); | |
1298 | set_gdbarch_write_pc (gdbarch, avr_write_pc); | |
8818c391 | 1299 | set_gdbarch_read_sp (gdbarch, avr_read_sp); |
8818c391 TR |
1300 | |
1301 | set_gdbarch_num_regs (gdbarch, AVR_NUM_REGS); | |
1302 | ||
1303 | set_gdbarch_sp_regnum (gdbarch, AVR_SP_REGNUM); | |
8818c391 TR |
1304 | set_gdbarch_pc_regnum (gdbarch, AVR_PC_REGNUM); |
1305 | ||
1306 | set_gdbarch_register_name (gdbarch, avr_register_name); | |
866b76ea | 1307 | set_gdbarch_register_type (gdbarch, avr_register_type); |
8818c391 | 1308 | |
3605c34a | 1309 | set_gdbarch_extract_return_value (gdbarch, avr_extract_return_value); |
8818c391 TR |
1310 | set_gdbarch_print_insn (gdbarch, print_insn_avr); |
1311 | ||
4add8633 | 1312 | set_gdbarch_push_dummy_call (gdbarch, avr_push_dummy_call); |
8818c391 TR |
1313 | |
1314 | set_gdbarch_address_to_pointer (gdbarch, avr_address_to_pointer); | |
1315 | set_gdbarch_pointer_to_address (gdbarch, avr_pointer_to_address); | |
8818c391 | 1316 | |
8818c391 | 1317 | set_gdbarch_use_struct_convention (gdbarch, generic_use_struct_convention); |
8818c391 | 1318 | |
8818c391 | 1319 | set_gdbarch_skip_prologue (gdbarch, avr_skip_prologue); |
8818c391 TR |
1320 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); |
1321 | ||
1322 | set_gdbarch_decr_pc_after_break (gdbarch, 0); | |
909cd28e | 1323 | set_gdbarch_breakpoint_from_pc (gdbarch, avr_breakpoint_from_pc); |
8818c391 TR |
1324 | |
1325 | set_gdbarch_function_start_offset (gdbarch, 0); | |
98be1e77 | 1326 | |
8818c391 | 1327 | set_gdbarch_frame_args_skip (gdbarch, 0); |
4add8633 TR |
1328 | set_gdbarch_frameless_function_invocation (gdbarch, |
1329 | frameless_look_for_prologue); | |
4add8633 | 1330 | |
336d1bba | 1331 | frame_unwind_append_sniffer (gdbarch, avr_frame_sniffer); |
4add8633 TR |
1332 | frame_base_set_default (gdbarch, &avr_frame_base); |
1333 | ||
1334 | set_gdbarch_unwind_dummy_id (gdbarch, avr_unwind_dummy_id); | |
1335 | ||
1336 | set_gdbarch_unwind_pc (gdbarch, avr_unwind_pc); | |
8818c391 | 1337 | |
8818c391 TR |
1338 | return gdbarch; |
1339 | } | |
1340 | ||
1341 | /* Send a query request to the avr remote target asking for values of the io | |
1342 | registers. If args parameter is not NULL, then the user has requested info | |
1343 | on a specific io register [This still needs implemented and is ignored for | |
1344 | now]. The query string should be one of these forms: | |
1345 | ||
1346 | "Ravr.io_reg" -> reply is "NN" number of io registers | |
1347 | ||
1348 | "Ravr.io_reg:addr,len" where addr is first register and len is number of | |
1349 | registers to be read. The reply should be "<NAME>,VV;" for each io register | |
1350 | where, <NAME> is a string, and VV is the hex value of the register. | |
1351 | ||
1352 | All io registers are 8-bit. */ | |
1353 | ||
1354 | static void | |
1355 | avr_io_reg_read_command (char *args, int from_tty) | |
1356 | { | |
1e3ff5ad | 1357 | LONGEST bufsiz = 0; |
2e5ff58c TR |
1358 | char buf[400]; |
1359 | char query[400]; | |
1360 | char *p; | |
1361 | unsigned int nreg = 0; | |
1362 | unsigned int val; | |
1363 | int i, j, k, step; | |
8818c391 | 1364 | |
1e3ff5ad AC |
1365 | /* Just get the maximum buffer size. */ |
1366 | bufsiz = target_read_partial (¤t_target, TARGET_OBJECT_AVR, | |
1367 | NULL, NULL, 0, 0); | |
1368 | if (bufsiz < 0) | |
8818c391 | 1369 | { |
2e5ff58c | 1370 | fprintf_unfiltered (gdb_stderr, |
98be1e77 TR |
1371 | "ERR: info io_registers NOT supported by current " |
1372 | "target\n"); | |
8818c391 TR |
1373 | return; |
1374 | } | |
2e5ff58c TR |
1375 | if (bufsiz > sizeof (buf)) |
1376 | bufsiz = sizeof (buf); | |
8818c391 TR |
1377 | |
1378 | /* Find out how many io registers the target has. */ | |
1379 | strcpy (query, "avr.io_reg"); | |
1e3ff5ad AC |
1380 | target_read_partial (¤t_target, TARGET_OBJECT_AVR, query, buf, 0, |
1381 | bufsiz); | |
8818c391 TR |
1382 | |
1383 | if (strncmp (buf, "", bufsiz) == 0) | |
1384 | { | |
2e5ff58c TR |
1385 | fprintf_unfiltered (gdb_stderr, |
1386 | "info io_registers NOT supported by target\n"); | |
8818c391 TR |
1387 | return; |
1388 | } | |
1389 | ||
2e5ff58c | 1390 | if (sscanf (buf, "%x", &nreg) != 1) |
8818c391 | 1391 | { |
2e5ff58c TR |
1392 | fprintf_unfiltered (gdb_stderr, |
1393 | "Error fetching number of io registers\n"); | |
8818c391 TR |
1394 | return; |
1395 | } | |
1396 | ||
2e5ff58c | 1397 | reinitialize_more_filter (); |
8818c391 TR |
1398 | |
1399 | printf_unfiltered ("Target has %u io registers:\n\n", nreg); | |
1400 | ||
1401 | /* only fetch up to 8 registers at a time to keep the buffer small */ | |
1402 | step = 8; | |
1403 | ||
2e5ff58c | 1404 | for (i = 0; i < nreg; i += step) |
8818c391 | 1405 | { |
91ccbfc1 TR |
1406 | /* how many registers this round? */ |
1407 | j = step; | |
1408 | if ((i+j) >= nreg) | |
1409 | j = nreg - i; /* last block is less than 8 registers */ | |
8818c391 | 1410 | |
2e5ff58c | 1411 | snprintf (query, sizeof (query) - 1, "avr.io_reg:%x,%x", i, j); |
1e3ff5ad AC |
1412 | target_read_partial (¤t_target, TARGET_OBJECT_AVR, query, buf, |
1413 | 0, bufsiz); | |
8818c391 TR |
1414 | |
1415 | p = buf; | |
2e5ff58c TR |
1416 | for (k = i; k < (i + j); k++) |
1417 | { | |
1418 | if (sscanf (p, "%[^,],%x;", query, &val) == 2) | |
1419 | { | |
1420 | printf_filtered ("[%02x] %-15s : %02x\n", k, query, val); | |
1421 | while ((*p != ';') && (*p != '\0')) | |
1422 | p++; | |
1423 | p++; /* skip over ';' */ | |
1424 | if (*p == '\0') | |
1425 | break; | |
1426 | } | |
1427 | } | |
8818c391 TR |
1428 | } |
1429 | } | |
1430 | ||
a78f21af AC |
1431 | extern initialize_file_ftype _initialize_avr_tdep; /* -Wmissing-prototypes */ |
1432 | ||
8818c391 TR |
1433 | void |
1434 | _initialize_avr_tdep (void) | |
1435 | { | |
1436 | register_gdbarch_init (bfd_arch_avr, avr_gdbarch_init); | |
1437 | ||
1438 | /* Add a new command to allow the user to query the avr remote target for | |
1439 | the values of the io space registers in a saner way than just using | |
1440 | `x/NNNb ADDR`. */ | |
1441 | ||
1442 | /* FIXME: TRoth/2002-02-18: This should probably be changed to 'info avr | |
1443 | io_registers' to signify it is not available on other platforms. */ | |
1444 | ||
1445 | add_cmd ("io_registers", class_info, avr_io_reg_read_command, | |
2e5ff58c | 1446 | "query remote avr target for io space register values", &infolist); |
8818c391 | 1447 | } |