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1 | /* Definitions to target GDB to GNU/Linux on an ia64 architecture. |
2 | Copyright 1992, 1993 Free Software Foundation, Inc. | |
3 | ||
4 | This file is part of GDB. | |
5 | ||
6 | This program is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2 of the License, or | |
9 | (at your option) any later version. | |
10 | ||
11 | This program is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with this program; if not, write to the Free Software | |
18 | Foundation, Inc., 59 Temple Place - Suite 330, | |
19 | Boston, MA 02111-1307, USA. */ | |
20 | ||
21 | #ifndef TM_IA64_H | |
22 | #define TM_IA64_H | |
23 | ||
24 | #if !defined(GDBSERVER) | |
25 | ||
26 | #define GDB_MULTI_ARCH 1 | |
27 | ||
28 | #else /* defines needed for GDBSERVER */ | |
29 | ||
30 | /* ia64 is little endian by default */ | |
31 | ||
32 | #define TARGET_BYTE_ORDER LITTLE_ENDIAN | |
33 | ||
34 | /* Say how long (ordinary) registers are. This is a piece of bogosity | |
35 | used in push_word and a few other places; REGISTER_RAW_SIZE is the | |
36 | real way to know how big a register is. */ | |
37 | ||
38 | #define REGISTER_SIZE 8 | |
39 | ||
40 | #undef NUM_REGS | |
41 | #define NUM_REGS 590 | |
42 | ||
43 | /* Some pseudo register numbers */ | |
44 | ||
45 | #define PC_REGNUM IA64_IP_REGNUM | |
46 | #define SP_REGNUM IA64_GR12_REGNUM | |
47 | #define FP_REGNUM IA64_VFP_REGNUM | |
48 | ||
49 | /* Total amount of space needed to store our copies of the machine's | |
50 | register state, the array `registers'. On the ia64, all registers | |
51 | fit in 64 bits except for the floating point registers which require | |
52 | 84 bits. But 84 isn't a nice number, so we'll just allocate 128 | |
53 | bits for each of these. The expression below says that we | |
54 | need 8 bytes for each register, plus an additional 8 bytes for each | |
55 | of the 128 floating point registers. */ | |
56 | ||
57 | #define REGISTER_BYTES (NUM_REGS*8+128*8) | |
58 | ||
59 | /* Index within `registers' of the first byte of the space for | |
60 | register N. */ | |
61 | ||
62 | #define REGISTER_BYTE(N) (((N) * 8) \ | |
63 | + ((N) <= IA64_FR0_REGNUM ? 0 : 8 * (((N) > IA64_FR127_REGNUM) ? 128 : (N) - IA64_FR0_REGNUM))) | |
64 | ||
65 | /* Number of bytes of storage in the actual machine representation | |
66 | for register N. */ | |
67 | ||
68 | #define REGISTER_RAW_SIZE(N) \ | |
69 | ((IA64_FR0_REGNUM <= (N) && (N) <= IA64_FR127_REGNUM) ? 16 : 8) | |
70 | ||
71 | /* Largest value REGISTER_RAW_SIZE can have. */ | |
72 | ||
73 | #define MAX_REGISTER_RAW_SIZE 16 | |
74 | ||
75 | ||
76 | #define GDBSERVER_RESUME_REGS { IA64_IP_REGNUM, IA64_PSR_REGNUM, SP_REGNUM, IA64_BSP_REGNUM, IA64_CFM_REGNUM } | |
77 | ||
78 | #endif /* GDBSERVER */ | |
79 | ||
80 | ||
81 | /* Register numbers of various important registers */ | |
82 | ||
83 | /* General registers; there are 128 of these 64 bit wide registers. The | |
84 | first 32 are static and the last 96 are stacked. */ | |
85 | #define IA64_GR0_REGNUM 0 | |
86 | #define IA64_GR1_REGNUM (IA64_GR0_REGNUM+1) | |
87 | #define IA64_GR2_REGNUM (IA64_GR0_REGNUM+2) | |
88 | #define IA64_GR3_REGNUM (IA64_GR0_REGNUM+3) | |
89 | #define IA64_GR4_REGNUM (IA64_GR0_REGNUM+4) | |
90 | #define IA64_GR5_REGNUM (IA64_GR0_REGNUM+5) | |
91 | #define IA64_GR6_REGNUM (IA64_GR0_REGNUM+6) | |
92 | #define IA64_GR7_REGNUM (IA64_GR0_REGNUM+7) | |
93 | #define IA64_GR8_REGNUM (IA64_GR0_REGNUM+8) | |
94 | #define IA64_GR9_REGNUM (IA64_GR0_REGNUM+9) | |
95 | #define IA64_GR10_REGNUM (IA64_GR0_REGNUM+10) | |
96 | #define IA64_GR11_REGNUM (IA64_GR0_REGNUM+11) | |
97 | #define IA64_GR12_REGNUM (IA64_GR0_REGNUM+12) | |
98 | #define IA64_GR31_REGNUM (IA64_GR0_REGNUM+31) | |
99 | #define IA64_GR32_REGNUM (IA64_GR0_REGNUM+32) | |
100 | #define IA64_GR127_REGNUM (IA64_GR0_REGNUM+127) | |
101 | ||
102 | /* Floating point registers; 128 82-bit wide registers */ | |
103 | #define IA64_FR0_REGNUM 128 | |
104 | #define IA64_FR1_REGNUM (IA64_FR0_REGNUM+1) | |
105 | #define IA64_FR2_REGNUM (IA64_FR0_REGNUM+2) | |
106 | #define IA64_FR8_REGNUM (IA64_FR0_REGNUM+8) | |
107 | #define IA64_FR9_REGNUM (IA64_FR0_REGNUM+9) | |
108 | #define IA64_FR10_REGNUM (IA64_FR0_REGNUM+10) | |
109 | #define IA64_FR11_REGNUM (IA64_FR0_REGNUM+11) | |
110 | #define IA64_FR12_REGNUM (IA64_FR0_REGNUM+12) | |
111 | #define IA64_FR13_REGNUM (IA64_FR0_REGNUM+13) | |
112 | #define IA64_FR14_REGNUM (IA64_FR0_REGNUM+14) | |
113 | #define IA64_FR15_REGNUM (IA64_FR0_REGNUM+15) | |
114 | #define IA64_FR16_REGNUM (IA64_FR0_REGNUM+16) | |
115 | #define IA64_FR31_REGNUM (IA64_FR0_REGNUM+31) | |
116 | #define IA64_FR32_REGNUM (IA64_FR0_REGNUM+32) | |
117 | #define IA64_FR127_REGNUM (IA64_FR0_REGNUM+127) | |
118 | ||
119 | /* Predicate registers; There are 64 of these one bit registers. | |
120 | It'd be more convenient (implementation-wise) to use a single | |
121 | 64 bit word with all of these register in them. Note that there's | |
122 | also a IA64_PR_REGNUM below which contains all the bits and is used for | |
123 | communicating the actual values to the target. */ | |
124 | ||
125 | #define IA64_PR0_REGNUM 256 | |
126 | #define IA64_PR1_REGNUM (IA64_PR0_REGNUM+1) | |
127 | #define IA64_PR2_REGNUM (IA64_PR0_REGNUM+2) | |
128 | #define IA64_PR3_REGNUM (IA64_PR0_REGNUM+3) | |
129 | #define IA64_PR4_REGNUM (IA64_PR0_REGNUM+4) | |
130 | #define IA64_PR5_REGNUM (IA64_PR0_REGNUM+5) | |
131 | #define IA64_PR6_REGNUM (IA64_PR0_REGNUM+6) | |
132 | #define IA64_PR7_REGNUM (IA64_PR0_REGNUM+7) | |
133 | #define IA64_PR8_REGNUM (IA64_PR0_REGNUM+8) | |
134 | #define IA64_PR9_REGNUM (IA64_PR0_REGNUM+9) | |
135 | #define IA64_PR10_REGNUM (IA64_PR0_REGNUM+10) | |
136 | #define IA64_PR11_REGNUM (IA64_PR0_REGNUM+11) | |
137 | #define IA64_PR12_REGNUM (IA64_PR0_REGNUM+12) | |
138 | #define IA64_PR13_REGNUM (IA64_PR0_REGNUM+13) | |
139 | #define IA64_PR14_REGNUM (IA64_PR0_REGNUM+14) | |
140 | #define IA64_PR15_REGNUM (IA64_PR0_REGNUM+15) | |
141 | #define IA64_PR16_REGNUM (IA64_PR0_REGNUM+16) | |
142 | #define IA64_PR17_REGNUM (IA64_PR0_REGNUM+17) | |
143 | #define IA64_PR18_REGNUM (IA64_PR0_REGNUM+18) | |
144 | #define IA64_PR19_REGNUM (IA64_PR0_REGNUM+19) | |
145 | #define IA64_PR20_REGNUM (IA64_PR0_REGNUM+20) | |
146 | #define IA64_PR21_REGNUM (IA64_PR0_REGNUM+21) | |
147 | #define IA64_PR22_REGNUM (IA64_PR0_REGNUM+22) | |
148 | #define IA64_PR23_REGNUM (IA64_PR0_REGNUM+23) | |
149 | #define IA64_PR24_REGNUM (IA64_PR0_REGNUM+24) | |
150 | #define IA64_PR25_REGNUM (IA64_PR0_REGNUM+25) | |
151 | #define IA64_PR26_REGNUM (IA64_PR0_REGNUM+26) | |
152 | #define IA64_PR27_REGNUM (IA64_PR0_REGNUM+27) | |
153 | #define IA64_PR28_REGNUM (IA64_PR0_REGNUM+28) | |
154 | #define IA64_PR29_REGNUM (IA64_PR0_REGNUM+29) | |
155 | #define IA64_PR30_REGNUM (IA64_PR0_REGNUM+30) | |
156 | #define IA64_PR31_REGNUM (IA64_PR0_REGNUM+31) | |
157 | #define IA64_PR32_REGNUM (IA64_PR0_REGNUM+32) | |
158 | #define IA64_PR33_REGNUM (IA64_PR0_REGNUM+33) | |
159 | #define IA64_PR34_REGNUM (IA64_PR0_REGNUM+34) | |
160 | #define IA64_PR35_REGNUM (IA64_PR0_REGNUM+35) | |
161 | #define IA64_PR36_REGNUM (IA64_PR0_REGNUM+36) | |
162 | #define IA64_PR37_REGNUM (IA64_PR0_REGNUM+37) | |
163 | #define IA64_PR38_REGNUM (IA64_PR0_REGNUM+38) | |
164 | #define IA64_PR39_REGNUM (IA64_PR0_REGNUM+39) | |
165 | #define IA64_PR40_REGNUM (IA64_PR0_REGNUM+40) | |
166 | #define IA64_PR41_REGNUM (IA64_PR0_REGNUM+41) | |
167 | #define IA64_PR42_REGNUM (IA64_PR0_REGNUM+42) | |
168 | #define IA64_PR43_REGNUM (IA64_PR0_REGNUM+43) | |
169 | #define IA64_PR44_REGNUM (IA64_PR0_REGNUM+44) | |
170 | #define IA64_PR45_REGNUM (IA64_PR0_REGNUM+45) | |
171 | #define IA64_PR46_REGNUM (IA64_PR0_REGNUM+46) | |
172 | #define IA64_PR47_REGNUM (IA64_PR0_REGNUM+47) | |
173 | #define IA64_PR48_REGNUM (IA64_PR0_REGNUM+48) | |
174 | #define IA64_PR49_REGNUM (IA64_PR0_REGNUM+49) | |
175 | #define IA64_PR50_REGNUM (IA64_PR0_REGNUM+50) | |
176 | #define IA64_PR51_REGNUM (IA64_PR0_REGNUM+51) | |
177 | #define IA64_PR52_REGNUM (IA64_PR0_REGNUM+52) | |
178 | #define IA64_PR53_REGNUM (IA64_PR0_REGNUM+53) | |
179 | #define IA64_PR54_REGNUM (IA64_PR0_REGNUM+54) | |
180 | #define IA64_PR55_REGNUM (IA64_PR0_REGNUM+55) | |
181 | #define IA64_PR56_REGNUM (IA64_PR0_REGNUM+56) | |
182 | #define IA64_PR57_REGNUM (IA64_PR0_REGNUM+57) | |
183 | #define IA64_PR58_REGNUM (IA64_PR0_REGNUM+58) | |
184 | #define IA64_PR59_REGNUM (IA64_PR0_REGNUM+59) | |
185 | #define IA64_PR60_REGNUM (IA64_PR0_REGNUM+60) | |
186 | #define IA64_PR61_REGNUM (IA64_PR0_REGNUM+61) | |
187 | #define IA64_PR62_REGNUM (IA64_PR0_REGNUM+62) | |
188 | #define IA64_PR63_REGNUM (IA64_PR0_REGNUM+63) | |
189 | ||
190 | ||
191 | /* Branch registers: 8 64-bit registers for holding branch targets */ | |
192 | #define IA64_BR0_REGNUM 320 | |
193 | #define IA64_BR1_REGNUM (IA64_BR0_REGNUM+1) | |
194 | #define IA64_BR2_REGNUM (IA64_BR0_REGNUM+2) | |
195 | #define IA64_BR3_REGNUM (IA64_BR0_REGNUM+3) | |
196 | #define IA64_BR4_REGNUM (IA64_BR0_REGNUM+4) | |
197 | #define IA64_BR5_REGNUM (IA64_BR0_REGNUM+5) | |
198 | #define IA64_BR6_REGNUM (IA64_BR0_REGNUM+6) | |
199 | #define IA64_BR7_REGNUM (IA64_BR0_REGNUM+7) | |
200 | ||
201 | /* Virtual frame pointer; this matches IA64_FRAME_POINTER_REGNUM in | |
202 | gcc/config/ia64/ia64.h. */ | |
203 | #define IA64_VFP_REGNUM 328 | |
204 | ||
205 | /* Virtual return address pointer; this matches IA64_RETURN_ADDRESS_POINTER_REGNUM | |
206 | in gcc/config/ia64/ia64.h. */ | |
207 | #define IA64_VRAP_REGNUM 329 | |
208 | ||
209 | /* Predicate registers: There are 64 of these 1-bit registers. We | |
210 | define a single register which is used to communicate these values | |
211 | to/from the target. We will somehow contrive to make it appear that | |
212 | IA64_PR0_REGNUM thru IA64_PR63_REGNUM hold the actual values. */ | |
213 | #define IA64_PR_REGNUM 330 | |
214 | ||
215 | /* Instruction pointer: 64 bits wide */ | |
216 | #define IA64_IP_REGNUM 331 | |
217 | ||
218 | /* Process Status Register */ | |
219 | #define IA64_PSR_REGNUM 332 | |
220 | ||
221 | /* Current Frame Marker (Raw form may be the cr.ifs) */ | |
222 | #define IA64_CFM_REGNUM 333 | |
223 | ||
224 | /* Application registers; 128 64-bit wide registers possible, but some | |
225 | of them are reserved */ | |
226 | #define IA64_AR0_REGNUM 334 | |
227 | #define IA64_KR0_REGNUM (IA64_AR0_REGNUM+0) | |
228 | #define IA64_KR7_REGNUM (IA64_KR0_REGNUM+7) | |
229 | ||
230 | #define IA64_RSC_REGNUM (IA64_AR0_REGNUM+16) | |
231 | #define IA64_BSP_REGNUM (IA64_AR0_REGNUM+17) | |
232 | #define IA64_BSPSTORE_REGNUM (IA64_AR0_REGNUM+18) | |
233 | #define IA64_RNAT_REGNUM (IA64_AR0_REGNUM+19) | |
234 | #define IA64_FCR_REGNUM (IA64_AR0_REGNUM+21) | |
235 | #define IA64_EFLAG_REGNUM (IA64_AR0_REGNUM+24) | |
236 | #define IA64_CSD_REGNUM (IA64_AR0_REGNUM+25) | |
237 | #define IA64_SSD_REGNUM (IA64_AR0_REGNUM+26) | |
238 | #define IA64_CFLG_REGNUM (IA64_AR0_REGNUM+27) | |
239 | #define IA64_FSR_REGNUM (IA64_AR0_REGNUM+28) | |
240 | #define IA64_FIR_REGNUM (IA64_AR0_REGNUM+29) | |
241 | #define IA64_FDR_REGNUM (IA64_AR0_REGNUM+30) | |
242 | #define IA64_CCV_REGNUM (IA64_AR0_REGNUM+32) | |
243 | #define IA64_UNAT_REGNUM (IA64_AR0_REGNUM+36) | |
244 | #define IA64_FPSR_REGNUM (IA64_AR0_REGNUM+40) | |
245 | #define IA64_ITC_REGNUM (IA64_AR0_REGNUM+44) | |
246 | #define IA64_PFS_REGNUM (IA64_AR0_REGNUM+64) | |
247 | #define IA64_LC_REGNUM (IA64_AR0_REGNUM+65) | |
248 | #define IA64_EC_REGNUM (IA64_AR0_REGNUM+66) | |
249 | ||
250 | /* NAT (Not A Thing) Bits for the general registers; there are 128 of these */ | |
251 | #define IA64_NAT0_REGNUM 462 | |
252 | #define IA64_NAT31_REGNUM (IA64_NAT0_REGNUM+31) | |
253 | #define IA64_NAT32_REGNUM (IA64_NAT0_REGNUM+32) | |
254 | #define IA64_NAT127_REGNUM (IA64_NAT0_REGNUM+127) | |
255 | ||
256 | #endif /* TM_IA64_H */ |