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5076de82 FF |
1 | /* Definitions to make GDB run on a mips box under 4.3bsd. |
2 | Copyright 1986, 1987, 1989, 1991, 1992, 1993 Free Software Foundation, Inc. | |
3 | Contributed by Per Bothner (bothner@cs.wisc.edu) at U.Wisconsin | |
4 | and by Alessandro Forin (af@cs.cmu.edu) at CMU.. | |
5 | ||
6 | This file is part of GDB. | |
7 | ||
8 | This program is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2 of the License, or | |
11 | (at your option) any later version. | |
12 | ||
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with this program; if not, write to the Free Software | |
20 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ | |
21 | ||
22 | #include "coff/sym.h" /* Needed for PDR below. */ | |
23 | #include "coff/symconst.h" | |
24 | ||
25 | #if !defined (TARGET_BYTE_ORDER) | |
26 | #define TARGET_BYTE_ORDER LITTLE_ENDIAN | |
27 | #endif | |
28 | ||
29 | /* Floating point is IEEE compliant */ | |
30 | #define IEEE_FLOAT | |
31 | ||
32 | /* Some MIPS boards are provided both with and without a floating | |
33 | point coprocessor; we provide a user settable variable to tell gdb | |
34 | whether there is one or not. */ | |
35 | extern int mips_fpu; | |
36 | ||
37 | /* Offset from address of function to start of its code. | |
38 | Zero on most machines. */ | |
39 | ||
40 | #define FUNCTION_START_OFFSET 0 | |
41 | ||
42 | /* Advance PC across any function entry prologue instructions | |
43 | to reach some "real" code. */ | |
44 | ||
45 | #define SKIP_PROLOGUE(pc) pc = mips_skip_prologue(pc) | |
46 | ||
47 | /* Immediately after a function call, return the saved pc. | |
48 | Can't always go through the frames for this because on some machines | |
49 | the new frame is not set up until the new function executes | |
50 | some instructions. */ | |
51 | ||
52 | #define SAVED_PC_AFTER_CALL(frame) read_register(RA_REGNUM) | |
53 | ||
54 | /* Are we currently handling a signal */ | |
55 | ||
56 | #define IN_SIGTRAMP(pc, name) in_sigtramp(pc, name) | |
57 | ||
58 | /* Address of end of stack space. */ | |
59 | ||
60 | #define STACK_END_ADDR (0x7ffff000) | |
61 | ||
62 | /* Stack grows downward. */ | |
63 | ||
64 | #define INNER_THAN < | |
65 | ||
66 | #define BIG_ENDIAN 4321 | |
67 | #if TARGET_BYTE_ORDER == BIG_ENDIAN | |
68 | #define BREAKPOINT {0, 0x5, 0, 0xd} | |
69 | #else | |
70 | #define BREAKPOINT {0xd, 0, 0x5, 0} | |
71 | #endif | |
72 | ||
73 | /* Amount PC must be decremented by after a breakpoint. | |
74 | This is often the number of bytes in BREAKPOINT | |
75 | but not always. */ | |
76 | ||
77 | #define DECR_PC_AFTER_BREAK 0 | |
78 | ||
79 | /* Nonzero if instruction at PC is a return instruction. "j ra" on mips. */ | |
80 | ||
81 | #define ABOUT_TO_RETURN(pc) (read_memory_integer (pc, 4) == 0x3e00008) | |
82 | ||
7c86bda2 | 83 | /* This is taken care of in print_floating [IEEE_FLOAT]. */ |
5076de82 | 84 | |
7c86bda2 | 85 | #define INVALID_FLOAT(p,l) 0 |
5076de82 FF |
86 | |
87 | /* Say how long (all) registers are. */ | |
88 | ||
89 | #define REGISTER_TYPE long | |
90 | ||
91 | /* Number of machine registers */ | |
92 | ||
93 | #define NUM_REGS 80 | |
94 | ||
95 | /* Initializer for an array of names of registers. | |
96 | There should be NUM_REGS strings in this initializer. */ | |
97 | ||
98 | #define REGISTER_NAMES \ | |
99 | { "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3", \ | |
100 | "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", \ | |
101 | "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \ | |
102 | "t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra", \ | |
103 | "sr", "lo", "hi", "bad", "cause","pc", \ | |
104 | "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \ | |
105 | "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \ | |
106 | "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",\ | |
107 | "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",\ | |
108 | "fsr", "fir", "fp", "inx", "rand", "tlblo","ctxt", "tlbhi",\ | |
109 | "epc", "prid"\ | |
110 | } | |
111 | ||
112 | /* Register numbers of various important registers. | |
113 | Note that some of these values are "real" register numbers, | |
114 | and correspond to the general registers of the machine, | |
115 | and some are "phony" register numbers which are too large | |
116 | to be actual register numbers as far as the user is concerned | |
117 | but do serve to get the desired values when passed to read_register. */ | |
118 | ||
119 | #define ZERO_REGNUM 0 /* read-only register, always 0 */ | |
120 | #define A0_REGNUM 4 /* Loc of first arg during a subr call */ | |
121 | #define SP_REGNUM 29 /* Contains address of top of stack */ | |
122 | #define RA_REGNUM 31 /* Contains return address value */ | |
123 | #define PS_REGNUM 32 /* Contains processor status */ | |
124 | #define HI_REGNUM 34 /* Multiple/divide temp */ | |
125 | #define LO_REGNUM 33 /* ... */ | |
126 | #define BADVADDR_REGNUM 35 /* bad vaddr for addressing exception */ | |
127 | #define CAUSE_REGNUM 36 /* describes last exception */ | |
128 | #define PC_REGNUM 37 /* Contains program counter */ | |
129 | #define FP0_REGNUM 38 /* Floating point register 0 (single float) */ | |
130 | #define FCRCS_REGNUM 70 /* FP control/status */ | |
131 | #define FCRIR_REGNUM 71 /* FP implementation/revision */ | |
132 | #define FP_REGNUM 72 /* Pseudo register that contains true address of executing stack frame */ | |
133 | #define FIRST_EMBED_REGNUM 73 /* First supervisor register for embedded use */ | |
134 | #define LAST_EMBED_REGNUM 79 /* Last one */ | |
135 | ||
136 | /* Define DO_REGISTERS_INFO() to do machine-specific formatting | |
137 | of register dumps. */ | |
138 | ||
139 | #define DO_REGISTERS_INFO(_regnum, fp) mips_do_registers_info(_regnum, fp) | |
140 | ||
141 | /* Total amount of space needed to store our copies of the machine's | |
142 | register state, the array `registers'. */ | |
143 | #define REGISTER_BYTES (NUM_REGS*4) | |
144 | ||
145 | /* Index within `registers' of the first byte of the space for | |
146 | register N. */ | |
147 | ||
148 | #define REGISTER_BYTE(N) ((N) * 4) | |
149 | ||
150 | /* Number of bytes of storage in the actual machine representation | |
151 | for register N. On mips, all regs are 4 bytes. */ | |
152 | ||
153 | #define REGISTER_RAW_SIZE(N) 4 | |
154 | ||
155 | /* Number of bytes of storage in the program's representation | |
156 | for register N. On mips, all regs are 4 bytes. */ | |
157 | ||
158 | #define REGISTER_VIRTUAL_SIZE(N) 4 | |
159 | ||
160 | /* Largest value REGISTER_RAW_SIZE can have. */ | |
161 | ||
ac8cf67d | 162 | #define MAX_REGISTER_RAW_SIZE 8 |
5076de82 FF |
163 | |
164 | /* Largest value REGISTER_VIRTUAL_SIZE can have. */ | |
165 | ||
ac8cf67d | 166 | #define MAX_REGISTER_VIRTUAL_SIZE 8 |
5076de82 FF |
167 | |
168 | /* Nonzero if register N requires conversion | |
169 | from raw format to virtual format. */ | |
170 | ||
171 | #define REGISTER_CONVERTIBLE(N) 0 | |
172 | ||
173 | /* Convert data from raw format for register REGNUM | |
174 | to virtual format for register REGNUM. */ | |
175 | ||
176 | #define REGISTER_CONVERT_TO_VIRTUAL(REGNUM,FROM,TO) \ | |
177 | bcopy ((FROM), (TO), 4); | |
178 | ||
179 | /* Convert data from virtual format for register REGNUM | |
180 | to raw format for register REGNUM. */ | |
181 | ||
182 | #define REGISTER_CONVERT_TO_RAW(REGNUM,FROM,TO) \ | |
183 | bcopy ((FROM), (TO), 4); | |
184 | ||
185 | /* Return the GDB type object for the "standard" data type | |
186 | of data in register N. */ | |
187 | ||
188 | #define REGISTER_VIRTUAL_TYPE(N) \ | |
189 | (((N) >= FP0_REGNUM && (N) < FP0_REGNUM+32) \ | |
190 | ? builtin_type_float : builtin_type_int) \ | |
191 | ||
ac8cf67d PS |
192 | #if HOST_BYTE_ORDER == BIG_ENDIAN |
193 | /* All mips targets store doubles in a register pair with the least | |
194 | significant register in the lower numbered register. | |
195 | If the host is big endian, double register values need conversion between | |
196 | memory and register formats. */ | |
197 | ||
198 | #define REGISTER_CONVERT_TO_TYPE(n, type, buffer) \ | |
199 | do {if ((n) >= FP0_REGNUM && (n) < FP0_REGNUM + 32 && \ | |
200 | TYPE_CODE(type) == TYPE_CODE_FLT && TYPE_LENGTH(type) == 8) { \ | |
201 | char __temp[4]; \ | |
202 | memcpy (__temp, ((char *)(buffer))+4, 4); \ | |
203 | memcpy (((char *)(buffer))+4, (buffer), 4); \ | |
204 | memcpy (((char *)(buffer)), __temp, 4); }} while (0) | |
205 | ||
206 | #define REGISTER_CONVERT_FROM_TYPE(n, type, buffer) \ | |
207 | do {if ((n) >= FP0_REGNUM && (n) < FP0_REGNUM + 32 && \ | |
208 | TYPE_CODE(type) == TYPE_CODE_FLT && TYPE_LENGTH(type) == 8) { \ | |
209 | char __temp[4]; \ | |
210 | memcpy (__temp, ((char *)(buffer))+4, 4); \ | |
211 | memcpy (((char *)(buffer))+4, (buffer), 4); \ | |
212 | memcpy (((char *)(buffer)), __temp, 4); }} while (0) | |
213 | #endif | |
214 | ||
5076de82 FF |
215 | /* Store the address of the place in which to copy the structure the |
216 | subroutine will return. This is called from call_function. */ | |
217 | ||
218 | #define STORE_STRUCT_RETURN(addr, sp) \ | |
219 | { sp = push_word(sp, addr);} | |
220 | ||
221 | /* Extract from an array REGBUF containing the (raw) register state | |
222 | a function return value of type TYPE, and copy that, in virtual format, | |
223 | into VALBUF. XXX floats */ | |
224 | ||
225 | #define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \ | |
ac8cf67d | 226 | mips_extract_return_value(TYPE, REGBUF, VALBUF) |
5076de82 FF |
227 | |
228 | /* Write into appropriate registers a function return value | |
229 | of type TYPE, given in virtual format. */ | |
230 | ||
231 | #define STORE_RETURN_VALUE(TYPE,VALBUF) \ | |
ac8cf67d | 232 | mips_store_return_value(TYPE, VALBUF) |
5076de82 FF |
233 | |
234 | /* Extract from an array REGBUF containing the (raw) register state | |
235 | the address in which a function should return its structure value, | |
236 | as a CORE_ADDR (or an expression that can be used as one). */ | |
237 | ||
238 | #define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) (*(int *)(REGBUF+16)) | |
239 | ||
240 | /* Structures are returned by ref in extra arg0 */ | |
241 | #define USE_STRUCT_CONVENTION(gcc_p, type) 1 | |
242 | ||
243 | \f | |
244 | /* Describe the pointer in each stack frame to the previous stack frame | |
245 | (its caller). */ | |
246 | ||
247 | /* FRAME_CHAIN takes a frame's nominal address | |
248 | and produces the frame's chain-pointer. */ | |
249 | ||
250 | #define FRAME_CHAIN(thisframe) (FRAME_ADDR)mips_frame_chain(thisframe) | |
251 | ||
252 | /* Define other aspects of the stack frame. */ | |
253 | ||
254 | ||
255 | /* A macro that tells us whether the function invocation represented | |
256 | by FI does not have a frame on the stack associated with it. If it | |
257 | does not, FRAMELESS is set to 1, else 0. */ | |
258 | /* We handle this differently for mips, and maybe we should not */ | |
259 | ||
260 | #define FRAMELESS_FUNCTION_INVOCATION(FI, FRAMELESS) {(FRAMELESS) = 0;} | |
261 | ||
262 | /* Saved Pc. */ | |
263 | ||
264 | #define FRAME_SAVED_PC(FRAME) (mips_frame_saved_pc(FRAME)) | |
265 | ||
266 | #define FRAME_ARGS_ADDRESS(fi) (fi)->frame | |
267 | ||
268 | #define FRAME_LOCALS_ADDRESS(fi) (fi)->frame | |
269 | ||
270 | /* Return number of args passed to a frame. | |
271 | Can return -1, meaning no way to tell. */ | |
272 | ||
273 | #define FRAME_NUM_ARGS(num, fi) (num = mips_frame_num_args(fi)) | |
274 | ||
275 | /* Return number of bytes at start of arglist that are not really args. */ | |
276 | ||
277 | #define FRAME_ARGS_SKIP 0 | |
278 | ||
279 | /* Put here the code to store, into a struct frame_saved_regs, | |
280 | the addresses of the saved registers of frame described by FRAME_INFO. | |
281 | This includes special registers such as pc and fp saved in special | |
282 | ways in the stack frame. sp is even more special: | |
283 | the address we return for it IS the sp for the next frame. */ | |
284 | ||
285 | #define FRAME_FIND_SAVED_REGS(frame_info, frame_saved_regs) ( \ | |
286 | (frame_saved_regs) = *(frame_info)->saved_regs, \ | |
287 | (frame_saved_regs).regs[SP_REGNUM] = (frame_info)->frame) | |
288 | ||
289 | \f | |
290 | /* Things needed for making the inferior call functions. */ | |
291 | ||
292 | /* Stack has strict alignment. However, use PUSH_ARGUMENTS | |
293 | to take care of it. */ | |
294 | /*#define STACK_ALIGN(addr) (((addr)+3)&~3)*/ | |
295 | ||
296 | #define PUSH_ARGUMENTS(nargs, args, sp, struct_return, struct_addr) \ | |
297 | sp = mips_push_arguments(nargs, args, sp, struct_return, struct_addr) | |
298 | ||
299 | /* Push an empty stack frame, to record the current PC, etc. */ | |
300 | ||
301 | #define PUSH_DUMMY_FRAME mips_push_dummy_frame() | |
302 | ||
303 | /* Discard from the stack the innermost frame, restoring all registers. */ | |
304 | ||
305 | #define POP_FRAME mips_pop_frame() | |
306 | ||
307 | #define MK_OP(op,rs,rt,offset) (((op)<<26)|((rs)<<21)|((rt)<<16)|(offset)) | |
308 | #define CALL_DUMMY_SIZE (16*4) | |
309 | #define Dest_Reg 2 | |
310 | #define CALL_DUMMY {\ | |
311 | MK_OP(0,RA_REGNUM,0,8), /* jr $ra # Fake ABOUT_TO_RETURN ...*/\ | |
312 | 0, /* nop # ... to stop raw backtrace*/\ | |
313 | 0x27bd0000, /* addu sp,?0 # Pseudo prologue */\ | |
314 | /* Start here: */\ | |
315 | MK_OP(061,SP_REGNUM,12,0), /* lwc1 $f12,0(sp) # Reload FP regs*/\ | |
316 | MK_OP(061,SP_REGNUM,13,4), /* lwc1 $f13,4(sp) */\ | |
317 | MK_OP(061,SP_REGNUM,14,8), /* lwc1 $f14,8(sp) */\ | |
318 | MK_OP(061,SP_REGNUM,15,12), /* lwc1 $f15,12(sp) */\ | |
319 | MK_OP(043,SP_REGNUM,4,0), /* lw $r4,0(sp) # Reload first 4 args*/\ | |
320 | MK_OP(043,SP_REGNUM,5,4), /* lw $r5,4(sp) */\ | |
321 | MK_OP(043,SP_REGNUM,6,8), /* lw $r6,8(sp) */\ | |
322 | MK_OP(043,SP_REGNUM,7,12), /* lw $r7,12(sp) */\ | |
323 | (017<<26)| (Dest_Reg << 16), /* lui $r31,<target upper 16 bits>*/\ | |
324 | MK_OP(13,Dest_Reg,Dest_Reg,0), /* ori $r31,$r31,<lower 16 bits>*/ \ | |
325 | (Dest_Reg<<21) | (31<<11) | 9, /* jalr $r31 */\ | |
326 | MK_OP(043,SP_REGNUM,7,12), /* lw $r7,12(sp) */\ | |
327 | 0x5000d, /* bpt */\ | |
328 | } | |
329 | ||
330 | #define CALL_DUMMY_START_OFFSET 12 | |
331 | ||
332 | /* Insert the specified number of args and function address | |
333 | into a call sequence of the above form stored at DUMMYNAME. */ | |
334 | ||
ac8cf67d PS |
335 | #if TARGET_BYTE_ORDER == BIG_ENDIAN |
336 | /* For big endian mips machines the loading of FP values depends on whether | |
337 | they are single or double precision. */ | |
338 | #define FIX_CALL_DUMMY(dummyname, start_sp, fun, nargs, args, rettype, gcc_p) \ | |
339 | do { \ | |
340 | ((int*)(dummyname))[11] |= ((unsigned long)(fun)) >> 16; \ | |
341 | ((int*)(dummyname))[12] |= (unsigned short)(fun); \ | |
342 | if (! mips_fpu) { \ | |
343 | ((int *) (dummyname))[3] = 0; ((int *) (dummyname))[4] = 0; \ | |
344 | ((int *) (dummyname))[5] = 0; ((int *) (dummyname))[6] = 0; \ | |
345 | } else { \ | |
346 | if (nargs > 0 && \ | |
347 | TYPE_CODE(VALUE_TYPE(args[0])) == TYPE_CODE_FLT && \ | |
348 | TYPE_LENGTH(VALUE_TYPE(args[0])) == 8) { \ | |
349 | ((int *) (dummyname))[3] = MK_OP(061,SP_REGNUM,12,4); \ | |
350 | ((int *) (dummyname))[4] = MK_OP(061,SP_REGNUM,13,0); \ | |
351 | } \ | |
352 | if (nargs > 1 && \ | |
353 | TYPE_CODE(VALUE_TYPE(args[1])) == TYPE_CODE_FLT && \ | |
354 | TYPE_LENGTH(VALUE_TYPE(args[1])) == 8) { \ | |
355 | ((int *) (dummyname))[5] = MK_OP(061,SP_REGNUM,14,12); \ | |
356 | ((int *) (dummyname))[6] = MK_OP(061,SP_REGNUM,15,8); \ | |
357 | } \ | |
358 | } \ | |
359 | } while (0) | |
360 | #else | |
5076de82 FF |
361 | #define FIX_CALL_DUMMY(dummyname, start_sp, fun, nargs, args, rettype, gcc_p)\ |
362 | do \ | |
363 | { \ | |
364 | ((int*)(dummyname))[11] |= ((unsigned long)(fun)) >> 16; \ | |
365 | ((int*)(dummyname))[12] |= (unsigned short)(fun); \ | |
366 | if (! mips_fpu) \ | |
367 | { \ | |
368 | ((int *) (dummyname))[3] = 0; \ | |
369 | ((int *) (dummyname))[4] = 0; \ | |
370 | ((int *) (dummyname))[5] = 0; \ | |
371 | ((int *) (dummyname))[6] = 0; \ | |
372 | } \ | |
373 | } \ | |
374 | while (0) | |
ac8cf67d | 375 | #endif |
5076de82 FF |
376 | |
377 | /* There's a mess in stack frame creation. See comments in blockframe.c | |
378 | near reference to INIT_FRAME_PC_FIRST. */ | |
379 | ||
380 | #define INIT_FRAME_PC(fromleaf, prev) /* nada */ | |
381 | ||
382 | #define INIT_FRAME_PC_FIRST(fromleaf, prev) \ | |
383 | (prev)->pc = ((fromleaf) ? SAVED_PC_AFTER_CALL ((prev)->next) : \ | |
384 | (prev)->next ? FRAME_SAVED_PC ((prev)->next) : read_pc ()); | |
385 | ||
386 | /* Special symbol found in blocks associated with routines. We can hang | |
387 | mips_extra_func_info_t's off of this. */ | |
388 | ||
389 | #define MIPS_EFI_SYMBOL_NAME "__GDB_EFI_INFO__" | |
390 | ||
391 | /* Specific information about a procedure. | |
392 | This overlays the MIPS's PDR records, | |
393 | mipsread.c (ab)uses this to save memory */ | |
394 | ||
395 | typedef struct mips_extra_func_info { | |
396 | long numargs; /* number of args to procedure (was iopt) */ | |
397 | PDR pdr; /* Procedure descriptor record */ | |
398 | } *mips_extra_func_info_t; | |
399 | ||
400 | #define EXTRA_FRAME_INFO \ | |
401 | mips_extra_func_info_t proc_desc; \ | |
402 | int num_args;\ | |
403 | struct frame_saved_regs *saved_regs; | |
404 | ||
405 | #define INIT_EXTRA_FRAME_INFO(fromleaf, fci) init_extra_frame_info(fci) | |
406 | ||
407 | #define PRINT_EXTRA_FRAME_INFO(fi) \ | |
408 | { \ | |
409 | if (fi && fi->proc_desc && fi->proc_desc->pdr.framereg < NUM_REGS) \ | |
410 | printf_filtered (" frame pointer is at %s+%d\n", \ | |
411 | reg_names[fi->proc_desc->pdr.framereg], \ | |
412 | fi->proc_desc->pdr.frameoffset); \ | |
413 | } | |
414 | ||
415 | /* It takes two values to specify a frame on the MIPS. Sigh. | |
416 | ||
417 | In fact, at the moment, the *PC* is the primary value that sets up | |
418 | a frame. The PC is looked up to see what function it's in; symbol | |
419 | information from that function tells us which register is the frame | |
420 | pointer base, and what offset from there is the "virtual frame pointer". | |
421 | (This is usually an offset from SP.) FIXME -- this should be cleaned | |
422 | up so that the primary value is the SP, and the PC is used to disambiguate | |
423 | multiple functions with the same SP that are at different stack levels. */ | |
424 | ||
425 | #define SETUP_ARBITRARY_FRAME(argc, argv) setup_arbitrary_frame (argc, argv) | |
426 | /* FIXME: Depends on equivalence between FRAME and "struct frame_info *", | |
427 | and equivalence between CORE_ADDR and FRAME_ADDR. */ | |
428 | extern struct frame_info *setup_arbitrary_frame PARAMS ((int, CORE_ADDR *)); | |
429 | ||
01422144 PS |
430 | /* Convert a dbx stab register number (from `r' declaration) to a gdb REGNUM */ |
431 | ||
432 | #define STAB_REG_TO_REGNUM(num) ((num) < 32 ? (num) : (num)+FP0_REGNUM-38) |