Commit | Line | Data |
---|---|---|
c906108c | 1 | /* Parameters for execution on a Matsushita mn10200 processor. |
d5e72505 AC |
2 | |
3 | Copyright 1997, 1998, 1999, 2000, 2001, 2002 Free Software | |
4 | Foundation, Inc. | |
c906108c SS |
5 | |
6 | Contributed by Geoffrey Noer <noer@cygnus.com> | |
7 | ||
c5aa993b | 8 | This file is part of GDB. |
c906108c | 9 | |
c5aa993b JM |
10 | This program is free software; you can redistribute it and/or modify |
11 | it under the terms of the GNU General Public License as published by | |
12 | the Free Software Foundation; either version 2 of the License, or | |
13 | (at your option) any later version. | |
c906108c | 14 | |
c5aa993b JM |
15 | This program is distributed in the hope that it will be useful, |
16 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | GNU General Public License for more details. | |
c906108c | 19 | |
c5aa993b JM |
20 | You should have received a copy of the GNU General Public License |
21 | along with this program; if not, write to the Free Software | |
22 | Foundation, Inc., 59 Temple Place - Suite 330, | |
23 | Boston, MA 02111-1307, USA. */ | |
c906108c | 24 | |
c53efe6e AC |
25 | /* FIXME: cagney/2001-03-01: The below macros refer to functions |
26 | declared in "regcache.h". The ``correct fix'' is to convert those | |
27 | macros into functions. */ | |
28 | #include "regcache.h" | |
d5e72505 AC |
29 | #include "symtab.h" /* For namespace_enum. */ |
30 | #include "symfile.h" /* For entry_point_address(). */ | |
c53efe6e | 31 | |
c906108c SS |
32 | /* ints are only 16bits on the mn10200. */ |
33 | #undef TARGET_INT_BIT | |
34 | #define TARGET_INT_BIT 16 | |
35 | ||
36 | /* The mn10200 doesn't support long long types. */ | |
37 | #undef TARGET_LONG_LONG_BIT | |
38 | #define TARGET_LONG_LONG_BIT 32 | |
39 | ||
40 | /* The mn10200 doesn't support double or long double either. */ | |
41 | #undef TARGET_DOUBLE_BIT | |
42 | #undef TARGET_LONG_DOUBLE_BIT | |
43 | #define TARGET_DOUBLE_BIT 32 | |
44 | #define TARGET_LONG_DOUBLE_BIT 32 | |
45 | ||
46 | /* Not strictly correct, but the machine independent code is not | |
47 | ready to handle any of the basic sizes not being a power of two. */ | |
48 | #undef TARGET_PTR_BIT | |
49 | #define TARGET_PTR_BIT 32 | |
50 | ||
51 | /* The mn10200 really has 24 bit registers but the simulator reads/writes | |
52 | them as 32bit values, so we claim they're 32bits each. This may have | |
53 | to be tweaked if the Matsushita emulator/board really deals with them | |
54 | as 24bits each. */ | |
55 | #define REGISTER_SIZE 4 | |
56 | ||
57 | #define MAX_REGISTER_RAW_SIZE REGISTER_SIZE | |
58 | #define NUM_REGS 11 | |
59 | ||
60 | #define REGISTER_BYTES (NUM_REGS * REGISTER_SIZE) | |
61 | ||
62 | #define REGISTER_NAMES \ | |
63 | { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "sp", \ | |
64 | "pc", "mdr", "psw"} | |
65 | ||
66 | #define FP_REGNUM 6 | |
67 | #define SP_REGNUM 7 | |
68 | #define PC_REGNUM 8 | |
69 | #define MDR_REGNUM 9 | |
70 | #define PSW_REGNUM 10 | |
71 | ||
72 | /* Treat the registers as 32bit values. */ | |
73 | #define REGISTER_VIRTUAL_TYPE(REG) builtin_type_long | |
74 | ||
75 | #define REGISTER_BYTE(REG) ((REG) * REGISTER_SIZE) | |
76 | #define REGISTER_VIRTUAL_SIZE(REG) REGISTER_SIZE | |
77 | #define REGISTER_RAW_SIZE(REG) REGISTER_SIZE | |
78 | ||
79 | #define MAX_REGISTER_VIRTUAL_SIZE REGISTER_SIZE | |
80 | ||
81 | /* The breakpoint instruction must be the same size as te smallest | |
82 | instruction in the instruction set. | |
83 | ||
84 | The Matsushita mn10x00 processors have single byte instructions | |
85 | so we need a single byte breakpoint. Matsushita hasn't defined | |
86 | one, so we defined it ourselves. | |
87 | ||
88 | 0xff is the only available single byte insn left on the mn10200. */ | |
89 | #define BREAKPOINT {0xff} | |
90 | ||
91 | #define FUNCTION_START_OFFSET 0 | |
92 | ||
93 | #define DECR_PC_AFTER_BREAK 0 | |
94 | ||
95 | /* Stacks grow the normal way. */ | |
96 | #define INNER_THAN(lhs,rhs) ((lhs) < (rhs)) | |
97 | ||
98 | #define SAVED_PC_AFTER_CALL(frame) \ | |
99 | (read_memory_integer (read_register (SP_REGNUM), REGISTER_SIZE) & 0xffffff) | |
100 | ||
c906108c SS |
101 | struct frame_info; |
102 | struct frame_saved_regs; | |
103 | struct type; | |
104 | struct value; | |
c906108c SS |
105 | |
106 | #define EXTRA_FRAME_INFO struct frame_saved_regs fsr; int status; int stack_size; | |
107 | ||
a14ed312 | 108 | extern void mn10200_init_extra_frame_info (struct frame_info *); |
c906108c SS |
109 | #define INIT_EXTRA_FRAME_INFO(fromleaf, fi) mn10200_init_extra_frame_info (fi) |
110 | #define INIT_FRAME_PC(x,y) | |
111 | ||
a14ed312 KB |
112 | extern void mn10200_frame_find_saved_regs (struct frame_info *, |
113 | struct frame_saved_regs *); | |
c906108c SS |
114 | #define FRAME_FIND_SAVED_REGS(fi, regaddr) regaddr = fi->fsr |
115 | ||
a14ed312 | 116 | extern CORE_ADDR mn10200_frame_chain (struct frame_info *); |
c906108c | 117 | #define FRAME_CHAIN(fi) mn10200_frame_chain (fi) |
c4093a6a | 118 | #define FRAME_CHAIN_VALID(FP, FI) generic_file_frame_chain_valid (FP, FI) |
c906108c | 119 | |
a14ed312 KB |
120 | extern CORE_ADDR mn10200_find_callers_reg (struct frame_info *, int); |
121 | extern CORE_ADDR mn10200_frame_saved_pc (struct frame_info *); | |
c906108c SS |
122 | #define FRAME_SAVED_PC(FI) (mn10200_frame_saved_pc (FI)) |
123 | ||
124 | /* Extract from an array REGBUF containing the (raw) register state | |
125 | a function return value of type TYPE, and copy that, in virtual format, | |
126 | into VALBUF. */ | |
127 | ||
26e9b323 | 128 | #define DEPRECATED_EXTRACT_RETURN_VALUE(TYPE, REGBUF, VALBUF) \ |
c906108c SS |
129 | { \ |
130 | if (TYPE_LENGTH (TYPE) > 8) \ | |
e1e9e218 | 131 | internal_error (__FILE__, __LINE__, "failed internal consistency check"); \ |
c906108c SS |
132 | else if (TYPE_LENGTH (TYPE) > 2 && TYPE_CODE (TYPE) != TYPE_CODE_PTR) \ |
133 | { \ | |
134 | memcpy (VALBUF, REGBUF + REGISTER_BYTE (0), 2); \ | |
135 | memcpy (VALBUF + 2, REGBUF + REGISTER_BYTE (1), 2); \ | |
136 | } \ | |
137 | else if (TYPE_CODE (TYPE) == TYPE_CODE_PTR)\ | |
138 | { \ | |
139 | memcpy (VALBUF, REGBUF + REGISTER_BYTE (4), TYPE_LENGTH (TYPE)); \ | |
140 | } \ | |
141 | else \ | |
142 | { \ | |
143 | memcpy (VALBUF, REGBUF + REGISTER_BYTE (0), TYPE_LENGTH (TYPE)); \ | |
144 | } \ | |
145 | } | |
146 | ||
26e9b323 | 147 | #define DEPRECATED_EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \ |
c906108c SS |
148 | extract_address (REGBUF + REGISTER_BYTE (4), \ |
149 | REGISTER_RAW_SIZE (4)) | |
150 | ||
ebba8386 | 151 | #define DEPRECATED_STORE_RETURN_VALUE(TYPE, VALBUF) \ |
c906108c SS |
152 | { \ |
153 | if (TYPE_LENGTH (TYPE) > 8) \ | |
e1e9e218 | 154 | internal_error (__FILE__, __LINE__, "failed internal consistency check"); \ |
c906108c SS |
155 | else if (TYPE_LENGTH (TYPE) > 2 && TYPE_CODE (TYPE) != TYPE_CODE_PTR) \ |
156 | { \ | |
73937e03 AC |
157 | deprecated_write_register_bytes (REGISTER_BYTE (0), VALBUF, 2); \ |
158 | deprecated_write_register_bytes (REGISTER_BYTE (1), VALBUF + 2, 2); \ | |
c906108c SS |
159 | } \ |
160 | else if (TYPE_CODE (TYPE) == TYPE_CODE_PTR)\ | |
161 | { \ | |
73937e03 | 162 | deprecated_write_register_bytes (REGISTER_BYTE (4), VALBUF, TYPE_LENGTH (TYPE)); \ |
c906108c SS |
163 | } \ |
164 | else \ | |
165 | { \ | |
73937e03 | 166 | deprecated_write_register_bytes (REGISTER_BYTE (0), VALBUF, TYPE_LENGTH (TYPE)); \ |
c906108c SS |
167 | } \ |
168 | } | |
169 | ||
d4f3574e SS |
170 | |
171 | extern CORE_ADDR mn10200_store_struct_return (CORE_ADDR addr, CORE_ADDR sp); | |
c906108c SS |
172 | #define STORE_STRUCT_RETURN(STRUCT_ADDR, SP) \ |
173 | (SP) = mn10200_store_struct_return (STRUCT_ADDR, SP) | |
174 | ||
a14ed312 | 175 | extern CORE_ADDR mn10200_skip_prologue (CORE_ADDR); |
b83266a0 | 176 | #define SKIP_PROLOGUE(pc) (mn10200_skip_prologue (pc)) |
c906108c SS |
177 | |
178 | #define FRAME_ARGS_SKIP 0 | |
179 | ||
180 | #define FRAME_ARGS_ADDRESS(fi) ((fi)->frame) | |
181 | #define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame) | |
392a587b | 182 | #define FRAME_NUM_ARGS(fi) (-1) |
c906108c | 183 | |
a14ed312 | 184 | extern void mn10200_pop_frame (struct frame_info *); |
c906108c SS |
185 | #define POP_FRAME mn10200_pop_frame (get_current_frame ()) |
186 | ||
07555a72 | 187 | #define DEPRECATED_USE_GENERIC_DUMMY_FRAMES 1 |
c906108c SS |
188 | #define CALL_DUMMY {0} |
189 | #define CALL_DUMMY_START_OFFSET (0) | |
190 | #define CALL_DUMMY_BREAKPOINT_OFFSET (0) | |
191 | #define CALL_DUMMY_LOCATION AT_ENTRY_POINT | |
ed5cedc5 | 192 | #define PC_IN_CALL_DUMMY(pc, sp, frame_address) deprecated_pc_in_call_dummy_at_entry_point (pc, sp, frame_address) |
c906108c SS |
193 | #define FIX_CALL_DUMMY(DUMMY, START, FUNADDR, NARGS, ARGS, TYPE, GCCP) |
194 | #define CALL_DUMMY_ADDRESS() entry_point_address () | |
195 | ||
a14ed312 | 196 | extern CORE_ADDR mn10200_push_return_address (CORE_ADDR, CORE_ADDR); |
c906108c SS |
197 | #define PUSH_RETURN_ADDRESS(PC, SP) mn10200_push_return_address (PC, SP) |
198 | ||
199 | #define PUSH_DUMMY_FRAME generic_push_dummy_frame () | |
200 | ||
5ae5f592 AC |
201 | extern CORE_ADDR mn10200_push_arguments (int, struct value **, CORE_ADDR, |
202 | unsigned char, CORE_ADDR); | |
c906108c | 203 | #define PUSH_ARGUMENTS(NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR) \ |
392a587b | 204 | (mn10200_push_arguments (NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR)) |
c906108c | 205 | |
7a292a7a | 206 | #define PC_IN_CALL_DUMMY(PC, SP, FP) generic_pc_in_call_dummy (PC, SP, FP) |
c906108c SS |
207 | |
208 | #define REG_STRUCT_HAS_ADDR(gcc_p,TYPE) \ | |
209 | (TYPE_LENGTH (TYPE) > 8) | |
210 | ||
211 | extern use_struct_convention_fn mn10200_use_struct_convention; | |
212 | #define USE_STRUCT_CONVENTION(GCC_P, TYPE) mn10200_use_struct_convention (GCC_P, TYPE) | |
213 | ||
c906108c SS |
214 | /* Define this for Wingdb */ |
215 | #define TARGET_MN10200 |