* configure.in: Add test for "long long" support.
[deliverable/binutils-gdb.git] / gdb / config / pa / tm-hppa.h
CommitLineData
d83a6710 1/* Parameters for execution on any Hewlett-Packard PA-RISC machine.
17280c3f 2 Copyright 1986, 1987, 1989, 1990, 1991, 1992, 1993, 1995
d83a6710
SG
3 Free Software Foundation, Inc.
4
5 Contributed by the Center for Software Science at the
6 University of Utah (pa-gdb-bugs@cs.utah.edu).
7
8This file is part of GDB.
9
10This program is free software; you can redistribute it and/or modify
11it under the terms of the GNU General Public License as published by
12the Free Software Foundation; either version 2 of the License, or
13(at your option) any later version.
14
15This program is distributed in the hope that it will be useful,
16but WITHOUT ANY WARRANTY; without even the implied warranty of
17MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18GNU General Public License for more details.
19
20You should have received a copy of the GNU General Public License
21along with this program; if not, write to the Free Software
1ce8a30f 22Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
d83a6710 23
3f550b59
FF
24/* Forward declarations of some types we use in prototypes */
25
26#ifdef __STDC__
27struct frame_info;
28struct frame_saved_regs;
29struct value;
30struct type;
31struct inferior_status;
32#endif
33
d83a6710
SG
34/* Target system byte order. */
35
36#define TARGET_BYTE_ORDER BIG_ENDIAN
37
3f550b59
FF
38/* By default assume we don't have to worry about software floating point. */
39#ifndef SOFT_FLOAT
40#define SOFT_FLOAT 0
41#endif
42
d83a6710
SG
43/* Get at various relevent fields of an instruction word. */
44
45#define MASK_5 0x1f
46#define MASK_11 0x7ff
47#define MASK_14 0x3fff
48#define MASK_21 0x1fffff
49
50/* This macro gets bit fields using HP's numbering (MSB = 0) */
51
52#define GET_FIELD(X, FROM, TO) \
3f550b59 53 ((X) >> (31 - (TO)) & ((1 << ((TO) - (FROM) + 1)) - 1))
d83a6710
SG
54
55/* Watch out for NaNs */
56
57#define IEEE_FLOAT
58
50355472
JL
59/* On the PA, any pass-by-value structure > 8 bytes is actually
60 passed via a pointer regardless of its type or the compiler
61 used. */
d83a6710 62
50355472
JL
63#define REG_STRUCT_HAS_ADDR(gcc_p,type) \
64 (TYPE_LENGTH (type) > 8)
d83a6710
SG
65
66/* Offset from address of function to start of its code.
67 Zero on most machines. */
68
69#define FUNCTION_START_OFFSET 0
70
71/* Advance PC across any function entry prologue instructions
72 to reach some "real" code. */
73
d83a6710 74#define SKIP_PROLOGUE(pc) pc = skip_prologue (pc)
3f550b59 75extern CORE_ADDR skip_prologue PARAMS ((CORE_ADDR));
d83a6710
SG
76
77/* If PC is in some function-call trampoline code, return the PC
78 where the function itself actually starts. If not, return NULL. */
79
80#define SKIP_TRAMPOLINE_CODE(pc) skip_trampoline_code (pc, NULL)
81
481faa25
JL
82/* Return non-zero if we are in an appropriate trampoline. */
83
84#define IN_SOLIB_CALL_TRAMPOLINE(pc, name) \
85 in_solib_call_trampoline (pc, name)
3f550b59 86extern int in_solib_call_trampoline PARAMS ((CORE_ADDR, char *));
481faa25
JL
87
88#define IN_SOLIB_RETURN_TRAMPOLINE(pc, name) \
89 in_solib_return_trampoline (pc, name)
3f550b59 90extern int in_solib_return_trampoline PARAMS ((CORE_ADDR, char *));
481faa25 91
d83a6710
SG
92/* Immediately after a function call, return the saved pc.
93 Can't go through the frames for this because on some machines
94 the new frame is not set up until the new function executes
95 some instructions. */
96
d3862cae
JK
97#undef SAVED_PC_AFTER_CALL
98#define SAVED_PC_AFTER_CALL(frame) saved_pc_after_call (frame)
3f550b59 99extern CORE_ADDR saved_pc_after_call PARAMS ((struct frame_info *));
d83a6710
SG
100
101/* Stack grows upward */
102
103#define INNER_THAN >
104
d83a6710
SG
105/* Sequence of bytes for breakpoint instruction. */
106
d83a6710 107#define BREAKPOINT {0x00, 0x01, 0x00, 0x04}
d83a6710
SG
108
109/* Amount PC must be decremented by after a breakpoint.
110 This is often the number of bytes in BREAKPOINT
111 but not always.
112
113 Not on the PA-RISC */
114
115#define DECR_PC_AFTER_BREAK 0
116
117/* return instruction is bv r0(rp) or bv,n r0(rp)*/
118
119#define ABOUT_TO_RETURN(pc) ((read_memory_integer (pc, 4) | 0x2) == 0xE840C002)
120
f4f0d174
JK
121/* Say how long (ordinary) registers are. This is a piece of bogosity
122 used in push_word and a few other places; REGISTER_RAW_SIZE is the
123 real way to know how big a register is. */
d83a6710 124
f4f0d174 125#define REGISTER_SIZE 4
d83a6710
SG
126
127/* Number of machine registers */
128
50355472 129#define NUM_REGS 128
d83a6710
SG
130
131/* Initializer for an array of names of registers.
132 There should be NUM_REGS strings in this initializer. */
133
134#define REGISTER_NAMES \
135 {"flags", "r1", "rp", "r3", "r4", "r5", "r6", "r7", "r8", "r9", \
136 "r10", "r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19", \
481faa25 137 "r20", "r21", "r22", "r23", "r24", "r25", "r26", "dp", "ret0", "ret1", \
d83a6710
SG
138 "sp", "r31", "sar", "pcoqh", "pcsqh", "pcoqt", "pcsqt", \
139 "eiem", "iir", "isr", "ior", "ipsw", "goto", "sr4", "sr0", "sr1", "sr2", \
140 "sr3", "sr5", "sr6", "sr7", "cr0", "cr8", "cr9", "ccr", "cr12", "cr13", \
141 "cr24", "cr25", "cr26", "mpsfu_high", "mpsfu_low", "mpsfu_ovflo", "pad", \
142 "fpsr", "fpe1", "fpe2", "fpe3", "fpe4", "fpe5", "fpe6", "fpe7", \
50355472
JL
143 "fr4", "fr4R", "fr5", "fr5R", "fr6", "fr6R", "fr7", "fr7R", \
144 "fr8", "fr8R", "fr9", "fr9R", "fr10", "fr10R", "fr11", "fr11R", \
145 "fr12", "fr12R", "fr13", "fr13R", "fr14", "fr14R", "fr15", "fr15R", \
146 "fr16", "fr16R", "fr17", "fr17R", "fr18", "fr18R", "fr19", "fr19R", \
147 "fr20", "fr20R", "fr21", "fr21R", "fr22", "fr22R", "fr23", "fr23R", \
148 "fr24", "fr24R", "fr25", "fr25R", "fr26", "fr26R", "fr27", "fr27R", \
149 "fr28", "fr28R", "fr29", "fr29R", "fr30", "fr30R", "fr31", "fr31R"}
d83a6710
SG
150
151/* Register numbers of various important registers.
152 Note that some of these values are "real" register numbers,
153 and correspond to the general registers of the machine,
154 and some are "phony" register numbers which are too large
155 to be actual register numbers as far as the user is concerned
156 but do serve to get the desired values when passed to read_register. */
157
7486c68d
SG
158#define R0_REGNUM 0 /* Doesn't actually exist, used as base for
159 other r registers. */
d83a6710
SG
160#define FLAGS_REGNUM 0 /* Various status flags */
161#define RP_REGNUM 2 /* return pointer */
c7f3b703 162#define FP_REGNUM 3 /* Contains address of executing stack */
d83a6710
SG
163 /* frame */
164#define SP_REGNUM 30 /* Contains address of top of stack */
7486c68d
SG
165#define SAR_REGNUM 32 /* Shift Amount Register */
166#define IPSW_REGNUM 41 /* Interrupt Processor Status Word */
d83a6710
SG
167#define PCOQ_HEAD_REGNUM 33 /* instruction offset queue head */
168#define PCSQ_HEAD_REGNUM 34 /* instruction space queue head */
169#define PCOQ_TAIL_REGNUM 35 /* instruction offset queue tail */
170#define PCSQ_TAIL_REGNUM 36 /* instruction space queue tail */
7486c68d
SG
171#define EIEM_REGNUM 37 /* External Interrupt Enable Mask */
172#define IIR_REGNUM 38 /* Interrupt Instruction Register */
173#define IOR_REGNUM 40 /* Interrupt Offset Register */
174#define SR4_REGNUM 43 /* space register 4 */
175#define RCR_REGNUM 51 /* Recover Counter (also known as cr0) */
176#define CCR_REGNUM 54 /* Coprocessor Configuration Register */
177#define TR0_REGNUM 57 /* Temporary Registers (cr24 -> cr31) */
d83a6710
SG
178#define FP0_REGNUM 64 /* floating point reg. 0 */
179#define FP4_REGNUM 72
180
181/* compatibility with the rest of gdb. */
182#define PC_REGNUM PCOQ_HEAD_REGNUM
183#define NPC_REGNUM PCOQ_TAIL_REGNUM
184
1ce8a30f
JL
185/*
186 * Processor Status Word Masks
187 */
188
189#define PSW_T 0x01000000 /* Taken Branch Trap Enable */
190#define PSW_H 0x00800000 /* Higher-Privilege Transfer Trap Enable */
191#define PSW_L 0x00400000 /* Lower-Privilege Transfer Trap Enable */
192#define PSW_N 0x00200000 /* PC Queue Front Instruction Nullified */
193#define PSW_X 0x00100000 /* Data Memory Break Disable */
194#define PSW_B 0x00080000 /* Taken Branch in Previous Cycle */
195#define PSW_C 0x00040000 /* Code Address Translation Enable */
196#define PSW_V 0x00020000 /* Divide Step Correction */
197#define PSW_M 0x00010000 /* High-Priority Machine Check Disable */
198#define PSW_CB 0x0000ff00 /* Carry/Borrow Bits */
199#define PSW_R 0x00000010 /* Recovery Counter Enable */
200#define PSW_Q 0x00000008 /* Interruption State Collection Enable */
201#define PSW_P 0x00000004 /* Protection ID Validation Enable */
202#define PSW_D 0x00000002 /* Data Address Translation Enable */
203#define PSW_I 0x00000001 /* External, Power Failure, Low-Priority */
204 /* Machine Check Interruption Enable */
205
d83a6710
SG
206/* When fetching register values from an inferior or a core file,
207 clean them up using this macro. BUF is a char pointer to
208 the raw value of the register in the registers[] array. */
209
210#define CLEAN_UP_REGISTER_VALUE(regno, buf) \
211 do { \
212 if ((regno) == PCOQ_HEAD_REGNUM || (regno) == PCOQ_TAIL_REGNUM) \
213 (buf)[3] &= ~0x3; \
214 } while (0)
215
216/* Define DO_REGISTERS_INFO() to do machine-specific formatting
217 of register dumps. */
218
219#define DO_REGISTERS_INFO(_regnum, fp) pa_do_registers_info (_regnum, fp)
3f550b59 220extern void pa_do_registers_info PARAMS ((int, int));
d83a6710
SG
221
222/* PA specific macro to see if the current instruction is nullified. */
1ce8a30f 223#ifndef INSTRUCTION_NULLIFIED
d83a6710 224#define INSTRUCTION_NULLIFIED ((int)read_register (IPSW_REGNUM) & 0x00200000)
1ce8a30f 225#endif
d83a6710 226
50355472
JL
227/* Number of bytes of storage in the actual machine representation
228 for register N. On the PA-RISC, all regs are 4 bytes, including
229 the FP registers (they're accessed as two 4 byte halves). */
230
231#define REGISTER_RAW_SIZE(N) 4
232
d83a6710
SG
233/* Total amount of space needed to store our copies of the machine's
234 register state, the array `registers'. */
481faa25 235#define REGISTER_BYTES (NUM_REGS * 4)
d83a6710
SG
236
237/* Index within `registers' of the first byte of the space for
238 register N. */
239
50355472 240#define REGISTER_BYTE(N) (N) * 4
d83a6710
SG
241
242/* Number of bytes of storage in the program's representation
243 for register N. */
244
245#define REGISTER_VIRTUAL_SIZE(N) REGISTER_RAW_SIZE(N)
246
247/* Largest value REGISTER_RAW_SIZE can have. */
248
50355472 249#define MAX_REGISTER_RAW_SIZE 4
d83a6710
SG
250
251/* Largest value REGISTER_VIRTUAL_SIZE can have. */
252
253#define MAX_REGISTER_VIRTUAL_SIZE 8
254
d83a6710
SG
255/* Return the GDB type object for the "standard" data type
256 of data in register N. */
257
258#define REGISTER_VIRTUAL_TYPE(N) \
50355472 259 ((N) < FP4_REGNUM ? builtin_type_int : builtin_type_float)
d83a6710
SG
260
261/* Store the address of the place in which to copy the structure the
262 subroutine will return. This is called from call_function. */
263
264#define STORE_STRUCT_RETURN(ADDR, SP) {write_register (28, (ADDR)); }
265
266/* Extract from an array REGBUF containing the (raw) register state
267 a function return value of type TYPE, and copy that, in virtual format,
90df364f
JL
268 into VALBUF.
269
270 FIXME: Not sure what to do for soft float here. */
d83a6710
SG
271
272#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
61fe99b4 273 { \
17280c3f 274 if (TYPE_CODE (TYPE) == TYPE_CODE_FLT && !SOFT_FLOAT) \
61fe99b4 275 memcpy ((VALBUF), \
17280c3f 276 ((char *)(REGBUF)) + REGISTER_BYTE (FP4_REGNUM), \
61fe99b4
JL
277 TYPE_LENGTH (TYPE)); \
278 else \
279 memcpy ((VALBUF), \
280 (char *)(REGBUF) + REGISTER_BYTE (28) + \
281 (TYPE_LENGTH (TYPE) >= 4 ? 0 : 4 - TYPE_LENGTH (TYPE)), \
282 TYPE_LENGTH (TYPE)); \
283 }
d83a6710
SG
284
285/* Write into appropriate registers a function return value
90df364f
JL
286 of type TYPE, given in virtual format.
287
288 For software floating point the return value goes into the integer
289 registers. But we don't have any flag to key this on, so we always
290 store the value into the integer registers, and if it's a float value,
291 then we put it in the float registers too. */
d83a6710
SG
292
293#define STORE_RETURN_VALUE(TYPE,VALBUF) \
90df364f 294 write_register_bytes (REGISTER_BYTE (28),(VALBUF), TYPE_LENGTH (TYPE)) ; \
17280c3f
JL
295 if (!SOFT_FLOAT) \
296 write_register_bytes ((TYPE_CODE(TYPE) == TYPE_CODE_FLT \
297 ? REGISTER_BYTE (FP4_REGNUM) \
298 : REGISTER_BYTE (28)), \
299 (VALBUF), TYPE_LENGTH (TYPE))
d83a6710
SG
300
301/* Extract from an array REGBUF containing the (raw) register state
302 the address in which a function should return its structure value,
303 as a CORE_ADDR (or an expression that can be used as one). */
304
1ce8a30f
JL
305#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
306 (*(int *)((REGBUF) + REGISTER_BYTE (28)))
d83a6710
SG
307
308/*
309 * This macro defines the register numbers (from REGISTER_NAMES) that
310 * are effectively unavailable to the user through ptrace(). It allows
311 * us to include the whole register set in REGISTER_NAMES (inorder to
312 * better support remote debugging). If it is used in
313 * fetch/store_inferior_registers() gdb will not complain about I/O errors
314 * on fetching these registers. If all registers in REGISTER_NAMES
315 * are available, then return false (0).
316 */
317
318#define CANNOT_STORE_REGISTER(regno) \
319 ((regno) == 0) || \
320 ((regno) == PCSQ_HEAD_REGNUM) || \
321 ((regno) >= PCSQ_TAIL_REGNUM && (regno) < IPSW_REGNUM) || \
322 ((regno) > IPSW_REGNUM && (regno) < FP4_REGNUM)
323
324#define INIT_EXTRA_FRAME_INFO(fromleaf, frame) init_extra_frame_info (fromleaf, frame)
3f550b59 325extern void init_extra_frame_info PARAMS ((int, struct frame_info *));
d83a6710
SG
326
327/* Describe the pointer in each stack frame to the previous stack frame
328 (its caller). */
329
330/* FRAME_CHAIN takes a frame's nominal address
331 and produces the frame's chain-pointer.
332
333 FRAME_CHAIN_COMBINE takes the chain pointer and the frame's nominal address
334 and produces the nominal address of the caller frame.
335
336 However, if FRAME_CHAIN_VALID returns zero,
337 it means the given frame is the outermost one and has no caller.
338 In that case, FRAME_CHAIN_COMBINE is not used. */
339
340/* In the case of the PA-RISC, the frame's nominal address
341 is the address of a 4-byte word containing the calling frame's
342 address (previous FP). */
343
344#define FRAME_CHAIN(thisframe) frame_chain (thisframe)
3f550b59 345extern CORE_ADDR frame_chain PARAMS ((struct frame_info *));
d83a6710
SG
346
347#define FRAME_CHAIN_VALID(chain, thisframe) \
348 frame_chain_valid (chain, thisframe)
3f550b59 349extern int frame_chain_valid PARAMS ((CORE_ADDR, struct frame_info *));
d83a6710
SG
350
351#define FRAME_CHAIN_COMBINE(chain, thisframe) (chain)
352
353/* Define other aspects of the stack frame. */
354
355/* A macro that tells us whether the function invocation represented
356 by FI does not have a frame on the stack associated with it. If it
357 does not, FRAMELESS is set to 1, else 0. */
358#define FRAMELESS_FUNCTION_INVOCATION(FI, FRAMELESS) \
d3862cae 359 (FRAMELESS) = frameless_function_invocation(FI)
3f550b59 360extern int frameless_function_invocation PARAMS ((struct frame_info *));
d83a6710
SG
361
362#define FRAME_SAVED_PC(FRAME) frame_saved_pc (FRAME)
363
364#define FRAME_ARGS_ADDRESS(fi) ((fi)->frame)
365
366#define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame)
367/* Set VAL to the number of args passed to frame described by FI.
368 Can set VAL to -1, meaning no way to tell. */
369
370/* We can't tell how many args there are
371 now that the C compiler delays popping them. */
372#define FRAME_NUM_ARGS(val,fi) (val = -1)
373
374/* Return number of bytes at start of arglist that are not really args. */
375
376#define FRAME_ARGS_SKIP 0
377
c7f3b703
JL
378#define FRAME_FIND_SAVED_REGS(frame_info, frame_saved_regs) \
379 hppa_frame_find_saved_regs (frame_info, &frame_saved_regs)
3f550b59
FF
380extern void
381hppa_frame_find_saved_regs PARAMS ((struct frame_info *,
382 struct frame_saved_regs *));
c7f3b703 383
d83a6710
SG
384\f
385/* Things needed for making the inferior call functions. */
386
387/* Push an empty stack frame, to record the current PC, etc. */
388
7486c68d 389#define PUSH_DUMMY_FRAME push_dummy_frame (&inf_status)
3f550b59 390extern void push_dummy_frame PARAMS ((struct inferior_status *));
d83a6710
SG
391
392/* Discard from the stack the innermost frame,
393 restoring all saved registers. */
394#define POP_FRAME hppa_pop_frame ()
3f550b59 395extern void hppa_pop_frame PARAMS ((void));
d83a6710 396
7486c68d
SG
397#define INSTRUCTION_SIZE 4
398
399#ifndef PA_LEVEL_0
400
401/* Non-level zero PA's have space registers (but they don't always have
402 floating-point, do they???? */
403
d83a6710
SG
404/* This sequence of words is the instructions
405
406; Call stack frame has already been built by gdb. Since we could be calling
407; a varargs function, and we do not have the benefit of a stub to put things in
408; the right place, we load the first 4 word of arguments into both the general
409; and fp registers.
410call_dummy
411 ldw -36(sp), arg0
412 ldw -40(sp), arg1
413 ldw -44(sp), arg2
414 ldw -48(sp), arg3
415 ldo -36(sp), r1
416 fldws 0(0, r1), fr4
417 fldds -4(0, r1), fr5
418 fldws -8(0, r1), fr6
419 fldds -12(0, r1), fr7
7486c68d
SG
420 ldil 0, r22 ; FUNC_LDIL_OFFSET must point here
421 ldo 0(r22), r22 ; FUNC_LDO_OFFSET must point here
c7f3b703 422 ldsid (0,r22), r4
7486c68d
SG
423 ldil 0, r1 ; SR4EXPORT_LDIL_OFFSET must point here
424 ldo 0(r1), r1 ; SR4EXPORT_LDO_OFFSET must point here
4f915914 425 ldsid (0,r1), r20
853feb50 426 combt,=,n r4, r20, text_space ; If target is in data space, do a
d83a6710
SG
427 ble 0(sr5, r22) ; "normal" procedure call
428 copy r31, r2
429 break 4, 8
430 mtsp r21, sr0
431 ble,n 0(sr0, r22)
432text_space ; Otherwise, go through _sr4export,
433 ble (sr4, r1) ; which will return back here.
1ce8a30f 434 stw r31,-24(r30)
d83a6710
SG
435 break 4, 8
436 mtsp r21, sr0
437 ble,n 0(sr0, r22)
50355472
JL
438 nop ; To avoid kernel bugs
439 nop ; and keep the dummy 8 byte aligned
d83a6710
SG
440
441 The dummy decides if the target is in text space or data space. If
442 it's in data space, there's no problem because the target can
443 return back to the dummy. However, if the target is in text space,
444 the dummy calls the secret, undocumented routine _sr4export, which
445 calls a function in text space and can return to any space. Instead
446 of including fake instructions to represent saved registers, we
447 know that the frame is associated with the call dummy and treat it
50355472
JL
448 specially.
449
450 The trailing NOPs are needed to avoid a bug in HPUX, BSD and OSF1
451 kernels. If the memory at the location pointed to by the PC is
452 0xffffffff then a ptrace step call will fail (even if the instruction
453 is nullified).
454
455 The code to pop a dummy frame single steps three instructions
456 starting with the last mtsp. This includes the nullified "instruction"
457 following the ble (which is uninitialized junk). If the
458 "instruction" following the last BLE is 0xffffffff, then the ptrace
459 will fail and the dummy frame is not correctly popped.
460
461 By placing a NOP in the delay slot of the BLE instruction we can be
462 sure that we never try to execute a 0xffffffff instruction and
463 avoid the kernel bug. The second NOP is needed to keep the call
464 dummy 8 byte aligned. */
d83a6710 465
7486c68d
SG
466/* Define offsets into the call dummy for the target function address */
467#define FUNC_LDIL_OFFSET (INSTRUCTION_SIZE * 9)
468#define FUNC_LDO_OFFSET (INSTRUCTION_SIZE * 10)
469
470/* Define offsets into the call dummy for the _sr4export address */
471#define SR4EXPORT_LDIL_OFFSET (INSTRUCTION_SIZE * 12)
472#define SR4EXPORT_LDO_OFFSET (INSTRUCTION_SIZE * 13)
473
d83a6710
SG
474#define CALL_DUMMY {0x4BDA3FB9, 0x4BD93FB1, 0x4BD83FA9, 0x4BD73FA1,\
475 0x37C13FB9, 0x24201004, 0x2C391005, 0x24311006,\
c7f3b703 476 0x2C291007, 0x22C00000, 0x36D60000, 0x02C010A4,\
853feb50 477 0x20200000, 0x34210000, 0x002010b4, 0x82842022,\
d83a6710
SG
478 0xe6c06000, 0x081f0242, 0x00010004, 0x00151820,\
479 0xe6c00002, 0xe4202000, 0x6bdf3fd1, 0x00010004,\
50355472 480 0x00151820, 0xe6c00002, 0x08000240, 0x08000240}
d83a6710 481
7486c68d
SG
482#define CALL_DUMMY_LENGTH (INSTRUCTION_SIZE * 28)
483
484#else /* defined PA_LEVEL_0 */
485
486/* This is the call dummy for a level 0 PA. Level 0's don't have space
487 registers (or floating point??), so we skip all that inter-space call stuff,
488 and avoid touching the fp regs.
489
490call_dummy
491
492 ldw -36(%sp), %arg0
493 ldw -40(%sp), %arg1
494 ldw -44(%sp), %arg2
495 ldw -48(%sp), %arg3
496 ldil 0, %r31 ; FUNC_LDIL_OFFSET must point here
497 ldo 0(%r31), %r31 ; FUNC_LDO_OFFSET must point here
1ce8a30f 498 ble 0(%sr0, %r31)
7486c68d
SG
499 copy %r31, %r2
500 break 4, 8
1ce8a30f
JL
501 nop ; restore_pc_queue expects these
502 bv,n 0(%r22) ; instructions to be here...
503 nop
7486c68d
SG
504*/
505
506/* Define offsets into the call dummy for the target function address */
507#define FUNC_LDIL_OFFSET (INSTRUCTION_SIZE * 4)
508#define FUNC_LDO_OFFSET (INSTRUCTION_SIZE * 5)
509
510#define CALL_DUMMY {0x4bda3fb9, 0x4bd93fb1, 0x4bd83fa9, 0x4bd73fa1,\
511 0x23e00000, 0x37ff0000, 0xe7e00000, 0x081f0242,\
1ce8a30f 512 0x00010004, 0x08000240, 0xeac0c002, 0x08000240}
7486c68d 513
1ce8a30f 514#define CALL_DUMMY_LENGTH (INSTRUCTION_SIZE * 12)
7486c68d
SG
515
516#endif
517
d83a6710
SG
518#define CALL_DUMMY_START_OFFSET 0
519
520/*
521 * Insert the specified number of args and function address
522 * into a call sequence of the above form stored at DUMMYNAME.
523 *
524 * On the hppa we need to call the stack dummy through $$dyncall.
525 * Therefore our version of FIX_CALL_DUMMY takes an extra argument,
526 * real_pc, which is the location where gdb should start up the
527 * inferior to do the function call.
528 */
529
530#define FIX_CALL_DUMMY hppa_fix_call_dummy
531
3f550b59
FF
532extern CORE_ADDR
533hppa_fix_call_dummy PARAMS ((char *, CORE_ADDR, CORE_ADDR, int,
534 struct value **, struct type *, int));
d83a6710
SG
535
536#define PUSH_ARGUMENTS(nargs, args, sp, struct_return, struct_addr) \
537 sp = hppa_push_arguments(nargs, args, sp, struct_return, struct_addr)
3f550b59
FF
538extern CORE_ADDR
539hppa_push_arguments PARAMS ((int, struct value **, CORE_ADDR, int,
540 CORE_ADDR));
9fdb3f7a
JK
541\f
542/* The low two bits of the PC on the PA contain the privilege level. Some
543 genius implementing a (non-GCC) compiler apparently decided this means
544 that "addresses" in a text section therefore include a privilege level,
545 and thus symbol tables should contain these bits. This seems like a
546 bonehead thing to do--anyway, it seems to work for our purposes to just
547 ignore those bits. */
548#define SMASH_TEXT_ADDRESS(addr) ((addr) &= ~0x3)
d83a6710
SG
549
550#define GDB_TARGET_IS_HPPA
551
552#define BELIEVE_PCC_PROMOTION 1
553
554/*
555 * Unwind table and descriptor.
556 */
557
558struct unwind_table_entry {
559 unsigned int region_start;
560 unsigned int region_end;
561
562 unsigned int Cannot_unwind : 1;
563 unsigned int Millicode : 1;
564 unsigned int Millicode_save_sr0 : 1;
565 unsigned int Region_description : 2;
c7f3b703 566 unsigned int reserved1 : 1;
d83a6710
SG
567 unsigned int Entry_SR : 1;
568 unsigned int Entry_FR : 4; /* number saved */
569 unsigned int Entry_GR : 5; /* number saved */
570 unsigned int Args_stored : 1;
571 unsigned int Variable_Frame : 1;
572 unsigned int Separate_Package_Body : 1;
573 unsigned int Frame_Extension_Millicode:1;
574 unsigned int Stack_Overflow_Check : 1;
575 unsigned int Two_Instruction_SP_Increment:1;
576 unsigned int Ada_Region : 1;
c7f3b703
JL
577/* Use this field to store a stub unwind type. */
578#define stub_type reserved2
d83a6710
SG
579 unsigned int reserved2 : 4;
580 unsigned int Save_SP : 1;
581 unsigned int Save_RP : 1;
582 unsigned int Save_MRP_in_frame : 1;
583 unsigned int extn_ptr_defined : 1;
584 unsigned int Cleanup_defined : 1;
585
586 unsigned int MPE_XL_interrupt_marker: 1;
587 unsigned int HP_UX_interrupt_marker: 1;
588 unsigned int Large_frame : 1;
589 unsigned int reserved4 : 2;
590 unsigned int Total_frame_size : 27;
591};
592
c7f3b703
JL
593/* HP linkers also generate unwinds for various linker-generated stubs.
594 GDB reads in the stubs from the $UNWIND_END$ subspace, then
595 "converts" them into normal unwind entries using some of the reserved
596 fields to store the stub type. */
597
598struct stub_unwind_entry
599{
600 /* The offset within the executable for the associated stub. */
601 unsigned stub_offset;
602
603 /* The type of stub this unwind entry describes. */
604 char type;
605
606 /* Unknown. Not needed by GDB at this time. */
607 char prs_info;
608
609 /* Length (in instructions) of the associated stub. */
610 short stub_length;
611};
612
613/* Sizes (in bytes) of the native unwind entries. */
614#define UNWIND_ENTRY_SIZE 16
615#define STUB_UNWIND_ENTRY_SIZE 8
616
617/* The gaps represent linker stubs used in MPE and space for future
618 expansion. */
619enum unwind_stub_types
620{
621 LONG_BRANCH = 1,
622 PARAMETER_RELOCATION = 2,
623 EXPORT = 10,
624 IMPORT = 11,
625};
626
627
d83a6710
SG
628/* Info about the unwind table associated with an object file. This is hung
629 off of the objfile->obj_private pointer, and is allocated in the objfile's
630 psymbol obstack. This allows us to have unique unwind info for each
631 executable and shared library that we are debugging. */
632
633struct obj_unwind_info {
634 struct unwind_table_entry *table; /* Pointer to unwind info */
635 struct unwind_table_entry *cache; /* Pointer to last entry we found */
636 int last; /* Index of last entry */
637};
638
639#define OBJ_UNWIND_INFO(obj) ((struct obj_unwind_info *)obj->obj_private)
d3862cae 640
481faa25
JL
641extern CORE_ADDR target_read_pc PARAMS ((int));
642extern void target_write_pc PARAMS ((CORE_ADDR, int));
7486c68d 643extern CORE_ADDR skip_trampoline_code PARAMS ((CORE_ADDR, char *));
481faa25
JL
644
645#define TARGET_READ_PC(pid) target_read_pc (pid)
646#define TARGET_WRITE_PC(v,pid) target_write_pc (v,pid)
647
481faa25
JL
648/* For a number of horrible reasons we may have to adjust the location
649 of variables on the stack. Ugh. */
650#define HPREAD_ADJUST_STACK_ADDRESS(ADDR) hpread_adjust_stack_address(ADDR)
f4f0d174 651
481faa25 652extern int hpread_adjust_stack_address PARAMS ((CORE_ADDR));
3f550b59
FF
653
654/* If the current gcc for for this target does not produce correct debugging
655 information for float parameters, both prototyped and unprototyped, then
656 define this macro. This forces gdb to always assume that floats are
657 passed as doubles and then converted in the callee.
658
659 For the pa, it appears that the debug info marks the parameters as
660 floats regardless of whether the function is prototyped, but the actual
661 values are passed as doubles for the non-prototyped case and floats for
662 the prototyped case. Thus we choose to make the non-prototyped case work
663 for C and break the prototyped case, since the non-prototyped case is
664 probably much more common. (FIXME). */
665
666#define COERCE_FLOAT_TO_DOUBLE (current_language -> la_language == language_c)
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