projects / deliverable / binutils-gdb.git / blame
| Commit | Line | Data |
|---|---|---|
| 56056df7 AC |
1 | // OBSOLETE /* Parameters for execution on an HP PA-RISC machine running OSF1, for GDB. |
| 2 | // OBSOLETE Contributed by the Center for Software Science at the | |
| 3 | // OBSOLETE University of Utah (pa-gdb-bugs@cs.utah.edu). */ | |
| 4 | // OBSOLETE | |
| 5 | // OBSOLETE #include "regcache.h" | |
| 6 | // OBSOLETE | |
| 7 | // OBSOLETE /* Define offsets to access CPROC stack when it does not have | |
| 8 | // OBSOLETE * a kernel thread. | |
| 9 | // OBSOLETE */ | |
| 10 | // OBSOLETE #define MACHINE_CPROC_SP_OFFSET 20 | |
| 11 | // OBSOLETE #define MACHINE_CPROC_PC_OFFSET 16 | |
| 12 | // OBSOLETE #define MACHINE_CPROC_FP_OFFSET 12 | |
| 13 | // OBSOLETE | |
| 14 | // OBSOLETE /* | |
| 15 | // OBSOLETE * Software defined PSW masks. | |
| 16 | // OBSOLETE */ | |
| 17 | // OBSOLETE #define PSW_SS 0x10000000 /* Kernel managed single step */ | |
| 18 | // OBSOLETE | |
| 19 | // OBSOLETE /* Thread flavors used in re-setting the T bit. | |
| 20 | // OBSOLETE * @@ this is also bad for cross debugging. | |
| 21 | // OBSOLETE */ | |
| 22 | // OBSOLETE #define TRACE_FLAVOR HP800_THREAD_STATE | |
| 23 | // OBSOLETE #define TRACE_FLAVOR_SIZE HP800_THREAD_STATE_COUNT | |
| 24 | // OBSOLETE #define TRACE_SET(x,state) \ | |
| 25 | // OBSOLETE ((struct hp800_thread_state *)state)->cr22 |= PSW_SS | |
| 26 | // OBSOLETE #define TRACE_CLEAR(x,state) \ | |
| 27 | // OBSOLETE ((((struct hp800_thread_state *)state)->cr22 &= ~PSW_SS), 1) | |
| 28 | // OBSOLETE | |
| 29 | // OBSOLETE /* For OSF1 (Should be close if not identical to BSD, but I haven't | |
| 30 | // OBSOLETE tested it yet): | |
| 31 | // OBSOLETE | |
| 32 | // OBSOLETE The signal context structure pointer is always saved at the base | |
| 33 | // OBSOLETE of the frame + 0x4. | |
| 34 | // OBSOLETE | |
| 35 | // OBSOLETE We get the PC & SP directly from the sigcontext structure itself. | |
| 36 | // OBSOLETE For other registers we have to dive in a little deeper: | |
| 37 | // OBSOLETE | |
| 38 | // OBSOLETE The hardware save state pointer is at offset 0x10 within the | |
| 39 | // OBSOLETE signal context structure. | |
| 40 | // OBSOLETE | |
| 41 | // OBSOLETE Within the hardware save state, registers are found in the same order | |
| 42 | // OBSOLETE as the register numbers in GDB. */ | |
| 43 | // OBSOLETE | |
| 44 | // OBSOLETE #define FRAME_SAVED_PC_IN_SIGTRAMP(FRAME, TMP) \ | |
| 45 | // OBSOLETE { \ | |
| 46 | // OBSOLETE *(TMP) = read_memory_integer ((FRAME)->frame + 0x4, 4); \ | |
| 47 | // OBSOLETE *(TMP) = read_memory_integer (*(TMP) + 0x18, 4); \ | |
| 48 | // OBSOLETE } | |
| 49 | // OBSOLETE | |
| 50 | // OBSOLETE #define FRAME_BASE_BEFORE_SIGTRAMP(FRAME, TMP) \ | |
| 51 | // OBSOLETE { \ | |
| 52 | // OBSOLETE *(TMP) = read_memory_integer ((FRAME)->frame + 0x4, 4); \ | |
| 53 | // OBSOLETE *(TMP) = read_memory_integer (*(TMP) + 0x8, 4); \ | |
| 54 | // OBSOLETE } | |
| 55 | // OBSOLETE | |
| 56 | // OBSOLETE #define FRAME_FIND_SAVED_REGS_IN_SIGTRAMP(FRAME, FSR) \ | |
| 57 | // OBSOLETE { \ | |
| 58 | // OBSOLETE int i; \ | |
| 59 | // OBSOLETE CORE_ADDR TMP; \ | |
| 60 | // OBSOLETE TMP = read_memory_integer ((FRAME)->frame + 0x4, 4); \ | |
| 61 | // OBSOLETE TMP = read_memory_integer (TMP + 0x10, 4); \ | |
| 62 | // OBSOLETE for (i = 0; i < NUM_REGS; i++) \ | |
| 63 | // OBSOLETE { \ | |
| 64 | // OBSOLETE if (i == SP_REGNUM) \ | |
| 65 | // OBSOLETE (FSR)->regs[SP_REGNUM] = read_memory_integer (TMP + SP_REGNUM * 4, 4); \ | |
| 66 | // OBSOLETE else \ | |
| 67 | // OBSOLETE (FSR)->regs[i] = TMP + i * 4; \ | |
| 68 | // OBSOLETE } \ | |
| 69 | // OBSOLETE } | |
| 70 | // OBSOLETE | |
| 71 | // OBSOLETE /* OSF1 does not need the pc space queue restored. */ | |
| 72 | // OBSOLETE #define NO_PC_SPACE_QUEUE_RESTORE | |
| 73 | // OBSOLETE | |
| 74 | // OBSOLETE /* The mach kernel uses the recovery counter to implement single | |
| 75 | // OBSOLETE stepping. While this greatly simplifies the kernel support | |
| 76 | // OBSOLETE necessary for single stepping, it unfortunately does the wrong | |
| 77 | // OBSOLETE thing in the presense of a nullified instruction (gives control | |
| 78 | // OBSOLETE back two insns after the nullifed insn). This is an artifact | |
| 79 | // OBSOLETE of the HP architecture (recovery counter doesn't tick for | |
| 80 | // OBSOLETE nullified insns). | |
| 81 | // OBSOLETE | |
| 82 | // OBSOLETE Do our best to avoid losing in such situations. */ | |
| 83 | // OBSOLETE #define INSTRUCTION_NULLIFIED \ | |
| 84 | // OBSOLETE (({ \ | |
| 85 | // OBSOLETE int ipsw = (int)read_register(IPSW_REGNUM); \ | |
| 86 | // OBSOLETE if (ipsw & PSW_N) \ | |
| 87 | // OBSOLETE { \ | |
| 88 | // OBSOLETE int pcoqt = (int)read_register(PCOQ_TAIL_REGNUM); \ | |
| 89 | // OBSOLETE write_register(PCOQ_HEAD_REGNUM, pcoqt); \ | |
| 90 | // OBSOLETE write_register(PCOQ_TAIL_REGNUM, pcoqt + 0x4); \ | |
| 91 | // OBSOLETE write_register(IPSW_REGNUM, ipsw & ~(PSW_N | PSW_B | PSW_X)); \ | |
| 92 | // OBSOLETE stop_pc = pcoqt; \ | |
| 93 | // OBSOLETE } \ | |
| 94 | // OBSOLETE }), 0) | |
| 95 | // OBSOLETE | |
| 96 | // OBSOLETE /* It's mostly just the common stuff. */ | |
| 97 | // OBSOLETE | |
| 98 | // OBSOLETE #include "pa/tm-hppa.h" |