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a94019bc | 1 | /* Target machine sub-parameters for SPARC64, for GDB, the GNU debugger. |
9e350158 | 2 | This is included by other tm-*.h files to define SPARC64 cpu-related info. |
3f550b59 | 3 | Copyright 1994, 1995, 1996 Free Software Foundation, Inc. |
a94019bc DE |
4 | This is (obviously) based on the SPARC Vn (n<9) port. |
5 | Contributed by Doug Evans (dje@cygnus.com). | |
6 | ||
7 | This file is part of GDB. | |
8 | ||
9 | This program is free software; you can redistribute it and/or modify | |
10 | it under the terms of the GNU General Public License as published by | |
11 | the Free Software Foundation; either version 2 of the License, or | |
12 | (at your option) any later version. | |
13 | ||
14 | This program is distributed in the hope that it will be useful, | |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
18 | ||
19 | You should have received a copy of the GNU General Public License | |
20 | along with this program; if not, write to the Free Software | |
6c9638b4 | 21 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ |
a94019bc | 22 | |
9e350158 | 23 | #define GDB_TARGET_IS_SPARC64 |
a94019bc | 24 | |
9e350158 | 25 | #include "sparc/tm-sparc.h" |
a94019bc DE |
26 | |
27 | /* Stack has strict alignment. */ | |
28 | ||
29 | #undef STACK_ALIGN | |
30 | #define STACK_ALIGN(ADDR) (((ADDR)+15)&-16) | |
31 | ||
9e350158 | 32 | /* Number of machine registers. */ |
a94019bc DE |
33 | |
34 | #undef NUM_REGS | |
9e350158 | 35 | #define NUM_REGS 125 |
a94019bc DE |
36 | |
37 | /* Initializer for an array of names of registers. | |
38 | There should be NUM_REGS strings in this initializer. */ | |
39 | /* Some of these registers are only accessible from priviledged mode. | |
40 | They are here for kernel debuggers, etc. */ | |
41 | /* FIXME: icc and xcc are currently considered separate registers. | |
42 | This may have to change and consider them as just one (ccr). | |
0fb8b15a DE |
43 | Let's postpone this as long as we can. It's nice to be able to set |
44 | them individually. */ | |
a94019bc DE |
45 | /* FIXME: fcc0-3 are currently separate, even though they are also part of |
46 | fsr. May have to remove them but let's postpone this as long as | |
0fb8b15a | 47 | possible. It's nice to be able to set them individually. */ |
9e350158 DE |
48 | /* FIXME: Whether to include f33, f35, etc. here is not clear. |
49 | There are advantages and disadvantages. */ | |
a94019bc DE |
50 | |
51 | #undef REGISTER_NAMES | |
52 | #define REGISTER_NAMES \ | |
53 | { "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7", \ | |
54 | "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7", \ | |
55 | "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7", \ | |
56 | "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7", \ | |
57 | \ | |
58 | "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \ | |
59 | "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \ | |
60 | "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", \ | |
61 | "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", \ | |
62 | "f32", "f34", "f36", "f38", "f40", "f42", "f44", "f46", \ | |
63 | "f48", "f50", "f52", "f54", "f56", "f58", "f60", "f62", \ | |
64 | \ | |
0fb8b15a | 65 | "pc", "npc", "ccr", "fsr", "fprs", "y", "asi", \ |
9e350158 DE |
66 | "ver", "tick", "pil", "pstate", \ |
67 | "tstate", "tba", "tl", "tt", "tpc", "tnpc", "wstate", \ | |
a94019bc DE |
68 | "cwp", "cansave", "canrestore", "cleanwin", "otherwin", \ |
69 | "asr16", "asr17", "asr18", "asr19", "asr20", "asr21", \ | |
70 | "asr22", "asr23", "asr24", "asr25", "asr26", "asr27", \ | |
71 | "asr28", "asr29", "asr30", "asr31", \ | |
72 | /* These are here at the end to simplify removing them if we have to. */ \ | |
73 | "icc", "xcc", "fcc0", "fcc1", "fcc2", "fcc3" \ | |
74 | } | |
75 | ||
76 | /* Register numbers of various important registers. | |
77 | Note that some of these values are "real" register numbers, | |
78 | and correspond to the general registers of the machine, | |
79 | and some are "phony" register numbers which are too large | |
80 | to be actual register numbers as far as the user is concerned | |
81 | but do serve to get the desired values when passed to read_register. */ | |
82 | ||
83 | #if 0 /* defined in tm-sparc.h, replicated for doc purposes */ | |
84 | #define G0_REGNUM 0 /* %g0 */ | |
85 | #define G1_REGNUM 1 /* %g1 */ | |
86 | #define O0_REGNUM 8 /* %o0 */ | |
87 | #define SP_REGNUM 14 /* Contains address of top of stack, \ | |
88 | which is also the bottom of the frame. */ | |
89 | #define RP_REGNUM 15 /* Contains return address value, *before* \ | |
90 | any windows get switched. */ | |
91 | #define O7_REGNUM 15 /* Last local reg not saved on stack frame */ | |
92 | #define L0_REGNUM 16 /* First local reg that's saved on stack frame | |
93 | rather than in machine registers */ | |
94 | #define I0_REGNUM 24 /* %i0 */ | |
95 | #define FP_REGNUM 30 /* Contains address of executing stack frame */ | |
96 | #define I7_REGNUM 31 /* Last local reg saved on stack frame */ | |
97 | #define FP0_REGNUM 32 /* Floating point register 0 */ | |
98 | #endif | |
99 | ||
3b22d69a DE |
100 | #define FP_MAX_REGNUM 80 /* 1 + last fp reg number */ |
101 | ||
a94019bc DE |
102 | /* #undef v8 misc. regs */ |
103 | ||
104 | #undef Y_REGNUM | |
105 | #undef PS_REGNUM | |
106 | #undef WIM_REGNUM | |
107 | #undef TBR_REGNUM | |
108 | #undef PC_REGNUM | |
109 | #undef NPC_REGNUM | |
110 | #undef FPS_REGNUM | |
111 | #undef CPS_REGNUM | |
112 | ||
113 | /* v9 misc. and priv. regs */ | |
114 | ||
9e350158 DE |
115 | #define C0_REGNUM FP_MAX_REGNUM /* Start of control registers */ |
116 | #define PC_REGNUM (C0_REGNUM + 0) /* Current PC */ | |
117 | #define NPC_REGNUM (C0_REGNUM + 1) /* Next PC */ | |
118 | #define CCR_REGNUM (C0_REGNUM + 2) /* Condition Code Register (%xcc,%icc) */ | |
119 | #define FSR_REGNUM (C0_REGNUM + 3) /* Floating Point State */ | |
120 | #define FPRS_REGNUM (C0_REGNUM + 4) /* Floating Point Registers State */ | |
121 | #define Y_REGNUM (C0_REGNUM + 5) /* Temp register for multiplication, etc. */ | |
122 | #define ASI_REGNUM (C0_REGNUM + 6) /* Alternate Space Identifier */ | |
123 | #define VER_REGNUM (C0_REGNUM + 7) /* Version register */ | |
124 | #define TICK_REGNUM (C0_REGNUM + 8) /* Tick register */ | |
125 | #define PIL_REGNUM (C0_REGNUM + 9) /* Processor Interrupt Level */ | |
126 | #define PSTATE_REGNUM (C0_REGNUM + 10) /* Processor State */ | |
127 | #define TSTATE_REGNUM (C0_REGNUM + 11) /* Trap State */ | |
128 | #define TBA_REGNUM (C0_REGNUM + 12) /* Trap Base Address */ | |
129 | #define TL_REGNUM (C0_REGNUM + 13) /* Trap Level */ | |
130 | #define TT_REGNUM (C0_REGNUM + 14) /* Trap Type */ | |
131 | #define TPC_REGNUM (C0_REGNUM + 15) /* Trap pc */ | |
132 | #define TNPC_REGNUM (C0_REGNUM + 16) /* Trap npc */ | |
133 | #define WSTATE_REGNUM (C0_REGNUM + 17) /* Window State */ | |
134 | #define CWP_REGNUM (C0_REGNUM + 18) /* Current Window Pointer */ | |
135 | #define CANSAVE_REGNUM (C0_REGNUM + 19) /* Savable Windows */ | |
136 | #define CANRESTORE_REGNUM (C0_REGNUM + 20) /* Restorable Windows */ | |
137 | #define CLEANWIN_REGNUM (C0_REGNUM + 21) /* Clean Windows */ | |
138 | #define OTHERWIN_REGNUM (C0_REGNUM + 22) /* Other Windows */ | |
139 | #define ASR_REGNUM(n) (C0_REGNUM+(23-16)+(n)) /* Ancillary State Register | |
a94019bc | 140 | (n = 16...31) */ |
9e350158 DE |
141 | #define ICC_REGNUM (C0_REGNUM + 39) /* 32 bit condition codes */ |
142 | #define XCC_REGNUM (C0_REGNUM + 40) /* 64 bit condition codes */ | |
143 | #define FCC0_REGNUM (C0_REGNUM + 41) /* fp cc reg 0 */ | |
144 | #define FCC1_REGNUM (C0_REGNUM + 42) /* fp cc reg 1 */ | |
145 | #define FCC2_REGNUM (C0_REGNUM + 43) /* fp cc reg 2 */ | |
146 | #define FCC3_REGNUM (C0_REGNUM + 44) /* fp cc reg 3 */ | |
a94019bc DE |
147 | |
148 | /* Total amount of space needed to store our copies of the machine's | |
149 | register state, the array `registers'. | |
150 | Some of the registers aren't 64 bits, but it's a lot simpler just to assume | |
151 | they all are (since most of them are). */ | |
152 | #undef REGISTER_BYTES | |
9e350158 | 153 | #define REGISTER_BYTES (32*8+32*8+45*8) |
a94019bc DE |
154 | |
155 | /* Index within `registers' of the first byte of the space for | |
156 | register N. */ | |
157 | #undef REGISTER_BYTE | |
158 | #define REGISTER_BYTE(N) \ | |
159 | ((N) < 32 ? (N)*8 \ | |
160 | : (N) < 64 ? 32*8 + ((N)-32)*4 \ | |
3b22d69a DE |
161 | : (N) < C0_REGNUM ? 32*8 + 32*4 + ((N)-64)*8 \ |
162 | : 64*8 + ((N)-C0_REGNUM)*8) | |
a94019bc | 163 | |
9e350158 DE |
164 | /* Say how long (ordinary) registers are. This is a piece of bogosity |
165 | used in push_word and a few other places; REGISTER_RAW_SIZE is the | |
166 | real way to know how big a register is. */ | |
167 | ||
168 | #undef REGISTER_SIZE | |
169 | #define REGISTER_SIZE 8 | |
170 | ||
a94019bc DE |
171 | /* Number of bytes of storage in the actual machine representation |
172 | for register N. */ | |
173 | ||
174 | #undef REGISTER_RAW_SIZE | |
70943b5f DE |
175 | #define REGISTER_RAW_SIZE(N) \ |
176 | ((N) < 32 ? 8 : (N) < 64 ? 4 : 8) | |
a94019bc DE |
177 | |
178 | /* Number of bytes of storage in the program's representation | |
179 | for register N. */ | |
180 | ||
181 | #undef REGISTER_VIRTUAL_SIZE | |
70943b5f DE |
182 | #define REGISTER_VIRTUAL_SIZE(N) \ |
183 | ((N) < 32 ? 8 : (N) < 64 ? 4 : 8) | |
a94019bc DE |
184 | |
185 | /* Largest value REGISTER_RAW_SIZE can have. */ | |
186 | /* tm-sparc.h defines this as 8, but play it safe. */ | |
187 | ||
188 | #undef MAX_REGISTER_RAW_SIZE | |
9e350158 | 189 | #define MAX_REGISTER_RAW_SIZE 8 |
a94019bc DE |
190 | |
191 | /* Largest value REGISTER_VIRTUAL_SIZE can have. */ | |
192 | /* tm-sparc.h defines this as 8, but play it safe. */ | |
193 | ||
194 | #undef MAX_REGISTER_VIRTUAL_SIZE | |
9e350158 | 195 | #define MAX_REGISTER_VIRTUAL_SIZE 8 |
a94019bc DE |
196 | |
197 | /* Return the GDB type object for the "standard" data type | |
198 | of data in register N. */ | |
199 | ||
200 | #undef REGISTER_VIRTUAL_TYPE | |
201 | #define REGISTER_VIRTUAL_TYPE(N) \ | |
70943b5f DE |
202 | ((N) < 32 ? builtin_type_long_long \ |
203 | : (N) < 64 ? builtin_type_float \ | |
204 | : (N) < 80 ? builtin_type_double \ | |
205 | : builtin_type_long_long) | |
a94019bc | 206 | |
5029b114 DE |
207 | /* We use to support both 32 bit and 64 bit pointers. |
208 | We can't anymore because TARGET_PTR_BIT must now be a constant. */ | |
a94019bc | 209 | #undef TARGET_PTR_BIT |
5029b114 | 210 | #define TARGET_PTR_BIT 64 |
a94019bc | 211 | |
1cd3b163 DE |
212 | /* Does the specified function use the "struct returning" convention |
213 | or the "value returning" convention? The "value returning" convention | |
214 | almost invariably returns the entire value in registers. The | |
215 | "struct returning" convention often returns the entire value in | |
216 | memory, and passes a pointer (out of or into the function) saying | |
217 | where the value (is or should go). | |
218 | ||
219 | Since this sometimes depends on whether it was compiled with GCC, | |
220 | this is also an argument. This is used in call_function to build a | |
221 | stack, and in value_being_returned to print return values. | |
222 | ||
223 | On sparc64, all structs are returned via a pointer. */ | |
224 | ||
225 | #undef USE_STRUCT_CONVENTION | |
226 | #define USE_STRUCT_CONVENTION(gcc_p, type) 1 | |
227 | ||
a94019bc DE |
228 | /* Store the address of the place in which to copy the structure the |
229 | subroutine will return. This is called from call_function. */ | |
230 | /* FIXME: V9 uses %o0 for this. */ | |
231 | ||
232 | #undef STORE_STRUCT_RETURN | |
233 | #define STORE_STRUCT_RETURN(ADDR, SP) \ | |
234 | { target_write_memory ((SP)+(16*8), (char *)&(ADDR), 8); } | |
235 | ||
a94019bc DE |
236 | /* Return number of bytes at start of arglist that are not really args. */ |
237 | ||
238 | #undef FRAME_ARGS_SKIP | |
239 | #define FRAME_ARGS_SKIP 136 | |
240 | \f | |
a94019bc DE |
241 | /* We need two arguments (in general) to the "info frame" command. |
242 | Note that the definition of this macro implies that there exists a | |
243 | function "setup_arbitrary_frame" in sparc-tdep.c */ | |
244 | ||
245 | #undef SETUP_ARBITRARY_FRAME /*FIXME*/ | |
246 | #undef FRAME_SPECIFICATION_DYADIC | |
247 | #define FRAME_SPECIFICATION_DYADIC | |
248 | ||
3b22d69a DE |
249 | /* To print every pair of float registers as a double, we use this hook. |
250 | We also print the condition code registers in a readable format | |
251 | (FIXME: can expand this to all control regs). */ | |
a94019bc DE |
252 | |
253 | #undef PRINT_REGISTER_HOOK | |
254 | #define PRINT_REGISTER_HOOK(regno) \ | |
3b22d69a DE |
255 | sparc_print_register_hook (regno) |
256 | ||
257 | /* Offsets into jmp_buf. | |
258 | FIXME: This was borrowed from the v8 stuff and will probably have to change | |
259 | for v9. */ | |
260 | ||
261 | #define JB_ELEMENT_SIZE 8 /* Size of each element in jmp_buf */ | |
262 | ||
263 | #define JB_ONSSTACK 0 | |
264 | #define JB_SIGMASK 1 | |
265 | #define JB_SP 2 | |
266 | #define JB_PC 3 | |
267 | #define JB_NPC 4 | |
268 | #define JB_PSR 5 | |
269 | #define JB_G1 6 | |
270 | #define JB_O0 7 | |
271 | #define JB_WBCNT 8 | |
272 | ||
273 | /* Figure out where the longjmp will land. We expect that we have just entered | |
274 | longjmp and haven't yet setup the stack frame, so the args are still in the | |
275 | output regs. %o0 (O0_REGNUM) points at the jmp_buf structure from which we | |
276 | extract the pc (JB_PC) that we will land at. The pc is copied into ADDR. | |
277 | This routine returns true on success */ | |
278 | ||
279 | extern int | |
280 | get_longjmp_target PARAMS ((CORE_ADDR *)); | |
281 | ||
282 | #define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR) |