2003-05-03 Andrew Cagney <cagney@redhat.com>
[deliverable/binutils-gdb.git] / gdb / config / sparc / tm-sp64.h
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c906108c
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1/* Target machine sub-parameters for SPARC64, for GDB, the GNU debugger.
2 This is included by other tm-*.h files to define SPARC64 cpu-related info.
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3 Copyright 1994, 1995, 1996, 1998, 1999, 2000
4 Free Software Foundation, Inc.
c906108c
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5 This is (obviously) based on the SPARC Vn (n<9) port.
6 Contributed by Doug Evans (dje@cygnus.com).
7 Further modified by Bob Manson (manson@cygnus.com).
8
c5aa993b 9 This file is part of GDB.
c906108c 10
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11 This program is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 2 of the License, or
14 (at your option) any later version.
c906108c 15
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16 This program is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
c906108c 20
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21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software
23 Foundation, Inc., 59 Temple Place - Suite 330,
24 Boston, MA 02111-1307, USA. */
c906108c 25
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26struct type;
27
64c4637f 28#define GDB_MULTI_ARCH GDB_MULTI_ARCH_PARTIAL
c906108c 29
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30#ifndef GDB_TARGET_IS_SPARC64
31#define GDB_TARGET_IS_SPARC64 1
32#endif
33
34#include "sparc/tm-sparc.h"
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35
36/* Eeeew. Ok, we have to assume (for now) that the processor really is
37 in sparc64 mode. While this is the same instruction sequence as
38 on the Sparc, the stack frames are offset by +2047 (and the arguments
39 are 8 bytes instead of 4). */
40/* Instructions are:
41 std %f10, [ %fp + 0x7a7 ]
42 std %f8, [ %fp + 0x79f ]
43 std %f6, [ %fp + 0x797 ]
44 std %f4, [ %fp + 0x78f ]
45 std %f2, [ %fp + 0x787 ]
46 std %f0, [ %fp + 0x77f ]
47 std %g6, [ %fp + 0x777 ]
48 std %g4, [ %fp + 0x76f ]
49 std %g2, [ %fp + 0x767 ]
50 std %g0, [ %fp + 0x75f ]
51 std %fp, [ %fp + 0x757 ]
52 std %i4, [ %fp + 0x74f ]
53 std %i2, [ %fp + 0x747 ]
54 std %i0, [ %fp + 0x73f ]
55 nop
56 nop
57 nop
58 nop
59 rd %tbr, %o0
60 st %o0, [ %fp + 0x72b ]
61 rd %tpc, %o0
62 st %o0, [ %fp + 0x727 ]
63 rd %psr, %o0
64 st %o0, [ %fp + 0x723 ]
65 rd %y, %o0
66 st %o0, [ %fp + 0x71f ]
67 ldx [ %sp + 0x8a7 ], %o5
68 ldx [ %sp + 0x89f ], %o4
69 ldx [ %sp + 0x897 ], %o3
70 ldx [ %sp + 0x88f ], %o2
71 ldx [ %sp + 0x887 ], %o1
72 call %g0
73 ldx [ %sp + 0x87f ], %o0
74 nop
75 ta 1
76 nop
77 nop
c5aa993b 78 */
c906108c 79
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80#if !defined (GDB_MULTI_ARCH) || (GDB_MULTI_ARCH == 0)
81/*
82 * The following defines must go away for MULTI_ARCH.
83 */
84
85#ifndef DO_CALL_DUMMY_ON_STACK
86
87/*
88 * These defines will suffice for the AT_ENTRY_POINT call dummy method.
89 */
90
91#undef CALL_DUMMY
92#define CALL_DUMMY {0}
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93#undef DEPRECATED_CALL_DUMMY_LENGTH
94#define DEPRECATED_CALL_DUMMY_LENGTH 0
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95#undef CALL_DUMMY_CALL_OFFSET
96#define CALL_DUMMY_CALL_OFFSET 0
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97#undef DEPRECATED_CALL_DUMMY_START_OFFSET
98#define DEPRECATED_CALL_DUMMY_START_OFFSET 0
99#undef DEPRECATED_CALL_DUMMY_BREAKPOINT_OFFSET
100#define DEPRECATED_CALL_DUMMY_BREAKPOINT_OFFSET 0
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101#undef CALL_DUMMY_LOCATION
102#define CALL_DUMMY_LOCATION AT_ENTRY_POINT
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103#undef DEPRECATED_PC_IN_CALL_DUMMY
104#define DEPRECATED_PC_IN_CALL_DUMMY(pc, sp, frame_address) deprecated_pc_in_call_dummy_at_entry_point (pc, sp, frame_address)
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105#undef DEPRECATED_CALL_DUMMY_STACK_ADJUST
106#define DEPRECATED_CALL_DUMMY_STACK_ADJUST 128
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107#undef DEPRECATED_SIZEOF_CALL_DUMMY_WORDS
108#define DEPRECATED_SIZEOF_CALL_DUMMY_WORDS 0
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109#undef CALL_DUMMY_ADDRESS
110#define CALL_DUMMY_ADDRESS() entry_point_address()
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111#undef DEPRECATED_FIX_CALL_DUMMY
112#define DEPRECATED_FIX_CALL_DUMMY(DUMMYNAME, PC, FUN, NARGS, ARGS, TYPE, GCC_P)
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113#undef DEPRECATED_PUSH_RETURN_ADDRESS
114#define DEPRECATED_PUSH_RETURN_ADDRESS(PC, SP) sparc_at_entry_push_return_address (PC, SP)
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115extern CORE_ADDR sparc_at_entry_push_return_address (CORE_ADDR pc,
116 CORE_ADDR sp);
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117
118#undef STORE_STRUCT_RETURN
119#define STORE_STRUCT_RETURN(ADDR, SP) \
120 sparc_at_entry_store_struct_return (ADDR, SP)
570b8f7c 121extern void sparc_at_entry_store_struct_return (CORE_ADDR addr, CORE_ADDR sp);
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122
123
124#else
125/*
126 * Old call dummy method, with CALL_DUMMY on the stack.
127 */
128
129#undef CALL_DUMMY
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130#define CALL_DUMMY { 0x9de3bec0fd3fa7f7LL, 0xf93fa7eff53fa7e7LL,\
131 0xf13fa7dfed3fa7d7LL, 0xe93fa7cfe53fa7c7LL,\
132 0xe13fa7bfdd3fa7b7LL, 0xd93fa7afd53fa7a7LL,\
133 0xd13fa79fcd3fa797LL, 0xc93fa78fc53fa787LL,\
134 0xc13fa77fcc3fa777LL, 0xc83fa76fc43fa767LL,\
135 0xc03fa75ffc3fa757LL, 0xf83fa74ff43fa747LL,\
136 0xf03fa73f01000000LL, 0x0100000001000000LL,\
137 0x0100000091580000LL, 0xd027a72b93500000LL,\
138 0xd027a72791480000LL, 0xd027a72391400000LL,\
139 0xd027a71fda5ba8a7LL, 0xd85ba89fd65ba897LL,\
140 0xd45ba88fd25ba887LL, 0x9fc02000d05ba87fLL,\
141 0x0100000091d02001LL, 0x0100000001000000LL }
142
143
144/* 128 is to reserve space to write the %i/%l registers that will be restored
145 when we resume. */
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146#undef DEPRECATED_CALL_DUMMY_STACK_ADJUST
147#define DEPRECATED_CALL_DUMMY_STACK_ADJUST 128
c906108c 148
5af923b0 149/* Size of the call dummy in bytes. */
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150#undef DEPRECATED_CALL_DUMMY_LENGTH
151#define DEPRECATED_CALL_DUMMY_LENGTH 192
c906108c 152
5af923b0 153/* Offset within CALL_DUMMY of the 'call' instruction. */
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154#undef DEPRECATED_CALL_DUMMY_START_OFFSET
155#define DEPRECATED_CALL_DUMMY_START_OFFSET 148
c906108c 156
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157/* Offset within CALL_DUMMY of the 'call' instruction. */
158#undef CALL_DUMMY_CALL_OFFSET
b1e29e33 159#define CALL_DUMMY_CALL_OFFSET (DEPRECATED_CALL_DUMMY_START_OFFSET + (5 * 4))
c906108c 160
5af923b0 161/* Offset within CALL_DUMMY of the 'ta 1' instruction. */
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162#undef DEPRECATED_CALL_DUMMY_BREAKPOINT_OFFSET
163#define DEPRECATED_CALL_DUMMY_BREAKPOINT_OFFSET (DEPRECATED_CALL_DUMMY_START_OFFSET + (8 * 4))
c906108c 164
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165/* Call dummy will be located on the stack. */
166#undef CALL_DUMMY_LOCATION
167#define CALL_DUMMY_LOCATION ON_STACK
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168#undef DEPRECATED_PC_IN_CALL_DUMMY
169#define DEPRECATED_PC_IN_CALL_DUMMY(pc, sp, frame_address) deprecated_pc_in_call_dummy_on_stack (pc, sp, frame_address)
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170
171/* Insert the function address into the call dummy. */
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172#undef DEPRECATED_FIX_CALL_DUMMY
173#define DEPRECATED_FIX_CALL_DUMMY(dummyname, pc, fun, nargs, args, type, gcc_p) \
5af923b0 174 sparc_fix_call_dummy (dummyname, pc, fun, type, gcc_p)
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175void sparc_fix_call_dummy (char *dummy, CORE_ADDR pc, CORE_ADDR fun,
176 struct type *value_type, int using_gcc);
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177
178
179/* The remainder of these will accept the default definition. */
b1e29e33 180#undef DEPRECATED_SIZEOF_CALL_DUMMY_WORDS
5e074003 181#undef DEPRECATED_PUSH_RETURN_ADDRESS
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182#undef CALL_DUMMY_ADDRESS
183#undef STORE_STRUCT_RETURN
184
185#endif
186
187/* Does the specified function use the "struct returning" convention
188 or the "value returning" convention? The "value returning" convention
189 almost invariably returns the entire value in registers. The
190 "struct returning" convention often returns the entire value in
191 memory, and passes a pointer (out of or into the function) saying
192 where the value (is or should go).
193
194 Since this sometimes depends on whether it was compiled with GCC,
195 this is also an argument. This is used in call_function to build a
196 stack, and in value_being_returned to print return values.
197
080fe24b 198 On Sparc64, we only pass pointers to structs if they're larger than
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199 32 bytes. Otherwise they're stored in %o0-%o3 (floating-point
200 values go into %fp0-%fp3). */
201
202#undef USE_STRUCT_CONVENTION
203#define USE_STRUCT_CONVENTION(gcc_p, type) (TYPE_LENGTH (type) > 32)
204
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205CORE_ADDR sparc64_push_arguments (int,
206 struct value **, CORE_ADDR, int, CORE_ADDR);
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207#undef DEPRECATED_PUSH_ARGUMENTS
208#define DEPRECATED_PUSH_ARGUMENTS(A,B,C,D,E) \
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209 (sparc64_push_arguments ((A), (B), (C), (D), (E)))
210
211/* Store the address of the place in which to copy the structure the
212 subroutine will return. This is called from call_function. */
213/* FIXME: V9 uses %o0 for this. */
214
215#undef STORE_STRUCT_RETURN
216#define STORE_STRUCT_RETURN(ADDR, SP) \
217 { target_write_memory ((SP)+(16*8), (char *)&(ADDR), 8); }
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218
219/* Stack must be aligned on 128-bit boundaries when synthesizing
220 function calls. */
221
222#undef STACK_ALIGN
223#define STACK_ALIGN(ADDR) (((ADDR) + 15 ) & -16)
224
c906108c
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225/* Initializer for an array of names of registers.
226 There should be NUM_REGS strings in this initializer. */
227/* Some of these registers are only accessible from priviledged mode.
228 They are here for kernel debuggers, etc. */
229/* FIXME: icc and xcc are currently considered separate registers.
230 This may have to change and consider them as just one (ccr).
231 Let's postpone this as long as we can. It's nice to be able to set
232 them individually. */
233/* FIXME: fcc0-3 are currently separate, even though they are also part of
234 fsr. May have to remove them but let's postpone this as long as
235 possible. It's nice to be able to set them individually. */
236/* FIXME: Whether to include f33, f35, etc. here is not clear.
237 There are advantages and disadvantages. */
238
239#undef REGISTER_NAMES
240#define REGISTER_NAMES \
241{ "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7", \
242 "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7", \
243 "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7", \
244 "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7", \
245 \
246 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
247 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \
248 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", \
249 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", \
250 "f32", "f34", "f36", "f38", "f40", "f42", "f44", "f46", \
251 "f48", "f50", "f52", "f54", "f56", "f58", "f60", "f62", \
252 \
253 "pc", "npc", "ccr", "fsr", "fprs", "y", "asi", \
254 "ver", "tick", "pil", "pstate", \
255 "tstate", "tba", "tl", "tt", "tpc", "tnpc", "wstate", \
256 "cwp", "cansave", "canrestore", "cleanwin", "otherwin", \
257 "asr16", "asr17", "asr18", "asr19", "asr20", "asr21", \
258 "asr22", "asr23", "asr24", "asr25", "asr26", "asr27", \
259 "asr28", "asr29", "asr30", "asr31", \
260 /* These are here at the end to simplify removing them if we have to. */ \
261 "icc", "xcc", "fcc0", "fcc1", "fcc2", "fcc3" \
262}
263
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264#undef REG_STRUCT_HAS_ADDR
265#define REG_STRUCT_HAS_ADDR(gcc_p,type) (TYPE_LENGTH (type) > 32)
266
267extern CORE_ADDR sparc64_read_sp ();
268extern CORE_ADDR sparc64_read_fp ();
a14ed312 269extern void sparc64_write_sp (CORE_ADDR);
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270
271#define TARGET_READ_SP() (sparc64_read_sp ())
0ba6dca9 272#define DEPRECATED_TARGET_READ_FP() (sparc64_read_fp ())
6c0e89ed 273#define DEPRECATED_DUMMY_WRITE_SP(X) (sparc64_write_sp (X))
5af923b0 274
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275#undef DEPRECATED_EXTRACT_RETURN_VALUE
276#define DEPRECATED_EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
5af923b0 277 sp64_extract_return_value(TYPE, REGBUF, VALBUF, 0)
a14ed312 278extern void sp64_extract_return_value (struct type *, char[], char *, int);
5af923b0 279
c906108c
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280/* Register numbers of various important registers.
281 Note that some of these values are "real" register numbers,
282 and correspond to the general registers of the machine,
283 and some are "phony" register numbers which are too large
284 to be actual register numbers as far as the user is concerned
285 but do serve to get the desired values when passed to read_register. */
286
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287#if 0 /* defined in tm-sparc.h, replicated
288 for doc purposes */
c5aa993b 289#define G0_REGNUM 0 /* %g0 */
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290#define G1_REGNUM 1 /* %g1 */
291#define O0_REGNUM 8 /* %o0 */
292#define SP_REGNUM 14 /* Contains address of top of stack, \
293 which is also the bottom of the frame. */
294#define RP_REGNUM 15 /* Contains return address value, *before* \
295 any windows get switched. */
296#define O7_REGNUM 15 /* Last local reg not saved on stack frame */
297#define L0_REGNUM 16 /* First local reg that's saved on stack frame
298 rather than in machine registers */
299#define I0_REGNUM 24 /* %i0 */
0ba6dca9 300#define DEPRECATED_FP_REGNUM 30 /* Contains address of executing stack frame */
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301#define I7_REGNUM 31 /* Last local reg saved on stack frame */
302#define FP0_REGNUM 32 /* Floating point register 0 */
303#endif
304
5af923b0 305/*#define FP_MAX_REGNUM 80*/ /* 1 + last fp reg number */
c906108c
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306
307/* #undef v8 misc. regs */
308
309#undef Y_REGNUM
310#undef PS_REGNUM
311#undef WIM_REGNUM
312#undef TBR_REGNUM
313#undef PC_REGNUM
314#undef NPC_REGNUM
315#undef FPS_REGNUM
316#undef CPS_REGNUM
317
318/* v9 misc. and priv. regs */
319
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320#define C0_REGNUM 80 /* Start of control registers */
321
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322#define PC_REGNUM (C0_REGNUM + 0) /* Current PC */
323#define NPC_REGNUM (C0_REGNUM + 1) /* Next PC */
324#define CCR_REGNUM (C0_REGNUM + 2) /* Condition Code Register (%xcc,%icc) */
325#define FSR_REGNUM (C0_REGNUM + 3) /* Floating Point State */
326#define FPRS_REGNUM (C0_REGNUM + 4) /* Floating Point Registers State */
327#define Y_REGNUM (C0_REGNUM + 5) /* Temp register for multiplication, etc. */
328#define ASI_REGNUM (C0_REGNUM + 6) /* Alternate Space Identifier */
329#define VER_REGNUM (C0_REGNUM + 7) /* Version register */
330#define TICK_REGNUM (C0_REGNUM + 8) /* Tick register */
331#define PIL_REGNUM (C0_REGNUM + 9) /* Processor Interrupt Level */
332#define PSTATE_REGNUM (C0_REGNUM + 10) /* Processor State */
333#define TSTATE_REGNUM (C0_REGNUM + 11) /* Trap State */
334#define TBA_REGNUM (C0_REGNUM + 12) /* Trap Base Address */
335#define TL_REGNUM (C0_REGNUM + 13) /* Trap Level */
336#define TT_REGNUM (C0_REGNUM + 14) /* Trap Type */
337#define TPC_REGNUM (C0_REGNUM + 15) /* Trap pc */
338#define TNPC_REGNUM (C0_REGNUM + 16) /* Trap npc */
339#define WSTATE_REGNUM (C0_REGNUM + 17) /* Window State */
340#define CWP_REGNUM (C0_REGNUM + 18) /* Current Window Pointer */
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341#define CANSAVE_REGNUM (C0_REGNUM + 19) /* Savable Windows */
342#define CANRESTORE_REGNUM (C0_REGNUM + 20) /* Restorable Windows */
343#define CLEANWIN_REGNUM (C0_REGNUM + 21) /* Clean Windows */
344#define OTHERWIN_REGNUM (C0_REGNUM + 22) /* Other Windows */
345#define ASR_REGNUM(n) (C0_REGNUM+(23-16)+(n)) /* Ancillary State Register
346 (n = 16...31) */
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347#define ICC_REGNUM (C0_REGNUM + 39) /* 32 bit condition codes */
348#define XCC_REGNUM (C0_REGNUM + 40) /* 64 bit condition codes */
349#define FCC0_REGNUM (C0_REGNUM + 41) /* fp cc reg 0 */
350#define FCC1_REGNUM (C0_REGNUM + 42) /* fp cc reg 1 */
351#define FCC2_REGNUM (C0_REGNUM + 43) /* fp cc reg 2 */
352#define FCC3_REGNUM (C0_REGNUM + 44) /* fp cc reg 3 */
c906108c 353
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354/* Number of machine registers. */
355
356#undef NUM_REGS
357#define NUM_REGS 125
358
c906108c
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359/* Total amount of space needed to store our copies of the machine's
360 register state, the array `registers'.
361 Some of the registers aren't 64 bits, but it's a lot simpler just to assume
362 they all are (since most of them are). */
363#undef REGISTER_BYTES
364#define REGISTER_BYTES (32*8+32*8+45*8)
365
366/* Index within `registers' of the first byte of the space for
367 register N. */
368#undef REGISTER_BYTE
369#define REGISTER_BYTE(N) \
370 ((N) < 32 ? (N)*8 \
371 : (N) < 64 ? 32*8 + ((N)-32)*4 \
372 : (N) < C0_REGNUM ? 32*8 + 32*4 + ((N)-64)*8 \
373 : 64*8 + ((N)-C0_REGNUM)*8)
374
375/* Say how long (ordinary) registers are. This is a piece of bogosity
376 used in push_word and a few other places; REGISTER_RAW_SIZE is the
377 real way to know how big a register is. */
378
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379#undef DEPRECATED_REGISTER_SIZE
380#define DEPRECATED_REGISTER_SIZE 8
c906108c
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381
382/* Number of bytes of storage in the actual machine representation
383 for register N. */
384
385#undef REGISTER_RAW_SIZE
386#define REGISTER_RAW_SIZE(N) \
387 ((N) < 32 ? 8 : (N) < 64 ? 4 : 8)
388
389/* Number of bytes of storage in the program's representation
390 for register N. */
391
392#undef REGISTER_VIRTUAL_SIZE
393#define REGISTER_VIRTUAL_SIZE(N) \
394 ((N) < 32 ? 8 : (N) < 64 ? 4 : 8)
395
396/* Largest value REGISTER_RAW_SIZE can have. */
397/* tm-sparc.h defines this as 8, but play it safe. */
398
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399#undef DEPRECATED_MAX_REGISTER_RAW_SIZE
400#define DEPRECATED_MAX_REGISTER_RAW_SIZE 8
c906108c
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401
402/* Largest value REGISTER_VIRTUAL_SIZE can have. */
403/* tm-sparc.h defines this as 8, but play it safe. */
404
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405#undef DEPRECATED_MAX_REGISTER_VIRTUAL_SIZE
406#define DEPRECATED_MAX_REGISTER_VIRTUAL_SIZE 8
c906108c
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407
408/* Return the GDB type object for the "standard" data type
409 of data in register N. */
410
411#undef REGISTER_VIRTUAL_TYPE
412#define REGISTER_VIRTUAL_TYPE(N) \
413 ((N) < 32 ? builtin_type_long_long \
414 : (N) < 64 ? builtin_type_float \
415 : (N) < 80 ? builtin_type_double \
416 : builtin_type_long_long)
417
418/* We use to support both 32 bit and 64 bit pointers.
419 We can't anymore because TARGET_PTR_BIT must now be a constant. */
420#undef TARGET_PTR_BIT
421#define TARGET_PTR_BIT 64
422
423/* Longs are 64 bits. */
424#undef TARGET_LONG_BIT
425#define TARGET_LONG_BIT 64
426
427#undef TARGET_LONG_LONG_BIT
428#define TARGET_LONG_LONG_BIT 64
429
c906108c
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430/* Return number of bytes at start of arglist that are not really args. */
431
432#undef FRAME_ARGS_SKIP
433#define FRAME_ARGS_SKIP 136
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434
435#endif /* GDB_MULTI_ARCH */
c906108c
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436\f
437/* Offsets into jmp_buf.
438 FIXME: This was borrowed from the v8 stuff and will probably have to change
439 for v9. */
440
441#define JB_ELEMENT_SIZE 8 /* Size of each element in jmp_buf */
442
443#define JB_ONSSTACK 0
444#define JB_SIGMASK 1
445#define JB_SP 2
446#define JB_PC 3
447#define JB_NPC 4
448#define JB_PSR 5
449#define JB_G1 6
450#define JB_O0 7
451#define JB_WBCNT 8
452
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453/* Figure out where the longjmp will land. We expect that we have
454 just entered longjmp and haven't yet setup the stack frame, so the
455 args are still in the output regs. %o0 (O0_REGNUM) points at the
456 jmp_buf structure from which we extract the pc (JB_PC) that we will
457 land at. The pc is copied into ADDR. This routine returns true on
458 success */
c906108c 459
a14ed312 460extern int get_longjmp_target (CORE_ADDR *);
c906108c
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461
462#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)
463
c906108c
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464#undef TM_PRINT_INSN_MACH
465#define TM_PRINT_INSN_MACH bfd_mach_sparc_v9a
466
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