[deliverable/binutils-gdb.git] / gdb / config / sparc / tm-sparc.h

/* Target machine sub-parameters for SPARC, for GDB, the GNU debugger.
   This is included by other tm-*.h files to define SPARC cpu-related info.
   Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
   1998, 1999, 2000, 2001, 2002, 2003
   Free Software Foundation, Inc.
   Contributed by Michael Tiemann (tiemann@mcc.com)

   This file is part of GDB.

   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 2 of the License, or
   (at your option) any later version.

   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with this program; if not, write to the Free Software
   Foundation, Inc., 59 Temple Place - Suite 330,
   Boston, MA 02111-1307, USA.  */

#include "regcache.h"

struct type;
struct value;
struct frame_info;

/*
 * The following enums are purely for the convenience of the GDB 
 * developer, when debugging GDB.
 */

enum {	/* Sparc general registers, for all sparc versions.  */
  G0_REGNUM, G1_REGNUM, G2_REGNUM, G3_REGNUM, 
  G4_REGNUM, G5_REGNUM, G6_REGNUM, G7_REGNUM, 
  O0_REGNUM, O1_REGNUM, O2_REGNUM, O3_REGNUM, 
  O4_REGNUM, O5_REGNUM, O6_REGNUM, O7_REGNUM,
  L0_REGNUM, L1_REGNUM, L2_REGNUM, L3_REGNUM, 
  L4_REGNUM, L5_REGNUM, L6_REGNUM, L7_REGNUM, 
  I0_REGNUM, I1_REGNUM, I2_REGNUM, I3_REGNUM, 
  I4_REGNUM, I5_REGNUM, I6_REGNUM, I7_REGNUM,
  FP0_REGNUM 		/* Floating point register 0 */
};

enum {	/* Sparc general registers, alternate names.  */
  R0_REGNUM,  R1_REGNUM,  R2_REGNUM,  R3_REGNUM, 
  R4_REGNUM,  R5_REGNUM,  R6_REGNUM,  R7_REGNUM, 
  R8_REGNUM,  R9_REGNUM,  R10_REGNUM, R11_REGNUM, 
  R12_REGNUM, R13_REGNUM, R14_REGNUM, R15_REGNUM, 
  R16_REGNUM, R17_REGNUM, R18_REGNUM, R19_REGNUM, 
  R20_REGNUM, R21_REGNUM, R22_REGNUM, R23_REGNUM, 
  R24_REGNUM, R25_REGNUM, R26_REGNUM, R27_REGNUM, 
  R28_REGNUM, R29_REGNUM, R30_REGNUM, R31_REGNUM
};

enum {			/* Sparc32 control registers.  */
  PS_REGNUM  = 65, 	/* PC, NPC, and Y are omitted because */
  WIM_REGNUM = 66,	/* they have different values depending on */
  TBR_REGNUM = 67,	/* 32-bit / 64-bit mode.  */
  FPS_REGNUM = 70,
  CPS_REGNUM = 71
};

/* v9 misc. and priv. regs */

/* Note: specifying values explicitly for documentation purposes.  */
enum {	/* Sparc64 control registers, excluding Y, PC, and NPC.  */
  CCR_REGNUM = 82,		/* Condition Code Register (%xcc,%icc) */
  FSR_REGNUM = 83,		/* Floating Point State */
  FPRS_REGNUM = 84,		/* Floating Point Registers State */
  ASI_REGNUM = 86,		/* Alternate Space Identifier */
  VER_REGNUM = 87,		/* Version register */
  TICK_REGNUM = 88,		/* Tick register */
  PIL_REGNUM = 89, 		/* Processor Interrupt Level */
  PSTATE_REGNUM = 90,		/* Processor State */
  TSTATE_REGNUM = 91,		/* Trap State */
  TBA_REGNUM = 92,		/* Trap Base Address */
  TL_REGNUM = 93,		/* Trap Level */
  TT_REGNUM = 94,		/* Trap Type */
  TPC_REGNUM = 95,		/* Trap pc */
  TNPC_REGNUM = 96,		/* Trap npc */
  WSTATE_REGNUM = 97,		/* Window State */
  CWP_REGNUM = 98,		/* Current Window Pointer */
  CANSAVE_REGNUM = 99,		/* Savable Windows */
  CANRESTORE_REGNUM = 100,	/* Restorable Windows */
  CLEANWIN_REGNUM = 101,	/* Clean Windows */
  OTHERWIN_REGNUM = 102,	/* Other Windows */
  ASR16_REGNUM = 103,		/* Ancillary State Registers */
  ASR17_REGNUM = 104,
  ASR18_REGNUM = 105,
  ASR19_REGNUM = 106,
  ASR20_REGNUM = 107,
  ASR21_REGNUM = 108,
  ASR22_REGNUM = 109,
  ASR23_REGNUM = 110,
  ASR24_REGNUM = 111,
  ASR25_REGNUM = 112,
  ASR26_REGNUM = 113,
  ASR27_REGNUM = 114,
  ASR28_REGNUM = 115,
  ASR29_REGNUM = 116,
  ASR30_REGNUM = 117,
  ASR31_REGNUM = 118,
  ICC_REGNUM   = 119,		/* 32 bit condition codes */
  XCC_REGNUM   = 120,		/* 64 bit condition codes */
  FCC0_REGNUM  = 121,		/* fp cc reg 0 */
  FCC1_REGNUM  = 122,		/* fp cc reg 1 */
  FCC2_REGNUM  = 123,		/* fp cc reg 2 */
  FCC3_REGNUM  = 124		/* fp cc reg 3 */
};

/*
 * Make sparc target multi-archable: April 2000
 */

/* Multi-arch definition of TARGET_IS_SPARC64, TARGET_ELF64 */
#undef  GDB_TARGET_IS_SPARC64
#define GDB_TARGET_IS_SPARC64 \
     (sparc_intreg_size () == 8)
#undef  TARGET_ELF64
#define TARGET_ELF64 \
     (sparc_intreg_size () == 8)
extern int sparc_intreg_size (void);

/*
 * The following defines should ONLY appear for MULTI_ARCH.
 */

/* Multi-arch the nPC and Y registers.  */
#define Y_REGNUM              (sparc_y_regnum ())

/* On the Sun 4 under SunOS, the compile will leave a fake insn which
   encodes the structure size being returned.  If we detect such
   a fake insn, step past it.  */

#define PC_ADJUST(PC) sparc_pc_adjust (PC)
extern CORE_ADDR sparc_pc_adjust (CORE_ADDR);

/* If an argument is declared "register", Sun cc will keep it in a register,
   never saving it onto the stack.  So we better not believe the "p" symbol
   descriptor stab.  */

#define USE_REGISTER_NOT_ARG

/* For acc, there's no need to correct LBRAC entries by guessing how
   they should work.  In fact, this is harmful because the LBRAC
   entries now all appear at the end of the function, not intermixed
   with the SLINE entries.  n_opt_found detects acc for Solaris binaries;
   function_stab_type detects acc for SunOS4 binaries.

   For binary from SunOS4 /bin/cc, need to correct LBRAC's.

   For gcc, like acc, don't correct.  */

#define	SUN_FIXED_LBRAC_BUG \
  (n_opt_found \
   || function_stab_type == N_STSYM \
   || function_stab_type == N_GSYM \
   || processing_gcc_compilation)

/* Do variables in the debug stabs occur after the N_LBRAC or before it?
   acc: after, gcc: before, SunOS4 /bin/cc: before.  */

#define VARIABLES_INSIDE_BLOCK(desc, gcc_p) \
  (!(gcc_p) \
   && (n_opt_found \
       || function_stab_type == N_STSYM \
       || function_stab_type == N_GSYM))

/* Sequence of bytes for breakpoint instruction (ta 1). */

extern const unsigned char *sparc_breakpoint_from_pc (CORE_ADDR *pc, int *len);
#define BREAKPOINT_FROM_PC(PC,LEN) sparc_breakpoint_from_pc ((PC), (LEN))

/* Register numbers of various important registers.
   Note that some of these values are "real" register numbers,
   and correspond to the general registers of the machine,
   and some are "phony" register numbers which are too large
   to be actual register numbers as far as the user is concerned
   but do serve to get the desired values when passed to read_register.  */

#define	G0_REGNUM 0		/* %g0 */
#define	G1_REGNUM 1		/* %g1 */
#define O0_REGNUM 8		/* %o0 */
#define	RP_REGNUM 15		/* Contains return address value, *before* \
				   any windows get switched.  */
#define	O7_REGNUM 15		/* Last local reg not saved on stack frame */
#define	L0_REGNUM 16		/* First local reg that's saved on stack frame
				   rather than in machine registers */
#define	I0_REGNUM 24		/* %i0 */
#define	I7_REGNUM 31		/* Last local reg saved on stack frame */
#define	PS_REGNUM 65		/* Contains processor status */
#define PS_FLAG_CARRY 0x100000	/* Carry bit in PS */
#define	WIM_REGNUM 66		/* Window Invalid Mask (not really supported) */
#define	TBR_REGNUM 67		/* Trap Base Register (not really supported) */
#define	FPS_REGNUM 70		/* Floating point status register */
#define	CPS_REGNUM 71		/* Coprocessor status register */

/* Writing to %g0 is a noop (not an error or exception or anything like
   that, however).  */

#define CANNOT_STORE_REGISTER(regno) ((regno) == G0_REGNUM)

#define	PRINT_EXTRA_FRAME_INFO(FI) \
     sparc_print_extra_frame_info (FI)
extern void sparc_print_extra_frame_info (struct frame_info *);

/* DEPRECATED_INIT_EXTRA_FRAME_INFO needs the PC to detect flat
   frames.  */

#define DEPRECATED_INIT_FRAME_PC_FIRST(FROMLEAF, PREV) \
  ((FROMLEAF) ? DEPRECATED_SAVED_PC_AFTER_CALL ((PREV)->next) : \
	      (PREV)->next ? DEPRECATED_FRAME_SAVED_PC ((PREV)->next) : read_pc ())

/* Define other aspects of the stack frame.  */

/* The location of I0 w.r.t SP.  This is actually dependent on how the
   system's window overflow/underflow routines are written.  Most
   vendors save the L regs followed by the I regs (at the higher
   address).  Some vendors get it wrong.  */

#define	FRAME_SAVED_L0	0
#define	FRAME_SAVED_I0	(8 * REGISTER_RAW_SIZE (L0_REGNUM))

#define FRAME_STRUCT_ARGS_ADDRESS(FI) (get_frame_base (FI))

/* Things needed for making the inferior call functions.  */
/*
 * First of all, let me give my opinion of what the DUMMY_FRAME
 * actually looks like.
 *
 *               |                                 |
 *               |                                 |
 *               + - - - - - - - - - - - - - - - - +<-- fp (level 0)
 *               |                                 |
 *               |                                 |
 *               |                                 |
 *               |                                 |
 *               |  Frame of innermost program     |
 *               |           function              |
 *               |                                 |
 *               |                                 |
 *               |                                 |
 *               |                                 |
 *               |                                 |
 *               |---------------------------------|<-- sp (level 0), fp (c)
 *               |                                 |
 *     DUMMY     |             fp0-31              |
 *               |                                 |
 *               |             ------              |<-- fp - 0x80
 *     FRAME     |              g0-7               |<-- fp - 0xa0
 *               |              i0-7               |<-- fp - 0xc0
 *               |             other               |<-- fp - 0xe0
 *               |               ?                 |
 *               |               ?                 |
 *               |---------------------------------|<-- sp' = fp - 0x140
 *               |                                 |
 * xcution start |                                 |
 * sp' + 0x94 -->|        CALL_DUMMY (x code)      |
 *               |                                 |
 *               |                                 |
 *               |---------------------------------|<-- sp'' = fp - 0x200
 *               |  align sp to 8 byte boundary    |
 *               |     ==> args to fn <==          |
 *  Room for     |                                 |
 * i & l's + agg | CALL_DUMMY_STACK_ADJUST = 0x0x44|
 *               |---------------------------------|<-- final sp (variable)
 *               |                                 |
 *               |   Where function called will    |
 *               |           build frame.          |
 *               |                                 |
 *               |                                 |
 *
 *   I understand everything in this picture except what the space
 * between fp - 0xe0 and fp - 0x140 is used for.  Oh, and I don't
 * understand why there's a large chunk of CALL_DUMMY that never gets
 * executed (its function is superceeded by
 * DEPRECATED_PUSH_DUMMY_FRAME; they are designed to do the same
 * thing).
 *
 *   DEPRECATED_PUSH_DUMMY_FRAME saves the registers above sp' and
 * pushes the * register file stack down one.
 *
 *   call_function then writes CALL_DUMMY, pushes the args onto the
 * stack, and adjusts the stack pointer.
 
   call_function_by_hand then starts execution (in the middle of
   CALL_DUMMY, as directed by call_function).  */

#ifndef CALL_DUMMY
/* This sequence of words is the instructions

   00:   bc 10 00 01     mov  %g1, %fp
   04:   9d e3 80 00     save  %sp, %g0, %sp
   08:   bc 10 00 02     mov  %g2, %fp
   0c:   be 10 00 03     mov  %g3, %i7
   10:   da 03 a0 58     ld  [ %sp + 0x58 ], %o5
   14:   d8 03 a0 54     ld  [ %sp + 0x54 ], %o4
   18:   d6 03 a0 50     ld  [ %sp + 0x50 ], %o3
   1c:   d4 03 a0 4c     ld  [ %sp + 0x4c ], %o2
   20:   d2 03 a0 48     ld  [ %sp + 0x48 ], %o1
   24:   40 00 00 00     call  <fun>
   28:   d0 03 a0 44     ld  [ %sp + 0x44 ], %o0
   2c:   01 00 00 00     nop 
   30:   91 d0 20 01     ta  1
   34:   01 00 00 00     nop

   NOTES:
   * the first four instructions are necessary only on the simulator.
   * this is a multiple of 8 (not only 4) bytes.
   * the `call' insn is a relative, not an absolute call.
   * the `nop' at the end is needed to keep the trap from
     clobbering things (if NPC pointed to garbage instead).
 */

#endif /* CALL_DUMMY */

/* Sparc has no reliable single step ptrace call */

#define SOFTWARE_SINGLE_STEP_P() 1
extern void sparc_software_single_step (enum target_signal, int);
#define SOFTWARE_SINGLE_STEP(sig,bp_p) sparc_software_single_step (sig,bp_p)

/* We need more arguments in a frame specification for the
   "frame" or "info frame" command.  */

#define SETUP_ARBITRARY_FRAME(argc, argv) setup_arbitrary_frame (argc, argv)
extern struct frame_info *setup_arbitrary_frame (int, CORE_ADDR *);

extern void sparc_do_registers_info (int regnum, int all);
#undef DEPRECATED_DO_REGISTERS_INFO
#define DEPRECATED_DO_REGISTERS_INFO(REGNUM,ALL) sparc_do_registers_info (REGNUM, ALL)

/* Optimization for storing registers to the inferior.  The hook
   DO_DEFERRED_STORES
   actually executes any deferred stores.  It is called any time
   we are going to proceed the child, or read its registers.
   The hook CLEAR_DEFERRED_STORES is called when we want to throw
   away the inferior process, e.g. when it dies or we kill it.
   FIXME, this does not handle remote debugging cleanly.  */

extern int deferred_stores;
#define	DO_DEFERRED_STORES	\
  if (deferred_stores)		\
    target_store_registers (-2);
#define	CLEAR_DEFERRED_STORES	\
  deferred_stores = 0;

/* Select the sparc disassembler */

#define TM_PRINT_INSN_MACH bfd_mach_sparc

#define DEPRECATED_EXTRA_STACK_ALIGNMENT_NEEDED 1
Commit	Line	Data
c906108c SS	1	/* Target machine sub-parameters for SPARC, for GDB, the GNU debugger.
c906108c SS	2	This is included by other tm-*.h files to define SPARC cpu-related info.
b6ba6518	3	Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
1e698235	4	1998, 1999, 2000, 2001, 2002, 2003
c906108c SS	5	Free Software Foundation, Inc.
	6	Contributed by Michael Tiemann (tiemann@mcc.com)
	7
c5aa993b	8	This file is part of GDB.
c906108c	9
c5aa993b JM	10	This program is free software; you can redistribute it and/or modify
	11	it under the terms of the GNU General Public License as published by
	12	the Free Software Foundation; either version 2 of the License, or
	13	(at your option) any later version.
c906108c	14
c5aa993b JM	15	This program is distributed in the hope that it will be useful,
	16	but WITHOUT ANY WARRANTY; without even the implied warranty of
	17	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	18	GNU General Public License for more details.
c906108c	19
c5aa993b JM	20	You should have received a copy of the GNU General Public License
	21	along with this program; if not, write to the Free Software
	22	Foundation, Inc., 59 Temple Place - Suite 330,
	23	Boston, MA 02111-1307, USA. */
c906108c	24
f88e2c52 AC	25	#include "regcache.h"
f88e2c52 AC	26
c906108c SS	27	struct type;
c906108c SS	28	struct value;
5af923b0	29	struct frame_info;
c906108c	30
5af923b0 MS	31	/*
	32	* The following enums are purely for the convenience of the GDB
	33	* developer, when debugging GDB.
	34	*/
c906108c	35
5af923b0 MS	36	enum { /* Sparc general registers, for all sparc versions. */
	37	G0_REGNUM, G1_REGNUM, G2_REGNUM, G3_REGNUM,
	38	G4_REGNUM, G5_REGNUM, G6_REGNUM, G7_REGNUM,
	39	O0_REGNUM, O1_REGNUM, O2_REGNUM, O3_REGNUM,
	40	O4_REGNUM, O5_REGNUM, O6_REGNUM, O7_REGNUM,
	41	L0_REGNUM, L1_REGNUM, L2_REGNUM, L3_REGNUM,
	42	L4_REGNUM, L5_REGNUM, L6_REGNUM, L7_REGNUM,
	43	I0_REGNUM, I1_REGNUM, I2_REGNUM, I3_REGNUM,
	44	I4_REGNUM, I5_REGNUM, I6_REGNUM, I7_REGNUM,
	45	FP0_REGNUM /* Floating point register 0 */
	46	};
	47
	48	enum { /* Sparc general registers, alternate names. */
	49	R0_REGNUM, R1_REGNUM, R2_REGNUM, R3_REGNUM,
	50	R4_REGNUM, R5_REGNUM, R6_REGNUM, R7_REGNUM,
	51	R8_REGNUM, R9_REGNUM, R10_REGNUM, R11_REGNUM,
	52	R12_REGNUM, R13_REGNUM, R14_REGNUM, R15_REGNUM,
	53	R16_REGNUM, R17_REGNUM, R18_REGNUM, R19_REGNUM,
	54	R20_REGNUM, R21_REGNUM, R22_REGNUM, R23_REGNUM,
	55	R24_REGNUM, R25_REGNUM, R26_REGNUM, R27_REGNUM,
	56	R28_REGNUM, R29_REGNUM, R30_REGNUM, R31_REGNUM
	57	};
	58
	59	enum { /* Sparc32 control registers. */
	60	PS_REGNUM = 65, /* PC, NPC, and Y are omitted because */
	61	WIM_REGNUM = 66, /* they have different values depending on */
	62	TBR_REGNUM = 67, /* 32-bit / 64-bit mode. */
	63	FPS_REGNUM = 70,
	64	CPS_REGNUM = 71
	65	};
	66
	67	/* v9 misc. and priv. regs */
	68
	69	/* Note: specifying values explicitly for documentation purposes. */
	70	enum { /* Sparc64 control registers, excluding Y, PC, and NPC. */
	71	CCR_REGNUM = 82, /* Condition Code Register (%xcc,%icc) */
	72	FSR_REGNUM = 83, /* Floating Point State */
	73	FPRS_REGNUM = 84, /* Floating Point Registers State */
	74	ASI_REGNUM = 86, /* Alternate Space Identifier */
	75	VER_REGNUM = 87, /* Version register */
	76	TICK_REGNUM = 88, /* Tick register */
	77	PIL_REGNUM = 89, /* Processor Interrupt Level */
	78	PSTATE_REGNUM = 90, /* Processor State */
	79	TSTATE_REGNUM = 91, /* Trap State */
	80	TBA_REGNUM = 92, /* Trap Base Address */
	81	TL_REGNUM = 93, /* Trap Level */
	82	TT_REGNUM = 94, /* Trap Type */
	83	TPC_REGNUM = 95, /* Trap pc */
	84	TNPC_REGNUM = 96, /* Trap npc */
	85	WSTATE_REGNUM = 97, /* Window State */
	86	CWP_REGNUM = 98, /* Current Window Pointer */
	87	CANSAVE_REGNUM = 99, /* Savable Windows */
	88	CANRESTORE_REGNUM = 100, /* Restorable Windows */
	89	CLEANWIN_REGNUM = 101, /* Clean Windows */
	90	OTHERWIN_REGNUM = 102, /* Other Windows */
	91	ASR16_REGNUM = 103, /* Ancillary State Registers */
	92	ASR17_REGNUM = 104,
	93	ASR18_REGNUM = 105,
	94	ASR19_REGNUM = 106,
	95	ASR20_REGNUM = 107,
	96	ASR21_REGNUM = 108,
	97	ASR22_REGNUM = 109,
	98	ASR23_REGNUM = 110,
	99	ASR24_REGNUM = 111,
100	ASR25_REGNUM = 112,
101	ASR26_REGNUM = 113,
102	ASR27_REGNUM = 114,
103	ASR28_REGNUM = 115,
104	ASR29_REGNUM = 116,
105	ASR30_REGNUM = 117,
106	ASR31_REGNUM = 118,
107	ICC_REGNUM = 119, /* 32 bit condition codes */
108	XCC_REGNUM = 120, /* 64 bit condition codes */
109	FCC0_REGNUM = 121, /* fp cc reg 0 */
110	FCC1_REGNUM = 122, /* fp cc reg 1 */
111	FCC2_REGNUM = 123, /* fp cc reg 2 */
112	FCC3_REGNUM = 124 /* fp cc reg 3 */
113	};
c906108c	114
5af923b0 MS	115	/*
	116	* Make sparc target multi-archable: April 2000
	117	*/
c906108c	118
5af923b0 MS	119	/* Multi-arch definition of TARGET_IS_SPARC64, TARGET_ELF64 */
	120	#undef GDB_TARGET_IS_SPARC64
	121	#define GDB_TARGET_IS_SPARC64 \
	122	(sparc_intreg_size () == 8)
	123	#undef TARGET_ELF64
	124	#define TARGET_ELF64 \
	125	(sparc_intreg_size () == 8)
	126	extern int sparc_intreg_size (void);
c906108c	127
5af923b0 MS	128	/*
	129	* The following defines should ONLY appear for MULTI_ARCH.
	130	*/
	131
	132	/* Multi-arch the nPC and Y registers. */
	133	#define Y_REGNUM (sparc_y_regnum ())
5af923b0	134
5af923b0 MS	135	/* On the Sun 4 under SunOS, the compile will leave a fake insn which
	136	encodes the structure size being returned. If we detect such
	137	a fake insn, step past it. */
	138
	139	#define PC_ADJUST(PC) sparc_pc_adjust (PC)
a14ed312	140	extern CORE_ADDR sparc_pc_adjust (CORE_ADDR);
5af923b0	141
5af923b0 MS	142	/* If an argument is declared "register", Sun cc will keep it in a register,
	143	never saving it onto the stack. So we better not believe the "p" symbol
	144	descriptor stab. */
	145
	146	#define USE_REGISTER_NOT_ARG
	147
	148	/* For acc, there's no need to correct LBRAC entries by guessing how
	149	they should work. In fact, this is harmful because the LBRAC
	150	entries now all appear at the end of the function, not intermixed
	151	with the SLINE entries. n_opt_found detects acc for Solaris binaries;
	152	function_stab_type detects acc for SunOS4 binaries.
	153
	154	For binary from SunOS4 /bin/cc, need to correct LBRAC's.
	155
	156	For gcc, like acc, don't correct. */
	157
	158	#define SUN_FIXED_LBRAC_BUG \
	159	(n_opt_found \
	160	\|\| function_stab_type == N_STSYM \
	161	\|\| function_stab_type == N_GSYM \
	162	\|\| processing_gcc_compilation)
	163
	164	/* Do variables in the debug stabs occur after the N_LBRAC or before it?
	165	acc: after, gcc: before, SunOS4 /bin/cc: before. */
	166
	167	#define VARIABLES_INSIDE_BLOCK(desc, gcc_p) \
	168	(!(gcc_p) \
	169	&& (n_opt_found \
	170	\|\| function_stab_type == N_STSYM \
	171	\|\| function_stab_type == N_GSYM))
	172
	173	/* Sequence of bytes for breakpoint instruction (ta 1). */
	174
aaab4dba AC	175	extern const unsigned char sparc_breakpoint_from_pc (CORE_ADDR pc, int *len);
aaab4dba AC	176	#define BREAKPOINT_FROM_PC(PC,LEN) sparc_breakpoint_from_pc ((PC), (LEN))
5af923b0 MS	177
	178	/* Register numbers of various important registers.
	179	Note that some of these values are "real" register numbers,
	180	and correspond to the general registers of the machine,
	181	and some are "phony" register numbers which are too large
	182	to be actual register numbers as far as the user is concerned
	183	but do serve to get the desired values when passed to read_register. */
	184
	185	#define G0_REGNUM 0 /* %g0 */
	186	#define G1_REGNUM 1 /* %g1 */
	187	#define O0_REGNUM 8 /* %o0 */
	188	#define RP_REGNUM 15 /* Contains return address value, before \
	189	any windows get switched. */
	190	#define O7_REGNUM 15 /* Last local reg not saved on stack frame */
	191	#define L0_REGNUM 16 /* First local reg that's saved on stack frame
	192	rather than in machine registers */
	193	#define I0_REGNUM 24 /* %i0 */
	194	#define I7_REGNUM 31 /* Last local reg saved on stack frame */
	195	#define PS_REGNUM 65 /* Contains processor status */
	196	#define PS_FLAG_CARRY 0x100000 /* Carry bit in PS */
	197	#define WIM_REGNUM 66 /* Window Invalid Mask (not really supported) */
	198	#define TBR_REGNUM 67 /* Trap Base Register (not really supported) */
	199	#define FPS_REGNUM 70 /* Floating point status register */
	200	#define CPS_REGNUM 71 /* Coprocessor status register */
	201
	202	/* Writing to %g0 is a noop (not an error or exception or anything like
	203	that, however). */
	204
	205	#define CANNOT_STORE_REGISTER(regno) ((regno) == G0_REGNUM)
	206
5af923b0 MS	207	#define PRINT_EXTRA_FRAME_INFO(FI) \
	208	sparc_print_extra_frame_info (FI)
	209	extern void sparc_print_extra_frame_info (struct frame_info *);
	210
e9582e71 AC	211	/* DEPRECATED_INIT_EXTRA_FRAME_INFO needs the PC to detect flat
e9582e71 AC	212	frames. */
5af923b0	213
2ca6c561	214	#define DEPRECATED_INIT_FRAME_PC_FIRST(FROMLEAF, PREV) \
6913c89a	215	((FROMLEAF) ? DEPRECATED_SAVED_PC_AFTER_CALL ((PREV)->next) : \
8bedc050	216	(PREV)->next ? DEPRECATED_FRAME_SAVED_PC ((PREV)->next) : read_pc ())
5af923b0 MS	217
	218	/* Define other aspects of the stack frame. */
	219
	220	/* The location of I0 w.r.t SP. This is actually dependent on how the
	221	system's window overflow/underflow routines are written. Most
	222	vendors save the L regs followed by the I regs (at the higher
	223	address). Some vendors get it wrong. */
	224
	225	#define FRAME_SAVED_L0 0
	226	#define FRAME_SAVED_I0 (8 * REGISTER_RAW_SIZE (L0_REGNUM))
	227
1e2330ba	228	#define FRAME_STRUCT_ARGS_ADDRESS(FI) (get_frame_base (FI))
5af923b0	229
c906108c SS	230	/* Things needed for making the inferior call functions. */
	231	/*
	232	* First of all, let me give my opinion of what the DUMMY_FRAME
	233	* actually looks like.
	234	*
	235	* \| \|
	236	* \| \|
	237	* + - - - - - - - - - - - - - - - - +<-- fp (level 0)
	238	* \| \|
	239	* \| \|
	240	* \| \|
	241	* \| \|
	242	* \| Frame of innermost program \|
	243	* \| function \|
	244	* \| \|
	245	* \| \|
	246	* \| \|
	247	* \| \|
	248	* \| \|
	249	* \|---------------------------------\|<-- sp (level 0), fp (c)
	250	* \| \|
	251	* DUMMY \| fp0-31 \|
	252	* \| \|
	253	* \| ------ \|<-- fp - 0x80
	254	* FRAME \| g0-7 \|<-- fp - 0xa0
	255	* \| i0-7 \|<-- fp - 0xc0
	256	* \| other \|<-- fp - 0xe0
	257	* \| ? \|
	258	* \| ? \|
	259	* \|---------------------------------\|<-- sp' = fp - 0x140
	260	* \| \|
	261	* xcution start \| \|
	262	* sp' + 0x94 -->\| CALL_DUMMY (x code) \|
	263	* \| \|
	264	* \| \|
	265	* \|---------------------------------\|<-- sp'' = fp - 0x200
	266	* \| align sp to 8 byte boundary \|
	267	* \| ==> args to fn <== \|
	268	* Room for \| \|
	269	* i & l's + agg \| CALL_DUMMY_STACK_ADJUST = 0x0x44\|
	270	* \|---------------------------------\|<-- final sp (variable)
	271	* \| \|
	272	* \| Where function called will \|
	273	* \| build frame. \|
	274	* \| \|
	275	* \| \|
	276	*
	277	* I understand everything in this picture except what the space
	278	* between fp - 0xe0 and fp - 0x140 is used for. Oh, and I don't
	279	* understand why there's a large chunk of CALL_DUMMY that never gets
f3824013 AC	280	* executed (its function is superceeded by
	281	* DEPRECATED_PUSH_DUMMY_FRAME; they are designed to do the same
	282	* thing).
c906108c	283	*
f3824013 AC	284	* DEPRECATED_PUSH_DUMMY_FRAME saves the registers above sp' and
f3824013 AC	285	* pushes the * register file stack down one.
c906108c SS	286	*
	287	* call_function then writes CALL_DUMMY, pushes the args onto the
	288	* stack, and adjusts the stack pointer.
04714b91 AC	289
	290	call_function_by_hand then starts execution (in the middle of
	291	CALL_DUMMY, as directed by call_function). */
c906108c	292
c906108c SS	293	#ifndef CALL_DUMMY
	294	/* This sequence of words is the instructions
	295
5af923b0 MS	296	00: bc 10 00 01 mov %g1, %fp
	297	04: 9d e3 80 00 save %sp, %g0, %sp
	298	08: bc 10 00 02 mov %g2, %fp
	299	0c: be 10 00 03 mov %g3, %i7
c5aa993b JM	300	10: da 03 a0 58 ld [ %sp + 0x58 ], %o5
	301	14: d8 03 a0 54 ld [ %sp + 0x54 ], %o4
	302	18: d6 03 a0 50 ld [ %sp + 0x50 ], %o3
	303	1c: d4 03 a0 4c ld [ %sp + 0x4c ], %o2
	304	20: d2 03 a0 48 ld [ %sp + 0x48 ], %o1
	305	24: 40 00 00 00 call <fun>
	306	28: d0 03 a0 44 ld [ %sp + 0x44 ], %o0
	307	2c: 01 00 00 00 nop
	308	30: 91 d0 20 01 ta 1
	309	34: 01 00 00 00 nop
c906108c SS	310
c906108c SS	311	NOTES:
c5aa993b JM	312	* the first four instructions are necessary only on the simulator.
	313	* this is a multiple of 8 (not only 4) bytes.
	314	* the `call' insn is a relative, not an absolute call.
	315	* the `nop' at the end is needed to keep the trap from
5af923b0 MS	316	clobbering things (if NPC pointed to garbage instead).
	317	*/
	318
5af923b0 MS	319	#endif /* CALL_DUMMY */
5af923b0 MS	320
c906108c SS	321	/* Sparc has no reliable single step ptrace call */
c906108c SS	322
b0ed3589	323	#define SOFTWARE_SINGLE_STEP_P() 1
379d08a1	324	extern void sparc_software_single_step (enum target_signal, int);
c906108c SS	325	#define SOFTWARE_SINGLE_STEP(sig,bp_p) sparc_software_single_step (sig,bp_p)
	326
	327	/* We need more arguments in a frame specification for the
	328	"frame" or "info frame" command. */
	329
	330	#define SETUP_ARBITRARY_FRAME(argc, argv) setup_arbitrary_frame (argc, argv)
a14ed312	331	extern struct frame_info setup_arbitrary_frame (int, CORE_ADDR );
c906108c	332
87647bb0 AC	333	extern void sparc_do_registers_info (int regnum, int all);
	334	#undef DEPRECATED_DO_REGISTERS_INFO
	335	#define DEPRECATED_DO_REGISTERS_INFO(REGNUM,ALL) sparc_do_registers_info (REGNUM, ALL)
c906108c	336
c906108c SS	337	/* Optimization for storing registers to the inferior. The hook
	338	DO_DEFERRED_STORES
	339	actually executes any deferred stores. It is called any time
	340	we are going to proceed the child, or read its registers.
	341	The hook CLEAR_DEFERRED_STORES is called when we want to throw
	342	away the inferior process, e.g. when it dies or we kill it.
	343	FIXME, this does not handle remote debugging cleanly. */
	344
	345	extern int deferred_stores;
	346	#define DO_DEFERRED_STORES \
	347	if (deferred_stores) \
	348	target_store_registers (-2);
	349	#define CLEAR_DEFERRED_STORES \
	350	deferred_stores = 0;
	351
c906108c SS	352	/* Select the sparc disassembler */
	353
	354	#define TM_PRINT_INSN_MACH bfd_mach_sparc
	355
f933a9c5	356	#define DEPRECATED_EXTRA_STACK_ALIGNMENT_NEEDED 1