Commit | Line | Data |
---|---|---|
29134980 | 1 | /* Target dependent code for CRIS, for GDB, the GNU debugger. |
6b4d5c91 AC |
2 | |
3 | Copyright 2001, 2002, 2003, 2004 Free Software Foundation, Inc. | |
4 | ||
29134980 OF |
5 | Contributed by Axis Communications AB. |
6 | Written by Hendrik Ruijter, Stefan Andersson, and Orjan Friberg. | |
7 | ||
8 | This file is part of GDB. | |
9 | ||
10 | This program is free software; you can redistribute it and/or modify | |
11 | it under the terms of the GNU General Public License as published by | |
12 | the Free Software Foundation; either version 2 of the License, or | |
13 | (at your option) any later version. | |
14 | ||
15 | This program is distributed in the hope that it will be useful, | |
16 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | GNU General Public License for more details. | |
19 | ||
20 | You should have received a copy of the GNU General Public License | |
21 | along with this program; if not, write to the Free Software | |
22 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | |
23 | ||
24 | #include "defs.h" | |
25 | #include "frame.h" | |
26 | #include "symtab.h" | |
27 | #include "inferior.h" | |
28 | #include "gdbtypes.h" | |
29 | #include "gdbcore.h" | |
30 | #include "gdbcmd.h" | |
31 | #include "target.h" | |
32 | #include "value.h" | |
33 | #include "opcode/cris.h" | |
34 | #include "arch-utils.h" | |
35 | #include "regcache.h" | |
36482093 | 36 | #include "gdb_assert.h" |
29134980 OF |
37 | |
38 | /* To get entry_point_address. */ | |
39 | #include "symfile.h" | |
40 | ||
dbbff683 OF |
41 | #include "solib.h" /* Support for shared libraries. */ |
42 | #include "solib-svr4.h" /* For struct link_map_offsets. */ | |
9bbe19fb | 43 | #include "gdb_string.h" |
a89aa300 | 44 | #include "dis-asm.h" |
dbbff683 OF |
45 | |
46 | ||
29134980 OF |
47 | enum cris_num_regs |
48 | { | |
49 | /* There are no floating point registers. Used in gdbserver low-linux.c. */ | |
50 | NUM_FREGS = 0, | |
51 | ||
52 | /* There are 16 general registers. */ | |
53 | NUM_GENREGS = 16, | |
54 | ||
55 | /* There are 16 special registers. */ | |
56 | NUM_SPECREGS = 16 | |
57 | }; | |
58 | ||
59 | /* Register numbers of various important registers. | |
0ba6dca9 | 60 | DEPRECATED_FP_REGNUM Contains address of executing stack frame. |
29134980 OF |
61 | STR_REGNUM Contains the address of structure return values. |
62 | RET_REGNUM Contains the return value when shorter than or equal to 32 bits | |
63 | ARG1_REGNUM Contains the first parameter to a function. | |
64 | ARG2_REGNUM Contains the second parameter to a function. | |
65 | ARG3_REGNUM Contains the third parameter to a function. | |
66 | ARG4_REGNUM Contains the fourth parameter to a function. Rest on stack. | |
67 | SP_REGNUM Contains address of top of stack. | |
68 | PC_REGNUM Contains address of next instruction. | |
69 | SRP_REGNUM Subroutine return pointer register. | |
70 | BRP_REGNUM Breakpoint return pointer register. */ | |
71 | ||
0ba6dca9 AC |
72 | /* DEPRECATED_FP_REGNUM = 8, SP_REGNUM = 14, and PC_REGNUM = 15 have |
73 | been incorporated into the multi-arch framework. */ | |
29134980 OF |
74 | |
75 | enum cris_regnums | |
76 | { | |
77 | /* Enums with respect to the general registers, valid for all | |
78 | CRIS versions. */ | |
79 | STR_REGNUM = 9, | |
80 | RET_REGNUM = 10, | |
81 | ARG1_REGNUM = 10, | |
82 | ARG2_REGNUM = 11, | |
83 | ARG3_REGNUM = 12, | |
84 | ARG4_REGNUM = 13, | |
85 | ||
86 | /* Enums with respect to the special registers, some of which may not be | |
87 | applicable to all CRIS versions. */ | |
88 | P0_REGNUM = 16, | |
89 | VR_REGNUM = 17, | |
90 | P2_REGNUM = 18, | |
91 | P3_REGNUM = 19, | |
92 | P4_REGNUM = 20, | |
93 | CCR_REGNUM = 21, | |
94 | MOF_REGNUM = 23, | |
95 | P8_REGNUM = 24, | |
96 | IBR_REGNUM = 25, | |
97 | IRP_REGNUM = 26, | |
98 | SRP_REGNUM = 27, | |
99 | BAR_REGNUM = 28, | |
2a9ecef2 | 100 | DCCR_REGNUM = 29, |
29134980 OF |
101 | BRP_REGNUM = 30, |
102 | USP_REGNUM = 31 | |
103 | }; | |
104 | ||
105 | extern const struct cris_spec_reg cris_spec_regs[]; | |
106 | ||
107 | /* CRIS version, set via the user command 'set cris-version'. Affects | |
108 | register names and sizes.*/ | |
109 | static int usr_cmd_cris_version; | |
110 | ||
111 | /* Indicates whether to trust the above variable. */ | |
112 | static int usr_cmd_cris_version_valid = 0; | |
113 | ||
114 | /* CRIS mode, set via the user command 'set cris-mode'. Affects availability | |
115 | of some registers. */ | |
116 | static const char *usr_cmd_cris_mode; | |
117 | ||
118 | /* Indicates whether to trust the above variable. */ | |
119 | static int usr_cmd_cris_mode_valid = 0; | |
120 | ||
121 | static const char CRIS_MODE_USER[] = "CRIS_MODE_USER"; | |
122 | static const char CRIS_MODE_SUPERVISOR[] = "CRIS_MODE_SUPERVISOR"; | |
123 | static const char *cris_mode_enums[] = | |
124 | { | |
125 | CRIS_MODE_USER, | |
126 | CRIS_MODE_SUPERVISOR, | |
127 | 0 | |
128 | }; | |
129 | ||
130 | /* CRIS ABI, set via the user command 'set cris-abi'. | |
131 | There are two flavours: | |
132 | 1. Original ABI with 32-bit doubles, where arguments <= 4 bytes are | |
133 | passed by value. | |
134 | 2. New ABI with 64-bit doubles, where arguments <= 8 bytes are passed by | |
135 | value. */ | |
136 | static const char *usr_cmd_cris_abi; | |
137 | ||
138 | /* Indicates whether to trust the above variable. */ | |
139 | static int usr_cmd_cris_abi_valid = 0; | |
140 | ||
141 | /* These variables are strings instead of enums to make them usable as | |
142 | parameters to add_set_enum_cmd. */ | |
143 | static const char CRIS_ABI_ORIGINAL[] = "CRIS_ABI_ORIGINAL"; | |
144 | static const char CRIS_ABI_V2[] = "CRIS_ABI_V2"; | |
145 | static const char CRIS_ABI_SYMBOL[] = ".$CRIS_ABI_V2"; | |
146 | static const char *cris_abi_enums[] = | |
147 | { | |
148 | CRIS_ABI_ORIGINAL, | |
149 | CRIS_ABI_V2, | |
150 | 0 | |
151 | }; | |
152 | ||
153 | /* CRIS architecture specific information. */ | |
154 | struct gdbarch_tdep | |
155 | { | |
156 | int cris_version; | |
157 | const char *cris_mode; | |
158 | const char *cris_abi; | |
159 | }; | |
160 | ||
161 | /* Functions for accessing target dependent data. */ | |
162 | ||
163 | static int | |
164 | cris_version (void) | |
165 | { | |
166 | return (gdbarch_tdep (current_gdbarch)->cris_version); | |
167 | } | |
168 | ||
169 | static const char * | |
170 | cris_mode (void) | |
171 | { | |
172 | return (gdbarch_tdep (current_gdbarch)->cris_mode); | |
173 | } | |
174 | ||
175 | static const char * | |
176 | cris_abi (void) | |
177 | { | |
178 | return (gdbarch_tdep (current_gdbarch)->cris_abi); | |
179 | } | |
180 | ||
29134980 OF |
181 | struct frame_extra_info |
182 | { | |
183 | CORE_ADDR return_pc; | |
184 | int leaf_function; | |
185 | }; | |
186 | ||
187 | /* The instruction environment needed to find single-step breakpoints. */ | |
188 | typedef | |
189 | struct instruction_environment | |
190 | { | |
191 | unsigned long reg[NUM_GENREGS]; | |
192 | unsigned long preg[NUM_SPECREGS]; | |
193 | unsigned long branch_break_address; | |
194 | unsigned long delay_slot_pc; | |
195 | unsigned long prefix_value; | |
196 | int branch_found; | |
197 | int prefix_found; | |
198 | int invalid; | |
199 | int slot_needed; | |
200 | int delay_slot_pc_active; | |
201 | int xflag_found; | |
202 | int disable_interrupt; | |
203 | } inst_env_type; | |
204 | ||
205 | /* Save old breakpoints in order to restore the state before a single_step. | |
206 | At most, two breakpoints will have to be remembered. */ | |
207 | typedef | |
208 | char binsn_quantum[BREAKPOINT_MAX]; | |
209 | static binsn_quantum break_mem[2]; | |
210 | static CORE_ADDR next_pc = 0; | |
211 | static CORE_ADDR branch_target_address = 0; | |
212 | static unsigned char branch_break_inserted = 0; | |
213 | ||
214 | /* Machine-dependencies in CRIS for opcodes. */ | |
215 | ||
216 | /* Instruction sizes. */ | |
217 | enum cris_instruction_sizes | |
218 | { | |
219 | INST_BYTE_SIZE = 0, | |
220 | INST_WORD_SIZE = 1, | |
221 | INST_DWORD_SIZE = 2 | |
222 | }; | |
223 | ||
224 | /* Addressing modes. */ | |
225 | enum cris_addressing_modes | |
226 | { | |
227 | REGISTER_MODE = 1, | |
228 | INDIRECT_MODE = 2, | |
229 | AUTOINC_MODE = 3 | |
230 | }; | |
231 | ||
232 | /* Prefix addressing modes. */ | |
233 | enum cris_prefix_addressing_modes | |
234 | { | |
235 | PREFIX_INDEX_MODE = 2, | |
236 | PREFIX_ASSIGN_MODE = 3, | |
237 | ||
238 | /* Handle immediate byte offset addressing mode prefix format. */ | |
239 | PREFIX_OFFSET_MODE = 2 | |
240 | }; | |
241 | ||
242 | /* Masks for opcodes. */ | |
243 | enum cris_opcode_masks | |
244 | { | |
245 | BRANCH_SIGNED_SHORT_OFFSET_MASK = 0x1, | |
246 | SIGNED_EXTEND_BIT_MASK = 0x2, | |
247 | SIGNED_BYTE_MASK = 0x80, | |
248 | SIGNED_BYTE_EXTEND_MASK = 0xFFFFFF00, | |
249 | SIGNED_WORD_MASK = 0x8000, | |
250 | SIGNED_WORD_EXTEND_MASK = 0xFFFF0000, | |
251 | SIGNED_DWORD_MASK = 0x80000000, | |
252 | SIGNED_QUICK_VALUE_MASK = 0x20, | |
253 | SIGNED_QUICK_VALUE_EXTEND_MASK = 0xFFFFFFC0 | |
254 | }; | |
255 | ||
256 | /* Functions for opcodes. The general form of the ETRAX 16-bit instruction: | |
257 | Bit 15 - 12 Operand2 | |
258 | 11 - 10 Mode | |
259 | 9 - 6 Opcode | |
260 | 5 - 4 Size | |
261 | 3 - 0 Operand1 */ | |
262 | ||
263 | static int | |
264 | cris_get_operand2 (unsigned short insn) | |
265 | { | |
266 | return ((insn & 0xF000) >> 12); | |
267 | } | |
268 | ||
269 | static int | |
270 | cris_get_mode (unsigned short insn) | |
271 | { | |
272 | return ((insn & 0x0C00) >> 10); | |
273 | } | |
274 | ||
275 | static int | |
276 | cris_get_opcode (unsigned short insn) | |
277 | { | |
278 | return ((insn & 0x03C0) >> 6); | |
279 | } | |
280 | ||
281 | static int | |
282 | cris_get_size (unsigned short insn) | |
283 | { | |
284 | return ((insn & 0x0030) >> 4); | |
285 | } | |
286 | ||
287 | static int | |
288 | cris_get_operand1 (unsigned short insn) | |
289 | { | |
290 | return (insn & 0x000F); | |
291 | } | |
292 | ||
293 | /* Additional functions in order to handle opcodes. */ | |
294 | ||
295 | static int | |
296 | cris_get_wide_opcode (unsigned short insn) | |
297 | { | |
298 | return ((insn & 0x03E0) >> 5); | |
299 | } | |
300 | ||
301 | static int | |
302 | cris_get_short_size (unsigned short insn) | |
303 | { | |
304 | return ((insn & 0x0010) >> 4); | |
305 | } | |
306 | ||
307 | static int | |
308 | cris_get_quick_value (unsigned short insn) | |
309 | { | |
310 | return (insn & 0x003F); | |
311 | } | |
312 | ||
313 | static int | |
314 | cris_get_bdap_quick_offset (unsigned short insn) | |
315 | { | |
316 | return (insn & 0x00FF); | |
317 | } | |
318 | ||
319 | static int | |
320 | cris_get_branch_short_offset (unsigned short insn) | |
321 | { | |
322 | return (insn & 0x00FF); | |
323 | } | |
324 | ||
325 | static int | |
326 | cris_get_asr_shift_steps (unsigned long value) | |
327 | { | |
328 | return (value & 0x3F); | |
329 | } | |
330 | ||
331 | static int | |
332 | cris_get_asr_quick_shift_steps (unsigned short insn) | |
333 | { | |
334 | return (insn & 0x1F); | |
335 | } | |
336 | ||
337 | static int | |
338 | cris_get_clear_size (unsigned short insn) | |
339 | { | |
340 | return ((insn) & 0xC000); | |
341 | } | |
342 | ||
343 | static int | |
344 | cris_is_signed_extend_bit_on (unsigned short insn) | |
345 | { | |
346 | return (((insn) & 0x20) == 0x20); | |
347 | } | |
348 | ||
349 | static int | |
350 | cris_is_xflag_bit_on (unsigned short insn) | |
351 | { | |
352 | return (((insn) & 0x1000) == 0x1000); | |
353 | } | |
354 | ||
355 | static void | |
356 | cris_set_size_to_dword (unsigned short *insn) | |
357 | { | |
358 | *insn &= 0xFFCF; | |
359 | *insn |= 0x20; | |
360 | } | |
361 | ||
8535cb38 | 362 | static signed char |
29134980 OF |
363 | cris_get_signed_offset (unsigned short insn) |
364 | { | |
8535cb38 | 365 | return ((signed char) (insn & 0x00FF)); |
29134980 OF |
366 | } |
367 | ||
368 | /* Calls an op function given the op-type, working on the insn and the | |
369 | inst_env. */ | |
370 | static void cris_gdb_func (enum cris_op_type, unsigned short, inst_env_type *); | |
371 | ||
372 | static CORE_ADDR cris_skip_prologue_main (CORE_ADDR pc, int frameless_p); | |
373 | ||
374 | static struct gdbarch *cris_gdbarch_init (struct gdbarch_info, | |
375 | struct gdbarch_list *); | |
376 | ||
29134980 OF |
377 | static void cris_dump_tdep (struct gdbarch *, struct ui_file *); |
378 | ||
379 | static void cris_version_update (char *ignore_args, int from_tty, | |
380 | struct cmd_list_element *c); | |
381 | ||
382 | static void cris_mode_update (char *ignore_args, int from_tty, | |
383 | struct cmd_list_element *c); | |
384 | ||
385 | static void cris_abi_update (char *ignore_args, int from_tty, | |
386 | struct cmd_list_element *c); | |
387 | ||
388 | static CORE_ADDR bfd_lookup_symbol (bfd *, const char *); | |
389 | ||
390 | /* Frames information. The definition of the struct frame_info is | |
391 | ||
392 | CORE_ADDR frame | |
393 | CORE_ADDR pc | |
5a203e44 | 394 | enum frame_type type; |
29134980 OF |
395 | CORE_ADDR return_pc |
396 | int leaf_function | |
397 | ||
398 | If the compilation option -fno-omit-frame-pointer is present the | |
399 | variable frame will be set to the content of R8 which is the frame | |
400 | pointer register. | |
401 | ||
402 | The variable pc contains the address where execution is performed | |
403 | in the present frame. The innermost frame contains the current content | |
404 | of the register PC. All other frames contain the content of the | |
405 | register PC in the next frame. | |
406 | ||
5a203e44 AC |
407 | The variable `type' indicates the frame's type: normal, SIGTRAMP |
408 | (associated with a signal handler), dummy (associated with a dummy | |
409 | frame). | |
29134980 OF |
410 | |
411 | The variable return_pc contains the address where execution should be | |
412 | resumed when the present frame has finished, the return address. | |
413 | ||
414 | The variable leaf_function is 1 if the return address is in the register | |
415 | SRP, and 0 if it is on the stack. | |
416 | ||
417 | Prologue instructions C-code. | |
418 | The prologue may consist of (-fno-omit-frame-pointer) | |
419 | 1) 2) | |
420 | push srp | |
421 | push r8 push r8 | |
422 | move.d sp,r8 move.d sp,r8 | |
423 | subq X,sp subq X,sp | |
424 | movem rY,[sp] movem rY,[sp] | |
425 | move.S rZ,[r8-U] move.S rZ,[r8-U] | |
426 | ||
427 | where 1 is a non-terminal function, and 2 is a leaf-function. | |
428 | ||
429 | Note that this assumption is extremely brittle, and will break at the | |
430 | slightest change in GCC's prologue. | |
431 | ||
432 | If local variables are declared or register contents are saved on stack | |
433 | the subq-instruction will be present with X as the number of bytes | |
434 | needed for storage. The reshuffle with respect to r8 may be performed | |
435 | with any size S (b, w, d) and any of the general registers Z={0..13}. | |
436 | The offset U should be representable by a signed 8-bit value in all cases. | |
437 | Thus, the prefix word is assumed to be immediate byte offset mode followed | |
438 | by another word containing the instruction. | |
439 | ||
440 | Degenerate cases: | |
441 | 3) | |
442 | push r8 | |
443 | move.d sp,r8 | |
444 | move.d r8,sp | |
445 | pop r8 | |
446 | ||
447 | Prologue instructions C++-code. | |
448 | Case 1) and 2) in the C-code may be followed by | |
449 | ||
450 | move.d r10,rS ; this | |
451 | move.d r11,rT ; P1 | |
452 | move.d r12,rU ; P2 | |
453 | move.d r13,rV ; P3 | |
454 | move.S [r8+U],rZ ; P4 | |
455 | ||
456 | if any of the call parameters are stored. The host expects these | |
457 | instructions to be executed in order to get the call parameters right. */ | |
458 | ||
459 | /* Examine the prologue of a function. The variable ip is the address of | |
460 | the first instruction of the prologue. The variable limit is the address | |
461 | of the first instruction after the prologue. The variable fi contains the | |
462 | information in struct frame_info. The variable frameless_p controls whether | |
463 | the entire prologue is examined (0) or just enough instructions to | |
464 | determine that it is a prologue (1). */ | |
465 | ||
a78f21af | 466 | static CORE_ADDR |
29134980 OF |
467 | cris_examine (CORE_ADDR ip, CORE_ADDR limit, struct frame_info *fi, |
468 | int frameless_p) | |
469 | { | |
470 | /* Present instruction. */ | |
471 | unsigned short insn; | |
472 | ||
473 | /* Next instruction, lookahead. */ | |
474 | unsigned short insn_next; | |
475 | int regno; | |
476 | ||
477 | /* Is there a push fp? */ | |
478 | int have_fp; | |
479 | ||
480 | /* Number of byte on stack used for local variables and movem. */ | |
481 | int val; | |
482 | ||
483 | /* Highest register number in a movem. */ | |
484 | int regsave; | |
485 | ||
486 | /* move.d r<source_register>,rS */ | |
487 | short source_register; | |
488 | ||
489 | /* This frame is with respect to a leaf until a push srp is found. */ | |
da50a4b7 | 490 | get_frame_extra_info (fi)->leaf_function = 1; |
29134980 OF |
491 | |
492 | /* This frame is without the FP until a push fp is found. */ | |
493 | have_fp = 0; | |
494 | ||
495 | /* Assume nothing on stack. */ | |
496 | val = 0; | |
497 | regsave = -1; | |
498 | ||
499 | /* No information about register contents so far. */ | |
500 | ||
501 | /* We only want to know the end of the prologue when fi->saved_regs == 0. | |
502 | When the saved registers are allocated full information is required. */ | |
1b1d3794 | 503 | if (deprecated_get_frame_saved_regs (fi)) |
29134980 OF |
504 | { |
505 | for (regno = 0; regno < NUM_REGS; regno++) | |
1b1d3794 | 506 | deprecated_get_frame_saved_regs (fi)[regno] = 0; |
29134980 OF |
507 | } |
508 | ||
509 | /* Find the prologue instructions. */ | |
510 | do | |
511 | { | |
512 | insn = read_memory_unsigned_integer (ip, sizeof (short)); | |
513 | ip += sizeof (short); | |
514 | if (insn == 0xE1FC) | |
515 | { | |
516 | /* push <reg> 32 bit instruction */ | |
517 | insn_next = read_memory_unsigned_integer (ip, sizeof (short)); | |
518 | ip += sizeof (short); | |
519 | regno = cris_get_operand2 (insn_next); | |
dbbff683 OF |
520 | |
521 | /* This check, meant to recognize srp, used to be regno == | |
522 | (SRP_REGNUM - NUM_GENREGS), but that covers r11 also. */ | |
523 | if (insn_next == 0xBE7E) | |
29134980 OF |
524 | { |
525 | if (frameless_p) | |
526 | { | |
527 | return ip; | |
528 | } | |
da50a4b7 | 529 | get_frame_extra_info (fi)->leaf_function = 0; |
29134980 | 530 | } |
0ba6dca9 | 531 | else if (regno == DEPRECATED_FP_REGNUM) |
29134980 OF |
532 | { |
533 | have_fp = 1; | |
534 | } | |
535 | } | |
536 | else if (insn == 0x866E) | |
537 | { | |
538 | /* move.d sp,r8 */ | |
539 | if (frameless_p) | |
540 | { | |
541 | return ip; | |
542 | } | |
543 | continue; | |
544 | } | |
545 | else if (cris_get_operand2 (insn) == SP_REGNUM | |
546 | && cris_get_mode (insn) == 0x0000 | |
547 | && cris_get_opcode (insn) == 0x000A) | |
548 | { | |
549 | /* subq <val>,sp */ | |
550 | val = cris_get_quick_value (insn); | |
551 | } | |
552 | else if (cris_get_mode (insn) == 0x0002 | |
553 | && cris_get_opcode (insn) == 0x000F | |
554 | && cris_get_size (insn) == 0x0003 | |
555 | && cris_get_operand1 (insn) == SP_REGNUM) | |
556 | { | |
557 | /* movem r<regsave>,[sp] */ | |
558 | if (frameless_p) | |
559 | { | |
560 | return ip; | |
561 | } | |
562 | regsave = cris_get_operand2 (insn); | |
563 | } | |
564 | else if (cris_get_operand2 (insn) == SP_REGNUM | |
565 | && ((insn & 0x0F00) >> 8) == 0x0001 | |
566 | && (cris_get_signed_offset (insn) < 0)) | |
567 | { | |
568 | /* Immediate byte offset addressing prefix word with sp as base | |
569 | register. Used for CRIS v8 i.e. ETRAX 100 and newer if <val> | |
570 | is between 64 and 128. | |
571 | movem r<regsave>,[sp=sp-<val>] */ | |
572 | val = -cris_get_signed_offset (insn); | |
573 | insn_next = read_memory_unsigned_integer (ip, sizeof (short)); | |
574 | ip += sizeof (short); | |
575 | if (cris_get_mode (insn_next) == PREFIX_ASSIGN_MODE | |
576 | && cris_get_opcode (insn_next) == 0x000F | |
577 | && cris_get_size (insn_next) == 0x0003 | |
578 | && cris_get_operand1 (insn_next) == SP_REGNUM) | |
579 | { | |
580 | if (frameless_p) | |
581 | { | |
582 | return ip; | |
583 | } | |
584 | regsave = cris_get_operand2 (insn_next); | |
585 | } | |
586 | else | |
587 | { | |
588 | /* The prologue ended before the limit was reached. */ | |
589 | ip -= 2 * sizeof (short); | |
590 | break; | |
591 | } | |
592 | } | |
593 | else if (cris_get_mode (insn) == 0x0001 | |
594 | && cris_get_opcode (insn) == 0x0009 | |
595 | && cris_get_size (insn) == 0x0002) | |
596 | { | |
597 | /* move.d r<10..13>,r<0..15> */ | |
598 | if (frameless_p) | |
599 | { | |
600 | return ip; | |
601 | } | |
602 | source_register = cris_get_operand1 (insn); | |
2a9ecef2 OF |
603 | |
604 | /* FIXME? In the glibc solibs, the prologue might contain something | |
605 | like (this example taken from relocate_doit): | |
606 | move.d $pc,$r0 | |
607 | sub.d 0xfffef426,$r0 | |
608 | which isn't covered by the source_register check below. Question | |
609 | is whether to add a check for this combo, or make better use of | |
610 | the limit variable instead. */ | |
29134980 OF |
611 | if (source_register < ARG1_REGNUM || source_register > ARG4_REGNUM) |
612 | { | |
613 | /* The prologue ended before the limit was reached. */ | |
614 | ip -= sizeof (short); | |
615 | break; | |
616 | } | |
617 | } | |
0ba6dca9 | 618 | else if (cris_get_operand2 (insn) == DEPRECATED_FP_REGNUM |
29134980 OF |
619 | /* The size is a fixed-size. */ |
620 | && ((insn & 0x0F00) >> 8) == 0x0001 | |
621 | /* A negative offset. */ | |
622 | && (cris_get_signed_offset (insn) < 0)) | |
623 | { | |
624 | /* move.S rZ,[r8-U] (?) */ | |
625 | insn_next = read_memory_unsigned_integer (ip, sizeof (short)); | |
626 | ip += sizeof (short); | |
627 | regno = cris_get_operand2 (insn_next); | |
628 | if ((regno >= 0 && regno < SP_REGNUM) | |
629 | && cris_get_mode (insn_next) == PREFIX_OFFSET_MODE | |
630 | && cris_get_opcode (insn_next) == 0x000F) | |
631 | { | |
632 | /* move.S rZ,[r8-U] */ | |
633 | continue; | |
634 | } | |
635 | else | |
636 | { | |
637 | /* The prologue ended before the limit was reached. */ | |
638 | ip -= 2 * sizeof (short); | |
639 | break; | |
640 | } | |
641 | } | |
0ba6dca9 | 642 | else if (cris_get_operand2 (insn) == DEPRECATED_FP_REGNUM |
29134980 OF |
643 | /* The size is a fixed-size. */ |
644 | && ((insn & 0x0F00) >> 8) == 0x0001 | |
645 | /* A positive offset. */ | |
646 | && (cris_get_signed_offset (insn) > 0)) | |
647 | { | |
648 | /* move.S [r8+U],rZ (?) */ | |
649 | insn_next = read_memory_unsigned_integer (ip, sizeof (short)); | |
650 | ip += sizeof (short); | |
651 | regno = cris_get_operand2 (insn_next); | |
652 | if ((regno >= 0 && regno < SP_REGNUM) | |
653 | && cris_get_mode (insn_next) == PREFIX_OFFSET_MODE | |
654 | && cris_get_opcode (insn_next) == 0x0009 | |
655 | && cris_get_operand1 (insn_next) == regno) | |
656 | { | |
657 | /* move.S [r8+U],rZ */ | |
658 | continue; | |
659 | } | |
660 | else | |
661 | { | |
662 | /* The prologue ended before the limit was reached. */ | |
663 | ip -= 2 * sizeof (short); | |
664 | break; | |
665 | } | |
666 | } | |
667 | else | |
668 | { | |
669 | /* The prologue ended before the limit was reached. */ | |
670 | ip -= sizeof (short); | |
671 | break; | |
672 | } | |
673 | } | |
674 | while (ip < limit); | |
675 | ||
676 | /* We only want to know the end of the prologue when | |
677 | fi->saved_regs == 0. */ | |
1b1d3794 | 678 | if (!deprecated_get_frame_saved_regs (fi)) |
29134980 OF |
679 | return ip; |
680 | ||
681 | if (have_fp) | |
682 | { | |
1b1d3794 | 683 | deprecated_get_frame_saved_regs (fi)[DEPRECATED_FP_REGNUM] = get_frame_base (fi); |
29134980 OF |
684 | |
685 | /* Calculate the addresses. */ | |
686 | for (regno = regsave; regno >= 0; regno--) | |
687 | { | |
1b1d3794 | 688 | deprecated_get_frame_saved_regs (fi)[regno] = get_frame_base (fi) - val; |
29134980 OF |
689 | val -= 4; |
690 | } | |
da50a4b7 | 691 | if (get_frame_extra_info (fi)->leaf_function) |
29134980 OF |
692 | { |
693 | /* Set the register SP to contain the stack pointer of | |
694 | the caller. */ | |
1b1d3794 | 695 | deprecated_get_frame_saved_regs (fi)[SP_REGNUM] = get_frame_base (fi) + 4; |
29134980 OF |
696 | } |
697 | else | |
698 | { | |
699 | /* Set the register SP to contain the stack pointer of | |
700 | the caller. */ | |
1b1d3794 | 701 | deprecated_get_frame_saved_regs (fi)[SP_REGNUM] = get_frame_base (fi) + 8; |
29134980 OF |
702 | |
703 | /* Set the register SRP to contain the return address of | |
704 | the caller. */ | |
1b1d3794 | 705 | deprecated_get_frame_saved_regs (fi)[SRP_REGNUM] = get_frame_base (fi) + 4; |
29134980 OF |
706 | } |
707 | } | |
708 | return ip; | |
709 | } | |
710 | ||
711 | /* Advance pc beyond any function entry prologue instructions at pc | |
712 | to reach some "real" code. */ | |
713 | ||
a78f21af | 714 | static CORE_ADDR |
29134980 OF |
715 | cris_skip_prologue (CORE_ADDR pc) |
716 | { | |
717 | return cris_skip_prologue_main (pc, 0); | |
718 | } | |
719 | ||
720 | /* As cris_skip_prologue, but stops as soon as it knows that the function | |
721 | has a frame. Its result is equal to its input pc if the function is | |
722 | frameless, unequal otherwise. */ | |
723 | ||
a78f21af | 724 | static CORE_ADDR |
29134980 OF |
725 | cris_skip_prologue_frameless_p (CORE_ADDR pc) |
726 | { | |
727 | return cris_skip_prologue_main (pc, 1); | |
728 | } | |
729 | ||
730 | /* Given a PC value corresponding to the start of a function, return the PC | |
731 | of the first instruction after the function prologue. */ | |
732 | ||
a78f21af | 733 | static CORE_ADDR |
29134980 OF |
734 | cris_skip_prologue_main (CORE_ADDR pc, int frameless_p) |
735 | { | |
f6c609c4 AC |
736 | struct cleanup *old_chain = make_cleanup (null_cleanup, NULL); |
737 | struct frame_info *fi; | |
29134980 OF |
738 | struct symtab_and_line sal = find_pc_line (pc, 0); |
739 | int best_limit; | |
740 | CORE_ADDR pc_after_prologue; | |
741 | ||
f6c609c4 AC |
742 | /* frame_info now contains dynamic memory. Since fi is a dummy |
743 | here, I don't bother allocating memory for saved_regs. */ | |
744 | fi = deprecated_frame_xmalloc_with_cleanup (0, sizeof (struct frame_extra_info)); | |
29134980 OF |
745 | |
746 | /* If there is no symbol information then sal.end == 0, and we end up | |
747 | examining only the first instruction in the function prologue. | |
748 | Exaggerating the limit seems to be harmless. */ | |
749 | if (sal.end > 0) | |
750 | best_limit = sal.end; | |
751 | else | |
752 | best_limit = pc + 100; | |
753 | ||
f6c609c4 AC |
754 | pc_after_prologue = cris_examine (pc, best_limit, fi, frameless_p); |
755 | do_cleanups (old_chain); | |
29134980 OF |
756 | return pc_after_prologue; |
757 | } | |
758 | ||
759 | /* Use the program counter to determine the contents and size of a breakpoint | |
760 | instruction. It returns a pointer to a string of bytes that encode a | |
761 | breakpoint instruction, stores the length of the string to *lenptr, and | |
762 | adjusts pcptr (if necessary) to point to the actual memory location where | |
763 | the breakpoint should be inserted. */ | |
764 | ||
a78f21af | 765 | static const unsigned char * |
29134980 OF |
766 | cris_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr) |
767 | { | |
768 | static unsigned char break_insn[] = {0x38, 0xe9}; | |
769 | *lenptr = 2; | |
770 | ||
771 | return break_insn; | |
772 | } | |
773 | ||
774 | /* Returns the register SRP (subroutine return pointer) which must contain | |
775 | the content of the register PC after a function call. */ | |
776 | ||
a208b0cb AC |
777 | static CORE_ADDR |
778 | cris_saved_pc_after_call (struct frame_info *frame) | |
29134980 OF |
779 | { |
780 | return read_register (SRP_REGNUM); | |
781 | } | |
782 | ||
783 | /* Returns 1 if spec_reg is applicable to the current gdbarch's CRIS version, | |
784 | 0 otherwise. */ | |
785 | ||
a78f21af | 786 | static int |
29134980 OF |
787 | cris_spec_reg_applicable (struct cris_spec_reg spec_reg) |
788 | { | |
789 | int version = cris_version (); | |
790 | ||
791 | switch (spec_reg.applicable_version) | |
792 | { | |
793 | case cris_ver_version_all: | |
794 | return 1; | |
795 | case cris_ver_warning: | |
796 | /* Indeterminate/obsolete. */ | |
797 | return 0; | |
798 | case cris_ver_sim: | |
799 | /* Simulator only. */ | |
800 | return 0; | |
801 | case cris_ver_v0_3: | |
802 | return (version >= 0 && version <= 3); | |
803 | case cris_ver_v3p: | |
804 | return (version >= 3); | |
805 | case cris_ver_v8: | |
806 | return (version == 8 || version == 9); | |
807 | case cris_ver_v8p: | |
808 | return (version >= 8); | |
809 | case cris_ver_v10p: | |
810 | return (version >= 10); | |
811 | default: | |
812 | /* Invalid cris version. */ | |
813 | return 0; | |
814 | } | |
815 | } | |
816 | ||
817 | /* Returns the register size in unit byte. Returns 0 for an unimplemented | |
818 | register, -1 for an invalid register. */ | |
819 | ||
a78f21af | 820 | static int |
29134980 OF |
821 | cris_register_size (int regno) |
822 | { | |
823 | int i; | |
824 | int spec_regno; | |
825 | ||
826 | if (regno >= 0 && regno < NUM_GENREGS) | |
827 | { | |
828 | /* General registers (R0 - R15) are 32 bits. */ | |
829 | return 4; | |
830 | } | |
831 | else if (regno >= NUM_GENREGS && regno < NUM_REGS) | |
832 | { | |
833 | /* Special register (R16 - R31). cris_spec_regs is zero-based. | |
834 | Adjust regno accordingly. */ | |
835 | spec_regno = regno - NUM_GENREGS; | |
836 | ||
837 | /* The entries in cris_spec_regs are stored in register number order, | |
838 | which means we can shortcut into the array when searching it. */ | |
839 | for (i = spec_regno; cris_spec_regs[i].name != NULL; i++) | |
840 | { | |
841 | if (cris_spec_regs[i].number == spec_regno | |
842 | && cris_spec_reg_applicable (cris_spec_regs[i])) | |
843 | /* Go with the first applicable register. */ | |
844 | return cris_spec_regs[i].reg_size; | |
845 | } | |
846 | /* Special register not applicable to this CRIS version. */ | |
847 | return 0; | |
848 | } | |
849 | else | |
850 | { | |
851 | /* Invalid register. */ | |
852 | return -1; | |
853 | } | |
854 | } | |
855 | ||
856 | /* Nonzero if regno should not be fetched from the target. This is the case | |
857 | for unimplemented (size 0) and non-existant registers. */ | |
858 | ||
a78f21af | 859 | static int |
29134980 OF |
860 | cris_cannot_fetch_register (int regno) |
861 | { | |
862 | return ((regno < 0 || regno >= NUM_REGS) | |
863 | || (cris_register_size (regno) == 0)); | |
864 | } | |
865 | ||
866 | /* Nonzero if regno should not be written to the target, for various | |
867 | reasons. */ | |
868 | ||
a78f21af | 869 | static int |
29134980 OF |
870 | cris_cannot_store_register (int regno) |
871 | { | |
872 | /* There are three kinds of registers we refuse to write to. | |
873 | 1. Those that not implemented. | |
874 | 2. Those that are read-only (depends on the processor mode). | |
875 | 3. Those registers to which a write has no effect. | |
876 | */ | |
877 | ||
878 | if (regno < 0 || regno >= NUM_REGS || cris_register_size (regno) == 0) | |
879 | /* Not implemented. */ | |
880 | return 1; | |
881 | ||
882 | else if (regno == VR_REGNUM) | |
883 | /* Read-only. */ | |
884 | return 1; | |
885 | ||
886 | else if (regno == P0_REGNUM || regno == P4_REGNUM || regno == P8_REGNUM) | |
887 | /* Writing has no effect. */ | |
888 | return 1; | |
889 | ||
890 | else if (cris_mode () == CRIS_MODE_USER) | |
891 | { | |
892 | if (regno == IBR_REGNUM || regno == BAR_REGNUM || regno == BRP_REGNUM | |
893 | || regno == IRP_REGNUM) | |
894 | /* Read-only in user mode. */ | |
895 | return 1; | |
896 | } | |
897 | ||
898 | return 0; | |
899 | } | |
900 | ||
901 | /* Returns the register offset for the first byte of register regno's space | |
902 | in the saved register state. Returns -1 for an invalid or unimplemented | |
903 | register. */ | |
904 | ||
a78f21af | 905 | static int |
29134980 OF |
906 | cris_register_offset (int regno) |
907 | { | |
908 | int i; | |
909 | int reg_size; | |
910 | int offset = 0; | |
911 | ||
912 | if (regno >= 0 && regno < NUM_REGS) | |
913 | { | |
914 | /* FIXME: The offsets should be cached and calculated only once, | |
915 | when the architecture being debugged has changed. */ | |
916 | for (i = 0; i < regno; i++) | |
917 | offset += cris_register_size (i); | |
918 | ||
919 | return offset; | |
920 | } | |
921 | else | |
922 | { | |
923 | /* Invalid register. */ | |
924 | return -1; | |
925 | } | |
926 | } | |
927 | ||
928 | /* Return the GDB type (defined in gdbtypes.c) for the "standard" data type | |
929 | of data in register regno. */ | |
930 | ||
a78f21af | 931 | static struct type * |
29134980 OF |
932 | cris_register_virtual_type (int regno) |
933 | { | |
934 | if (regno == SP_REGNUM || regno == PC_REGNUM | |
935 | || (regno > P8_REGNUM && regno < USP_REGNUM)) | |
936 | { | |
937 | /* SP, PC, IBR, IRP, SRP, BAR, DCCR, BRP */ | |
938 | return lookup_pointer_type (builtin_type_void); | |
939 | } | |
940 | else if (regno == P8_REGNUM || regno == USP_REGNUM | |
941 | || (regno >= 0 && regno < SP_REGNUM)) | |
942 | { | |
943 | /* R0 - R13, P8, P15 */ | |
944 | return builtin_type_unsigned_long; | |
945 | } | |
946 | else if (regno > P3_REGNUM && regno < P8_REGNUM) | |
947 | { | |
948 | /* P4, CCR, DCR0, DCR1 */ | |
949 | return builtin_type_unsigned_short; | |
950 | } | |
951 | else if (regno > PC_REGNUM && regno < P4_REGNUM) | |
952 | { | |
953 | /* P0, P1, P2, P3 */ | |
954 | return builtin_type_unsigned_char; | |
955 | } | |
956 | else | |
957 | { | |
958 | /* Invalid register. */ | |
959 | return builtin_type_void; | |
960 | } | |
961 | } | |
962 | ||
963 | /* Stores a function return value of type type, where valbuf is the address | |
964 | of the value to be stored. */ | |
965 | ||
966 | /* In the original CRIS ABI, R10 is used to store return values. */ | |
967 | ||
a78f21af | 968 | static void |
29134980 OF |
969 | cris_abi_original_store_return_value (struct type *type, char *valbuf) |
970 | { | |
971 | int len = TYPE_LENGTH (type); | |
972 | ||
b1e29e33 | 973 | if (len <= DEPRECATED_REGISTER_SIZE) |
62700349 | 974 | deprecated_write_register_bytes (DEPRECATED_REGISTER_BYTE (RET_REGNUM), valbuf, len); |
29134980 OF |
975 | else |
976 | internal_error (__FILE__, __LINE__, "cris_abi_original_store_return_value: type length too large."); | |
977 | } | |
978 | ||
979 | /* In the CRIS ABI V2, R10 and R11 are used to store return values. */ | |
980 | ||
a78f21af | 981 | static void |
29134980 OF |
982 | cris_abi_v2_store_return_value (struct type *type, char *valbuf) |
983 | { | |
984 | int len = TYPE_LENGTH (type); | |
985 | ||
b1e29e33 | 986 | if (len <= 2 * DEPRECATED_REGISTER_SIZE) |
29134980 OF |
987 | { |
988 | /* Note that this works since R10 and R11 are consecutive registers. */ | |
62700349 AC |
989 | deprecated_write_register_bytes (DEPRECATED_REGISTER_BYTE (RET_REGNUM), |
990 | valbuf, len); | |
29134980 OF |
991 | } |
992 | else | |
993 | internal_error (__FILE__, __LINE__, "cris_abi_v2_store_return_value: type length too large."); | |
994 | } | |
995 | ||
996 | /* Return the name of register regno as a string. Return NULL for an invalid or | |
997 | unimplemented register. */ | |
998 | ||
a78f21af | 999 | static const char * |
29134980 OF |
1000 | cris_register_name (int regno) |
1001 | { | |
1002 | static char *cris_genreg_names[] = | |
1003 | { "r0", "r1", "r2", "r3", \ | |
1004 | "r4", "r5", "r6", "r7", \ | |
1005 | "r8", "r9", "r10", "r11", \ | |
1006 | "r12", "r13", "sp", "pc" }; | |
1007 | ||
1008 | int i; | |
1009 | int spec_regno; | |
1010 | ||
1011 | if (regno >= 0 && regno < NUM_GENREGS) | |
1012 | { | |
1013 | /* General register. */ | |
1014 | return cris_genreg_names[regno]; | |
1015 | } | |
1016 | else if (regno >= NUM_GENREGS && regno < NUM_REGS) | |
1017 | { | |
1018 | /* Special register (R16 - R31). cris_spec_regs is zero-based. | |
1019 | Adjust regno accordingly. */ | |
1020 | spec_regno = regno - NUM_GENREGS; | |
1021 | ||
1022 | /* The entries in cris_spec_regs are stored in register number order, | |
1023 | which means we can shortcut into the array when searching it. */ | |
1024 | for (i = spec_regno; cris_spec_regs[i].name != NULL; i++) | |
1025 | { | |
1026 | if (cris_spec_regs[i].number == spec_regno | |
1027 | && cris_spec_reg_applicable (cris_spec_regs[i])) | |
1028 | /* Go with the first applicable register. */ | |
1029 | return cris_spec_regs[i].name; | |
1030 | } | |
1031 | /* Special register not applicable to this CRIS version. */ | |
1032 | return NULL; | |
1033 | } | |
1034 | else | |
1035 | { | |
1036 | /* Invalid register. */ | |
1037 | return NULL; | |
1038 | } | |
1039 | } | |
1040 | ||
a78f21af | 1041 | static int |
29134980 OF |
1042 | cris_register_bytes_ok (long bytes) |
1043 | { | |
b8b527c5 | 1044 | return (bytes == DEPRECATED_REGISTER_BYTES); |
29134980 OF |
1045 | } |
1046 | ||
1047 | /* Extract from an array regbuf containing the raw register state a function | |
1048 | return value of type type, and copy that, in virtual format, into | |
1049 | valbuf. */ | |
1050 | ||
1051 | /* In the original CRIS ABI, R10 is used to return values. */ | |
1052 | ||
a78f21af | 1053 | static void |
29134980 OF |
1054 | cris_abi_original_extract_return_value (struct type *type, char *regbuf, |
1055 | char *valbuf) | |
1056 | { | |
1057 | int len = TYPE_LENGTH (type); | |
1058 | ||
b1e29e33 | 1059 | if (len <= DEPRECATED_REGISTER_SIZE) |
62700349 | 1060 | memcpy (valbuf, regbuf + DEPRECATED_REGISTER_BYTE (RET_REGNUM), len); |
29134980 OF |
1061 | else |
1062 | internal_error (__FILE__, __LINE__, "cris_abi_original_extract_return_value: type length too large"); | |
1063 | } | |
1064 | ||
1065 | /* In the CRIS ABI V2, R10 and R11 are used to store return values. */ | |
1066 | ||
a78f21af | 1067 | static void |
29134980 OF |
1068 | cris_abi_v2_extract_return_value (struct type *type, char *regbuf, |
1069 | char *valbuf) | |
1070 | { | |
1071 | int len = TYPE_LENGTH (type); | |
1072 | ||
b1e29e33 | 1073 | if (len <= 2 * DEPRECATED_REGISTER_SIZE) |
62700349 | 1074 | memcpy (valbuf, regbuf + DEPRECATED_REGISTER_BYTE (RET_REGNUM), len); |
29134980 OF |
1075 | else |
1076 | internal_error (__FILE__, __LINE__, "cris_abi_v2_extract_return_value: type length too large"); | |
1077 | } | |
1078 | ||
fcacc9c2 AC |
1079 | /* Store the address of the place in which to copy the structure the |
1080 | subroutine will return. In the CRIS ABI, R9 is used in order to | |
1081 | pass the address of the allocated area where a structure return | |
1082 | value must be stored. */ | |
1083 | ||
1084 | static void | |
1085 | cris_store_struct_return (CORE_ADDR addr, CORE_ADDR sp) | |
1086 | { | |
1087 | write_register (STR_REGNUM, addr); | |
1088 | } | |
1089 | ||
29134980 OF |
1090 | /* Returns 1 if the given type will be passed by pointer rather than |
1091 | directly. */ | |
1092 | ||
1093 | /* In the original CRIS ABI, arguments shorter than or equal to 32 bits are | |
1094 | passed by value. */ | |
1095 | ||
a78f21af | 1096 | static int |
29134980 OF |
1097 | cris_abi_original_reg_struct_has_addr (int gcc_p, struct type *type) |
1098 | { | |
1099 | return (TYPE_LENGTH (type) > 4); | |
1100 | } | |
1101 | ||
1102 | /* In the CRIS ABI V2, arguments shorter than or equal to 64 bits are passed | |
1103 | by value. */ | |
1104 | ||
a78f21af | 1105 | static int |
29134980 OF |
1106 | cris_abi_v2_reg_struct_has_addr (int gcc_p, struct type *type) |
1107 | { | |
1108 | return (TYPE_LENGTH (type) > 8); | |
1109 | } | |
1110 | ||
1111 | /* Returns 1 if the function invocation represented by fi does not have a | |
1112 | stack frame associated with it. Otherwise return 0. */ | |
1113 | ||
a78f21af | 1114 | static int |
29134980 OF |
1115 | cris_frameless_function_invocation (struct frame_info *fi) |
1116 | { | |
5a203e44 | 1117 | if ((get_frame_type (fi) == SIGTRAMP_FRAME)) |
29134980 OF |
1118 | return 0; |
1119 | else | |
1120 | return frameless_look_for_prologue (fi); | |
1121 | } | |
1122 | ||
f30ee0bc AC |
1123 | /* See frame.h. Determines the address of all registers in the |
1124 | current stack frame storing each in frame->saved_regs. Space for | |
1125 | frame->saved_regs shall be allocated by | |
1126 | DEPRECATED_FRAME_INIT_SAVED_REGS using frame_saved_regs_zalloc. */ | |
29134980 | 1127 | |
a78f21af | 1128 | static void |
29134980 OF |
1129 | cris_frame_init_saved_regs (struct frame_info *fi) |
1130 | { | |
1131 | CORE_ADDR ip; | |
1132 | struct symtab_and_line sal; | |
1133 | int best_limit; | |
1e2330ba AC |
1134 | char *dummy_regs = deprecated_generic_find_dummy_frame (get_frame_pc (fi), |
1135 | get_frame_base (fi)); | |
29134980 OF |
1136 | |
1137 | /* Examine the entire prologue. */ | |
52f0bd74 | 1138 | int frameless_p = 0; |
29134980 OF |
1139 | |
1140 | /* Has this frame's registers already been initialized? */ | |
1b1d3794 | 1141 | if (deprecated_get_frame_saved_regs (fi)) |
29134980 OF |
1142 | return; |
1143 | ||
1144 | frame_saved_regs_zalloc (fi); | |
1145 | ||
1146 | if (dummy_regs) | |
1147 | { | |
1148 | /* I don't see this ever happening, considering the context in which | |
1149 | cris_frame_init_saved_regs is called (always when we're not in | |
1150 | a dummy frame). */ | |
1b1d3794 | 1151 | memcpy (deprecated_get_frame_saved_regs (fi), dummy_regs, SIZEOF_FRAME_SAVED_REGS); |
29134980 OF |
1152 | } |
1153 | else | |
1154 | { | |
be41e9f4 | 1155 | ip = get_frame_func (fi); |
29134980 OF |
1156 | sal = find_pc_line (ip, 0); |
1157 | ||
1158 | /* If there is no symbol information then sal.end == 0, and we end up | |
1159 | examining only the first instruction in the function prologue. | |
1160 | Exaggerating the limit seems to be harmless. */ | |
1161 | if (sal.end > 0) | |
1162 | best_limit = sal.end; | |
1163 | else | |
1164 | best_limit = ip + 100; | |
1165 | ||
1166 | cris_examine (ip, best_limit, fi, frameless_p); | |
1167 | } | |
1168 | } | |
1169 | ||
1170 | /* Initialises the extra frame information at the creation of a new frame. | |
1171 | The inparameter fromleaf is 0 when the call is from create_new_frame. | |
1172 | When the call is from get_prev_frame_info, fromleaf is determined by | |
1173 | cris_frameless_function_invocation. */ | |
1174 | ||
a78f21af | 1175 | static void |
29134980 OF |
1176 | cris_init_extra_frame_info (int fromleaf, struct frame_info *fi) |
1177 | { | |
11c02a10 | 1178 | if (get_next_frame (fi)) |
29134980 OF |
1179 | { |
1180 | /* Called from get_prev_frame. */ | |
8bedc050 | 1181 | deprecated_update_frame_pc_hack (fi, DEPRECATED_FRAME_SAVED_PC (get_next_frame (fi))); |
29134980 OF |
1182 | } |
1183 | ||
a00a19e9 | 1184 | frame_extra_info_zalloc (fi, sizeof (struct frame_extra_info)); |
29134980 | 1185 | |
da50a4b7 AC |
1186 | get_frame_extra_info (fi)->return_pc = 0; |
1187 | get_frame_extra_info (fi)->leaf_function = 0; | |
29134980 | 1188 | |
1e2330ba AC |
1189 | if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi), |
1190 | get_frame_base (fi), | |
1191 | get_frame_base (fi))) | |
29134980 | 1192 | { |
04714b91 AC |
1193 | /* We need to setup fi->frame here because call_function_by_hand |
1194 | gets it wrong by assuming it's always FP. */ | |
1e2330ba | 1195 | deprecated_update_frame_base_hack (fi, deprecated_read_register_dummy (get_frame_pc (fi), get_frame_base (fi), SP_REGNUM)); |
da50a4b7 | 1196 | get_frame_extra_info (fi)->return_pc = |
1e2330ba AC |
1197 | deprecated_read_register_dummy (get_frame_pc (fi), |
1198 | get_frame_base (fi), PC_REGNUM); | |
29134980 OF |
1199 | |
1200 | /* FIXME: Is this necessarily true? */ | |
da50a4b7 | 1201 | get_frame_extra_info (fi)->leaf_function = 0; |
29134980 OF |
1202 | } |
1203 | else | |
1204 | { | |
1205 | cris_frame_init_saved_regs (fi); | |
1206 | ||
1207 | /* Check fromleaf/frameless_function_invocation. (FIXME) */ | |
1208 | ||
1b1d3794 | 1209 | if (deprecated_get_frame_saved_regs (fi)[SRP_REGNUM] != 0) |
29134980 OF |
1210 | { |
1211 | /* SRP was saved on the stack; non-leaf function. */ | |
da50a4b7 | 1212 | get_frame_extra_info (fi)->return_pc = |
1b1d3794 | 1213 | read_memory_integer (deprecated_get_frame_saved_regs (fi)[SRP_REGNUM], |
12c266ea | 1214 | DEPRECATED_REGISTER_RAW_SIZE (SRP_REGNUM)); |
29134980 OF |
1215 | } |
1216 | else | |
1217 | { | |
1218 | /* SRP is still in a register; leaf function. */ | |
da50a4b7 | 1219 | get_frame_extra_info (fi)->return_pc = read_register (SRP_REGNUM); |
29134980 | 1220 | /* FIXME: Should leaf_function be set to 1 here? */ |
da50a4b7 | 1221 | get_frame_extra_info (fi)->leaf_function = 1; |
29134980 OF |
1222 | } |
1223 | } | |
1224 | } | |
1225 | ||
1226 | /* Return the content of the frame pointer in the present frame. In other | |
1227 | words, determine the address of the calling function's frame. */ | |
1228 | ||
a78f21af | 1229 | static CORE_ADDR |
29134980 OF |
1230 | cris_frame_chain (struct frame_info *fi) |
1231 | { | |
1e2330ba AC |
1232 | if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi), |
1233 | get_frame_base (fi), | |
1234 | get_frame_base (fi))) | |
29134980 | 1235 | { |
1e2330ba | 1236 | return get_frame_base (fi); |
29134980 | 1237 | } |
627b3ba2 | 1238 | else if (!deprecated_inside_entry_file (get_frame_pc (fi))) |
29134980 | 1239 | { |
c193f6ac | 1240 | return read_memory_unsigned_integer (get_frame_base (fi), 4); |
29134980 OF |
1241 | } |
1242 | else | |
1243 | { | |
1244 | return 0; | |
1245 | } | |
1246 | } | |
1247 | ||
1248 | /* Return the saved PC (which equals the return address) of this frame. */ | |
1249 | ||
a78f21af | 1250 | static CORE_ADDR |
29134980 OF |
1251 | cris_frame_saved_pc (struct frame_info *fi) |
1252 | { | |
da50a4b7 | 1253 | return get_frame_extra_info (fi)->return_pc; |
29134980 OF |
1254 | } |
1255 | ||
29134980 OF |
1256 | /* Setup the function arguments for calling a function in the inferior. */ |
1257 | ||
a78f21af | 1258 | static CORE_ADDR |
29134980 OF |
1259 | cris_abi_original_push_arguments (int nargs, struct value **args, |
1260 | CORE_ADDR sp, int struct_return, | |
1261 | CORE_ADDR struct_addr) | |
1262 | { | |
1263 | int stack_alloc; | |
1264 | int stack_offset; | |
1265 | int argreg; | |
1266 | int argnum; | |
1267 | struct type *type; | |
1268 | int len; | |
1269 | CORE_ADDR regval; | |
1270 | char *val; | |
1271 | ||
1272 | /* Data and parameters reside in different areas on the stack. | |
1273 | Both frame pointers grow toward higher addresses. */ | |
1274 | CORE_ADDR fp_params; | |
1275 | CORE_ADDR fp_data; | |
1276 | ||
1277 | /* Are we returning a value using a structure return or a normal value | |
1278 | return? struct_addr is the address of the reserved space for the return | |
1279 | structure to be written on the stack. */ | |
1280 | if (struct_return) | |
1281 | { | |
1282 | write_register (STR_REGNUM, struct_addr); | |
1283 | } | |
1284 | ||
1285 | /* Make sure there's space on the stack. Allocate space for data and a | |
1286 | parameter to refer to that data. */ | |
1287 | for (argnum = 0, stack_alloc = 0; argnum < nargs; argnum++) | |
b1e29e33 | 1288 | stack_alloc += (TYPE_LENGTH (VALUE_TYPE (args[argnum])) + DEPRECATED_REGISTER_SIZE); |
29134980 OF |
1289 | sp -= stack_alloc; |
1290 | /* We may over-allocate a little here, but that won't hurt anything. */ | |
1291 | ||
1292 | /* Initialize stack frame pointers. */ | |
1293 | fp_params = sp; | |
b1e29e33 | 1294 | fp_data = sp + (nargs * DEPRECATED_REGISTER_SIZE); |
29134980 OF |
1295 | |
1296 | /* Now load as many as possible of the first arguments into | |
1297 | registers, and push the rest onto the stack. */ | |
1298 | argreg = ARG1_REGNUM; | |
1299 | stack_offset = 0; | |
1300 | ||
1301 | for (argnum = 0; argnum < nargs; argnum++) | |
1302 | { | |
1303 | type = VALUE_TYPE (args[argnum]); | |
1304 | len = TYPE_LENGTH (type); | |
1305 | val = (char *) VALUE_CONTENTS (args[argnum]); | |
1306 | ||
b1e29e33 | 1307 | if (len <= DEPRECATED_REGISTER_SIZE && argreg <= ARG4_REGNUM) |
29134980 OF |
1308 | { |
1309 | /* Data fits in a register; put it in the first available | |
1310 | register. */ | |
1311 | write_register (argreg, *(unsigned long *) val); | |
1312 | argreg++; | |
1313 | } | |
b1e29e33 | 1314 | else if (len > DEPRECATED_REGISTER_SIZE && argreg <= ARG4_REGNUM) |
29134980 OF |
1315 | { |
1316 | /* Data does not fit in register; pass it on the stack and | |
1317 | put its address in the first available register. */ | |
1318 | write_memory (fp_data, val, len); | |
1319 | write_register (argreg, fp_data); | |
1320 | fp_data += len; | |
1321 | argreg++; | |
1322 | } | |
b1e29e33 | 1323 | else if (len > DEPRECATED_REGISTER_SIZE) |
29134980 OF |
1324 | { |
1325 | /* Data does not fit in register; put both data and | |
1326 | parameter on the stack. */ | |
1327 | write_memory (fp_data, val, len); | |
b1e29e33 | 1328 | write_memory (fp_params, (char *) (&fp_data), DEPRECATED_REGISTER_SIZE); |
29134980 | 1329 | fp_data += len; |
b1e29e33 | 1330 | fp_params += DEPRECATED_REGISTER_SIZE; |
29134980 OF |
1331 | } |
1332 | else | |
1333 | { | |
1334 | /* Data fits in a register, but we are out of registers; | |
1335 | put the parameter on the stack. */ | |
b1e29e33 AC |
1336 | write_memory (fp_params, val, DEPRECATED_REGISTER_SIZE); |
1337 | fp_params += DEPRECATED_REGISTER_SIZE; | |
29134980 OF |
1338 | } |
1339 | } | |
1340 | ||
1341 | return sp; | |
1342 | } | |
1343 | ||
a78f21af | 1344 | static CORE_ADDR |
29134980 OF |
1345 | cris_abi_v2_push_arguments (int nargs, struct value **args, CORE_ADDR sp, |
1346 | int struct_return, CORE_ADDR struct_addr) | |
1347 | { | |
1348 | int stack_alloc; | |
1349 | int stack_offset; | |
1350 | int argreg; | |
1351 | int argnum; | |
1352 | ||
1353 | CORE_ADDR regval; | |
1354 | ||
1355 | /* The function's arguments and memory allocated by gdb for the arguments to | |
1356 | point at reside in separate areas on the stack. | |
1357 | Both frame pointers grow toward higher addresses. */ | |
1358 | CORE_ADDR fp_arg; | |
1359 | CORE_ADDR fp_mem; | |
1360 | ||
1361 | /* Are we returning a value using a structure return or a normal value | |
1362 | return? struct_addr is the address of the reserved space for the return | |
1363 | structure to be written on the stack. */ | |
1364 | if (struct_return) | |
1365 | { | |
1366 | write_register (STR_REGNUM, struct_addr); | |
1367 | } | |
1368 | ||
1369 | /* Allocate enough to keep things word-aligned on both parts of the | |
1370 | stack. */ | |
1371 | stack_alloc = 0; | |
1372 | for (argnum = 0; argnum < nargs; argnum++) | |
1373 | { | |
1374 | int len; | |
1375 | int reg_demand; | |
1376 | ||
1377 | len = TYPE_LENGTH (VALUE_TYPE (args[argnum])); | |
b1e29e33 | 1378 | reg_demand = (len / DEPRECATED_REGISTER_SIZE) + (len % DEPRECATED_REGISTER_SIZE != 0 ? 1 : 0); |
29134980 | 1379 | |
b1e29e33 AC |
1380 | /* reg_demand * DEPRECATED_REGISTER_SIZE is the amount of memory |
1381 | we might need to allocate for this argument. 2 * | |
1382 | DEPRECATED_REGISTER_SIZE is the amount of stack space we | |
1383 | might need to pass the argument itself (either by value or by | |
29134980 | 1384 | reference). */ |
b1e29e33 | 1385 | stack_alloc += (reg_demand * DEPRECATED_REGISTER_SIZE + 2 * DEPRECATED_REGISTER_SIZE); |
29134980 OF |
1386 | } |
1387 | sp -= stack_alloc; | |
1388 | /* We may over-allocate a little here, but that won't hurt anything. */ | |
1389 | ||
1390 | /* Initialize frame pointers. */ | |
1391 | fp_arg = sp; | |
b1e29e33 | 1392 | fp_mem = sp + (nargs * (2 * DEPRECATED_REGISTER_SIZE)); |
29134980 OF |
1393 | |
1394 | /* Now load as many as possible of the first arguments into registers, | |
1395 | and push the rest onto the stack. */ | |
1396 | argreg = ARG1_REGNUM; | |
1397 | stack_offset = 0; | |
1398 | ||
1399 | for (argnum = 0; argnum < nargs; argnum++) | |
1400 | { | |
1401 | int len; | |
1402 | char *val; | |
1403 | int reg_demand; | |
1404 | int i; | |
1405 | ||
1406 | len = TYPE_LENGTH (VALUE_TYPE (args[argnum])); | |
1407 | val = (char *) VALUE_CONTENTS (args[argnum]); | |
1408 | ||
1409 | /* How may registers worth of storage do we need for this argument? */ | |
b1e29e33 | 1410 | reg_demand = (len / DEPRECATED_REGISTER_SIZE) + (len % DEPRECATED_REGISTER_SIZE != 0 ? 1 : 0); |
29134980 | 1411 | |
b1e29e33 | 1412 | if (len <= (2 * DEPRECATED_REGISTER_SIZE) |
29134980 OF |
1413 | && (argreg + reg_demand - 1 <= ARG4_REGNUM)) |
1414 | { | |
1415 | /* Data passed by value. Fits in available register(s). */ | |
1416 | for (i = 0; i < reg_demand; i++) | |
1417 | { | |
1418 | write_register (argreg, *(unsigned long *) val); | |
1419 | argreg++; | |
b1e29e33 | 1420 | val += DEPRECATED_REGISTER_SIZE; |
29134980 OF |
1421 | } |
1422 | } | |
b1e29e33 | 1423 | else if (len <= (2 * DEPRECATED_REGISTER_SIZE) && argreg <= ARG4_REGNUM) |
29134980 OF |
1424 | { |
1425 | /* Data passed by value. Does not fit in available register(s). | |
1426 | Use the register(s) first, then the stack. */ | |
1427 | for (i = 0; i < reg_demand; i++) | |
1428 | { | |
1429 | if (argreg <= ARG4_REGNUM) | |
1430 | { | |
1431 | write_register (argreg, *(unsigned long *) val); | |
1432 | argreg++; | |
b1e29e33 | 1433 | val += DEPRECATED_REGISTER_SIZE; |
29134980 OF |
1434 | } |
1435 | else | |
1436 | { | |
b1e29e33 AC |
1437 | /* I guess this memory write could write the |
1438 | remaining data all at once instead of in | |
1439 | DEPRECATED_REGISTER_SIZE chunks. */ | |
1440 | write_memory (fp_arg, val, DEPRECATED_REGISTER_SIZE); | |
1441 | fp_arg += DEPRECATED_REGISTER_SIZE; | |
1442 | val += DEPRECATED_REGISTER_SIZE; | |
29134980 OF |
1443 | } |
1444 | } | |
1445 | } | |
b1e29e33 | 1446 | else if (len > (2 * DEPRECATED_REGISTER_SIZE)) |
29134980 OF |
1447 | { |
1448 | /* Data passed by reference. Put it on the stack. */ | |
1449 | write_memory (fp_mem, val, len); | |
b1e29e33 | 1450 | write_memory (fp_arg, (char *) (&fp_mem), DEPRECATED_REGISTER_SIZE); |
29134980 OF |
1451 | |
1452 | /* fp_mem need not be word-aligned since it's just a chunk of | |
1453 | memory being pointed at. That is, += len would do. */ | |
b1e29e33 AC |
1454 | fp_mem += reg_demand * DEPRECATED_REGISTER_SIZE; |
1455 | fp_arg += DEPRECATED_REGISTER_SIZE; | |
29134980 OF |
1456 | } |
1457 | else | |
1458 | { | |
1459 | /* Data passed by value. No available registers. Put it on | |
1460 | the stack. */ | |
1461 | write_memory (fp_arg, val, len); | |
1462 | ||
1463 | /* fp_arg must be word-aligned (i.e., don't += len) to match | |
1464 | the function prologue. */ | |
b1e29e33 | 1465 | fp_arg += reg_demand * DEPRECATED_REGISTER_SIZE; |
29134980 OF |
1466 | } |
1467 | } | |
1468 | ||
1469 | return sp; | |
1470 | } | |
1471 | ||
1472 | /* Never put the return address on the stack. The register SRP is pushed | |
1473 | by the called function unless it is a leaf-function. Due to the BRP | |
1474 | register the PC will change when continue is sent. */ | |
1475 | ||
a78f21af | 1476 | static CORE_ADDR |
29134980 OF |
1477 | cris_push_return_address (CORE_ADDR pc, CORE_ADDR sp) |
1478 | { | |
88a82a65 | 1479 | write_register (SRP_REGNUM, entry_point_address ()); |
29134980 OF |
1480 | return sp; |
1481 | } | |
1482 | ||
1483 | /* Restore the machine to the state it had before the current frame | |
1484 | was created. Discard the innermost frame from the stack and restore | |
1485 | all saved registers. */ | |
1486 | ||
a78f21af | 1487 | static void |
5ae5f592 | 1488 | cris_pop_frame (void) |
29134980 | 1489 | { |
52f0bd74 AC |
1490 | struct frame_info *fi = get_current_frame (); |
1491 | int regno; | |
1492 | int stack_offset = 0; | |
29134980 | 1493 | |
1e2330ba AC |
1494 | if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi), |
1495 | get_frame_base (fi), | |
1496 | get_frame_base (fi))) | |
29134980 OF |
1497 | { |
1498 | /* This happens when we hit a breakpoint set at the entry point, | |
1499 | when returning from a dummy frame. */ | |
1500 | generic_pop_dummy_frame (); | |
1501 | } | |
1502 | else | |
1503 | { | |
1504 | cris_frame_init_saved_regs (fi); | |
1505 | ||
1506 | /* For each register, the address of where it was saved on entry to | |
1507 | the frame now lies in fi->saved_regs[regno], or zero if it was not | |
1508 | saved. This includes special registers such as PC and FP saved in | |
1509 | special ways in the stack frame. The SP_REGNUM is even more | |
1510 | special, the address here is the SP for the next frame, not the | |
1511 | address where the SP was saved. */ | |
1512 | ||
1513 | /* Restore general registers R0 - R7. They were pushed on the stack | |
1514 | after SP was saved. */ | |
0ba6dca9 | 1515 | for (regno = 0; regno < DEPRECATED_FP_REGNUM; regno++) |
29134980 | 1516 | { |
1b1d3794 | 1517 | if (deprecated_get_frame_saved_regs (fi)[regno]) |
29134980 OF |
1518 | { |
1519 | write_register (regno, | |
1b1d3794 | 1520 | read_memory_integer (deprecated_get_frame_saved_regs (fi)[regno], 4)); |
29134980 OF |
1521 | } |
1522 | } | |
1523 | ||
1b1d3794 | 1524 | if (deprecated_get_frame_saved_regs (fi)[DEPRECATED_FP_REGNUM]) |
29134980 OF |
1525 | { |
1526 | /* Pop the frame pointer (R8). It was pushed before SP | |
1527 | was saved. */ | |
0ba6dca9 | 1528 | write_register (DEPRECATED_FP_REGNUM, |
1b1d3794 | 1529 | read_memory_integer (deprecated_get_frame_saved_regs (fi)[DEPRECATED_FP_REGNUM], 4)); |
29134980 OF |
1530 | stack_offset += 4; |
1531 | ||
1532 | /* Not a leaf function. */ | |
1b1d3794 | 1533 | if (deprecated_get_frame_saved_regs (fi)[SRP_REGNUM]) |
29134980 OF |
1534 | { |
1535 | /* SRP was pushed before SP was saved. */ | |
1536 | stack_offset += 4; | |
1537 | } | |
1538 | ||
1539 | /* Restore the SP and adjust for R8 and (possibly) SRP. */ | |
1b1d3794 | 1540 | write_register (SP_REGNUM, deprecated_get_frame_saved_regs (fi)[DEPRECATED_FP_REGNUM] + stack_offset); |
29134980 OF |
1541 | } |
1542 | else | |
1543 | { | |
1544 | /* Currently, we can't get the correct info into fi->saved_regs | |
1545 | without a frame pointer. */ | |
1546 | } | |
1547 | ||
1548 | /* Restore the PC. */ | |
da50a4b7 | 1549 | write_register (PC_REGNUM, get_frame_extra_info (fi)->return_pc); |
29134980 OF |
1550 | } |
1551 | flush_cached_frames (); | |
1552 | } | |
1553 | ||
1554 | /* Calculates a value that measures how good inst_args constraints an | |
1555 | instruction. It stems from cris_constraint, found in cris-dis.c. */ | |
1556 | ||
1557 | static int | |
1558 | constraint (unsigned int insn, const signed char *inst_args, | |
1559 | inst_env_type *inst_env) | |
1560 | { | |
1561 | int retval = 0; | |
1562 | int tmp, i; | |
1563 | ||
1564 | const char *s = inst_args; | |
1565 | ||
1566 | for (; *s; s++) | |
1567 | switch (*s) | |
1568 | { | |
1569 | case 'm': | |
1570 | if ((insn & 0x30) == 0x30) | |
1571 | return -1; | |
1572 | break; | |
1573 | ||
1574 | case 'S': | |
1575 | /* A prefix operand. */ | |
1576 | if (inst_env->prefix_found) | |
1577 | break; | |
1578 | else | |
1579 | return -1; | |
1580 | ||
1581 | case 'B': | |
1582 | /* A "push" prefix. (This check was REMOVED by san 970921.) Check for | |
1583 | valid "push" size. In case of special register, it may be != 4. */ | |
1584 | if (inst_env->prefix_found) | |
1585 | break; | |
1586 | else | |
1587 | return -1; | |
1588 | ||
1589 | case 'D': | |
1590 | retval = (((insn >> 0xC) & 0xF) == (insn & 0xF)); | |
1591 | if (!retval) | |
1592 | return -1; | |
1593 | else | |
1594 | retval += 4; | |
1595 | break; | |
1596 | ||
1597 | case 'P': | |
1598 | tmp = (insn >> 0xC) & 0xF; | |
fa4e4598 OF |
1599 | |
1600 | for (i = 0; cris_spec_regs[i].name != NULL; i++) | |
1601 | { | |
1602 | /* Since we match four bits, we will give a value of | |
1603 | 4 - 1 = 3 in a match. If there is a corresponding | |
1604 | exact match of a special register in another pattern, it | |
1605 | will get a value of 4, which will be higher. This should | |
1606 | be correct in that an exact pattern would match better that | |
1607 | a general pattern. | |
1608 | Note that there is a reason for not returning zero; the | |
1609 | pattern for "clear" is partly matched in the bit-pattern | |
1610 | (the two lower bits must be zero), while the bit-pattern | |
1611 | for a move from a special register is matched in the | |
1612 | register constraint. | |
1613 | This also means we will will have a race condition if | |
1614 | there is a partly match in three bits in the bit pattern. */ | |
1615 | if (tmp == cris_spec_regs[i].number) | |
1616 | { | |
1617 | retval += 3; | |
1618 | break; | |
1619 | } | |
1620 | } | |
1621 | ||
1622 | if (cris_spec_regs[i].name == NULL) | |
29134980 OF |
1623 | return -1; |
1624 | break; | |
1625 | } | |
1626 | return retval; | |
1627 | } | |
1628 | ||
1629 | /* Returns the number of bits set in the variable value. */ | |
1630 | ||
1631 | static int | |
1632 | number_of_bits (unsigned int value) | |
1633 | { | |
1634 | int number_of_bits = 0; | |
1635 | ||
1636 | while (value != 0) | |
1637 | { | |
1638 | number_of_bits += 1; | |
1639 | value &= (value - 1); | |
1640 | } | |
1641 | return number_of_bits; | |
1642 | } | |
1643 | ||
1644 | /* Finds the address that should contain the single step breakpoint(s). | |
1645 | It stems from code in cris-dis.c. */ | |
1646 | ||
1647 | static int | |
1648 | find_cris_op (unsigned short insn, inst_env_type *inst_env) | |
1649 | { | |
1650 | int i; | |
1651 | int max_level_of_match = -1; | |
1652 | int max_matched = -1; | |
1653 | int level_of_match; | |
1654 | ||
1655 | for (i = 0; cris_opcodes[i].name != NULL; i++) | |
1656 | { | |
1657 | if (((cris_opcodes[i].match & insn) == cris_opcodes[i].match) | |
1658 | && ((cris_opcodes[i].lose & insn) == 0)) | |
1659 | { | |
1660 | level_of_match = constraint (insn, cris_opcodes[i].args, inst_env); | |
1661 | if (level_of_match >= 0) | |
1662 | { | |
1663 | level_of_match += | |
1664 | number_of_bits (cris_opcodes[i].match | cris_opcodes[i].lose); | |
1665 | if (level_of_match > max_level_of_match) | |
1666 | { | |
1667 | max_matched = i; | |
1668 | max_level_of_match = level_of_match; | |
1669 | if (level_of_match == 16) | |
1670 | { | |
1671 | /* All bits matched, cannot find better. */ | |
1672 | break; | |
1673 | } | |
1674 | } | |
1675 | } | |
1676 | } | |
1677 | } | |
1678 | return max_matched; | |
1679 | } | |
1680 | ||
1681 | /* Attempts to find single-step breakpoints. Returns -1 on failure which is | |
1682 | actually an internal error. */ | |
1683 | ||
1684 | static int | |
1685 | find_step_target (inst_env_type *inst_env) | |
1686 | { | |
1687 | int i; | |
1688 | int offset; | |
1689 | unsigned short insn; | |
1690 | ||
1691 | /* Create a local register image and set the initial state. */ | |
1692 | for (i = 0; i < NUM_GENREGS; i++) | |
1693 | { | |
1694 | inst_env->reg[i] = (unsigned long) read_register (i); | |
1695 | } | |
1696 | offset = NUM_GENREGS; | |
1697 | for (i = 0; i < NUM_SPECREGS; i++) | |
1698 | { | |
1699 | inst_env->preg[i] = (unsigned long) read_register (offset + i); | |
1700 | } | |
1701 | inst_env->branch_found = 0; | |
1702 | inst_env->slot_needed = 0; | |
1703 | inst_env->delay_slot_pc_active = 0; | |
1704 | inst_env->prefix_found = 0; | |
1705 | inst_env->invalid = 0; | |
1706 | inst_env->xflag_found = 0; | |
1707 | inst_env->disable_interrupt = 0; | |
1708 | ||
1709 | /* Look for a step target. */ | |
1710 | do | |
1711 | { | |
1712 | /* Read an instruction from the client. */ | |
1713 | insn = read_memory_unsigned_integer (inst_env->reg[PC_REGNUM], 2); | |
1714 | ||
1715 | /* If the instruction is not in a delay slot the new content of the | |
1716 | PC is [PC] + 2. If the instruction is in a delay slot it is not | |
1717 | that simple. Since a instruction in a delay slot cannot change | |
1718 | the content of the PC, it does not matter what value PC will have. | |
1719 | Just make sure it is a valid instruction. */ | |
1720 | if (!inst_env->delay_slot_pc_active) | |
1721 | { | |
1722 | inst_env->reg[PC_REGNUM] += 2; | |
1723 | } | |
1724 | else | |
1725 | { | |
1726 | inst_env->delay_slot_pc_active = 0; | |
1727 | inst_env->reg[PC_REGNUM] = inst_env->delay_slot_pc; | |
1728 | } | |
1729 | /* Analyse the present instruction. */ | |
1730 | i = find_cris_op (insn, inst_env); | |
1731 | if (i == -1) | |
1732 | { | |
1733 | inst_env->invalid = 1; | |
1734 | } | |
1735 | else | |
1736 | { | |
1737 | cris_gdb_func (cris_opcodes[i].op, insn, inst_env); | |
1738 | } | |
1739 | } while (!inst_env->invalid | |
1740 | && (inst_env->prefix_found || inst_env->xflag_found | |
1741 | || inst_env->slot_needed)); | |
1742 | return i; | |
1743 | } | |
1744 | ||
1745 | /* There is no hardware single-step support. The function find_step_target | |
1746 | digs through the opcodes in order to find all possible targets. | |
1747 | Either one ordinary target or two targets for branches may be found. */ | |
1748 | ||
a78f21af | 1749 | static void |
29134980 OF |
1750 | cris_software_single_step (enum target_signal ignore, int insert_breakpoints) |
1751 | { | |
1752 | inst_env_type inst_env; | |
1753 | ||
1754 | if (insert_breakpoints) | |
1755 | { | |
1756 | /* Analyse the present instruction environment and insert | |
1757 | breakpoints. */ | |
1758 | int status = find_step_target (&inst_env); | |
1759 | if (status == -1) | |
1760 | { | |
1761 | /* Could not find a target. FIXME: Should do something. */ | |
1762 | } | |
1763 | else | |
1764 | { | |
1765 | /* Insert at most two breakpoints. One for the next PC content | |
1766 | and possibly another one for a branch, jump, etc. */ | |
1767 | next_pc = (CORE_ADDR) inst_env.reg[PC_REGNUM]; | |
1768 | target_insert_breakpoint (next_pc, break_mem[0]); | |
1769 | if (inst_env.branch_found | |
1770 | && (CORE_ADDR) inst_env.branch_break_address != next_pc) | |
1771 | { | |
1772 | branch_target_address = | |
1773 | (CORE_ADDR) inst_env.branch_break_address; | |
1774 | target_insert_breakpoint (branch_target_address, break_mem[1]); | |
1775 | branch_break_inserted = 1; | |
1776 | } | |
1777 | } | |
1778 | } | |
1779 | else | |
1780 | { | |
1781 | /* Remove breakpoints. */ | |
1782 | target_remove_breakpoint (next_pc, break_mem[0]); | |
1783 | if (branch_break_inserted) | |
1784 | { | |
1785 | target_remove_breakpoint (branch_target_address, break_mem[1]); | |
1786 | branch_break_inserted = 0; | |
1787 | } | |
1788 | } | |
1789 | } | |
1790 | ||
1791 | /* Calculates the prefix value for quick offset addressing mode. */ | |
1792 | ||
a78f21af | 1793 | static void |
29134980 OF |
1794 | quick_mode_bdap_prefix (unsigned short inst, inst_env_type *inst_env) |
1795 | { | |
1796 | /* It's invalid to be in a delay slot. You can't have a prefix to this | |
1797 | instruction (not 100% sure). */ | |
1798 | if (inst_env->slot_needed || inst_env->prefix_found) | |
1799 | { | |
1800 | inst_env->invalid = 1; | |
1801 | return; | |
1802 | } | |
1803 | ||
1804 | inst_env->prefix_value = inst_env->reg[cris_get_operand2 (inst)]; | |
1805 | inst_env->prefix_value += cris_get_bdap_quick_offset (inst); | |
1806 | ||
1807 | /* A prefix doesn't change the xflag_found. But the rest of the flags | |
1808 | need updating. */ | |
1809 | inst_env->slot_needed = 0; | |
1810 | inst_env->prefix_found = 1; | |
1811 | } | |
1812 | ||
1813 | /* Updates the autoincrement register. The size of the increment is derived | |
1814 | from the size of the operation. The PC is always kept aligned on even | |
1815 | word addresses. */ | |
1816 | ||
a78f21af | 1817 | static void |
29134980 OF |
1818 | process_autoincrement (int size, unsigned short inst, inst_env_type *inst_env) |
1819 | { | |
1820 | if (size == INST_BYTE_SIZE) | |
1821 | { | |
1822 | inst_env->reg[cris_get_operand1 (inst)] += 1; | |
1823 | ||
1824 | /* The PC must be word aligned, so increase the PC with one | |
1825 | word even if the size is byte. */ | |
1826 | if (cris_get_operand1 (inst) == REG_PC) | |
1827 | { | |
1828 | inst_env->reg[REG_PC] += 1; | |
1829 | } | |
1830 | } | |
1831 | else if (size == INST_WORD_SIZE) | |
1832 | { | |
1833 | inst_env->reg[cris_get_operand1 (inst)] += 2; | |
1834 | } | |
1835 | else if (size == INST_DWORD_SIZE) | |
1836 | { | |
1837 | inst_env->reg[cris_get_operand1 (inst)] += 4; | |
1838 | } | |
1839 | else | |
1840 | { | |
1841 | /* Invalid size. */ | |
1842 | inst_env->invalid = 1; | |
1843 | } | |
1844 | } | |
1845 | ||
2a9ecef2 OF |
1846 | /* Just a forward declaration. */ |
1847 | ||
a78f21af AC |
1848 | static unsigned long get_data_from_address (unsigned short *inst, |
1849 | CORE_ADDR address); | |
2a9ecef2 | 1850 | |
29134980 OF |
1851 | /* Calculates the prefix value for the general case of offset addressing |
1852 | mode. */ | |
1853 | ||
a78f21af | 1854 | static void |
29134980 OF |
1855 | bdap_prefix (unsigned short inst, inst_env_type *inst_env) |
1856 | { | |
1857 | ||
1858 | long offset; | |
1859 | ||
1860 | /* It's invalid to be in a delay slot. */ | |
1861 | if (inst_env->slot_needed || inst_env->prefix_found) | |
1862 | { | |
1863 | inst_env->invalid = 1; | |
1864 | return; | |
1865 | } | |
1866 | ||
fa4e4598 OF |
1867 | /* The calculation of prefix_value used to be after process_autoincrement, |
1868 | but that fails for an instruction such as jsr [$r0+12] which is encoded | |
1869 | as 5f0d 0c00 30b9 when compiled with -fpic. Since PC is operand1 it | |
1870 | mustn't be incremented until we have read it and what it points at. */ | |
29134980 OF |
1871 | inst_env->prefix_value = inst_env->reg[cris_get_operand2 (inst)]; |
1872 | ||
1873 | /* The offset is an indirection of the contents of the operand1 register. */ | |
1874 | inst_env->prefix_value += | |
2a9ecef2 OF |
1875 | get_data_from_address (&inst, inst_env->reg[cris_get_operand1 (inst)]); |
1876 | ||
fa4e4598 OF |
1877 | if (cris_get_mode (inst) == AUTOINC_MODE) |
1878 | { | |
1879 | process_autoincrement (cris_get_size (inst), inst, inst_env); | |
1880 | } | |
1881 | ||
29134980 OF |
1882 | /* A prefix doesn't change the xflag_found. But the rest of the flags |
1883 | need updating. */ | |
1884 | inst_env->slot_needed = 0; | |
1885 | inst_env->prefix_found = 1; | |
1886 | } | |
1887 | ||
1888 | /* Calculates the prefix value for the index addressing mode. */ | |
1889 | ||
a78f21af | 1890 | static void |
29134980 OF |
1891 | biap_prefix (unsigned short inst, inst_env_type *inst_env) |
1892 | { | |
1893 | /* It's invalid to be in a delay slot. I can't see that it's possible to | |
1894 | have a prefix to this instruction. So I will treat this as invalid. */ | |
1895 | if (inst_env->slot_needed || inst_env->prefix_found) | |
1896 | { | |
1897 | inst_env->invalid = 1; | |
1898 | return; | |
1899 | } | |
1900 | ||
1901 | inst_env->prefix_value = inst_env->reg[cris_get_operand1 (inst)]; | |
1902 | ||
1903 | /* The offset is the operand2 value shifted the size of the instruction | |
1904 | to the left. */ | |
1905 | inst_env->prefix_value += | |
1906 | inst_env->reg[cris_get_operand2 (inst)] << cris_get_size (inst); | |
1907 | ||
1908 | /* If the PC is operand1 (base) the address used is the address after | |
1909 | the main instruction, i.e. address + 2 (the PC is already compensated | |
1910 | for the prefix operation). */ | |
1911 | if (cris_get_operand1 (inst) == REG_PC) | |
1912 | { | |
1913 | inst_env->prefix_value += 2; | |
1914 | } | |
1915 | ||
1916 | /* A prefix doesn't change the xflag_found. But the rest of the flags | |
1917 | need updating. */ | |
1918 | inst_env->slot_needed = 0; | |
1919 | inst_env->xflag_found = 0; | |
1920 | inst_env->prefix_found = 1; | |
1921 | } | |
1922 | ||
1923 | /* Calculates the prefix value for the double indirect addressing mode. */ | |
1924 | ||
a78f21af | 1925 | static void |
29134980 OF |
1926 | dip_prefix (unsigned short inst, inst_env_type *inst_env) |
1927 | { | |
1928 | ||
1929 | CORE_ADDR address; | |
1930 | ||
1931 | /* It's invalid to be in a delay slot. */ | |
1932 | if (inst_env->slot_needed || inst_env->prefix_found) | |
1933 | { | |
1934 | inst_env->invalid = 1; | |
1935 | return; | |
1936 | } | |
1937 | ||
1938 | /* The prefix value is one dereference of the contents of the operand1 | |
1939 | register. */ | |
1940 | address = (CORE_ADDR) inst_env->reg[cris_get_operand1 (inst)]; | |
1941 | inst_env->prefix_value = read_memory_unsigned_integer (address, 4); | |
1942 | ||
1943 | /* Check if the mode is autoincrement. */ | |
1944 | if (cris_get_mode (inst) == AUTOINC_MODE) | |
1945 | { | |
1946 | inst_env->reg[cris_get_operand1 (inst)] += 4; | |
1947 | } | |
1948 | ||
1949 | /* A prefix doesn't change the xflag_found. But the rest of the flags | |
1950 | need updating. */ | |
1951 | inst_env->slot_needed = 0; | |
1952 | inst_env->xflag_found = 0; | |
1953 | inst_env->prefix_found = 1; | |
1954 | } | |
1955 | ||
1956 | /* Finds the destination for a branch with 8-bits offset. */ | |
1957 | ||
a78f21af | 1958 | static void |
29134980 OF |
1959 | eight_bit_offset_branch_op (unsigned short inst, inst_env_type *inst_env) |
1960 | { | |
1961 | ||
1962 | short offset; | |
1963 | ||
1964 | /* If we have a prefix or are in a delay slot it's bad. */ | |
1965 | if (inst_env->slot_needed || inst_env->prefix_found) | |
1966 | { | |
1967 | inst_env->invalid = 1; | |
1968 | return; | |
1969 | } | |
1970 | ||
1971 | /* We have a branch, find out where the branch will land. */ | |
1972 | offset = cris_get_branch_short_offset (inst); | |
1973 | ||
1974 | /* Check if the offset is signed. */ | |
1975 | if (offset & BRANCH_SIGNED_SHORT_OFFSET_MASK) | |
1976 | { | |
1977 | offset |= 0xFF00; | |
1978 | } | |
1979 | ||
1980 | /* The offset ends with the sign bit, set it to zero. The address | |
1981 | should always be word aligned. */ | |
1982 | offset &= ~BRANCH_SIGNED_SHORT_OFFSET_MASK; | |
1983 | ||
1984 | inst_env->branch_found = 1; | |
1985 | inst_env->branch_break_address = inst_env->reg[REG_PC] + offset; | |
1986 | ||
1987 | inst_env->slot_needed = 1; | |
1988 | inst_env->prefix_found = 0; | |
1989 | inst_env->xflag_found = 0; | |
1990 | inst_env->disable_interrupt = 1; | |
1991 | } | |
1992 | ||
1993 | /* Finds the destination for a branch with 16-bits offset. */ | |
1994 | ||
a78f21af | 1995 | static void |
29134980 OF |
1996 | sixteen_bit_offset_branch_op (unsigned short inst, inst_env_type *inst_env) |
1997 | { | |
1998 | short offset; | |
1999 | ||
2000 | /* If we have a prefix or is in a delay slot it's bad. */ | |
2001 | if (inst_env->slot_needed || inst_env->prefix_found) | |
2002 | { | |
2003 | inst_env->invalid = 1; | |
2004 | return; | |
2005 | } | |
2006 | ||
2007 | /* We have a branch, find out the offset for the branch. */ | |
2008 | offset = read_memory_integer (inst_env->reg[REG_PC], 2); | |
2009 | ||
2010 | /* The instruction is one word longer than normal, so add one word | |
2011 | to the PC. */ | |
2012 | inst_env->reg[REG_PC] += 2; | |
2013 | ||
2014 | inst_env->branch_found = 1; | |
2015 | inst_env->branch_break_address = inst_env->reg[REG_PC] + offset; | |
2016 | ||
2017 | ||
2018 | inst_env->slot_needed = 1; | |
2019 | inst_env->prefix_found = 0; | |
2020 | inst_env->xflag_found = 0; | |
2021 | inst_env->disable_interrupt = 1; | |
2022 | } | |
2023 | ||
2024 | /* Handles the ABS instruction. */ | |
2025 | ||
a78f21af | 2026 | static void |
29134980 OF |
2027 | abs_op (unsigned short inst, inst_env_type *inst_env) |
2028 | { | |
2029 | ||
2030 | long value; | |
2031 | ||
2032 | /* ABS can't have a prefix, so it's bad if it does. */ | |
2033 | if (inst_env->prefix_found) | |
2034 | { | |
2035 | inst_env->invalid = 1; | |
2036 | return; | |
2037 | } | |
2038 | ||
2039 | /* Check if the operation affects the PC. */ | |
2040 | if (cris_get_operand2 (inst) == REG_PC) | |
2041 | { | |
2042 | ||
2043 | /* It's invalid to change to the PC if we are in a delay slot. */ | |
2044 | if (inst_env->slot_needed) | |
2045 | { | |
2046 | inst_env->invalid = 1; | |
2047 | return; | |
2048 | } | |
2049 | ||
2050 | value = (long) inst_env->reg[REG_PC]; | |
2051 | ||
2052 | /* The value of abs (SIGNED_DWORD_MASK) is SIGNED_DWORD_MASK. */ | |
2053 | if (value != SIGNED_DWORD_MASK) | |
2054 | { | |
2055 | value = -value; | |
2056 | inst_env->reg[REG_PC] = (long) value; | |
2057 | } | |
2058 | } | |
2059 | ||
2060 | inst_env->slot_needed = 0; | |
2061 | inst_env->prefix_found = 0; | |
2062 | inst_env->xflag_found = 0; | |
2063 | inst_env->disable_interrupt = 0; | |
2064 | } | |
2065 | ||
2066 | /* Handles the ADDI instruction. */ | |
2067 | ||
a78f21af | 2068 | static void |
29134980 OF |
2069 | addi_op (unsigned short inst, inst_env_type *inst_env) |
2070 | { | |
2071 | /* It's invalid to have the PC as base register. And ADDI can't have | |
2072 | a prefix. */ | |
2073 | if (inst_env->prefix_found || (cris_get_operand1 (inst) == REG_PC)) | |
2074 | { | |
2075 | inst_env->invalid = 1; | |
2076 | return; | |
2077 | } | |
2078 | ||
2079 | inst_env->slot_needed = 0; | |
2080 | inst_env->prefix_found = 0; | |
2081 | inst_env->xflag_found = 0; | |
2082 | inst_env->disable_interrupt = 0; | |
2083 | } | |
2084 | ||
2085 | /* Handles the ASR instruction. */ | |
2086 | ||
a78f21af | 2087 | static void |
29134980 OF |
2088 | asr_op (unsigned short inst, inst_env_type *inst_env) |
2089 | { | |
2090 | int shift_steps; | |
2091 | unsigned long value; | |
2092 | unsigned long signed_extend_mask = 0; | |
2093 | ||
2094 | /* ASR can't have a prefix, so check that it doesn't. */ | |
2095 | if (inst_env->prefix_found) | |
2096 | { | |
2097 | inst_env->invalid = 1; | |
2098 | return; | |
2099 | } | |
2100 | ||
2101 | /* Check if the PC is the target register. */ | |
2102 | if (cris_get_operand2 (inst) == REG_PC) | |
2103 | { | |
2104 | /* It's invalid to change the PC in a delay slot. */ | |
2105 | if (inst_env->slot_needed) | |
2106 | { | |
2107 | inst_env->invalid = 1; | |
2108 | return; | |
2109 | } | |
2110 | /* Get the number of bits to shift. */ | |
2111 | shift_steps = cris_get_asr_shift_steps (inst_env->reg[cris_get_operand1 (inst)]); | |
2112 | value = inst_env->reg[REG_PC]; | |
2113 | ||
2114 | /* Find out how many bits the operation should apply to. */ | |
2115 | if (cris_get_size (inst) == INST_BYTE_SIZE) | |
2116 | { | |
2117 | if (value & SIGNED_BYTE_MASK) | |
2118 | { | |
2119 | signed_extend_mask = 0xFF; | |
2120 | signed_extend_mask = signed_extend_mask >> shift_steps; | |
2121 | signed_extend_mask = ~signed_extend_mask; | |
2122 | } | |
2123 | value = value >> shift_steps; | |
2124 | value |= signed_extend_mask; | |
2125 | value &= 0xFF; | |
2126 | inst_env->reg[REG_PC] &= 0xFFFFFF00; | |
2127 | inst_env->reg[REG_PC] |= value; | |
2128 | } | |
2129 | else if (cris_get_size (inst) == INST_WORD_SIZE) | |
2130 | { | |
2131 | if (value & SIGNED_WORD_MASK) | |
2132 | { | |
2133 | signed_extend_mask = 0xFFFF; | |
2134 | signed_extend_mask = signed_extend_mask >> shift_steps; | |
2135 | signed_extend_mask = ~signed_extend_mask; | |
2136 | } | |
2137 | value = value >> shift_steps; | |
2138 | value |= signed_extend_mask; | |
2139 | value &= 0xFFFF; | |
2140 | inst_env->reg[REG_PC] &= 0xFFFF0000; | |
2141 | inst_env->reg[REG_PC] |= value; | |
2142 | } | |
2143 | else if (cris_get_size (inst) == INST_DWORD_SIZE) | |
2144 | { | |
2145 | if (value & SIGNED_DWORD_MASK) | |
2146 | { | |
2147 | signed_extend_mask = 0xFFFFFFFF; | |
2148 | signed_extend_mask = signed_extend_mask >> shift_steps; | |
2149 | signed_extend_mask = ~signed_extend_mask; | |
2150 | } | |
2151 | value = value >> shift_steps; | |
2152 | value |= signed_extend_mask; | |
2153 | inst_env->reg[REG_PC] = value; | |
2154 | } | |
2155 | } | |
2156 | inst_env->slot_needed = 0; | |
2157 | inst_env->prefix_found = 0; | |
2158 | inst_env->xflag_found = 0; | |
2159 | inst_env->disable_interrupt = 0; | |
2160 | } | |
2161 | ||
2162 | /* Handles the ASRQ instruction. */ | |
2163 | ||
a78f21af | 2164 | static void |
29134980 OF |
2165 | asrq_op (unsigned short inst, inst_env_type *inst_env) |
2166 | { | |
2167 | ||
2168 | int shift_steps; | |
2169 | unsigned long value; | |
2170 | unsigned long signed_extend_mask = 0; | |
2171 | ||
2172 | /* ASRQ can't have a prefix, so check that it doesn't. */ | |
2173 | if (inst_env->prefix_found) | |
2174 | { | |
2175 | inst_env->invalid = 1; | |
2176 | return; | |
2177 | } | |
2178 | ||
2179 | /* Check if the PC is the target register. */ | |
2180 | if (cris_get_operand2 (inst) == REG_PC) | |
2181 | { | |
2182 | ||
2183 | /* It's invalid to change the PC in a delay slot. */ | |
2184 | if (inst_env->slot_needed) | |
2185 | { | |
2186 | inst_env->invalid = 1; | |
2187 | return; | |
2188 | } | |
2189 | /* The shift size is given as a 5 bit quick value, i.e. we don't | |
2190 | want the the sign bit of the quick value. */ | |
2191 | shift_steps = cris_get_asr_shift_steps (inst); | |
2192 | value = inst_env->reg[REG_PC]; | |
2193 | if (value & SIGNED_DWORD_MASK) | |
2194 | { | |
2195 | signed_extend_mask = 0xFFFFFFFF; | |
2196 | signed_extend_mask = signed_extend_mask >> shift_steps; | |
2197 | signed_extend_mask = ~signed_extend_mask; | |
2198 | } | |
2199 | value = value >> shift_steps; | |
2200 | value |= signed_extend_mask; | |
2201 | inst_env->reg[REG_PC] = value; | |
2202 | } | |
2203 | inst_env->slot_needed = 0; | |
2204 | inst_env->prefix_found = 0; | |
2205 | inst_env->xflag_found = 0; | |
2206 | inst_env->disable_interrupt = 0; | |
2207 | } | |
2208 | ||
2209 | /* Handles the AX, EI and SETF instruction. */ | |
2210 | ||
a78f21af | 2211 | static void |
29134980 OF |
2212 | ax_ei_setf_op (unsigned short inst, inst_env_type *inst_env) |
2213 | { | |
2214 | if (inst_env->prefix_found) | |
2215 | { | |
2216 | inst_env->invalid = 1; | |
2217 | return; | |
2218 | } | |
2219 | /* Check if the instruction is setting the X flag. */ | |
2220 | if (cris_is_xflag_bit_on (inst)) | |
2221 | { | |
2222 | inst_env->xflag_found = 1; | |
2223 | } | |
2224 | else | |
2225 | { | |
2226 | inst_env->xflag_found = 0; | |
2227 | } | |
2228 | inst_env->slot_needed = 0; | |
2229 | inst_env->prefix_found = 0; | |
2230 | inst_env->disable_interrupt = 1; | |
2231 | } | |
2232 | ||
2233 | /* Checks if the instruction is in assign mode. If so, it updates the assign | |
2234 | register. Note that check_assign assumes that the caller has checked that | |
2235 | there is a prefix to this instruction. The mode check depends on this. */ | |
2236 | ||
a78f21af | 2237 | static void |
29134980 OF |
2238 | check_assign (unsigned short inst, inst_env_type *inst_env) |
2239 | { | |
2240 | /* Check if it's an assign addressing mode. */ | |
2241 | if (cris_get_mode (inst) == PREFIX_ASSIGN_MODE) | |
2242 | { | |
2243 | /* Assign the prefix value to operand 1. */ | |
2244 | inst_env->reg[cris_get_operand1 (inst)] = inst_env->prefix_value; | |
2245 | } | |
2246 | } | |
2247 | ||
2248 | /* Handles the 2-operand BOUND instruction. */ | |
2249 | ||
a78f21af | 2250 | static void |
29134980 OF |
2251 | two_operand_bound_op (unsigned short inst, inst_env_type *inst_env) |
2252 | { | |
2253 | /* It's invalid to have the PC as the index operand. */ | |
2254 | if (cris_get_operand2 (inst) == REG_PC) | |
2255 | { | |
2256 | inst_env->invalid = 1; | |
2257 | return; | |
2258 | } | |
2259 | /* Check if we have a prefix. */ | |
2260 | if (inst_env->prefix_found) | |
2261 | { | |
2262 | check_assign (inst, inst_env); | |
2263 | } | |
2264 | /* Check if this is an autoincrement mode. */ | |
2265 | else if (cris_get_mode (inst) == AUTOINC_MODE) | |
2266 | { | |
2267 | /* It's invalid to change the PC in a delay slot. */ | |
2268 | if (inst_env->slot_needed) | |
2269 | { | |
2270 | inst_env->invalid = 1; | |
2271 | return; | |
2272 | } | |
2273 | process_autoincrement (cris_get_size (inst), inst, inst_env); | |
2274 | } | |
2275 | inst_env->slot_needed = 0; | |
2276 | inst_env->prefix_found = 0; | |
2277 | inst_env->xflag_found = 0; | |
2278 | inst_env->disable_interrupt = 0; | |
2279 | } | |
2280 | ||
2281 | /* Handles the 3-operand BOUND instruction. */ | |
2282 | ||
a78f21af | 2283 | static void |
29134980 OF |
2284 | three_operand_bound_op (unsigned short inst, inst_env_type *inst_env) |
2285 | { | |
2286 | /* It's an error if we haven't got a prefix. And it's also an error | |
2287 | if the PC is the destination register. */ | |
2288 | if ((!inst_env->prefix_found) || (cris_get_operand1 (inst) == REG_PC)) | |
2289 | { | |
2290 | inst_env->invalid = 1; | |
2291 | return; | |
2292 | } | |
2293 | inst_env->slot_needed = 0; | |
2294 | inst_env->prefix_found = 0; | |
2295 | inst_env->xflag_found = 0; | |
2296 | inst_env->disable_interrupt = 0; | |
2297 | } | |
2298 | ||
2299 | /* Clears the status flags in inst_env. */ | |
2300 | ||
a78f21af | 2301 | static void |
29134980 OF |
2302 | btst_nop_op (unsigned short inst, inst_env_type *inst_env) |
2303 | { | |
2304 | /* It's an error if we have got a prefix. */ | |
2305 | if (inst_env->prefix_found) | |
2306 | { | |
2307 | inst_env->invalid = 1; | |
2308 | return; | |
2309 | } | |
2310 | ||
2311 | inst_env->slot_needed = 0; | |
2312 | inst_env->prefix_found = 0; | |
2313 | inst_env->xflag_found = 0; | |
2314 | inst_env->disable_interrupt = 0; | |
2315 | } | |
2316 | ||
2317 | /* Clears the status flags in inst_env. */ | |
2318 | ||
a78f21af | 2319 | static void |
29134980 OF |
2320 | clearf_di_op (unsigned short inst, inst_env_type *inst_env) |
2321 | { | |
2322 | /* It's an error if we have got a prefix. */ | |
2323 | if (inst_env->prefix_found) | |
2324 | { | |
2325 | inst_env->invalid = 1; | |
2326 | return; | |
2327 | } | |
2328 | ||
2329 | inst_env->slot_needed = 0; | |
2330 | inst_env->prefix_found = 0; | |
2331 | inst_env->xflag_found = 0; | |
2332 | inst_env->disable_interrupt = 1; | |
2333 | } | |
2334 | ||
2335 | /* Handles the CLEAR instruction if it's in register mode. */ | |
2336 | ||
a78f21af | 2337 | static void |
29134980 OF |
2338 | reg_mode_clear_op (unsigned short inst, inst_env_type *inst_env) |
2339 | { | |
2340 | /* Check if the target is the PC. */ | |
2341 | if (cris_get_operand2 (inst) == REG_PC) | |
2342 | { | |
2343 | /* The instruction will clear the instruction's size bits. */ | |
2344 | int clear_size = cris_get_clear_size (inst); | |
2345 | if (clear_size == INST_BYTE_SIZE) | |
2346 | { | |
2347 | inst_env->delay_slot_pc = inst_env->reg[REG_PC] & 0xFFFFFF00; | |
2348 | } | |
2349 | if (clear_size == INST_WORD_SIZE) | |
2350 | { | |
2351 | inst_env->delay_slot_pc = inst_env->reg[REG_PC] & 0xFFFF0000; | |
2352 | } | |
2353 | if (clear_size == INST_DWORD_SIZE) | |
2354 | { | |
2355 | inst_env->delay_slot_pc = 0x0; | |
2356 | } | |
2357 | /* The jump will be delayed with one delay slot. So we need a delay | |
2358 | slot. */ | |
2359 | inst_env->slot_needed = 1; | |
2360 | inst_env->delay_slot_pc_active = 1; | |
2361 | } | |
2362 | else | |
2363 | { | |
2364 | /* The PC will not change => no delay slot. */ | |
2365 | inst_env->slot_needed = 0; | |
2366 | } | |
2367 | inst_env->prefix_found = 0; | |
2368 | inst_env->xflag_found = 0; | |
2369 | inst_env->disable_interrupt = 0; | |
2370 | } | |
2371 | ||
2372 | /* Handles the TEST instruction if it's in register mode. */ | |
2373 | ||
a78f21af | 2374 | static void |
29134980 OF |
2375 | reg_mode_test_op (unsigned short inst, inst_env_type *inst_env) |
2376 | { | |
2377 | /* It's an error if we have got a prefix. */ | |
2378 | if (inst_env->prefix_found) | |
2379 | { | |
2380 | inst_env->invalid = 1; | |
2381 | return; | |
2382 | } | |
2383 | inst_env->slot_needed = 0; | |
2384 | inst_env->prefix_found = 0; | |
2385 | inst_env->xflag_found = 0; | |
2386 | inst_env->disable_interrupt = 0; | |
2387 | ||
2388 | } | |
2389 | ||
2390 | /* Handles the CLEAR and TEST instruction if the instruction isn't | |
2391 | in register mode. */ | |
2392 | ||
a78f21af | 2393 | static void |
29134980 OF |
2394 | none_reg_mode_clear_test_op (unsigned short inst, inst_env_type *inst_env) |
2395 | { | |
2396 | /* Check if we are in a prefix mode. */ | |
2397 | if (inst_env->prefix_found) | |
2398 | { | |
2399 | /* The only way the PC can change is if this instruction is in | |
2400 | assign addressing mode. */ | |
2401 | check_assign (inst, inst_env); | |
2402 | } | |
2403 | /* Indirect mode can't change the PC so just check if the mode is | |
2404 | autoincrement. */ | |
2405 | else if (cris_get_mode (inst) == AUTOINC_MODE) | |
2406 | { | |
2407 | process_autoincrement (cris_get_size (inst), inst, inst_env); | |
2408 | } | |
2409 | inst_env->slot_needed = 0; | |
2410 | inst_env->prefix_found = 0; | |
2411 | inst_env->xflag_found = 0; | |
2412 | inst_env->disable_interrupt = 0; | |
2413 | } | |
2414 | ||
2415 | /* Checks that the PC isn't the destination register or the instructions has | |
2416 | a prefix. */ | |
2417 | ||
a78f21af | 2418 | static void |
29134980 OF |
2419 | dstep_logshift_mstep_neg_not_op (unsigned short inst, inst_env_type *inst_env) |
2420 | { | |
2421 | /* It's invalid to have the PC as the destination. The instruction can't | |
2422 | have a prefix. */ | |
2423 | if ((cris_get_operand2 (inst) == REG_PC) || inst_env->prefix_found) | |
2424 | { | |
2425 | inst_env->invalid = 1; | |
2426 | return; | |
2427 | } | |
2428 | ||
2429 | inst_env->slot_needed = 0; | |
2430 | inst_env->prefix_found = 0; | |
2431 | inst_env->xflag_found = 0; | |
2432 | inst_env->disable_interrupt = 0; | |
2433 | } | |
2434 | ||
2435 | /* Checks that the instruction doesn't have a prefix. */ | |
2436 | ||
a78f21af | 2437 | static void |
29134980 OF |
2438 | break_op (unsigned short inst, inst_env_type *inst_env) |
2439 | { | |
2440 | /* The instruction can't have a prefix. */ | |
2441 | if (inst_env->prefix_found) | |
2442 | { | |
2443 | inst_env->invalid = 1; | |
2444 | return; | |
2445 | } | |
2446 | ||
2447 | inst_env->slot_needed = 0; | |
2448 | inst_env->prefix_found = 0; | |
2449 | inst_env->xflag_found = 0; | |
2450 | inst_env->disable_interrupt = 1; | |
2451 | } | |
2452 | ||
2453 | /* Checks that the PC isn't the destination register and that the instruction | |
2454 | doesn't have a prefix. */ | |
2455 | ||
a78f21af | 2456 | static void |
29134980 OF |
2457 | scc_op (unsigned short inst, inst_env_type *inst_env) |
2458 | { | |
2459 | /* It's invalid to have the PC as the destination. The instruction can't | |
2460 | have a prefix. */ | |
2461 | if ((cris_get_operand2 (inst) == REG_PC) || inst_env->prefix_found) | |
2462 | { | |
2463 | inst_env->invalid = 1; | |
2464 | return; | |
2465 | } | |
2466 | ||
2467 | inst_env->slot_needed = 0; | |
2468 | inst_env->prefix_found = 0; | |
2469 | inst_env->xflag_found = 0; | |
2470 | inst_env->disable_interrupt = 1; | |
2471 | } | |
2472 | ||
2473 | /* Handles the register mode JUMP instruction. */ | |
2474 | ||
a78f21af | 2475 | static void |
29134980 OF |
2476 | reg_mode_jump_op (unsigned short inst, inst_env_type *inst_env) |
2477 | { | |
2478 | /* It's invalid to do a JUMP in a delay slot. The mode is register, so | |
2479 | you can't have a prefix. */ | |
2480 | if ((inst_env->slot_needed) || (inst_env->prefix_found)) | |
2481 | { | |
2482 | inst_env->invalid = 1; | |
2483 | return; | |
2484 | } | |
2485 | ||
2486 | /* Just change the PC. */ | |
2487 | inst_env->reg[REG_PC] = inst_env->reg[cris_get_operand1 (inst)]; | |
2488 | inst_env->slot_needed = 0; | |
2489 | inst_env->prefix_found = 0; | |
2490 | inst_env->xflag_found = 0; | |
2491 | inst_env->disable_interrupt = 1; | |
2492 | } | |
2493 | ||
2494 | /* Handles the JUMP instruction for all modes except register. */ | |
2495 | ||
a78f21af AC |
2496 | static void |
2497 | none_reg_mode_jump_op (unsigned short inst, inst_env_type *inst_env) | |
29134980 OF |
2498 | { |
2499 | unsigned long newpc; | |
2500 | CORE_ADDR address; | |
2501 | ||
2502 | /* It's invalid to do a JUMP in a delay slot. */ | |
2503 | if (inst_env->slot_needed) | |
2504 | { | |
2505 | inst_env->invalid = 1; | |
2506 | } | |
2507 | else | |
2508 | { | |
2509 | /* Check if we have a prefix. */ | |
2510 | if (inst_env->prefix_found) | |
2511 | { | |
2512 | check_assign (inst, inst_env); | |
2513 | ||
2514 | /* Get the new value for the the PC. */ | |
2515 | newpc = | |
2516 | read_memory_unsigned_integer ((CORE_ADDR) inst_env->prefix_value, | |
2517 | 4); | |
2518 | } | |
2519 | else | |
2520 | { | |
2521 | /* Get the new value for the PC. */ | |
2522 | address = (CORE_ADDR) inst_env->reg[cris_get_operand1 (inst)]; | |
2523 | newpc = read_memory_unsigned_integer (address, 4); | |
2524 | ||
2525 | /* Check if we should increment a register. */ | |
2526 | if (cris_get_mode (inst) == AUTOINC_MODE) | |
2527 | { | |
2528 | inst_env->reg[cris_get_operand1 (inst)] += 4; | |
2529 | } | |
2530 | } | |
2531 | inst_env->reg[REG_PC] = newpc; | |
2532 | } | |
2533 | inst_env->slot_needed = 0; | |
2534 | inst_env->prefix_found = 0; | |
2535 | inst_env->xflag_found = 0; | |
2536 | inst_env->disable_interrupt = 1; | |
2537 | } | |
2538 | ||
2539 | /* Handles moves to special registers (aka P-register) for all modes. */ | |
2540 | ||
a78f21af | 2541 | static void |
29134980 OF |
2542 | move_to_preg_op (unsigned short inst, inst_env_type *inst_env) |
2543 | { | |
2544 | if (inst_env->prefix_found) | |
2545 | { | |
2546 | /* The instruction has a prefix that means we are only interested if | |
2547 | the instruction is in assign mode. */ | |
2548 | if (cris_get_mode (inst) == PREFIX_ASSIGN_MODE) | |
2549 | { | |
2550 | /* The prefix handles the problem if we are in a delay slot. */ | |
2551 | if (cris_get_operand1 (inst) == REG_PC) | |
2552 | { | |
2553 | /* Just take care of the assign. */ | |
2554 | check_assign (inst, inst_env); | |
2555 | } | |
2556 | } | |
2557 | } | |
2558 | else if (cris_get_mode (inst) == AUTOINC_MODE) | |
2559 | { | |
2560 | /* The instruction doesn't have a prefix, the only case left that we | |
2561 | are interested in is the autoincrement mode. */ | |
2562 | if (cris_get_operand1 (inst) == REG_PC) | |
2563 | { | |
2564 | /* If the PC is to be incremented it's invalid to be in a | |
2565 | delay slot. */ | |
2566 | if (inst_env->slot_needed) | |
2567 | { | |
2568 | inst_env->invalid = 1; | |
2569 | return; | |
2570 | } | |
2a9ecef2 OF |
2571 | |
2572 | /* The increment depends on the size of the special register. */ | |
2573 | if (cris_register_size (cris_get_operand2 (inst)) == 1) | |
29134980 OF |
2574 | { |
2575 | process_autoincrement (INST_BYTE_SIZE, inst, inst_env); | |
2576 | } | |
2a9ecef2 | 2577 | else if (cris_register_size (cris_get_operand2 (inst)) == 2) |
29134980 OF |
2578 | { |
2579 | process_autoincrement (INST_WORD_SIZE, inst, inst_env); | |
2580 | } | |
2581 | else | |
2582 | { | |
2583 | process_autoincrement (INST_DWORD_SIZE, inst, inst_env); | |
2584 | } | |
2585 | } | |
2586 | } | |
2587 | inst_env->slot_needed = 0; | |
2588 | inst_env->prefix_found = 0; | |
2589 | inst_env->xflag_found = 0; | |
2590 | inst_env->disable_interrupt = 1; | |
2591 | } | |
2592 | ||
2593 | /* Handles moves from special registers (aka P-register) for all modes | |
2594 | except register. */ | |
2595 | ||
a78f21af | 2596 | static void |
29134980 OF |
2597 | none_reg_mode_move_from_preg_op (unsigned short inst, inst_env_type *inst_env) |
2598 | { | |
2599 | if (inst_env->prefix_found) | |
2600 | { | |
2601 | /* The instruction has a prefix that means we are only interested if | |
2602 | the instruction is in assign mode. */ | |
2603 | if (cris_get_mode (inst) == PREFIX_ASSIGN_MODE) | |
2604 | { | |
2605 | /* The prefix handles the problem if we are in a delay slot. */ | |
2606 | if (cris_get_operand1 (inst) == REG_PC) | |
2607 | { | |
2608 | /* Just take care of the assign. */ | |
2609 | check_assign (inst, inst_env); | |
2610 | } | |
2611 | } | |
2612 | } | |
2613 | /* The instruction doesn't have a prefix, the only case left that we | |
2614 | are interested in is the autoincrement mode. */ | |
2615 | else if (cris_get_mode (inst) == AUTOINC_MODE) | |
2616 | { | |
2617 | if (cris_get_operand1 (inst) == REG_PC) | |
2618 | { | |
2619 | /* If the PC is to be incremented it's invalid to be in a | |
2620 | delay slot. */ | |
2621 | if (inst_env->slot_needed) | |
2622 | { | |
2623 | inst_env->invalid = 1; | |
2624 | return; | |
2625 | } | |
2a9ecef2 OF |
2626 | |
2627 | /* The increment depends on the size of the special register. */ | |
2628 | if (cris_register_size (cris_get_operand2 (inst)) == 1) | |
29134980 OF |
2629 | { |
2630 | process_autoincrement (INST_BYTE_SIZE, inst, inst_env); | |
2631 | } | |
2a9ecef2 | 2632 | else if (cris_register_size (cris_get_operand2 (inst)) == 2) |
29134980 OF |
2633 | { |
2634 | process_autoincrement (INST_WORD_SIZE, inst, inst_env); | |
2635 | } | |
2636 | else | |
2637 | { | |
2638 | process_autoincrement (INST_DWORD_SIZE, inst, inst_env); | |
2639 | } | |
2640 | } | |
2641 | } | |
2642 | inst_env->slot_needed = 0; | |
2643 | inst_env->prefix_found = 0; | |
2644 | inst_env->xflag_found = 0; | |
2645 | inst_env->disable_interrupt = 1; | |
2646 | } | |
2647 | ||
2648 | /* Handles moves from special registers (aka P-register) when the mode | |
2649 | is register. */ | |
2650 | ||
a78f21af | 2651 | static void |
29134980 OF |
2652 | reg_mode_move_from_preg_op (unsigned short inst, inst_env_type *inst_env) |
2653 | { | |
2654 | /* Register mode move from special register can't have a prefix. */ | |
2655 | if (inst_env->prefix_found) | |
2656 | { | |
2657 | inst_env->invalid = 1; | |
2658 | return; | |
2659 | } | |
2660 | ||
2661 | if (cris_get_operand1 (inst) == REG_PC) | |
2662 | { | |
2663 | /* It's invalid to change the PC in a delay slot. */ | |
2664 | if (inst_env->slot_needed) | |
2665 | { | |
2666 | inst_env->invalid = 1; | |
2667 | return; | |
2668 | } | |
2669 | /* The destination is the PC, the jump will have a delay slot. */ | |
2670 | inst_env->delay_slot_pc = inst_env->preg[cris_get_operand2 (inst)]; | |
2671 | inst_env->slot_needed = 1; | |
2672 | inst_env->delay_slot_pc_active = 1; | |
2673 | } | |
2674 | else | |
2675 | { | |
2676 | /* If the destination isn't PC, there will be no jump. */ | |
2677 | inst_env->slot_needed = 0; | |
2678 | } | |
2679 | inst_env->prefix_found = 0; | |
2680 | inst_env->xflag_found = 0; | |
2681 | inst_env->disable_interrupt = 1; | |
2682 | } | |
2683 | ||
2684 | /* Handles the MOVEM from memory to general register instruction. */ | |
2685 | ||
a78f21af | 2686 | static void |
29134980 OF |
2687 | move_mem_to_reg_movem_op (unsigned short inst, inst_env_type *inst_env) |
2688 | { | |
2689 | if (inst_env->prefix_found) | |
2690 | { | |
2691 | /* The prefix handles the problem if we are in a delay slot. Is the | |
2692 | MOVEM instruction going to change the PC? */ | |
2693 | if (cris_get_operand2 (inst) >= REG_PC) | |
2694 | { | |
2695 | inst_env->reg[REG_PC] = | |
2696 | read_memory_unsigned_integer (inst_env->prefix_value, 4); | |
2697 | } | |
2698 | /* The assign value is the value after the increment. Normally, the | |
2699 | assign value is the value before the increment. */ | |
2700 | if ((cris_get_operand1 (inst) == REG_PC) | |
2701 | && (cris_get_mode (inst) == PREFIX_ASSIGN_MODE)) | |
2702 | { | |
2703 | inst_env->reg[REG_PC] = inst_env->prefix_value; | |
2704 | inst_env->reg[REG_PC] += 4 * (cris_get_operand2 (inst) + 1); | |
2705 | } | |
2706 | } | |
2707 | else | |
2708 | { | |
2709 | /* Is the MOVEM instruction going to change the PC? */ | |
2710 | if (cris_get_operand2 (inst) == REG_PC) | |
2711 | { | |
2712 | /* It's invalid to change the PC in a delay slot. */ | |
2713 | if (inst_env->slot_needed) | |
2714 | { | |
2715 | inst_env->invalid = 1; | |
2716 | return; | |
2717 | } | |
2718 | inst_env->reg[REG_PC] = | |
2719 | read_memory_unsigned_integer (inst_env->reg[cris_get_operand1 (inst)], | |
2720 | 4); | |
2721 | } | |
2722 | /* The increment is not depending on the size, instead it's depending | |
2723 | on the number of registers loaded from memory. */ | |
2724 | if ((cris_get_operand1 (inst) == REG_PC) && (cris_get_mode (inst) == AUTOINC_MODE)) | |
2725 | { | |
2726 | /* It's invalid to change the PC in a delay slot. */ | |
2727 | if (inst_env->slot_needed) | |
2728 | { | |
2729 | inst_env->invalid = 1; | |
2730 | return; | |
2731 | } | |
2732 | inst_env->reg[REG_PC] += 4 * (cris_get_operand2 (inst) + 1); | |
2733 | } | |
2734 | } | |
2735 | inst_env->slot_needed = 0; | |
2736 | inst_env->prefix_found = 0; | |
2737 | inst_env->xflag_found = 0; | |
2738 | inst_env->disable_interrupt = 0; | |
2739 | } | |
2740 | ||
2741 | /* Handles the MOVEM to memory from general register instruction. */ | |
2742 | ||
a78f21af | 2743 | static void |
29134980 OF |
2744 | move_reg_to_mem_movem_op (unsigned short inst, inst_env_type *inst_env) |
2745 | { | |
2746 | if (inst_env->prefix_found) | |
2747 | { | |
2748 | /* The assign value is the value after the increment. Normally, the | |
2749 | assign value is the value before the increment. */ | |
2750 | if ((cris_get_operand1 (inst) == REG_PC) && | |
2751 | (cris_get_mode (inst) == PREFIX_ASSIGN_MODE)) | |
2752 | { | |
2753 | /* The prefix handles the problem if we are in a delay slot. */ | |
2754 | inst_env->reg[REG_PC] = inst_env->prefix_value; | |
2755 | inst_env->reg[REG_PC] += 4 * (cris_get_operand2 (inst) + 1); | |
2756 | } | |
2757 | } | |
2758 | else | |
2759 | { | |
2760 | /* The increment is not depending on the size, instead it's depending | |
2761 | on the number of registers loaded to memory. */ | |
2762 | if ((cris_get_operand1 (inst) == REG_PC) && (cris_get_mode (inst) == AUTOINC_MODE)) | |
2763 | { | |
2764 | /* It's invalid to change the PC in a delay slot. */ | |
2765 | if (inst_env->slot_needed) | |
2766 | { | |
2767 | inst_env->invalid = 1; | |
2768 | return; | |
2769 | } | |
2770 | inst_env->reg[REG_PC] += 4 * (cris_get_operand2 (inst) + 1); | |
2771 | } | |
2772 | } | |
2773 | inst_env->slot_needed = 0; | |
2774 | inst_env->prefix_found = 0; | |
2775 | inst_env->xflag_found = 0; | |
2776 | inst_env->disable_interrupt = 0; | |
2777 | } | |
2778 | ||
2779 | /* Handles the pop instruction to a general register. | |
2780 | POP is a assembler macro for MOVE.D [SP+], Rd. */ | |
2781 | ||
a78f21af | 2782 | static void |
29134980 OF |
2783 | reg_pop_op (unsigned short inst, inst_env_type *inst_env) |
2784 | { | |
2785 | /* POP can't have a prefix. */ | |
2786 | if (inst_env->prefix_found) | |
2787 | { | |
2788 | inst_env->invalid = 1; | |
2789 | return; | |
2790 | } | |
2791 | if (cris_get_operand2 (inst) == REG_PC) | |
2792 | { | |
2793 | /* It's invalid to change the PC in a delay slot. */ | |
2794 | if (inst_env->slot_needed) | |
2795 | { | |
2796 | inst_env->invalid = 1; | |
2797 | return; | |
2798 | } | |
2799 | inst_env->reg[REG_PC] = | |
2800 | read_memory_unsigned_integer (inst_env->reg[REG_SP], 4); | |
2801 | } | |
2802 | inst_env->slot_needed = 0; | |
2803 | inst_env->prefix_found = 0; | |
2804 | inst_env->xflag_found = 0; | |
2805 | inst_env->disable_interrupt = 0; | |
2806 | } | |
2807 | ||
2808 | /* Handles moves from register to memory. */ | |
2809 | ||
a78f21af | 2810 | static void |
29134980 OF |
2811 | move_reg_to_mem_index_inc_op (unsigned short inst, inst_env_type *inst_env) |
2812 | { | |
2813 | /* Check if we have a prefix. */ | |
2814 | if (inst_env->prefix_found) | |
2815 | { | |
2816 | /* The only thing that can change the PC is an assign. */ | |
2817 | check_assign (inst, inst_env); | |
2818 | } | |
2819 | else if ((cris_get_operand1 (inst) == REG_PC) | |
2820 | && (cris_get_mode (inst) == AUTOINC_MODE)) | |
2821 | { | |
2822 | /* It's invalid to change the PC in a delay slot. */ | |
2823 | if (inst_env->slot_needed) | |
2824 | { | |
2825 | inst_env->invalid = 1; | |
2826 | return; | |
2827 | } | |
2828 | process_autoincrement (cris_get_size (inst), inst, inst_env); | |
2829 | } | |
2830 | inst_env->slot_needed = 0; | |
2831 | inst_env->prefix_found = 0; | |
2832 | inst_env->xflag_found = 0; | |
2833 | inst_env->disable_interrupt = 0; | |
2834 | } | |
2835 | ||
2836 | /* Handles the intructions that's not yet implemented, by setting | |
2837 | inst_env->invalid to true. */ | |
2838 | ||
a78f21af | 2839 | static void |
29134980 OF |
2840 | not_implemented_op (unsigned short inst, inst_env_type *inst_env) |
2841 | { | |
2842 | inst_env->invalid = 1; | |
2843 | } | |
2844 | ||
2845 | /* Handles the XOR instruction. */ | |
2846 | ||
a78f21af | 2847 | static void |
29134980 OF |
2848 | xor_op (unsigned short inst, inst_env_type *inst_env) |
2849 | { | |
2850 | /* XOR can't have a prefix. */ | |
2851 | if (inst_env->prefix_found) | |
2852 | { | |
2853 | inst_env->invalid = 1; | |
2854 | return; | |
2855 | } | |
2856 | ||
2857 | /* Check if the PC is the target. */ | |
2858 | if (cris_get_operand2 (inst) == REG_PC) | |
2859 | { | |
2860 | /* It's invalid to change the PC in a delay slot. */ | |
2861 | if (inst_env->slot_needed) | |
2862 | { | |
2863 | inst_env->invalid = 1; | |
2864 | return; | |
2865 | } | |
2866 | inst_env->reg[REG_PC] ^= inst_env->reg[cris_get_operand1 (inst)]; | |
2867 | } | |
2868 | inst_env->slot_needed = 0; | |
2869 | inst_env->prefix_found = 0; | |
2870 | inst_env->xflag_found = 0; | |
2871 | inst_env->disable_interrupt = 0; | |
2872 | } | |
2873 | ||
2874 | /* Handles the MULS instruction. */ | |
2875 | ||
a78f21af | 2876 | static void |
29134980 OF |
2877 | muls_op (unsigned short inst, inst_env_type *inst_env) |
2878 | { | |
2879 | /* MULS/U can't have a prefix. */ | |
2880 | if (inst_env->prefix_found) | |
2881 | { | |
2882 | inst_env->invalid = 1; | |
2883 | return; | |
2884 | } | |
2885 | ||
2886 | /* Consider it invalid if the PC is the target. */ | |
2887 | if (cris_get_operand2 (inst) == REG_PC) | |
2888 | { | |
2889 | inst_env->invalid = 1; | |
2890 | return; | |
2891 | } | |
2892 | inst_env->slot_needed = 0; | |
2893 | inst_env->prefix_found = 0; | |
2894 | inst_env->xflag_found = 0; | |
2895 | inst_env->disable_interrupt = 0; | |
2896 | } | |
2897 | ||
2898 | /* Handles the MULU instruction. */ | |
2899 | ||
a78f21af | 2900 | static void |
29134980 OF |
2901 | mulu_op (unsigned short inst, inst_env_type *inst_env) |
2902 | { | |
2903 | /* MULS/U can't have a prefix. */ | |
2904 | if (inst_env->prefix_found) | |
2905 | { | |
2906 | inst_env->invalid = 1; | |
2907 | return; | |
2908 | } | |
2909 | ||
2910 | /* Consider it invalid if the PC is the target. */ | |
2911 | if (cris_get_operand2 (inst) == REG_PC) | |
2912 | { | |
2913 | inst_env->invalid = 1; | |
2914 | return; | |
2915 | } | |
2916 | inst_env->slot_needed = 0; | |
2917 | inst_env->prefix_found = 0; | |
2918 | inst_env->xflag_found = 0; | |
2919 | inst_env->disable_interrupt = 0; | |
2920 | } | |
2921 | ||
2922 | /* Calculate the result of the instruction for ADD, SUB, CMP AND, OR and MOVE. | |
2923 | The MOVE instruction is the move from source to register. */ | |
2924 | ||
a78f21af | 2925 | static void |
29134980 OF |
2926 | add_sub_cmp_and_or_move_action (unsigned short inst, inst_env_type *inst_env, |
2927 | unsigned long source1, unsigned long source2) | |
2928 | { | |
2929 | unsigned long pc_mask; | |
2930 | unsigned long operation_mask; | |
2931 | ||
2932 | /* Find out how many bits the operation should apply to. */ | |
2933 | if (cris_get_size (inst) == INST_BYTE_SIZE) | |
2934 | { | |
2935 | pc_mask = 0xFFFFFF00; | |
2936 | operation_mask = 0xFF; | |
2937 | } | |
2938 | else if (cris_get_size (inst) == INST_WORD_SIZE) | |
2939 | { | |
2940 | pc_mask = 0xFFFF0000; | |
2941 | operation_mask = 0xFFFF; | |
2942 | } | |
2943 | else if (cris_get_size (inst) == INST_DWORD_SIZE) | |
2944 | { | |
2945 | pc_mask = 0x0; | |
2946 | operation_mask = 0xFFFFFFFF; | |
2947 | } | |
2948 | else | |
2949 | { | |
2950 | /* The size is out of range. */ | |
2951 | inst_env->invalid = 1; | |
2952 | return; | |
2953 | } | |
2954 | ||
2955 | /* The instruction just works on uw_operation_mask bits. */ | |
2956 | source2 &= operation_mask; | |
2957 | source1 &= operation_mask; | |
2958 | ||
2959 | /* Now calculate the result. The opcode's 3 first bits separates | |
2960 | the different actions. */ | |
2961 | switch (cris_get_opcode (inst) & 7) | |
2962 | { | |
2963 | case 0: /* add */ | |
2964 | source1 += source2; | |
2965 | break; | |
2966 | ||
2967 | case 1: /* move */ | |
2968 | source1 = source2; | |
2969 | break; | |
2970 | ||
2971 | case 2: /* subtract */ | |
2972 | source1 -= source2; | |
2973 | break; | |
2974 | ||
2975 | case 3: /* compare */ | |
2976 | break; | |
2977 | ||
2978 | case 4: /* and */ | |
2979 | source1 &= source2; | |
2980 | break; | |
2981 | ||
2982 | case 5: /* or */ | |
2983 | source1 |= source2; | |
2984 | break; | |
2985 | ||
2986 | default: | |
2987 | inst_env->invalid = 1; | |
2988 | return; | |
2989 | ||
2990 | break; | |
2991 | } | |
2992 | ||
2993 | /* Make sure that the result doesn't contain more than the instruction | |
2994 | size bits. */ | |
2995 | source2 &= operation_mask; | |
2996 | ||
2997 | /* Calculate the new breakpoint address. */ | |
2998 | inst_env->reg[REG_PC] &= pc_mask; | |
2999 | inst_env->reg[REG_PC] |= source1; | |
3000 | ||
3001 | } | |
3002 | ||
3003 | /* Extends the value from either byte or word size to a dword. If the mode | |
3004 | is zero extend then the value is extended with zero. If instead the mode | |
3005 | is signed extend the sign bit of the value is taken into consideration. */ | |
3006 | ||
a78f21af | 3007 | static unsigned long |
29134980 OF |
3008 | do_sign_or_zero_extend (unsigned long value, unsigned short *inst) |
3009 | { | |
3010 | /* The size can be either byte or word, check which one it is. | |
3011 | Don't check the highest bit, it's indicating if it's a zero | |
3012 | or sign extend. */ | |
3013 | if (cris_get_size (*inst) & INST_WORD_SIZE) | |
3014 | { | |
3015 | /* Word size. */ | |
3016 | value &= 0xFFFF; | |
3017 | ||
3018 | /* Check if the instruction is signed extend. If so, check if value has | |
3019 | the sign bit on. */ | |
3020 | if (cris_is_signed_extend_bit_on (*inst) && (value & SIGNED_WORD_MASK)) | |
3021 | { | |
3022 | value |= SIGNED_WORD_EXTEND_MASK; | |
3023 | } | |
3024 | } | |
3025 | else | |
3026 | { | |
3027 | /* Byte size. */ | |
3028 | value &= 0xFF; | |
3029 | ||
3030 | /* Check if the instruction is signed extend. If so, check if value has | |
3031 | the sign bit on. */ | |
3032 | if (cris_is_signed_extend_bit_on (*inst) && (value & SIGNED_BYTE_MASK)) | |
3033 | { | |
3034 | value |= SIGNED_BYTE_EXTEND_MASK; | |
3035 | } | |
3036 | } | |
3037 | /* The size should now be dword. */ | |
3038 | cris_set_size_to_dword (inst); | |
3039 | return value; | |
3040 | } | |
3041 | ||
3042 | /* Handles the register mode for the ADD, SUB, CMP, AND, OR and MOVE | |
3043 | instruction. The MOVE instruction is the move from source to register. */ | |
3044 | ||
a78f21af | 3045 | static void |
29134980 OF |
3046 | reg_mode_add_sub_cmp_and_or_move_op (unsigned short inst, |
3047 | inst_env_type *inst_env) | |
3048 | { | |
3049 | unsigned long operand1; | |
3050 | unsigned long operand2; | |
3051 | ||
3052 | /* It's invalid to have a prefix to the instruction. This is a register | |
3053 | mode instruction and can't have a prefix. */ | |
3054 | if (inst_env->prefix_found) | |
3055 | { | |
3056 | inst_env->invalid = 1; | |
3057 | return; | |
3058 | } | |
3059 | /* Check if the instruction has PC as its target. */ | |
3060 | if (cris_get_operand2 (inst) == REG_PC) | |
3061 | { | |
3062 | if (inst_env->slot_needed) | |
3063 | { | |
3064 | inst_env->invalid = 1; | |
3065 | return; | |
3066 | } | |
3067 | /* The instruction has the PC as its target register. */ | |
7ab98e9e | 3068 | operand1 = inst_env->reg[cris_get_operand1 (inst)]; |
29134980 OF |
3069 | operand2 = inst_env->reg[REG_PC]; |
3070 | ||
3071 | /* Check if it's a extend, signed or zero instruction. */ | |
3072 | if (cris_get_opcode (inst) < 4) | |
3073 | { | |
3074 | operand1 = do_sign_or_zero_extend (operand1, &inst); | |
3075 | } | |
3076 | /* Calculate the PC value after the instruction, i.e. where the | |
3077 | breakpoint should be. The order of the udw_operands is vital. */ | |
3078 | add_sub_cmp_and_or_move_action (inst, inst_env, operand2, operand1); | |
3079 | } | |
3080 | inst_env->slot_needed = 0; | |
3081 | inst_env->prefix_found = 0; | |
3082 | inst_env->xflag_found = 0; | |
3083 | inst_env->disable_interrupt = 0; | |
3084 | } | |
3085 | ||
3086 | /* Returns the data contained at address. The size of the data is derived from | |
3087 | the size of the operation. If the instruction is a zero or signed | |
3088 | extend instruction, the size field is changed in instruction. */ | |
3089 | ||
a78f21af | 3090 | static unsigned long |
29134980 OF |
3091 | get_data_from_address (unsigned short *inst, CORE_ADDR address) |
3092 | { | |
3093 | int size = cris_get_size (*inst); | |
3094 | unsigned long value; | |
3095 | ||
3096 | /* If it's an extend instruction we don't want the signed extend bit, | |
3097 | because it influences the size. */ | |
3098 | if (cris_get_opcode (*inst) < 4) | |
3099 | { | |
3100 | size &= ~SIGNED_EXTEND_BIT_MASK; | |
3101 | } | |
3102 | /* Is there a need for checking the size? Size should contain the number of | |
3103 | bytes to read. */ | |
3104 | size = 1 << size; | |
3105 | value = read_memory_unsigned_integer (address, size); | |
3106 | ||
3107 | /* Check if it's an extend, signed or zero instruction. */ | |
3108 | if (cris_get_opcode (*inst) < 4) | |
3109 | { | |
3110 | value = do_sign_or_zero_extend (value, inst); | |
3111 | } | |
3112 | return value; | |
3113 | } | |
3114 | ||
3115 | /* Handles the assign addresing mode for the ADD, SUB, CMP, AND, OR and MOVE | |
3116 | instructions. The MOVE instruction is the move from source to register. */ | |
3117 | ||
a78f21af | 3118 | static void |
29134980 OF |
3119 | handle_prefix_assign_mode_for_aritm_op (unsigned short inst, |
3120 | inst_env_type *inst_env) | |
3121 | { | |
3122 | unsigned long operand2; | |
3123 | unsigned long operand3; | |
3124 | ||
3125 | check_assign (inst, inst_env); | |
3126 | if (cris_get_operand2 (inst) == REG_PC) | |
3127 | { | |
3128 | operand2 = inst_env->reg[REG_PC]; | |
3129 | ||
3130 | /* Get the value of the third operand. */ | |
3131 | operand3 = get_data_from_address (&inst, inst_env->prefix_value); | |
3132 | ||
3133 | /* Calculate the PC value after the instruction, i.e. where the | |
3134 | breakpoint should be. The order of the udw_operands is vital. */ | |
3135 | add_sub_cmp_and_or_move_action (inst, inst_env, operand2, operand3); | |
3136 | } | |
3137 | inst_env->slot_needed = 0; | |
3138 | inst_env->prefix_found = 0; | |
3139 | inst_env->xflag_found = 0; | |
3140 | inst_env->disable_interrupt = 0; | |
3141 | } | |
3142 | ||
3143 | /* Handles the three-operand addressing mode for the ADD, SUB, CMP, AND and | |
3144 | OR instructions. Note that for this to work as expected, the calling | |
3145 | function must have made sure that there is a prefix to this instruction. */ | |
3146 | ||
a78f21af | 3147 | static void |
29134980 OF |
3148 | three_operand_add_sub_cmp_and_or_op (unsigned short inst, |
3149 | inst_env_type *inst_env) | |
3150 | { | |
3151 | unsigned long operand2; | |
3152 | unsigned long operand3; | |
3153 | ||
3154 | if (cris_get_operand1 (inst) == REG_PC) | |
3155 | { | |
3156 | /* The PC will be changed by the instruction. */ | |
3157 | operand2 = inst_env->reg[cris_get_operand2 (inst)]; | |
3158 | ||
3159 | /* Get the value of the third operand. */ | |
3160 | operand3 = get_data_from_address (&inst, inst_env->prefix_value); | |
3161 | ||
3162 | /* Calculate the PC value after the instruction, i.e. where the | |
3163 | breakpoint should be. */ | |
3164 | add_sub_cmp_and_or_move_action (inst, inst_env, operand2, operand3); | |
3165 | } | |
3166 | inst_env->slot_needed = 0; | |
3167 | inst_env->prefix_found = 0; | |
3168 | inst_env->xflag_found = 0; | |
3169 | inst_env->disable_interrupt = 0; | |
3170 | } | |
3171 | ||
3172 | /* Handles the index addresing mode for the ADD, SUB, CMP, AND, OR and MOVE | |
3173 | instructions. The MOVE instruction is the move from source to register. */ | |
3174 | ||
a78f21af | 3175 | static void |
29134980 OF |
3176 | handle_prefix_index_mode_for_aritm_op (unsigned short inst, |
3177 | inst_env_type *inst_env) | |
3178 | { | |
3179 | if (cris_get_operand1 (inst) != cris_get_operand2 (inst)) | |
3180 | { | |
3181 | /* If the instruction is MOVE it's invalid. If the instruction is ADD, | |
3182 | SUB, AND or OR something weird is going on (if everything works these | |
3183 | instructions should end up in the three operand version). */ | |
3184 | inst_env->invalid = 1; | |
3185 | return; | |
3186 | } | |
3187 | else | |
3188 | { | |
3189 | /* three_operand_add_sub_cmp_and_or does the same as we should do here | |
3190 | so use it. */ | |
3191 | three_operand_add_sub_cmp_and_or_op (inst, inst_env); | |
3192 | } | |
3193 | inst_env->slot_needed = 0; | |
3194 | inst_env->prefix_found = 0; | |
3195 | inst_env->xflag_found = 0; | |
3196 | inst_env->disable_interrupt = 0; | |
3197 | } | |
3198 | ||
3199 | /* Handles the autoincrement and indirect addresing mode for the ADD, SUB, | |
3200 | CMP, AND OR and MOVE instruction. The MOVE instruction is the move from | |
3201 | source to register. */ | |
3202 | ||
a78f21af | 3203 | static void |
29134980 OF |
3204 | handle_inc_and_index_mode_for_aritm_op (unsigned short inst, |
3205 | inst_env_type *inst_env) | |
3206 | { | |
3207 | unsigned long operand1; | |
3208 | unsigned long operand2; | |
3209 | unsigned long operand3; | |
3210 | int size; | |
3211 | ||
3212 | /* The instruction is either an indirect or autoincrement addressing mode. | |
3213 | Check if the destination register is the PC. */ | |
3214 | if (cris_get_operand2 (inst) == REG_PC) | |
3215 | { | |
3216 | /* Must be done here, get_data_from_address may change the size | |
3217 | field. */ | |
3218 | size = cris_get_size (inst); | |
3219 | operand2 = inst_env->reg[REG_PC]; | |
3220 | ||
3221 | /* Get the value of the third operand, i.e. the indirect operand. */ | |
3222 | operand1 = inst_env->reg[cris_get_operand1 (inst)]; | |
3223 | operand3 = get_data_from_address (&inst, operand1); | |
3224 | ||
3225 | /* Calculate the PC value after the instruction, i.e. where the | |
3226 | breakpoint should be. The order of the udw_operands is vital. */ | |
3227 | add_sub_cmp_and_or_move_action (inst, inst_env, operand2, operand3); | |
3228 | } | |
3229 | /* If this is an autoincrement addressing mode, check if the increment | |
3230 | changes the PC. */ | |
3231 | if ((cris_get_operand1 (inst) == REG_PC) && (cris_get_mode (inst) == AUTOINC_MODE)) | |
3232 | { | |
3233 | /* Get the size field. */ | |
3234 | size = cris_get_size (inst); | |
3235 | ||
3236 | /* If it's an extend instruction we don't want the signed extend bit, | |
3237 | because it influences the size. */ | |
3238 | if (cris_get_opcode (inst) < 4) | |
3239 | { | |
3240 | size &= ~SIGNED_EXTEND_BIT_MASK; | |
3241 | } | |
3242 | process_autoincrement (size, inst, inst_env); | |
3243 | } | |
3244 | inst_env->slot_needed = 0; | |
3245 | inst_env->prefix_found = 0; | |
3246 | inst_env->xflag_found = 0; | |
3247 | inst_env->disable_interrupt = 0; | |
3248 | } | |
3249 | ||
3250 | /* Handles the two-operand addressing mode, all modes except register, for | |
3251 | the ADD, SUB CMP, AND and OR instruction. */ | |
3252 | ||
a78f21af | 3253 | static void |
29134980 OF |
3254 | none_reg_mode_add_sub_cmp_and_or_move_op (unsigned short inst, |
3255 | inst_env_type *inst_env) | |
3256 | { | |
3257 | if (inst_env->prefix_found) | |
3258 | { | |
3259 | if (cris_get_mode (inst) == PREFIX_INDEX_MODE) | |
3260 | { | |
3261 | handle_prefix_index_mode_for_aritm_op (inst, inst_env); | |
3262 | } | |
3263 | else if (cris_get_mode (inst) == PREFIX_ASSIGN_MODE) | |
3264 | { | |
3265 | handle_prefix_assign_mode_for_aritm_op (inst, inst_env); | |
3266 | } | |
3267 | else | |
3268 | { | |
3269 | /* The mode is invalid for a prefixed base instruction. */ | |
3270 | inst_env->invalid = 1; | |
3271 | return; | |
3272 | } | |
3273 | } | |
3274 | else | |
3275 | { | |
3276 | handle_inc_and_index_mode_for_aritm_op (inst, inst_env); | |
3277 | } | |
3278 | } | |
3279 | ||
3280 | /* Handles the quick addressing mode for the ADD and SUB instruction. */ | |
3281 | ||
a78f21af | 3282 | static void |
29134980 OF |
3283 | quick_mode_add_sub_op (unsigned short inst, inst_env_type *inst_env) |
3284 | { | |
3285 | unsigned long operand1; | |
3286 | unsigned long operand2; | |
3287 | ||
3288 | /* It's a bad idea to be in a prefix instruction now. This is a quick mode | |
3289 | instruction and can't have a prefix. */ | |
3290 | if (inst_env->prefix_found) | |
3291 | { | |
3292 | inst_env->invalid = 1; | |
3293 | return; | |
3294 | } | |
3295 | ||
3296 | /* Check if the instruction has PC as its target. */ | |
3297 | if (cris_get_operand2 (inst) == REG_PC) | |
3298 | { | |
3299 | if (inst_env->slot_needed) | |
3300 | { | |
3301 | inst_env->invalid = 1; | |
3302 | return; | |
3303 | } | |
3304 | operand1 = cris_get_quick_value (inst); | |
3305 | operand2 = inst_env->reg[REG_PC]; | |
3306 | ||
3307 | /* The size should now be dword. */ | |
3308 | cris_set_size_to_dword (&inst); | |
3309 | ||
3310 | /* Calculate the PC value after the instruction, i.e. where the | |
3311 | breakpoint should be. */ | |
3312 | add_sub_cmp_and_or_move_action (inst, inst_env, operand2, operand1); | |
3313 | } | |
3314 | inst_env->slot_needed = 0; | |
3315 | inst_env->prefix_found = 0; | |
3316 | inst_env->xflag_found = 0; | |
3317 | inst_env->disable_interrupt = 0; | |
3318 | } | |
3319 | ||
3320 | /* Handles the quick addressing mode for the CMP, AND and OR instruction. */ | |
3321 | ||
a78f21af | 3322 | static void |
29134980 OF |
3323 | quick_mode_and_cmp_move_or_op (unsigned short inst, inst_env_type *inst_env) |
3324 | { | |
3325 | unsigned long operand1; | |
3326 | unsigned long operand2; | |
3327 | ||
3328 | /* It's a bad idea to be in a prefix instruction now. This is a quick mode | |
3329 | instruction and can't have a prefix. */ | |
3330 | if (inst_env->prefix_found) | |
3331 | { | |
3332 | inst_env->invalid = 1; | |
3333 | return; | |
3334 | } | |
3335 | /* Check if the instruction has PC as its target. */ | |
3336 | if (cris_get_operand2 (inst) == REG_PC) | |
3337 | { | |
3338 | if (inst_env->slot_needed) | |
3339 | { | |
3340 | inst_env->invalid = 1; | |
3341 | return; | |
3342 | } | |
3343 | /* The instruction has the PC as its target register. */ | |
3344 | operand1 = cris_get_quick_value (inst); | |
3345 | operand2 = inst_env->reg[REG_PC]; | |
3346 | ||
3347 | /* The quick value is signed, so check if we must do a signed extend. */ | |
3348 | if (operand1 & SIGNED_QUICK_VALUE_MASK) | |
3349 | { | |
3350 | /* sign extend */ | |
3351 | operand1 |= SIGNED_QUICK_VALUE_EXTEND_MASK; | |
3352 | } | |
3353 | /* The size should now be dword. */ | |
3354 | cris_set_size_to_dword (&inst); | |
3355 | ||
3356 | /* Calculate the PC value after the instruction, i.e. where the | |
3357 | breakpoint should be. */ | |
3358 | add_sub_cmp_and_or_move_action (inst, inst_env, operand2, operand1); | |
3359 | } | |
3360 | inst_env->slot_needed = 0; | |
3361 | inst_env->prefix_found = 0; | |
3362 | inst_env->xflag_found = 0; | |
3363 | inst_env->disable_interrupt = 0; | |
3364 | } | |
3365 | ||
3366 | /* Translate op_type to a function and call it. */ | |
3367 | ||
a78f21af AC |
3368 | static void |
3369 | cris_gdb_func (enum cris_op_type op_type, unsigned short inst, | |
3370 | inst_env_type *inst_env) | |
29134980 OF |
3371 | { |
3372 | switch (op_type) | |
3373 | { | |
3374 | case cris_not_implemented_op: | |
3375 | not_implemented_op (inst, inst_env); | |
3376 | break; | |
3377 | ||
3378 | case cris_abs_op: | |
3379 | abs_op (inst, inst_env); | |
3380 | break; | |
3381 | ||
3382 | case cris_addi_op: | |
3383 | addi_op (inst, inst_env); | |
3384 | break; | |
3385 | ||
3386 | case cris_asr_op: | |
3387 | asr_op (inst, inst_env); | |
3388 | break; | |
3389 | ||
3390 | case cris_asrq_op: | |
3391 | asrq_op (inst, inst_env); | |
3392 | break; | |
3393 | ||
3394 | case cris_ax_ei_setf_op: | |
3395 | ax_ei_setf_op (inst, inst_env); | |
3396 | break; | |
3397 | ||
3398 | case cris_bdap_prefix: | |
3399 | bdap_prefix (inst, inst_env); | |
3400 | break; | |
3401 | ||
3402 | case cris_biap_prefix: | |
3403 | biap_prefix (inst, inst_env); | |
3404 | break; | |
3405 | ||
3406 | case cris_break_op: | |
3407 | break_op (inst, inst_env); | |
3408 | break; | |
3409 | ||
3410 | case cris_btst_nop_op: | |
3411 | btst_nop_op (inst, inst_env); | |
3412 | break; | |
3413 | ||
3414 | case cris_clearf_di_op: | |
3415 | clearf_di_op (inst, inst_env); | |
3416 | break; | |
3417 | ||
3418 | case cris_dip_prefix: | |
3419 | dip_prefix (inst, inst_env); | |
3420 | break; | |
3421 | ||
3422 | case cris_dstep_logshift_mstep_neg_not_op: | |
3423 | dstep_logshift_mstep_neg_not_op (inst, inst_env); | |
3424 | break; | |
3425 | ||
3426 | case cris_eight_bit_offset_branch_op: | |
3427 | eight_bit_offset_branch_op (inst, inst_env); | |
3428 | break; | |
3429 | ||
3430 | case cris_move_mem_to_reg_movem_op: | |
3431 | move_mem_to_reg_movem_op (inst, inst_env); | |
3432 | break; | |
3433 | ||
3434 | case cris_move_reg_to_mem_movem_op: | |
3435 | move_reg_to_mem_movem_op (inst, inst_env); | |
3436 | break; | |
3437 | ||
3438 | case cris_move_to_preg_op: | |
3439 | move_to_preg_op (inst, inst_env); | |
3440 | break; | |
3441 | ||
3442 | case cris_muls_op: | |
3443 | muls_op (inst, inst_env); | |
3444 | break; | |
3445 | ||
3446 | case cris_mulu_op: | |
3447 | mulu_op (inst, inst_env); | |
3448 | break; | |
3449 | ||
3450 | case cris_none_reg_mode_add_sub_cmp_and_or_move_op: | |
3451 | none_reg_mode_add_sub_cmp_and_or_move_op (inst, inst_env); | |
3452 | break; | |
3453 | ||
3454 | case cris_none_reg_mode_clear_test_op: | |
3455 | none_reg_mode_clear_test_op (inst, inst_env); | |
3456 | break; | |
3457 | ||
3458 | case cris_none_reg_mode_jump_op: | |
3459 | none_reg_mode_jump_op (inst, inst_env); | |
3460 | break; | |
3461 | ||
3462 | case cris_none_reg_mode_move_from_preg_op: | |
3463 | none_reg_mode_move_from_preg_op (inst, inst_env); | |
3464 | break; | |
3465 | ||
3466 | case cris_quick_mode_add_sub_op: | |
3467 | quick_mode_add_sub_op (inst, inst_env); | |
3468 | break; | |
3469 | ||
3470 | case cris_quick_mode_and_cmp_move_or_op: | |
3471 | quick_mode_and_cmp_move_or_op (inst, inst_env); | |
3472 | break; | |
3473 | ||
3474 | case cris_quick_mode_bdap_prefix: | |
3475 | quick_mode_bdap_prefix (inst, inst_env); | |
3476 | break; | |
3477 | ||
3478 | case cris_reg_mode_add_sub_cmp_and_or_move_op: | |
3479 | reg_mode_add_sub_cmp_and_or_move_op (inst, inst_env); | |
3480 | break; | |
3481 | ||
3482 | case cris_reg_mode_clear_op: | |
3483 | reg_mode_clear_op (inst, inst_env); | |
3484 | break; | |
3485 | ||
3486 | case cris_reg_mode_jump_op: | |
3487 | reg_mode_jump_op (inst, inst_env); | |
3488 | break; | |
3489 | ||
3490 | case cris_reg_mode_move_from_preg_op: | |
3491 | reg_mode_move_from_preg_op (inst, inst_env); | |
3492 | break; | |
3493 | ||
3494 | case cris_reg_mode_test_op: | |
3495 | reg_mode_test_op (inst, inst_env); | |
3496 | break; | |
3497 | ||
3498 | case cris_scc_op: | |
3499 | scc_op (inst, inst_env); | |
3500 | break; | |
3501 | ||
3502 | case cris_sixteen_bit_offset_branch_op: | |
3503 | sixteen_bit_offset_branch_op (inst, inst_env); | |
3504 | break; | |
3505 | ||
3506 | case cris_three_operand_add_sub_cmp_and_or_op: | |
3507 | three_operand_add_sub_cmp_and_or_op (inst, inst_env); | |
3508 | break; | |
3509 | ||
3510 | case cris_three_operand_bound_op: | |
3511 | three_operand_bound_op (inst, inst_env); | |
3512 | break; | |
3513 | ||
3514 | case cris_two_operand_bound_op: | |
3515 | two_operand_bound_op (inst, inst_env); | |
3516 | break; | |
3517 | ||
3518 | case cris_xor_op: | |
3519 | xor_op (inst, inst_env); | |
3520 | break; | |
3521 | } | |
3522 | } | |
3523 | ||
3524 | /* This wrapper is to avoid cris_get_assembler being called before | |
3525 | exec_bfd has been set. */ | |
3526 | ||
3527 | static int | |
a89aa300 | 3528 | cris_delayed_get_disassembler (bfd_vma addr, struct disassemble_info *info) |
29134980 | 3529 | { |
a89aa300 | 3530 | int (*print_insn) (bfd_vma addr, struct disassemble_info *info); |
36482093 AC |
3531 | /* FIXME: cagney/2003-08-27: It should be possible to select a CRIS |
3532 | disassembler, even when there is no BFD. Does something like | |
3533 | "gdb; target remote; disassmeble *0x123" work? */ | |
3534 | gdb_assert (exec_bfd != NULL); | |
3535 | print_insn = cris_get_disassembler (exec_bfd); | |
3536 | gdb_assert (print_insn != NULL); | |
3537 | return print_insn (addr, info); | |
29134980 OF |
3538 | } |
3539 | ||
dbbff683 OF |
3540 | /* Copied from <asm/elf.h>. */ |
3541 | typedef unsigned long elf_greg_t; | |
3542 | ||
3543 | /* Same as user_regs_struct struct in <asm/user.h>. */ | |
3544 | typedef elf_greg_t elf_gregset_t[35]; | |
3545 | ||
3546 | /* Unpack an elf_gregset_t into GDB's register cache. */ | |
3547 | ||
a78f21af | 3548 | static void |
dbbff683 OF |
3549 | supply_gregset (elf_gregset_t *gregsetp) |
3550 | { | |
3551 | int i; | |
3552 | elf_greg_t *regp = *gregsetp; | |
3553 | static char zerobuf[4] = {0}; | |
3554 | ||
3555 | /* The kernel dumps all 32 registers as unsigned longs, but supply_register | |
3556 | knows about the actual size of each register so that's no problem. */ | |
3557 | for (i = 0; i < NUM_GENREGS + NUM_SPECREGS; i++) | |
3558 | { | |
3559 | supply_register (i, (char *)®p[i]); | |
3560 | } | |
3561 | } | |
3562 | ||
3563 | /* Use a local version of this function to get the correct types for | |
3564 | regsets, until multi-arch core support is ready. */ | |
3565 | ||
3566 | static void | |
3567 | fetch_core_registers (char *core_reg_sect, unsigned core_reg_size, | |
3568 | int which, CORE_ADDR reg_addr) | |
3569 | { | |
3570 | elf_gregset_t gregset; | |
3571 | ||
3572 | switch (which) | |
3573 | { | |
3574 | case 0: | |
3575 | if (core_reg_size != sizeof (gregset)) | |
3576 | { | |
3577 | warning ("wrong size gregset struct in core file"); | |
3578 | } | |
3579 | else | |
3580 | { | |
3581 | memcpy (&gregset, core_reg_sect, sizeof (gregset)); | |
3582 | supply_gregset (&gregset); | |
3583 | } | |
3584 | ||
3585 | default: | |
3586 | /* We've covered all the kinds of registers we know about here, | |
3587 | so this must be something we wouldn't know what to do with | |
3588 | anyway. Just ignore it. */ | |
3589 | break; | |
3590 | } | |
3591 | } | |
3592 | ||
3593 | static struct core_fns cris_elf_core_fns = | |
3594 | { | |
3595 | bfd_target_elf_flavour, /* core_flavour */ | |
3596 | default_check_format, /* check_format */ | |
3597 | default_core_sniffer, /* core_sniffer */ | |
3598 | fetch_core_registers, /* core_read_registers */ | |
3599 | NULL /* next */ | |
3600 | }; | |
3601 | ||
3602 | /* Fetch (and possibly build) an appropriate link_map_offsets | |
8605d56e AC |
3603 | structure for native GNU/Linux CRIS targets using the struct |
3604 | offsets defined in link.h (but without actual reference to that | |
3605 | file). | |
dbbff683 | 3606 | |
8605d56e AC |
3607 | This makes it possible to access GNU/Linux CRIS shared libraries |
3608 | from a GDB that was not built on an GNU/Linux CRIS host (for cross | |
3609 | debugging). | |
dbbff683 OF |
3610 | |
3611 | See gdb/solib-svr4.h for an explanation of these fields. */ | |
3612 | ||
a78f21af | 3613 | static struct link_map_offsets * |
dbbff683 OF |
3614 | cris_linux_svr4_fetch_link_map_offsets (void) |
3615 | { | |
3616 | static struct link_map_offsets lmo; | |
3617 | static struct link_map_offsets *lmp = NULL; | |
3618 | ||
3619 | if (lmp == NULL) | |
3620 | { | |
3621 | lmp = &lmo; | |
3622 | ||
3623 | lmo.r_debug_size = 8; /* The actual size is 20 bytes, but | |
3624 | this is all we need. */ | |
3625 | lmo.r_map_offset = 4; | |
3626 | lmo.r_map_size = 4; | |
3627 | ||
3628 | lmo.link_map_size = 20; | |
3629 | ||
3630 | lmo.l_addr_offset = 0; | |
3631 | lmo.l_addr_size = 4; | |
3632 | ||
3633 | lmo.l_name_offset = 4; | |
3634 | lmo.l_name_size = 4; | |
3635 | ||
3636 | lmo.l_next_offset = 12; | |
3637 | lmo.l_next_size = 4; | |
3638 | ||
3639 | lmo.l_prev_offset = 16; | |
3640 | lmo.l_prev_size = 4; | |
3641 | } | |
3642 | ||
3643 | return lmp; | |
3644 | } | |
3645 | ||
3646 | static void | |
3647 | cris_fpless_backtrace (char *noargs, int from_tty) | |
3648 | { | |
3649 | /* Points at the instruction after the jsr (except when in innermost frame | |
3650 | where it points at the original pc). */ | |
3651 | CORE_ADDR pc = 0; | |
3652 | ||
3653 | /* Temporary variable, used for parsing from the start of the function that | |
3654 | the pc is in, up to the pc. */ | |
3655 | CORE_ADDR tmp_pc = 0; | |
3656 | CORE_ADDR sp = 0; | |
3657 | ||
3658 | /* Information about current frame. */ | |
3659 | struct symtab_and_line sal; | |
3660 | char* func_name; | |
3661 | ||
3662 | /* Present instruction. */ | |
3663 | unsigned short insn; | |
3664 | ||
3665 | /* Next instruction, lookahead. */ | |
3666 | unsigned short insn_next; | |
3667 | ||
3668 | /* This is to store the offset between sp at start of function and until we | |
3669 | reach push srp (if any). */ | |
3670 | int sp_add_later = 0; | |
3671 | int push_srp_found = 0; | |
3672 | ||
3673 | int val = 0; | |
3674 | ||
3675 | /* Frame counter. */ | |
3676 | int frame = 0; | |
3677 | ||
3678 | /* For the innermost frame, we want to look at srp in case it's a leaf | |
3679 | function (since there's no push srp in that case). */ | |
3680 | int innermost_frame = 1; | |
3681 | ||
4caf0990 AC |
3682 | deprecated_read_register_gen (PC_REGNUM, (char *) &pc); |
3683 | deprecated_read_register_gen (SP_REGNUM, (char *) &sp); | |
dbbff683 OF |
3684 | |
3685 | /* We make an explicit return when we can't find an outer frame. */ | |
3686 | while (1) | |
3687 | { | |
3688 | /* Get file name and line number. */ | |
3689 | sal = find_pc_line (pc, 0); | |
3690 | ||
3691 | /* Get function name. */ | |
3692 | find_pc_partial_function (pc, &func_name, (CORE_ADDR *) NULL, | |
3693 | (CORE_ADDR *) NULL); | |
3694 | ||
3695 | /* Print information about current frame. */ | |
3696 | printf_unfiltered ("#%i 0x%08lx in %s", frame++, pc, func_name); | |
3697 | if (sal.symtab) | |
3698 | { | |
3699 | printf_unfiltered (" at %s:%i", sal.symtab->filename, sal.line); | |
3700 | } | |
3701 | printf_unfiltered ("\n"); | |
3702 | ||
3703 | /* Get the start address of this function. */ | |
3704 | tmp_pc = get_pc_function_start (pc); | |
3705 | ||
3706 | /* Mini parser, only meant to find push sp and sub ...,sp from the start | |
3707 | of the function, up to the pc. */ | |
3708 | while (tmp_pc < pc) | |
3709 | { | |
3710 | insn = read_memory_unsigned_integer (tmp_pc, sizeof (short)); | |
3711 | tmp_pc += sizeof (short); | |
3712 | if (insn == 0xE1FC) | |
3713 | { | |
3714 | /* push <reg> 32 bit instruction */ | |
3715 | insn_next = read_memory_unsigned_integer (tmp_pc, | |
3716 | sizeof (short)); | |
3717 | tmp_pc += sizeof (short); | |
3718 | ||
3719 | /* Recognize srp. */ | |
3720 | if (insn_next == 0xBE7E) | |
3721 | { | |
3722 | /* For subsequent (not this one though) push or sub which | |
3723 | affects sp, adjust sp immediately. */ | |
3724 | push_srp_found = 1; | |
3725 | ||
3726 | /* Note: this will break if we ever encounter a | |
3727 | push vr (1 byte) or push ccr (2 bytes). */ | |
3728 | sp_add_later += 4; | |
3729 | } | |
3730 | else | |
3731 | { | |
3732 | /* Some other register was pushed. */ | |
3733 | if (push_srp_found) | |
3734 | { | |
3735 | sp += 4; | |
3736 | } | |
3737 | else | |
3738 | { | |
3739 | sp_add_later += 4; | |
3740 | } | |
3741 | } | |
3742 | } | |
3743 | else if (cris_get_operand2 (insn) == SP_REGNUM | |
3744 | && cris_get_mode (insn) == 0x0000 | |
3745 | && cris_get_opcode (insn) == 0x000A) | |
3746 | { | |
3747 | /* subq <val>,sp */ | |
3748 | val = cris_get_quick_value (insn); | |
3749 | ||
3750 | if (push_srp_found) | |
3751 | { | |
3752 | sp += val; | |
3753 | } | |
3754 | else | |
3755 | { | |
3756 | sp_add_later += val; | |
3757 | } | |
3758 | ||
3759 | } | |
3760 | else if (cris_get_operand2 (insn) == SP_REGNUM | |
3761 | /* Autoincrement addressing mode. */ | |
3762 | && cris_get_mode (insn) == 0x0003 | |
3763 | /* Opcode. */ | |
3764 | && ((insn) & 0x03E0) >> 5 == 0x0004) | |
3765 | { | |
3766 | /* subu <val>,sp */ | |
3767 | val = get_data_from_address (&insn, tmp_pc); | |
3768 | ||
3769 | if (push_srp_found) | |
3770 | { | |
3771 | sp += val; | |
3772 | } | |
3773 | else | |
3774 | { | |
3775 | sp_add_later += val; | |
3776 | } | |
3777 | } | |
3778 | else if (cris_get_operand2 (insn) == SP_REGNUM | |
3779 | && ((insn & 0x0F00) >> 8) == 0x0001 | |
3780 | && (cris_get_signed_offset (insn) < 0)) | |
3781 | { | |
3782 | /* Immediate byte offset addressing prefix word with sp as base | |
3783 | register. Used for CRIS v8 i.e. ETRAX 100 and newer if <val> | |
3784 | is between 64 and 128. | |
3785 | movem r<regsave>,[sp=sp-<val>] */ | |
3786 | val = -cris_get_signed_offset (insn); | |
3787 | insn_next = read_memory_unsigned_integer (tmp_pc, | |
3788 | sizeof (short)); | |
3789 | tmp_pc += sizeof (short); | |
3790 | ||
3791 | if (cris_get_mode (insn_next) == PREFIX_ASSIGN_MODE | |
3792 | && cris_get_opcode (insn_next) == 0x000F | |
3793 | && cris_get_size (insn_next) == 0x0003 | |
3794 | && cris_get_operand1 (insn_next) == SP_REGNUM) | |
3795 | { | |
3796 | if (push_srp_found) | |
3797 | { | |
3798 | sp += val; | |
3799 | } | |
3800 | else | |
3801 | { | |
3802 | sp_add_later += val; | |
3803 | } | |
3804 | } | |
3805 | } | |
3806 | } | |
3807 | ||
3808 | if (push_srp_found) | |
3809 | { | |
3810 | /* Reset flag. */ | |
3811 | push_srp_found = 0; | |
3812 | ||
3813 | /* sp should now point at where srp is stored on the stack. Update | |
3814 | the pc to the srp. */ | |
3815 | pc = read_memory_unsigned_integer (sp, 4); | |
3816 | } | |
3817 | else if (innermost_frame) | |
3818 | { | |
3819 | /* We couldn't find a push srp in the prologue, so this must be | |
3820 | a leaf function, and thus we use the srp register directly. | |
3821 | This should happen at most once, for the innermost function. */ | |
4caf0990 | 3822 | deprecated_read_register_gen (SRP_REGNUM, (char *) &pc); |
dbbff683 OF |
3823 | } |
3824 | else | |
3825 | { | |
3826 | /* Couldn't find an outer frame. */ | |
3827 | return; | |
3828 | } | |
3829 | ||
3830 | /* Reset flag. (In case the innermost frame wasn't a leaf, we don't | |
3831 | want to look at the srp register later either). */ | |
3832 | innermost_frame = 0; | |
3833 | ||
3834 | /* Now, add the offset for everything up to, and including push srp, | |
3835 | that was held back during the prologue parsing. */ | |
3836 | sp += sp_add_later; | |
3837 | sp_add_later = 0; | |
3838 | } | |
3839 | } | |
3840 | ||
a78f21af AC |
3841 | extern initialize_file_ftype _initialize_cris_tdep; /* -Wmissing-prototypes */ |
3842 | ||
29134980 OF |
3843 | void |
3844 | _initialize_cris_tdep (void) | |
3845 | { | |
3846 | struct cmd_list_element *c; | |
3847 | ||
3848 | gdbarch_register (bfd_arch_cris, cris_gdbarch_init, cris_dump_tdep); | |
3849 | ||
29134980 OF |
3850 | /* CRIS-specific user-commands. */ |
3851 | c = add_set_cmd ("cris-version", class_support, var_integer, | |
3852 | (char *) &usr_cmd_cris_version, | |
3853 | "Set the current CRIS version.", &setlist); | |
9f60d481 | 3854 | set_cmd_sfunc (c, cris_version_update); |
29134980 OF |
3855 | add_show_from_set (c, &showlist); |
3856 | ||
3857 | c = add_set_enum_cmd ("cris-mode", class_support, cris_mode_enums, | |
3858 | &usr_cmd_cris_mode, | |
3859 | "Set the current CRIS mode.", &setlist); | |
9f60d481 | 3860 | set_cmd_sfunc (c, cris_mode_update); |
29134980 OF |
3861 | add_show_from_set (c, &showlist); |
3862 | ||
3863 | c = add_set_enum_cmd ("cris-abi", class_support, cris_abi_enums, | |
3864 | &usr_cmd_cris_abi, | |
3865 | "Set the current CRIS ABI version.", &setlist); | |
9f60d481 | 3866 | set_cmd_sfunc (c, cris_abi_update); |
29134980 | 3867 | add_show_from_set (c, &showlist); |
dbbff683 OF |
3868 | |
3869 | c = add_cmd ("cris-fpless-backtrace", class_support, cris_fpless_backtrace, | |
3870 | "Display call chain using the subroutine return pointer.\n" | |
3871 | "Note that this displays the address after the jump to the " | |
3872 | "subroutine.", &cmdlist); | |
3873 | ||
3874 | add_core_fns (&cris_elf_core_fns); | |
3875 | ||
29134980 OF |
3876 | } |
3877 | ||
3878 | /* Prints out all target specific values. */ | |
3879 | ||
3880 | static void | |
3881 | cris_dump_tdep (struct gdbarch *gdbarch, struct ui_file *file) | |
3882 | { | |
3883 | struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); | |
3884 | if (tdep != NULL) | |
3885 | { | |
3886 | fprintf_unfiltered (file, "cris_dump_tdep: tdep->cris_version = %i\n", | |
3887 | tdep->cris_version); | |
3888 | fprintf_unfiltered (file, "cris_dump_tdep: tdep->cris_mode = %s\n", | |
3889 | tdep->cris_mode); | |
3890 | fprintf_unfiltered (file, "cris_dump_tdep: tdep->cris_abi = %s\n", | |
3891 | tdep->cris_abi); | |
3892 | ||
3893 | } | |
3894 | } | |
3895 | ||
3896 | static void | |
3897 | cris_version_update (char *ignore_args, int from_tty, | |
3898 | struct cmd_list_element *c) | |
3899 | { | |
3900 | struct gdbarch_info info; | |
3901 | ||
1868c04e AC |
3902 | /* NOTE: cagney/2002-03-17: The add_show_from_set() function clones |
3903 | the set command passed as a parameter. The clone operation will | |
3904 | include (BUG?) any ``set'' command callback, if present. | |
3905 | Commands like ``info set'' call all the ``show'' command | |
ce2826aa | 3906 | callbacks. Unfortunately, for ``show'' commands cloned from |
1868c04e AC |
3907 | ``set'', this includes callbacks belonging to ``set'' commands. |
3908 | Making this worse, this only occures if add_show_from_set() is | |
3909 | called after add_cmd_sfunc() (BUG?). */ | |
3910 | ||
29134980 | 3911 | /* From here on, trust the user's CRIS version setting. */ |
1868c04e | 3912 | if (cmd_type (c) == set_cmd) |
29134980 OF |
3913 | { |
3914 | usr_cmd_cris_version_valid = 1; | |
3915 | ||
3916 | /* Update the current architecture, if needed. */ | |
fb6ecb0f | 3917 | gdbarch_info_init (&info); |
29134980 OF |
3918 | if (!gdbarch_update_p (info)) |
3919 | internal_error (__FILE__, __LINE__, "cris_gdbarch_update: failed to update architecture."); | |
3920 | } | |
3921 | } | |
3922 | ||
3923 | static void | |
3924 | cris_mode_update (char *ignore_args, int from_tty, | |
3925 | struct cmd_list_element *c) | |
3926 | { | |
3927 | struct gdbarch_info info; | |
3928 | ||
1868c04e AC |
3929 | /* NOTE: cagney/2002-03-17: The add_show_from_set() function clones |
3930 | the set command passed as a parameter. The clone operation will | |
3931 | include (BUG?) any ``set'' command callback, if present. | |
3932 | Commands like ``info set'' call all the ``show'' command | |
ce2826aa | 3933 | callbacks. Unfortunately, for ``show'' commands cloned from |
1868c04e AC |
3934 | ``set'', this includes callbacks belonging to ``set'' commands. |
3935 | Making this worse, this only occures if add_show_from_set() is | |
3936 | called after add_cmd_sfunc() (BUG?). */ | |
3937 | ||
29134980 | 3938 | /* From here on, trust the user's CRIS mode setting. */ |
1868c04e | 3939 | if (cmd_type (c) == set_cmd) |
29134980 OF |
3940 | { |
3941 | usr_cmd_cris_mode_valid = 1; | |
3942 | ||
3943 | /* Update the current architecture, if needed. */ | |
fb6ecb0f | 3944 | gdbarch_info_init (&info); |
29134980 OF |
3945 | if (!gdbarch_update_p (info)) |
3946 | internal_error (__FILE__, __LINE__, "cris_gdbarch_update: failed to update architecture."); | |
3947 | } | |
3948 | } | |
3949 | ||
3950 | static void | |
3951 | cris_abi_update (char *ignore_args, int from_tty, | |
3952 | struct cmd_list_element *c) | |
3953 | { | |
3954 | struct gdbarch_info info; | |
3955 | ||
1868c04e AC |
3956 | /* NOTE: cagney/2002-03-17: The add_show_from_set() function clones |
3957 | the set command passed as a parameter. The clone operation will | |
3958 | include (BUG?) any ``set'' command callback, if present. | |
3959 | Commands like ``info set'' call all the ``show'' command | |
ce2826aa | 3960 | callbacks. Unfortunately, for ``show'' commands cloned from |
1868c04e AC |
3961 | ``set'', this includes callbacks belonging to ``set'' commands. |
3962 | Making this worse, this only occures if add_show_from_set() is | |
3963 | called after add_cmd_sfunc() (BUG?). */ | |
3964 | ||
29134980 | 3965 | /* From here on, trust the user's CRIS ABI setting. */ |
1868c04e | 3966 | if (cmd_type (c) == set_cmd) |
29134980 OF |
3967 | { |
3968 | usr_cmd_cris_abi_valid = 1; | |
3969 | ||
3970 | /* Update the current architecture, if needed. */ | |
fb6ecb0f | 3971 | gdbarch_info_init (&info); |
29134980 OF |
3972 | if (!gdbarch_update_p (info)) |
3973 | internal_error (__FILE__, __LINE__, "cris_gdbarch_update: failed to update architecture."); | |
3974 | } | |
3975 | } | |
3976 | ||
3977 | /* Copied from pa64solib.c, with a couple of minor changes. */ | |
3978 | ||
3979 | static CORE_ADDR | |
3980 | bfd_lookup_symbol (bfd *abfd, const char *symname) | |
3981 | { | |
3982 | unsigned int storage_needed; | |
3983 | asymbol *sym; | |
3984 | asymbol **symbol_table; | |
3985 | unsigned int number_of_symbols; | |
3986 | unsigned int i; | |
3987 | struct cleanup *back_to; | |
3988 | CORE_ADDR symaddr = 0; | |
3989 | ||
3990 | storage_needed = bfd_get_symtab_upper_bound (abfd); | |
3991 | ||
3992 | if (storage_needed > 0) | |
3993 | { | |
3994 | symbol_table = (asymbol **) xmalloc (storage_needed); | |
4efb68b1 | 3995 | back_to = make_cleanup (free, symbol_table); |
29134980 OF |
3996 | number_of_symbols = bfd_canonicalize_symtab (abfd, symbol_table); |
3997 | ||
3998 | for (i = 0; i < number_of_symbols; i++) | |
3999 | { | |
4000 | sym = *symbol_table++; | |
4001 | if (!strcmp (sym->name, symname)) | |
4002 | { | |
4003 | /* Bfd symbols are section relative. */ | |
4004 | symaddr = sym->value + sym->section->vma; | |
4005 | break; | |
4006 | } | |
4007 | } | |
4008 | do_cleanups (back_to); | |
4009 | } | |
4010 | return (symaddr); | |
4011 | } | |
4012 | ||
4013 | static struct gdbarch * | |
4014 | cris_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | |
4015 | { | |
4016 | struct gdbarch *gdbarch; | |
4017 | struct gdbarch_tdep *tdep; | |
4018 | int cris_version; | |
4019 | const char *cris_mode; | |
4020 | const char *cris_abi; | |
4021 | CORE_ADDR cris_abi_sym = 0; | |
4022 | int register_bytes; | |
4023 | ||
4024 | if (usr_cmd_cris_version_valid) | |
4025 | { | |
4026 | /* Trust the user's CRIS version setting. */ | |
4027 | cris_version = usr_cmd_cris_version; | |
4028 | } | |
4029 | else | |
4030 | { | |
4031 | /* Assume it's CRIS version 10. */ | |
4032 | cris_version = 10; | |
4033 | } | |
4034 | ||
4035 | if (usr_cmd_cris_mode_valid) | |
4036 | { | |
4037 | /* Trust the user's CRIS mode setting. */ | |
4038 | cris_mode = usr_cmd_cris_mode; | |
4039 | } | |
4040 | else if (cris_version == 10) | |
4041 | { | |
4042 | /* Assume CRIS version 10 is in user mode. */ | |
4043 | cris_mode = CRIS_MODE_USER; | |
4044 | } | |
4045 | else | |
4046 | { | |
4047 | /* Strictly speaking, older CRIS version don't have a supervisor mode, | |
4048 | but we regard its only mode as supervisor mode. */ | |
4049 | cris_mode = CRIS_MODE_SUPERVISOR; | |
4050 | } | |
4051 | ||
4052 | if (usr_cmd_cris_abi_valid) | |
4053 | { | |
4054 | /* Trust the user's ABI setting. */ | |
4055 | cris_abi = usr_cmd_cris_abi; | |
4056 | } | |
4057 | else if (info.abfd) | |
4058 | { | |
4059 | if (bfd_get_flavour (info.abfd) == bfd_target_elf_flavour) | |
4060 | { | |
4061 | /* An elf target uses the new ABI. */ | |
4062 | cris_abi = CRIS_ABI_V2; | |
4063 | } | |
4064 | else if (bfd_get_flavour (info.abfd) == bfd_target_aout_flavour) | |
4065 | { | |
4066 | /* An a.out target may use either ABI. Look for hints in the | |
4067 | symbol table. */ | |
4068 | cris_abi_sym = bfd_lookup_symbol (info.abfd, CRIS_ABI_SYMBOL); | |
4069 | cris_abi = cris_abi_sym ? CRIS_ABI_V2 : CRIS_ABI_ORIGINAL; | |
4070 | } | |
4071 | else | |
4072 | { | |
4073 | /* Unknown bfd flavour. Assume it's the new ABI. */ | |
4074 | cris_abi = CRIS_ABI_V2; | |
4075 | } | |
4076 | } | |
af566d9f | 4077 | else if (arches != NULL) |
29134980 | 4078 | { |
af566d9f AC |
4079 | /* No bfd available. Stick with the ABI from the most recently |
4080 | selected architecture of this same family (the head of arches | |
4081 | always points to this). (This is to avoid changing the ABI | |
4082 | when the user updates the architecture with the 'set | |
4083 | cris-version' command.) */ | |
4084 | cris_abi = gdbarch_tdep (arches->gdbarch)->cris_abi; | |
29134980 OF |
4085 | } |
4086 | else | |
4087 | { | |
af566d9f AC |
4088 | /* No bfd, and no previously selected architecture available. |
4089 | Assume it's the new ABI. */ | |
29134980 OF |
4090 | cris_abi = CRIS_ABI_V2; |
4091 | } | |
4092 | ||
4093 | /* Make the current settings visible to the user. */ | |
4094 | usr_cmd_cris_version = cris_version; | |
4095 | usr_cmd_cris_mode = cris_mode; | |
4096 | usr_cmd_cris_abi = cris_abi; | |
4097 | ||
4098 | /* Find a candidate among the list of pre-declared architectures. Both | |
4099 | CRIS version and ABI must match. */ | |
4100 | for (arches = gdbarch_list_lookup_by_info (arches, &info); | |
4101 | arches != NULL; | |
4102 | arches = gdbarch_list_lookup_by_info (arches->next, &info)) | |
4103 | { | |
4104 | if ((gdbarch_tdep (arches->gdbarch)->cris_version == cris_version) | |
4105 | && (gdbarch_tdep (arches->gdbarch)->cris_mode == cris_mode) | |
4106 | && (gdbarch_tdep (arches->gdbarch)->cris_abi == cris_abi)) | |
4107 | return arches->gdbarch; | |
4108 | } | |
4109 | ||
4110 | /* No matching architecture was found. Create a new one. */ | |
4111 | tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep)); | |
4112 | gdbarch = gdbarch_alloc (&info, tdep); | |
4113 | ||
a5afb99f AC |
4114 | /* NOTE: cagney/2002-12-06: This can be deleted when this arch is |
4115 | ready to unwind the PC first (see frame.c:get_prev_frame()). */ | |
0968aa8c | 4116 | set_gdbarch_deprecated_init_frame_pc (gdbarch, deprecated_init_frame_pc_default); |
a5afb99f | 4117 | |
29134980 OF |
4118 | tdep->cris_version = cris_version; |
4119 | tdep->cris_mode = cris_mode; | |
4120 | tdep->cris_abi = cris_abi; | |
4121 | ||
4122 | /* INIT shall ensure that the INFO.BYTE_ORDER is non-zero. */ | |
4123 | switch (info.byte_order) | |
4124 | { | |
778eb05e | 4125 | case BFD_ENDIAN_LITTLE: |
29134980 OF |
4126 | /* Ok. */ |
4127 | break; | |
4128 | ||
d7449b42 | 4129 | case BFD_ENDIAN_BIG: |
29134980 OF |
4130 | internal_error (__FILE__, __LINE__, "cris_gdbarch_init: big endian byte order in info"); |
4131 | break; | |
4132 | ||
4133 | default: | |
4134 | internal_error (__FILE__, __LINE__, "cris_gdbarch_init: unknown byte order in info"); | |
4135 | } | |
4136 | ||
4137 | /* Initialize the ABI dependent things. */ | |
4138 | if (tdep->cris_abi == CRIS_ABI_ORIGINAL) | |
4139 | { | |
4140 | set_gdbarch_double_bit (gdbarch, 32); | |
b81774d8 | 4141 | set_gdbarch_deprecated_push_arguments (gdbarch, cris_abi_original_push_arguments); |
ebba8386 | 4142 | set_gdbarch_deprecated_store_return_value (gdbarch, |
29134980 | 4143 | cris_abi_original_store_return_value); |
26e9b323 | 4144 | set_gdbarch_deprecated_extract_return_value |
29134980 | 4145 | (gdbarch, cris_abi_original_extract_return_value); |
2110b94f | 4146 | set_gdbarch_deprecated_reg_struct_has_addr |
29134980 OF |
4147 | (gdbarch, cris_abi_original_reg_struct_has_addr); |
4148 | } | |
4149 | else if (tdep->cris_abi == CRIS_ABI_V2) | |
4150 | { | |
4151 | set_gdbarch_double_bit (gdbarch, 64); | |
b81774d8 | 4152 | set_gdbarch_deprecated_push_arguments (gdbarch, cris_abi_v2_push_arguments); |
ebba8386 | 4153 | set_gdbarch_deprecated_store_return_value (gdbarch, cris_abi_v2_store_return_value); |
26e9b323 AC |
4154 | set_gdbarch_deprecated_extract_return_value |
4155 | (gdbarch, cris_abi_v2_extract_return_value); | |
2110b94f MK |
4156 | set_gdbarch_deprecated_reg_struct_has_addr |
4157 | (gdbarch, cris_abi_v2_reg_struct_has_addr); | |
29134980 OF |
4158 | } |
4159 | else | |
4160 | internal_error (__FILE__, __LINE__, "cris_gdbarch_init: unknown CRIS ABI"); | |
4161 | ||
4162 | /* The default definition of a long double is 2 * TARGET_DOUBLE_BIT, | |
4163 | which means we have to set this explicitly. */ | |
4164 | set_gdbarch_long_double_bit (gdbarch, 64); | |
4165 | ||
29134980 OF |
4166 | /* There are 32 registers (some of which may not be implemented). */ |
4167 | set_gdbarch_num_regs (gdbarch, 32); | |
4168 | set_gdbarch_sp_regnum (gdbarch, 14); | |
0ba6dca9 | 4169 | set_gdbarch_deprecated_fp_regnum (gdbarch, 8); |
29134980 OF |
4170 | set_gdbarch_pc_regnum (gdbarch, 15); |
4171 | ||
4172 | set_gdbarch_register_name (gdbarch, cris_register_name); | |
4173 | ||
12c266ea AC |
4174 | /* Length of ordinary registers used in push_word and a few other |
4175 | places. DEPRECATED_REGISTER_RAW_SIZE is the real way to know how | |
4176 | big a register is. */ | |
b1e29e33 | 4177 | set_gdbarch_deprecated_register_size (gdbarch, 4); |
29134980 OF |
4178 | |
4179 | /* NEW */ | |
4180 | set_gdbarch_register_bytes_ok (gdbarch, cris_register_bytes_ok); | |
4181 | set_gdbarch_software_single_step (gdbarch, cris_software_single_step); | |
4182 | ||
4183 | ||
4184 | set_gdbarch_cannot_store_register (gdbarch, cris_cannot_store_register); | |
4185 | set_gdbarch_cannot_fetch_register (gdbarch, cris_cannot_fetch_register); | |
4186 | ||
4187 | ||
4188 | /* The total amount of space needed to store (in an array called registers) | |
4189 | GDB's copy of the machine's register state. Note: We can not use | |
4190 | cris_register_size at this point, since it relies on current_gdbarch | |
4191 | being set. */ | |
4192 | switch (tdep->cris_version) | |
4193 | { | |
4194 | case 0: | |
4195 | case 1: | |
4196 | case 2: | |
4197 | case 3: | |
4198 | /* Support for these may be added later. */ | |
4199 | internal_error (__FILE__, __LINE__, "cris_gdbarch_init: unsupported CRIS version"); | |
4200 | break; | |
4201 | ||
4202 | case 8: | |
4203 | case 9: | |
4204 | /* CRIS v8 and v9, a.k.a. ETRAX 100. General registers R0 - R15 | |
4205 | (32 bits), special registers P0 - P1 (8 bits), P4 - P5 (16 bits), | |
4206 | and P8 - P14 (32 bits). */ | |
4207 | register_bytes = (16 * 4) + (2 * 1) + (2 * 2) + (7 * 4); | |
4208 | break; | |
4209 | ||
4210 | case 10: | |
4211 | case 11: | |
4212 | /* CRIS v10 and v11, a.k.a. ETRAX 100LX. In addition to ETRAX 100, | |
4213 | P7 (32 bits), and P15 (32 bits) have been implemented. */ | |
4214 | register_bytes = (16 * 4) + (2 * 1) + (2 * 2) + (9 * 4); | |
4215 | break; | |
4216 | ||
4217 | default: | |
4218 | internal_error (__FILE__, __LINE__, "cris_gdbarch_init: unknown CRIS version"); | |
4219 | } | |
4220 | ||
b8b527c5 | 4221 | set_gdbarch_deprecated_register_bytes (gdbarch, register_bytes); |
29134980 OF |
4222 | |
4223 | /* Returns the register offset for the first byte of register regno's space | |
4224 | in the saved register state. */ | |
9c04cab7 | 4225 | set_gdbarch_deprecated_register_byte (gdbarch, cris_register_offset); |
29134980 OF |
4226 | |
4227 | /* The length of the registers in the actual machine representation. */ | |
9c04cab7 | 4228 | set_gdbarch_deprecated_register_raw_size (gdbarch, cris_register_size); |
29134980 | 4229 | |
12c266ea | 4230 | /* The largest value DEPRECATED_REGISTER_RAW_SIZE can have. */ |
a0ed5532 | 4231 | set_gdbarch_deprecated_max_register_raw_size (gdbarch, 32); |
29134980 OF |
4232 | |
4233 | /* The length of the registers in the program's representation. */ | |
9c04cab7 | 4234 | set_gdbarch_deprecated_register_virtual_size (gdbarch, cris_register_size); |
29134980 | 4235 | |
f30992d4 | 4236 | /* The largest value DEPRECATED_REGISTER_VIRTUAL_SIZE can have. */ |
a0ed5532 | 4237 | set_gdbarch_deprecated_max_register_virtual_size (gdbarch, 32); |
29134980 | 4238 | |
9c04cab7 | 4239 | set_gdbarch_deprecated_register_virtual_type (gdbarch, cris_register_virtual_type); |
29134980 OF |
4240 | |
4241 | /* Use generic dummy frames. */ | |
29134980 | 4242 | |
29134980 | 4243 | /* Read all about dummy frames in blockframe.c. */ |
ae45cd16 | 4244 | set_gdbarch_deprecated_pc_in_call_dummy (gdbarch, deprecated_pc_in_call_dummy_at_entry_point); |
29134980 OF |
4245 | |
4246 | /* Defined to 1 to indicate that the target supports inferior function | |
4247 | calls. */ | |
b1e29e33 AC |
4248 | set_gdbarch_deprecated_call_dummy_words (gdbarch, 0); |
4249 | set_gdbarch_deprecated_sizeof_call_dummy_words (gdbarch, 0); | |
29134980 | 4250 | |
129c1cd6 | 4251 | set_gdbarch_deprecated_get_saved_register (gdbarch, deprecated_generic_get_saved_register); |
29134980 | 4252 | |
28f617b3 | 4253 | set_gdbarch_deprecated_push_return_address (gdbarch, cris_push_return_address); |
749b82f6 | 4254 | set_gdbarch_deprecated_pop_frame (gdbarch, cris_pop_frame); |
29134980 | 4255 | |
4183d812 | 4256 | set_gdbarch_deprecated_store_struct_return (gdbarch, cris_store_struct_return); |
1fd35568 | 4257 | set_gdbarch_use_struct_convention (gdbarch, always_use_struct_convention); |
29134980 | 4258 | |
f30ee0bc | 4259 | set_gdbarch_deprecated_frame_init_saved_regs (gdbarch, cris_frame_init_saved_regs); |
e9582e71 | 4260 | set_gdbarch_deprecated_init_extra_frame_info (gdbarch, cris_init_extra_frame_info); |
29134980 OF |
4261 | set_gdbarch_skip_prologue (gdbarch, cris_skip_prologue); |
4262 | set_gdbarch_prologue_frameless_p (gdbarch, generic_prologue_frameless_p); | |
4263 | ||
4264 | /* The stack grows downward. */ | |
4265 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
4266 | ||
4267 | set_gdbarch_breakpoint_from_pc (gdbarch, cris_breakpoint_from_pc); | |
4268 | ||
29134980 OF |
4269 | /* The number of bytes at the start of arglist that are not really args, |
4270 | 0 in the CRIS ABI. */ | |
4271 | set_gdbarch_frame_args_skip (gdbarch, 0); | |
4272 | set_gdbarch_frameless_function_invocation | |
4273 | (gdbarch, cris_frameless_function_invocation); | |
618ce49f | 4274 | set_gdbarch_deprecated_frame_chain (gdbarch, cris_frame_chain); |
29134980 | 4275 | |
8bedc050 | 4276 | set_gdbarch_deprecated_frame_saved_pc (gdbarch, cris_frame_saved_pc); |
6913c89a | 4277 | set_gdbarch_deprecated_saved_pc_after_call (gdbarch, cris_saved_pc_after_call); |
29134980 | 4278 | |
29134980 | 4279 | /* Helpful for backtracing and returning in a call dummy. */ |
a59fe496 | 4280 | set_gdbarch_deprecated_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos); |
29134980 | 4281 | |
6c0e89ed | 4282 | /* Should be using push_dummy_call. */ |
b46e02f6 | 4283 | set_gdbarch_deprecated_dummy_write_sp (gdbarch, deprecated_write_sp); |
6c0e89ed | 4284 | |
dbbff683 OF |
4285 | /* Use target_specific function to define link map offsets. */ |
4286 | set_solib_svr4_fetch_link_map_offsets | |
4287 | (gdbarch, cris_linux_svr4_fetch_link_map_offsets); | |
4288 | ||
36482093 AC |
4289 | /* FIXME: cagney/2003-08-27: It should be possible to select a CRIS |
4290 | disassembler, even when there is no BFD. Does something like | |
4291 | "gdb; target remote; disassmeble *0x123" work? */ | |
4292 | set_gdbarch_print_insn (gdbarch, cris_delayed_get_disassembler); | |
4293 | ||
29134980 OF |
4294 | return gdbarch; |
4295 | } |