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c906108c SS |
1 | /* Target-dependent code for Mitsubishi D10V, for GDB. |
2 | Copyright (C) 1996, 1997 Free Software Foundation, Inc. | |
3 | ||
4 | This file is part of GDB. | |
5 | ||
6 | This program is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2 of the License, or | |
9 | (at your option) any later version. | |
10 | ||
11 | This program is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with this program; if not, write to the Free Software | |
18 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | |
19 | ||
20 | /* Contributed by Martin Hunt, hunt@cygnus.com */ | |
21 | ||
22 | #include "defs.h" | |
23 | #include "frame.h" | |
24 | #include "obstack.h" | |
25 | #include "symtab.h" | |
26 | #include "gdbtypes.h" | |
27 | #include "gdbcmd.h" | |
28 | #include "gdbcore.h" | |
29 | #include "gdb_string.h" | |
30 | #include "value.h" | |
31 | #include "inferior.h" | |
32 | #include "dis-asm.h" | |
33 | #include "symfile.h" | |
34 | #include "objfiles.h" | |
35 | ||
392a587b JM |
36 | /* Local functions */ |
37 | ||
38 | extern void _initialize_d10v_tdep PARAMS ((void)); | |
39 | ||
40 | static void d10v_eva_prepare_to_trace PARAMS ((void)); | |
41 | ||
42 | static void d10v_eva_get_trace_data PARAMS ((void)); | |
c906108c SS |
43 | |
44 | int | |
45 | d10v_frame_chain_valid (chain, frame) | |
46 | CORE_ADDR chain; | |
47 | struct frame_info *frame; /* not used here */ | |
48 | { | |
49 | return ((chain) != 0 && (frame) != 0 && (frame)->pc > IMEM_START); | |
50 | } | |
51 | ||
52 | ||
53 | /* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of | |
54 | EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc | |
55 | and TYPE is the type (which is known to be struct, union or array). | |
56 | ||
57 | The d10v returns anything less than 8 bytes in size in | |
58 | registers. */ | |
59 | ||
60 | int | |
61 | d10v_use_struct_convention (gcc_p, type) | |
62 | int gcc_p; | |
63 | struct type *type; | |
64 | { | |
65 | return (TYPE_LENGTH (type) > 8); | |
66 | } | |
67 | ||
68 | ||
392a587b JM |
69 | unsigned char * |
70 | d10v_breakpoint_from_pc (pcptr, lenptr) | |
71 | CORE_ADDR *pcptr; | |
72 | int *lenptr; | |
73 | { | |
74 | static unsigned char breakpoint [] = {0x2f, 0x90, 0x5e, 0x00}; | |
75 | *lenptr = sizeof (breakpoint); | |
76 | return breakpoint; | |
77 | } | |
78 | ||
79 | char * | |
80 | d10v_register_name (reg_nr) | |
81 | int reg_nr; | |
82 | { | |
83 | static char *register_names[] = { | |
84 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", | |
85 | "r8", "r9", "r10","r11","r12", "r13", "r14","r15", | |
86 | "psw","bpsw","pc","bpc", "cr4", "cr5", "cr6", "rpt_c", | |
87 | "rpt_s","rpt_e", "mod_s", "mod_e", "cr12", "cr13", "iba", "cr15", | |
88 | "imap0","imap1","dmap","a0", "a1" | |
89 | }; | |
90 | if (reg_nr < 0) | |
91 | return NULL; | |
92 | if (reg_nr >= (sizeof (register_names) / sizeof (*register_names))) | |
93 | return NULL; | |
94 | return register_names [reg_nr]; | |
95 | } | |
96 | ||
97 | ||
98 | /* Index within `registers' of the first byte of the space for | |
99 | register REG_NR. */ | |
100 | ||
101 | int | |
102 | d10v_register_byte (reg_nr) | |
103 | int reg_nr; | |
104 | { | |
105 | if (reg_nr > A0_REGNUM) | |
106 | return ((reg_nr - A0_REGNUM) * 8 + (A0_REGNUM * 2)); | |
107 | else | |
108 | return (reg_nr * 2); | |
109 | } | |
110 | ||
111 | /* Number of bytes of storage in the actual machine representation for | |
112 | register REG_NR. */ | |
113 | ||
114 | int | |
115 | d10v_register_raw_size (reg_nr) | |
116 | int reg_nr; | |
117 | { | |
118 | if (reg_nr >= A0_REGNUM) | |
119 | return 8; | |
120 | else | |
121 | return 2; | |
122 | } | |
123 | ||
124 | /* Number of bytes of storage in the program's representation | |
125 | for register N. */ | |
126 | ||
127 | int | |
128 | d10v_register_virtual_size (reg_nr) | |
129 | int reg_nr; | |
130 | { | |
131 | if (reg_nr >= A0_REGNUM) | |
132 | return 8; | |
133 | else if (reg_nr == PC_REGNUM || reg_nr == SP_REGNUM) | |
134 | return 4; | |
135 | else | |
136 | return 2; | |
137 | } | |
138 | ||
139 | /* Return the GDB type object for the "standard" data type | |
140 | of data in register N. */ | |
141 | ||
142 | struct type * | |
143 | d10v_register_virtual_type (reg_nr) | |
144 | int reg_nr; | |
145 | { | |
146 | if (reg_nr >= A0_REGNUM) | |
147 | return builtin_type_long_long; | |
148 | else if (reg_nr == PC_REGNUM || reg_nr == SP_REGNUM) | |
149 | return builtin_type_long; | |
150 | else | |
151 | return builtin_type_short; | |
152 | } | |
153 | ||
154 | #if 0 | |
155 | /* convert $pc and $sp to/from virtual addresses */ | |
156 | #define REGISTER_CONVERTIBLE(N) ((N) == PC_REGNUM || (N) == SP_REGNUM) | |
157 | #define REGISTER_CONVERT_TO_VIRTUAL(REGNUM,TYPE,FROM,TO) \ | |
158 | { \ | |
159 | ULONGEST x = extract_unsigned_integer ((FROM), REGISTER_RAW_SIZE (REGNUM)); \ | |
160 | if (REGNUM == PC_REGNUM) x = (x << 2) | IMEM_START; \ | |
161 | else x |= DMEM_START; \ | |
162 | store_unsigned_integer ((TO), TYPE_LENGTH(TYPE), x); \ | |
163 | } | |
164 | #define REGISTER_CONVERT_TO_RAW(TYPE,REGNUM,FROM,TO) \ | |
165 | { \ | |
166 | ULONGEST x = extract_unsigned_integer ((FROM), TYPE_LENGTH(TYPE)); \ | |
167 | x &= 0x3ffff; \ | |
168 | if (REGNUM == PC_REGNUM) x >>= 2; \ | |
169 | store_unsigned_integer ((TO), 2, x); \ | |
170 | } | |
171 | #endif | |
172 | ||
173 | CORE_ADDR | |
174 | d10v_make_daddr (x) | |
175 | CORE_ADDR x; | |
176 | { | |
177 | return ((x) | DMEM_START); | |
178 | } | |
179 | ||
180 | CORE_ADDR | |
181 | d10v_make_iaddr (x) | |
182 | CORE_ADDR x; | |
183 | { | |
184 | return (((x) << 2) | IMEM_START); | |
185 | } | |
186 | ||
187 | int | |
188 | d10v_daddr_p (x) | |
189 | CORE_ADDR x; | |
190 | { | |
191 | return (((x) & 0x3000000) == DMEM_START); | |
192 | } | |
193 | ||
194 | int | |
195 | d10v_iaddr_p (x) | |
196 | CORE_ADDR x; | |
197 | { | |
198 | return (((x) & 0x3000000) == IMEM_START); | |
199 | } | |
200 | ||
201 | ||
202 | CORE_ADDR | |
203 | d10v_convert_iaddr_to_raw (x) | |
204 | CORE_ADDR x; | |
205 | { | |
206 | return (((x) >> 2) & 0xffff); | |
207 | } | |
208 | ||
209 | CORE_ADDR | |
210 | d10v_convert_daddr_to_raw(x) | |
211 | CORE_ADDR x; | |
212 | { | |
213 | return ((x) & 0xffff); | |
214 | } | |
215 | ||
216 | /* Store the address of the place in which to copy the structure the | |
217 | subroutine will return. This is called from call_function. | |
218 | ||
219 | We store structs through a pointer passed in the first Argument | |
220 | register. */ | |
221 | ||
222 | void | |
223 | d10v_store_struct_return (addr, sp) | |
224 | CORE_ADDR addr; | |
225 | CORE_ADDR sp; | |
226 | { | |
227 | write_register (ARG1_REGNUM, (addr)); | |
228 | } | |
229 | ||
230 | /* Write into appropriate registers a function return value | |
231 | of type TYPE, given in virtual format. | |
232 | ||
233 | Things always get returned in RET1_REGNUM, RET2_REGNUM, ... */ | |
234 | ||
235 | void | |
236 | d10v_store_return_value (type,valbuf) | |
237 | struct type *type; | |
238 | char *valbuf; | |
239 | { | |
240 | write_register_bytes (REGISTER_BYTE (RET1_REGNUM), | |
241 | valbuf, | |
242 | TYPE_LENGTH (type)); | |
243 | } | |
244 | ||
245 | /* Extract from an array REGBUF containing the (raw) register state | |
246 | the address in which a function should return its structure value, | |
247 | as a CORE_ADDR (or an expression that can be used as one). */ | |
248 | ||
249 | CORE_ADDR | |
250 | d10v_extract_struct_value_address (regbuf) | |
251 | char *regbuf; | |
252 | { | |
253 | return (extract_address ((regbuf) + REGISTER_BYTE (ARG1_REGNUM), | |
254 | REGISTER_RAW_SIZE (ARG1_REGNUM)) | |
255 | | DMEM_START); | |
256 | } | |
257 | ||
258 | CORE_ADDR | |
259 | d10v_frame_saved_pc (frame) | |
260 | struct frame_info *frame; | |
261 | { | |
262 | return ((frame)->return_pc); | |
263 | } | |
264 | ||
265 | CORE_ADDR | |
266 | d10v_frame_args_address (fi) | |
267 | struct frame_info *fi; | |
268 | { | |
269 | return (fi)->frame; | |
270 | } | |
271 | ||
272 | CORE_ADDR | |
273 | d10v_frame_locals_address (fi) | |
274 | struct frame_info *fi; | |
275 | { | |
276 | return (fi)->frame; | |
277 | } | |
278 | ||
279 | /* Immediately after a function call, return the saved pc. We can't | |
280 | use frame->return_pc beause that is determined by reading R13 off | |
281 | the stack and that may not be written yet. */ | |
282 | ||
283 | CORE_ADDR | |
284 | d10v_saved_pc_after_call (frame) | |
285 | struct frame_info *frame; | |
286 | { | |
287 | return ((read_register(LR_REGNUM) << 2) | |
288 | | IMEM_START); | |
289 | } | |
290 | ||
c906108c SS |
291 | /* Discard from the stack the innermost frame, restoring all saved |
292 | registers. */ | |
293 | ||
294 | void | |
295 | d10v_pop_frame (frame) | |
296 | struct frame_info *frame; | |
297 | { | |
298 | CORE_ADDR fp; | |
299 | int regnum; | |
300 | struct frame_saved_regs fsr; | |
301 | char raw_buffer[8]; | |
302 | ||
303 | fp = FRAME_FP (frame); | |
304 | /* fill out fsr with the address of where each */ | |
305 | /* register was stored in the frame */ | |
306 | get_frame_saved_regs (frame, &fsr); | |
307 | ||
308 | /* now update the current registers with the old values */ | |
309 | for (regnum = A0_REGNUM; regnum < A0_REGNUM+2 ; regnum++) | |
310 | { | |
311 | if (fsr.regs[regnum]) | |
312 | { | |
313 | read_memory (fsr.regs[regnum], raw_buffer, REGISTER_RAW_SIZE(regnum)); | |
314 | write_register_bytes (REGISTER_BYTE (regnum), raw_buffer, REGISTER_RAW_SIZE(regnum)); | |
315 | } | |
316 | } | |
317 | for (regnum = 0; regnum < SP_REGNUM; regnum++) | |
318 | { | |
319 | if (fsr.regs[regnum]) | |
320 | { | |
321 | write_register (regnum, read_memory_unsigned_integer (fsr.regs[regnum], REGISTER_RAW_SIZE(regnum))); | |
322 | } | |
323 | } | |
324 | if (fsr.regs[PSW_REGNUM]) | |
325 | { | |
326 | write_register (PSW_REGNUM, read_memory_unsigned_integer (fsr.regs[PSW_REGNUM], REGISTER_RAW_SIZE(PSW_REGNUM))); | |
327 | } | |
328 | ||
329 | write_register (PC_REGNUM, read_register (LR_REGNUM)); | |
330 | write_register (SP_REGNUM, fp + frame->size); | |
331 | target_store_registers (-1); | |
332 | flush_cached_frames (); | |
333 | } | |
334 | ||
335 | static int | |
336 | check_prologue (op) | |
337 | unsigned short op; | |
338 | { | |
339 | /* st rn, @-sp */ | |
340 | if ((op & 0x7E1F) == 0x6C1F) | |
341 | return 1; | |
342 | ||
343 | /* st2w rn, @-sp */ | |
344 | if ((op & 0x7E3F) == 0x6E1F) | |
345 | return 1; | |
346 | ||
347 | /* subi sp, n */ | |
348 | if ((op & 0x7FE1) == 0x01E1) | |
349 | return 1; | |
350 | ||
351 | /* mv r11, sp */ | |
352 | if (op == 0x417E) | |
353 | return 1; | |
354 | ||
355 | /* nop */ | |
356 | if (op == 0x5E00) | |
357 | return 1; | |
358 | ||
359 | /* st rn, @sp */ | |
360 | if ((op & 0x7E1F) == 0x681E) | |
361 | return 1; | |
362 | ||
363 | /* st2w rn, @sp */ | |
364 | if ((op & 0x7E3F) == 0x3A1E) | |
365 | return 1; | |
366 | ||
367 | return 0; | |
368 | } | |
369 | ||
370 | CORE_ADDR | |
371 | d10v_skip_prologue (pc) | |
372 | CORE_ADDR pc; | |
373 | { | |
374 | unsigned long op; | |
375 | unsigned short op1, op2; | |
376 | CORE_ADDR func_addr, func_end; | |
377 | struct symtab_and_line sal; | |
378 | ||
379 | /* If we have line debugging information, then the end of the */ | |
380 | /* prologue should the first assembly instruction of the first source line */ | |
381 | if (find_pc_partial_function (pc, NULL, &func_addr, &func_end)) | |
382 | { | |
383 | sal = find_pc_line (func_addr, 0); | |
384 | if ( sal.end && sal.end < func_end) | |
385 | return sal.end; | |
386 | } | |
387 | ||
388 | if (target_read_memory (pc, (char *)&op, 4)) | |
389 | return pc; /* Can't access it -- assume no prologue. */ | |
390 | ||
391 | while (1) | |
392 | { | |
393 | op = (unsigned long)read_memory_integer (pc, 4); | |
394 | if ((op & 0xC0000000) == 0xC0000000) | |
395 | { | |
396 | /* long instruction */ | |
397 | if ( ((op & 0x3FFF0000) != 0x01FF0000) && /* add3 sp,sp,n */ | |
398 | ((op & 0x3F0F0000) != 0x340F0000) && /* st rn, @(offset,sp) */ | |
399 | ((op & 0x3F1F0000) != 0x350F0000)) /* st2w rn, @(offset,sp) */ | |
400 | break; | |
401 | } | |
402 | else | |
403 | { | |
404 | /* short instructions */ | |
405 | if ((op & 0xC0000000) == 0x80000000) | |
406 | { | |
407 | op2 = (op & 0x3FFF8000) >> 15; | |
408 | op1 = op & 0x7FFF; | |
409 | } | |
410 | else | |
411 | { | |
412 | op1 = (op & 0x3FFF8000) >> 15; | |
413 | op2 = op & 0x7FFF; | |
414 | } | |
415 | if (check_prologue(op1)) | |
416 | { | |
417 | if (!check_prologue(op2)) | |
418 | { | |
419 | /* if the previous opcode was really part of the prologue */ | |
420 | /* and not just a NOP, then we want to break after both instructions */ | |
421 | if (op1 != 0x5E00) | |
422 | pc += 4; | |
423 | break; | |
424 | } | |
425 | } | |
426 | else | |
427 | break; | |
428 | } | |
429 | pc += 4; | |
430 | } | |
431 | return pc; | |
432 | } | |
433 | ||
434 | /* Given a GDB frame, determine the address of the calling function's frame. | |
435 | This will be used to create a new GDB frame struct, and then | |
436 | INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame. | |
437 | */ | |
438 | ||
439 | CORE_ADDR | |
440 | d10v_frame_chain (frame) | |
441 | struct frame_info *frame; | |
442 | { | |
443 | struct frame_saved_regs fsr; | |
444 | ||
445 | d10v_frame_find_saved_regs (frame, &fsr); | |
446 | ||
447 | if (frame->return_pc == IMEM_START || inside_entry_file(frame->return_pc)) | |
448 | return (CORE_ADDR)0; | |
449 | ||
450 | if (!fsr.regs[FP_REGNUM]) | |
451 | { | |
452 | if (!fsr.regs[SP_REGNUM] || fsr.regs[SP_REGNUM] == STACK_START) | |
453 | return (CORE_ADDR)0; | |
454 | ||
455 | return fsr.regs[SP_REGNUM]; | |
456 | } | |
457 | ||
458 | if (!read_memory_unsigned_integer(fsr.regs[FP_REGNUM], REGISTER_RAW_SIZE(FP_REGNUM))) | |
459 | return (CORE_ADDR)0; | |
460 | ||
461 | return D10V_MAKE_DADDR (read_memory_unsigned_integer (fsr.regs[FP_REGNUM], REGISTER_RAW_SIZE (FP_REGNUM))); | |
462 | } | |
463 | ||
464 | static int next_addr, uses_frame; | |
465 | ||
466 | static int | |
467 | prologue_find_regs (op, fsr, addr) | |
468 | unsigned short op; | |
469 | struct frame_saved_regs *fsr; | |
470 | CORE_ADDR addr; | |
471 | { | |
472 | int n; | |
473 | ||
474 | /* st rn, @-sp */ | |
475 | if ((op & 0x7E1F) == 0x6C1F) | |
476 | { | |
477 | n = (op & 0x1E0) >> 5; | |
478 | next_addr -= 2; | |
479 | fsr->regs[n] = next_addr; | |
480 | return 1; | |
481 | } | |
482 | ||
483 | /* st2w rn, @-sp */ | |
484 | else if ((op & 0x7E3F) == 0x6E1F) | |
485 | { | |
486 | n = (op & 0x1E0) >> 5; | |
487 | next_addr -= 4; | |
488 | fsr->regs[n] = next_addr; | |
489 | fsr->regs[n+1] = next_addr+2; | |
490 | return 1; | |
491 | } | |
492 | ||
493 | /* subi sp, n */ | |
494 | if ((op & 0x7FE1) == 0x01E1) | |
495 | { | |
496 | n = (op & 0x1E) >> 1; | |
497 | if (n == 0) | |
498 | n = 16; | |
499 | next_addr -= n; | |
500 | return 1; | |
501 | } | |
502 | ||
503 | /* mv r11, sp */ | |
504 | if (op == 0x417E) | |
505 | { | |
506 | uses_frame = 1; | |
507 | return 1; | |
508 | } | |
509 | ||
510 | /* nop */ | |
511 | if (op == 0x5E00) | |
512 | return 1; | |
513 | ||
514 | /* st rn, @sp */ | |
515 | if ((op & 0x7E1F) == 0x681E) | |
516 | { | |
517 | n = (op & 0x1E0) >> 5; | |
518 | fsr->regs[n] = next_addr; | |
519 | return 1; | |
520 | } | |
521 | ||
522 | /* st2w rn, @sp */ | |
523 | if ((op & 0x7E3F) == 0x3A1E) | |
524 | { | |
525 | n = (op & 0x1E0) >> 5; | |
526 | fsr->regs[n] = next_addr; | |
527 | fsr->regs[n+1] = next_addr+2; | |
528 | return 1; | |
529 | } | |
530 | ||
531 | return 0; | |
532 | } | |
533 | ||
534 | /* Put here the code to store, into a struct frame_saved_regs, the | |
535 | addresses of the saved registers of frame described by FRAME_INFO. | |
536 | This includes special registers such as pc and fp saved in special | |
537 | ways in the stack frame. sp is even more special: the address we | |
538 | return for it IS the sp for the next frame. */ | |
539 | void | |
540 | d10v_frame_find_saved_regs (fi, fsr) | |
541 | struct frame_info *fi; | |
542 | struct frame_saved_regs *fsr; | |
543 | { | |
544 | CORE_ADDR fp, pc; | |
545 | unsigned long op; | |
546 | unsigned short op1, op2; | |
547 | int i; | |
548 | ||
549 | fp = fi->frame; | |
550 | memset (fsr, 0, sizeof (*fsr)); | |
551 | next_addr = 0; | |
552 | ||
553 | pc = get_pc_function_start (fi->pc); | |
554 | ||
555 | uses_frame = 0; | |
556 | while (1) | |
557 | { | |
558 | op = (unsigned long)read_memory_integer (pc, 4); | |
559 | if ((op & 0xC0000000) == 0xC0000000) | |
560 | { | |
561 | /* long instruction */ | |
562 | if ((op & 0x3FFF0000) == 0x01FF0000) | |
563 | { | |
564 | /* add3 sp,sp,n */ | |
565 | short n = op & 0xFFFF; | |
566 | next_addr += n; | |
567 | } | |
568 | else if ((op & 0x3F0F0000) == 0x340F0000) | |
569 | { | |
570 | /* st rn, @(offset,sp) */ | |
571 | short offset = op & 0xFFFF; | |
572 | short n = (op >> 20) & 0xF; | |
573 | fsr->regs[n] = next_addr + offset; | |
574 | } | |
575 | else if ((op & 0x3F1F0000) == 0x350F0000) | |
576 | { | |
577 | /* st2w rn, @(offset,sp) */ | |
578 | short offset = op & 0xFFFF; | |
579 | short n = (op >> 20) & 0xF; | |
580 | fsr->regs[n] = next_addr + offset; | |
581 | fsr->regs[n+1] = next_addr + offset + 2; | |
582 | } | |
583 | else | |
584 | break; | |
585 | } | |
586 | else | |
587 | { | |
588 | /* short instructions */ | |
589 | if ((op & 0xC0000000) == 0x80000000) | |
590 | { | |
591 | op2 = (op & 0x3FFF8000) >> 15; | |
592 | op1 = op & 0x7FFF; | |
593 | } | |
594 | else | |
595 | { | |
596 | op1 = (op & 0x3FFF8000) >> 15; | |
597 | op2 = op & 0x7FFF; | |
598 | } | |
599 | if (!prologue_find_regs(op1,fsr,pc) || !prologue_find_regs(op2,fsr,pc)) | |
600 | break; | |
601 | } | |
602 | pc += 4; | |
603 | } | |
604 | ||
605 | fi->size = -next_addr; | |
606 | ||
607 | if (!(fp & 0xffff)) | |
608 | fp = D10V_MAKE_DADDR (read_register(SP_REGNUM)); | |
609 | ||
610 | for (i=0; i<NUM_REGS-1; i++) | |
611 | if (fsr->regs[i]) | |
612 | { | |
613 | fsr->regs[i] = fp - (next_addr - fsr->regs[i]); | |
614 | } | |
615 | ||
616 | if (fsr->regs[LR_REGNUM]) | |
617 | { | |
618 | CORE_ADDR return_pc = read_memory_unsigned_integer (fsr->regs[LR_REGNUM], REGISTER_RAW_SIZE (LR_REGNUM)); | |
619 | fi->return_pc = D10V_MAKE_IADDR (return_pc); | |
620 | } | |
621 | else | |
622 | { | |
623 | fi->return_pc = D10V_MAKE_IADDR (read_register(LR_REGNUM)); | |
624 | } | |
625 | ||
626 | /* th SP is not normally (ever?) saved, but check anyway */ | |
627 | if (!fsr->regs[SP_REGNUM]) | |
628 | { | |
629 | /* if the FP was saved, that means the current FP is valid, */ | |
630 | /* otherwise, it isn't being used, so we use the SP instead */ | |
631 | if (uses_frame) | |
632 | fsr->regs[SP_REGNUM] = read_register(FP_REGNUM) + fi->size; | |
633 | else | |
634 | { | |
635 | fsr->regs[SP_REGNUM] = fp + fi->size; | |
636 | fi->frameless = 1; | |
637 | fsr->regs[FP_REGNUM] = 0; | |
638 | } | |
639 | } | |
640 | } | |
641 | ||
642 | void | |
643 | d10v_init_extra_frame_info (fromleaf, fi) | |
644 | int fromleaf; | |
645 | struct frame_info *fi; | |
646 | { | |
647 | fi->frameless = 0; | |
648 | fi->size = 0; | |
649 | fi->return_pc = 0; | |
650 | ||
651 | /* The call dummy doesn't save any registers on the stack, so we can | |
652 | return now. */ | |
653 | if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame)) | |
654 | { | |
655 | return; | |
656 | } | |
657 | else | |
658 | { | |
659 | struct frame_saved_regs dummy; | |
660 | d10v_frame_find_saved_regs (fi, &dummy); | |
661 | } | |
662 | } | |
663 | ||
664 | static void | |
665 | show_regs (args, from_tty) | |
666 | char *args; | |
667 | int from_tty; | |
668 | { | |
669 | int a; | |
670 | printf_filtered ("PC=%04x (0x%x) PSW=%04x RPT_S=%04x RPT_E=%04x RPT_C=%04x\n", | |
671 | read_register (PC_REGNUM), D10V_MAKE_IADDR (read_register (PC_REGNUM)), | |
672 | read_register (PSW_REGNUM), | |
673 | read_register (24), | |
674 | read_register (25), | |
675 | read_register (23)); | |
676 | printf_filtered ("R0-R7 %04x %04x %04x %04x %04x %04x %04x %04x\n", | |
677 | read_register (0), | |
678 | read_register (1), | |
679 | read_register (2), | |
680 | read_register (3), | |
681 | read_register (4), | |
682 | read_register (5), | |
683 | read_register (6), | |
684 | read_register (7)); | |
685 | printf_filtered ("R8-R15 %04x %04x %04x %04x %04x %04x %04x %04x\n", | |
686 | read_register (8), | |
687 | read_register (9), | |
688 | read_register (10), | |
689 | read_register (11), | |
690 | read_register (12), | |
691 | read_register (13), | |
692 | read_register (14), | |
693 | read_register (15)); | |
694 | printf_filtered ("IMAP0 %04x IMAP1 %04x DMAP %04x\n", | |
695 | read_register (IMAP0_REGNUM), | |
696 | read_register (IMAP1_REGNUM), | |
697 | read_register (DMAP_REGNUM)); | |
698 | printf_filtered ("A0-A1"); | |
699 | for (a = A0_REGNUM; a <= A0_REGNUM + 1; a++) | |
700 | { | |
701 | char num[MAX_REGISTER_RAW_SIZE]; | |
702 | int i; | |
703 | printf_filtered (" "); | |
704 | read_register_gen (a, (char *)&num); | |
705 | for (i = 0; i < MAX_REGISTER_RAW_SIZE; i++) | |
706 | { | |
707 | printf_filtered ("%02x", (num[i] & 0xff)); | |
708 | } | |
709 | } | |
710 | printf_filtered ("\n"); | |
711 | } | |
712 | ||
713 | CORE_ADDR | |
714 | d10v_read_pc (pid) | |
715 | int pid; | |
716 | { | |
717 | int save_pid; | |
718 | CORE_ADDR pc; | |
719 | CORE_ADDR retval; | |
720 | ||
721 | save_pid = inferior_pid; | |
722 | inferior_pid = pid; | |
723 | pc = (int) read_register (PC_REGNUM); | |
724 | inferior_pid = save_pid; | |
725 | retval = D10V_MAKE_IADDR (pc); | |
726 | return retval; | |
727 | } | |
728 | ||
729 | void | |
730 | d10v_write_pc (val, pid) | |
731 | CORE_ADDR val; | |
732 | int pid; | |
733 | { | |
734 | int save_pid; | |
735 | ||
736 | save_pid = inferior_pid; | |
737 | inferior_pid = pid; | |
738 | write_register (PC_REGNUM, D10V_CONVERT_IADDR_TO_RAW (val)); | |
739 | inferior_pid = save_pid; | |
740 | } | |
741 | ||
742 | CORE_ADDR | |
743 | d10v_read_sp () | |
744 | { | |
745 | return (D10V_MAKE_DADDR (read_register (SP_REGNUM))); | |
746 | } | |
747 | ||
748 | void | |
749 | d10v_write_sp (val) | |
750 | CORE_ADDR val; | |
751 | { | |
752 | write_register (SP_REGNUM, D10V_CONVERT_DADDR_TO_RAW (val)); | |
753 | } | |
754 | ||
755 | void | |
756 | d10v_write_fp (val) | |
757 | CORE_ADDR val; | |
758 | { | |
759 | write_register (FP_REGNUM, D10V_CONVERT_DADDR_TO_RAW (val)); | |
760 | } | |
761 | ||
762 | CORE_ADDR | |
763 | d10v_read_fp () | |
764 | { | |
765 | return (D10V_MAKE_DADDR (read_register(FP_REGNUM))); | |
766 | } | |
767 | ||
768 | /* Function: push_return_address (pc) | |
769 | Set up the return address for the inferior function call. | |
770 | Needed for targets where we don't actually execute a JSR/BSR instruction */ | |
771 | ||
772 | CORE_ADDR | |
773 | d10v_push_return_address (pc, sp) | |
774 | CORE_ADDR pc; | |
775 | CORE_ADDR sp; | |
776 | { | |
777 | write_register (LR_REGNUM, D10V_CONVERT_IADDR_TO_RAW (CALL_DUMMY_ADDRESS ())); | |
778 | return sp; | |
779 | } | |
780 | ||
781 | ||
7a292a7a SS |
782 | /* When arguments must be pushed onto the stack, they go on in reverse |
783 | order. The below implements a FILO (stack) to do this. */ | |
784 | ||
785 | struct stack_item | |
786 | { | |
787 | int len; | |
788 | struct stack_item *prev; | |
789 | void *data; | |
790 | }; | |
791 | ||
792 | static struct stack_item *push_stack_item PARAMS ((struct stack_item *prev, void *contents, int len)); | |
793 | static struct stack_item * | |
794 | push_stack_item (prev, contents, len) | |
795 | struct stack_item *prev; | |
796 | void *contents; | |
797 | int len; | |
798 | { | |
799 | struct stack_item *si; | |
800 | si = xmalloc (sizeof (struct stack_item)); | |
801 | si->data = xmalloc (len); | |
802 | si->len = len; | |
803 | si->prev = prev; | |
804 | memcpy (si->data, contents, len); | |
805 | return si; | |
806 | } | |
807 | ||
808 | static struct stack_item *pop_stack_item PARAMS ((struct stack_item *si)); | |
809 | static struct stack_item * | |
810 | pop_stack_item (si) | |
811 | struct stack_item *si; | |
812 | { | |
813 | struct stack_item *dead = si; | |
814 | si = si->prev; | |
815 | free (dead->data); | |
816 | free (dead); | |
817 | return si; | |
818 | } | |
819 | ||
820 | ||
c906108c SS |
821 | CORE_ADDR |
822 | d10v_push_arguments (nargs, args, sp, struct_return, struct_addr) | |
823 | int nargs; | |
824 | value_ptr *args; | |
825 | CORE_ADDR sp; | |
826 | int struct_return; | |
827 | CORE_ADDR struct_addr; | |
828 | { | |
829 | int i; | |
830 | int regnum = ARG1_REGNUM; | |
7a292a7a | 831 | struct stack_item *si = NULL; |
c906108c SS |
832 | |
833 | /* Fill in registers and arg lists */ | |
834 | for (i = 0; i < nargs; i++) | |
835 | { | |
836 | value_ptr arg = args[i]; | |
837 | struct type *type = check_typedef (VALUE_TYPE (arg)); | |
838 | char *contents = VALUE_CONTENTS (arg); | |
839 | int len = TYPE_LENGTH (type); | |
840 | /* printf ("push: type=%d len=%d\n", type->code, len); */ | |
841 | if (TYPE_CODE (type) == TYPE_CODE_PTR) | |
842 | { | |
843 | /* pointers require special handling - first convert and | |
844 | then store */ | |
845 | long val = extract_signed_integer (contents, len); | |
846 | len = 2; | |
847 | if (TYPE_TARGET_TYPE (type) | |
848 | && (TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)) | |
849 | { | |
850 | /* function pointer */ | |
851 | val = D10V_CONVERT_IADDR_TO_RAW (val); | |
852 | } | |
853 | else if (D10V_IADDR_P (val)) | |
854 | { | |
855 | /* also function pointer! */ | |
856 | val = D10V_CONVERT_DADDR_TO_RAW (val); | |
857 | } | |
858 | else | |
859 | { | |
860 | /* data pointer */ | |
861 | val &= 0xFFFF; | |
862 | } | |
863 | if (regnum <= ARGN_REGNUM) | |
864 | write_register (regnum++, val & 0xffff); | |
865 | else | |
866 | { | |
867 | char ptr[2]; | |
7a292a7a | 868 | /* arg will go onto stack */ |
c906108c | 869 | store_address (ptr, val & 0xffff, 2); |
7a292a7a | 870 | si = push_stack_item (si, ptr, 2); |
c906108c SS |
871 | } |
872 | } | |
873 | else | |
874 | { | |
875 | int aligned_regnum = (regnum + 1) & ~1; | |
876 | if (len <= 2 && regnum <= ARGN_REGNUM) | |
877 | /* fits in a single register, do not align */ | |
878 | { | |
879 | long val = extract_unsigned_integer (contents, len); | |
880 | write_register (regnum++, val); | |
881 | } | |
882 | else if (len <= (ARGN_REGNUM - aligned_regnum + 1) * 2) | |
883 | /* value fits in remaining registers, store keeping left | |
884 | aligned */ | |
885 | { | |
886 | int b; | |
887 | regnum = aligned_regnum; | |
888 | for (b = 0; b < (len & ~1); b += 2) | |
889 | { | |
890 | long val = extract_unsigned_integer (&contents[b], 2); | |
891 | write_register (regnum++, val); | |
892 | } | |
893 | if (b < len) | |
894 | { | |
895 | long val = extract_unsigned_integer (&contents[b], 1); | |
896 | write_register (regnum++, (val << 8)); | |
897 | } | |
898 | } | |
899 | else | |
900 | { | |
7a292a7a SS |
901 | /* arg will go onto stack */ |
902 | regnum = ARGN_REGNUM + 1; | |
903 | si = push_stack_item (si, contents, len); | |
c906108c SS |
904 | } |
905 | } | |
906 | } | |
7a292a7a SS |
907 | |
908 | while (si) | |
909 | { | |
910 | sp = (sp - si->len) & ~1; | |
911 | write_memory (sp, si->data, si->len); | |
912 | si = pop_stack_item (si); | |
913 | } | |
914 | ||
c906108c SS |
915 | return sp; |
916 | } | |
917 | ||
918 | ||
919 | /* Given a return value in `regbuf' with a type `valtype', | |
920 | extract and copy its value into `valbuf'. */ | |
921 | ||
922 | void | |
923 | d10v_extract_return_value (type, regbuf, valbuf) | |
924 | struct type *type; | |
925 | char regbuf[REGISTER_BYTES]; | |
926 | char *valbuf; | |
927 | { | |
928 | int len; | |
929 | /* printf("RET: TYPE=%d len=%d r%d=0x%x\n",type->code, TYPE_LENGTH (type), RET1_REGNUM - R0_REGNUM, (int) extract_unsigned_integer (regbuf + REGISTER_BYTE(RET1_REGNUM), REGISTER_RAW_SIZE (RET1_REGNUM))); */ | |
930 | if (TYPE_CODE (type) == TYPE_CODE_PTR | |
931 | && TYPE_TARGET_TYPE (type) | |
932 | && (TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)) | |
933 | { | |
934 | /* pointer to function */ | |
935 | int num; | |
936 | short snum; | |
937 | snum = extract_address (regbuf + REGISTER_BYTE (RET1_REGNUM), REGISTER_RAW_SIZE (RET1_REGNUM)); | |
938 | store_address ( valbuf, 4, D10V_MAKE_IADDR(snum)); | |
939 | } | |
940 | else if (TYPE_CODE(type) == TYPE_CODE_PTR) | |
941 | { | |
942 | /* pointer to data */ | |
943 | int num; | |
944 | short snum; | |
945 | snum = extract_address (regbuf + REGISTER_BYTE (RET1_REGNUM), REGISTER_RAW_SIZE (RET1_REGNUM)); | |
946 | store_address ( valbuf, 4, D10V_MAKE_DADDR(snum)); | |
947 | } | |
948 | else | |
949 | { | |
950 | len = TYPE_LENGTH (type); | |
951 | if (len == 1) | |
952 | { | |
953 | unsigned short c = extract_unsigned_integer (regbuf + REGISTER_BYTE (RET1_REGNUM), REGISTER_RAW_SIZE (RET1_REGNUM)); | |
954 | store_unsigned_integer (valbuf, 1, c); | |
955 | } | |
956 | else if ((len & 1) == 0) | |
957 | memcpy (valbuf, regbuf + REGISTER_BYTE (RET1_REGNUM), len); | |
958 | else | |
959 | { | |
960 | /* For return values of odd size, the first byte is in the | |
961 | least significant part of the first register. The | |
962 | remaining bytes in remaining registers. Interestingly, | |
963 | when such values are passed in, the last byte is in the | |
964 | most significant byte of that same register - wierd. */ | |
965 | memcpy (valbuf, regbuf + REGISTER_BYTE (RET1_REGNUM) + 1, len); | |
966 | } | |
967 | } | |
968 | } | |
969 | ||
970 | /* The following code implements access to, and display of, the D10V's | |
971 | instruction trace buffer. The buffer consists of 64K or more | |
972 | 4-byte words of data, of which each words includes an 8-bit count, | |
973 | an 8-bit segment number, and a 16-bit instruction address. | |
974 | ||
975 | In theory, the trace buffer is continuously capturing instruction | |
976 | data that the CPU presents on its "debug bus", but in practice, the | |
977 | ROMified GDB stub only enables tracing when it continues or steps | |
978 | the program, and stops tracing when the program stops; so it | |
979 | actually works for GDB to read the buffer counter out of memory and | |
980 | then read each trace word. The counter records where the tracing | |
981 | stops, but there is no record of where it started, so we remember | |
982 | the PC when we resumed and then search backwards in the trace | |
983 | buffer for a word that includes that address. This is not perfect, | |
984 | because you will miss trace data if the resumption PC is the target | |
985 | of a branch. (The value of the buffer counter is semi-random, any | |
986 | trace data from a previous program stop is gone.) */ | |
987 | ||
988 | /* The address of the last word recorded in the trace buffer. */ | |
989 | ||
990 | #define DBBC_ADDR (0xd80000) | |
991 | ||
992 | /* The base of the trace buffer, at least for the "Board_0". */ | |
993 | ||
994 | #define TRACE_BUFFER_BASE (0xf40000) | |
995 | ||
996 | static void trace_command PARAMS ((char *, int)); | |
997 | ||
998 | static void untrace_command PARAMS ((char *, int)); | |
999 | ||
1000 | static void trace_info PARAMS ((char *, int)); | |
1001 | ||
1002 | static void tdisassemble_command PARAMS ((char *, int)); | |
1003 | ||
1004 | static void display_trace PARAMS ((int, int)); | |
1005 | ||
1006 | /* True when instruction traces are being collected. */ | |
1007 | ||
1008 | static int tracing; | |
1009 | ||
1010 | /* Remembered PC. */ | |
1011 | ||
1012 | static CORE_ADDR last_pc; | |
1013 | ||
1014 | /* True when trace output should be displayed whenever program stops. */ | |
1015 | ||
1016 | static int trace_display; | |
1017 | ||
1018 | /* True when trace listing should include source lines. */ | |
1019 | ||
1020 | static int default_trace_show_source = 1; | |
1021 | ||
1022 | struct trace_buffer { | |
1023 | int size; | |
1024 | short *counts; | |
1025 | CORE_ADDR *addrs; | |
1026 | } trace_data; | |
1027 | ||
1028 | static void | |
1029 | trace_command (args, from_tty) | |
1030 | char *args; | |
1031 | int from_tty; | |
1032 | { | |
1033 | /* Clear the host-side trace buffer, allocating space if needed. */ | |
1034 | trace_data.size = 0; | |
1035 | if (trace_data.counts == NULL) | |
1036 | trace_data.counts = (short *) xmalloc (65536 * sizeof(short)); | |
1037 | if (trace_data.addrs == NULL) | |
1038 | trace_data.addrs = (CORE_ADDR *) xmalloc (65536 * sizeof(CORE_ADDR)); | |
1039 | ||
1040 | tracing = 1; | |
1041 | ||
1042 | printf_filtered ("Tracing is now on.\n"); | |
1043 | } | |
1044 | ||
1045 | static void | |
1046 | untrace_command (args, from_tty) | |
1047 | char *args; | |
1048 | int from_tty; | |
1049 | { | |
1050 | tracing = 0; | |
1051 | ||
1052 | printf_filtered ("Tracing is now off.\n"); | |
1053 | } | |
1054 | ||
1055 | static void | |
1056 | trace_info (args, from_tty) | |
1057 | char *args; | |
1058 | int from_tty; | |
1059 | { | |
1060 | int i; | |
1061 | ||
1062 | if (trace_data.size) | |
1063 | { | |
1064 | printf_filtered ("%d entries in trace buffer:\n", trace_data.size); | |
1065 | ||
1066 | for (i = 0; i < trace_data.size; ++i) | |
1067 | { | |
1068 | printf_filtered ("%d: %d instruction%s at 0x%x\n", | |
1069 | i, trace_data.counts[i], | |
1070 | (trace_data.counts[i] == 1 ? "" : "s"), | |
1071 | trace_data.addrs[i]); | |
1072 | } | |
1073 | } | |
1074 | else | |
1075 | printf_filtered ("No entries in trace buffer.\n"); | |
1076 | ||
1077 | printf_filtered ("Tracing is currently %s.\n", (tracing ? "on" : "off")); | |
1078 | } | |
1079 | ||
1080 | /* Print the instruction at address MEMADDR in debugged memory, | |
1081 | on STREAM. Returns length of the instruction, in bytes. */ | |
1082 | ||
1083 | static int | |
1084 | print_insn (memaddr, stream) | |
1085 | CORE_ADDR memaddr; | |
1086 | GDB_FILE *stream; | |
1087 | { | |
1088 | /* If there's no disassembler, something is very wrong. */ | |
1089 | if (tm_print_insn == NULL) | |
1090 | abort (); | |
1091 | ||
1092 | if (TARGET_BYTE_ORDER == BIG_ENDIAN) | |
1093 | tm_print_insn_info.endian = BFD_ENDIAN_BIG; | |
1094 | else | |
1095 | tm_print_insn_info.endian = BFD_ENDIAN_LITTLE; | |
1096 | return (*tm_print_insn) (memaddr, &tm_print_insn_info); | |
1097 | } | |
1098 | ||
392a587b | 1099 | static void |
c906108c SS |
1100 | d10v_eva_prepare_to_trace () |
1101 | { | |
1102 | if (!tracing) | |
1103 | return; | |
1104 | ||
1105 | last_pc = read_register (PC_REGNUM); | |
1106 | } | |
1107 | ||
1108 | /* Collect trace data from the target board and format it into a form | |
1109 | more useful for display. */ | |
1110 | ||
392a587b | 1111 | static void |
c906108c SS |
1112 | d10v_eva_get_trace_data () |
1113 | { | |
1114 | int count, i, j, oldsize; | |
1115 | int trace_addr, trace_seg, trace_cnt, next_cnt; | |
1116 | unsigned int last_trace, trace_word, next_word; | |
1117 | unsigned int *tmpspace; | |
1118 | ||
1119 | if (!tracing) | |
1120 | return; | |
1121 | ||
1122 | tmpspace = xmalloc (65536 * sizeof(unsigned int)); | |
1123 | ||
1124 | last_trace = read_memory_unsigned_integer (DBBC_ADDR, 2) << 2; | |
1125 | ||
1126 | /* Collect buffer contents from the target, stopping when we reach | |
1127 | the word recorded when execution resumed. */ | |
1128 | ||
1129 | count = 0; | |
1130 | while (last_trace > 0) | |
1131 | { | |
1132 | QUIT; | |
1133 | trace_word = | |
1134 | read_memory_unsigned_integer (TRACE_BUFFER_BASE + last_trace, 4); | |
1135 | trace_addr = trace_word & 0xffff; | |
1136 | last_trace -= 4; | |
1137 | /* Ignore an apparently nonsensical entry. */ | |
1138 | if (trace_addr == 0xffd5) | |
1139 | continue; | |
1140 | tmpspace[count++] = trace_word; | |
1141 | if (trace_addr == last_pc) | |
1142 | break; | |
1143 | if (count > 65535) | |
1144 | break; | |
1145 | } | |
1146 | ||
1147 | /* Move the data to the host-side trace buffer, adjusting counts to | |
1148 | include the last instruction executed and transforming the address | |
1149 | into something that GDB likes. */ | |
1150 | ||
1151 | for (i = 0; i < count; ++i) | |
1152 | { | |
1153 | trace_word = tmpspace[i]; | |
1154 | next_word = ((i == 0) ? 0 : tmpspace[i - 1]); | |
1155 | trace_addr = trace_word & 0xffff; | |
1156 | next_cnt = (next_word >> 24) & 0xff; | |
1157 | j = trace_data.size + count - i - 1; | |
1158 | trace_data.addrs[j] = (trace_addr << 2) + 0x1000000; | |
1159 | trace_data.counts[j] = next_cnt + 1; | |
1160 | } | |
1161 | ||
1162 | oldsize = trace_data.size; | |
1163 | trace_data.size += count; | |
1164 | ||
1165 | free (tmpspace); | |
1166 | ||
1167 | if (trace_display) | |
1168 | display_trace (oldsize, trace_data.size); | |
1169 | } | |
1170 | ||
1171 | static void | |
1172 | tdisassemble_command (arg, from_tty) | |
1173 | char *arg; | |
1174 | int from_tty; | |
1175 | { | |
1176 | int i, count; | |
1177 | CORE_ADDR low, high; | |
1178 | char *space_index; | |
1179 | ||
1180 | if (!arg) | |
1181 | { | |
1182 | low = 0; | |
1183 | high = trace_data.size; | |
1184 | } | |
1185 | else if (!(space_index = (char *) strchr (arg, ' '))) | |
1186 | { | |
1187 | low = parse_and_eval_address (arg); | |
1188 | high = low + 5; | |
1189 | } | |
1190 | else | |
1191 | { | |
1192 | /* Two arguments. */ | |
1193 | *space_index = '\0'; | |
1194 | low = parse_and_eval_address (arg); | |
1195 | high = parse_and_eval_address (space_index + 1); | |
1196 | if (high < low) | |
1197 | high = low; | |
1198 | } | |
1199 | ||
1200 | printf_filtered ("Dump of trace from %d to %d:\n", low, high); | |
1201 | ||
1202 | display_trace (low, high); | |
1203 | ||
1204 | printf_filtered ("End of trace dump.\n"); | |
1205 | gdb_flush (gdb_stdout); | |
1206 | } | |
1207 | ||
1208 | static void | |
1209 | display_trace (low, high) | |
1210 | int low, high; | |
1211 | { | |
1212 | int i, count, trace_show_source, first, suppress; | |
1213 | CORE_ADDR next_address; | |
1214 | ||
1215 | trace_show_source = default_trace_show_source; | |
1216 | if (!have_full_symbols () && !have_partial_symbols()) | |
1217 | { | |
1218 | trace_show_source = 0; | |
1219 | printf_filtered ("No symbol table is loaded. Use the \"file\" command.\n"); | |
1220 | printf_filtered ("Trace will not display any source.\n"); | |
1221 | } | |
1222 | ||
1223 | first = 1; | |
1224 | suppress = 0; | |
1225 | for (i = low; i < high; ++i) | |
1226 | { | |
1227 | next_address = trace_data.addrs[i]; | |
1228 | count = trace_data.counts[i]; | |
1229 | while (count-- > 0) | |
1230 | { | |
1231 | QUIT; | |
1232 | if (trace_show_source) | |
1233 | { | |
1234 | struct symtab_and_line sal, sal_prev; | |
1235 | ||
1236 | sal_prev = find_pc_line (next_address - 4, 0); | |
1237 | sal = find_pc_line (next_address, 0); | |
1238 | ||
1239 | if (sal.symtab) | |
1240 | { | |
1241 | if (first || sal.line != sal_prev.line) | |
1242 | print_source_lines (sal.symtab, sal.line, sal.line + 1, 0); | |
1243 | suppress = 0; | |
1244 | } | |
1245 | else | |
1246 | { | |
1247 | if (!suppress) | |
1248 | /* FIXME-32x64--assumes sal.pc fits in long. */ | |
1249 | printf_filtered ("No source file for address %s.\n", | |
1250 | local_hex_string((unsigned long) sal.pc)); | |
1251 | suppress = 1; | |
1252 | } | |
1253 | } | |
1254 | first = 0; | |
1255 | print_address (next_address, gdb_stdout); | |
1256 | printf_filtered (":"); | |
1257 | printf_filtered ("\t"); | |
1258 | wrap_here (" "); | |
1259 | next_address = next_address + print_insn (next_address, gdb_stdout); | |
1260 | printf_filtered ("\n"); | |
1261 | gdb_flush (gdb_stdout); | |
1262 | } | |
1263 | } | |
1264 | } | |
1265 | ||
1266 | extern void (*target_resume_hook) PARAMS ((void)); | |
1267 | extern void (*target_wait_loop_hook) PARAMS ((void)); | |
1268 | ||
1269 | void | |
1270 | _initialize_d10v_tdep () | |
1271 | { | |
1272 | tm_print_insn = print_insn_d10v; | |
1273 | ||
1274 | target_resume_hook = d10v_eva_prepare_to_trace; | |
1275 | target_wait_loop_hook = d10v_eva_get_trace_data; | |
1276 | ||
1277 | add_com ("regs", class_vars, show_regs, "Print all registers"); | |
1278 | ||
1279 | add_com ("trace", class_support, trace_command, | |
1280 | "Enable tracing of instruction execution."); | |
1281 | ||
1282 | add_com ("untrace", class_support, untrace_command, | |
1283 | "Disable tracing of instruction execution."); | |
1284 | ||
1285 | add_com ("tdisassemble", class_vars, tdisassemble_command, | |
1286 | "Disassemble the trace buffer.\n\ | |
1287 | Two optional arguments specify a range of trace buffer entries\n\ | |
1288 | as reported by info trace (NOT addresses!)."); | |
1289 | ||
1290 | add_info ("trace", trace_info, | |
1291 | "Display info about the trace data buffer."); | |
1292 | ||
1293 | add_show_from_set (add_set_cmd ("tracedisplay", no_class, | |
1294 | var_integer, (char *)&trace_display, | |
1295 | "Set automatic display of trace.\n", &setlist), | |
1296 | &showlist); | |
1297 | add_show_from_set (add_set_cmd ("tracesource", no_class, | |
1298 | var_integer, (char *)&default_trace_show_source, | |
1299 | "Set display of source code with trace.\n", &setlist), | |
1300 | &showlist); | |
1301 | ||
1302 | } |