Commit | Line | Data |
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7b3fa778 MH |
1 | /* Target-dependent code for MItsubishi D10V, for GDB. |
2 | Copyright (C) 1996 Free Software Foundation, Inc. | |
3 | This file is part of GDB. | |
4 | This program is free software; you can redistribute it and/or modify | |
5 | it under the terms of the GNU General Public License as published by | |
6 | the Free Software Foundation; either version 2 of the License, or | |
7 | (at your option) any later version. | |
8 | This program is distributed in the hope that it will be useful, | |
9 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
10 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
11 | GNU General Public License for more details. | |
12 | You should have received a copy of the GNU General Public License | |
13 | along with this program; if not, write to the Free Software | |
14 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | |
15 | ||
16 | /* Contributed by Martin Hunt, hunt@cygnus.com */ | |
17 | ||
18 | #include "defs.h" | |
19 | #include "frame.h" | |
20 | #include "obstack.h" | |
21 | #include "symtab.h" | |
22 | #include "gdbtypes.h" | |
23 | #include "gdbcmd.h" | |
24 | #include "gdbcore.h" | |
81dc176f | 25 | #include "gdb_string.h" |
7b3fa778 MH |
26 | #include "value.h" |
27 | #include "inferior.h" | |
28 | #include "dis-asm.h" | |
3b1af95c MH |
29 | #include "symfile.h" |
30 | #include "objfiles.h" | |
7b3fa778 | 31 | |
e05bda9f MH |
32 | void d10v_frame_find_saved_regs PARAMS ((struct frame_info *fi, struct frame_saved_regs *fsr)); |
33 | ||
34 | /* Discard from the stack the innermost frame, | |
35 | restoring all saved registers. */ | |
36 | ||
7b3fa778 MH |
37 | void |
38 | d10v_pop_frame () | |
39 | { | |
e05bda9f | 40 | struct frame_info *frame = get_current_frame (); |
b70b03b0 | 41 | CORE_ADDR fp; |
e05bda9f MH |
42 | int regnum; |
43 | struct frame_saved_regs fsr; | |
44 | char raw_buffer[8]; | |
45 | ||
b70b03b0 | 46 | fp = FRAME_FP (frame); |
e05bda9f MH |
47 | /* fill out fsr with the address of where each */ |
48 | /* register was stored in the frame */ | |
49 | get_frame_saved_regs (frame, &fsr); | |
50 | ||
e05bda9f MH |
51 | /* now update the current registers with the old values */ |
52 | for (regnum = A0_REGNUM; regnum < A0_REGNUM+2 ; regnum++) | |
53 | { | |
54 | if (fsr.regs[regnum]) | |
55 | { | |
81dc176f | 56 | read_memory (fsr.regs[regnum], raw_buffer, 8); |
e05bda9f MH |
57 | write_register_bytes (REGISTER_BYTE (regnum), raw_buffer, 8); |
58 | } | |
59 | } | |
60 | for (regnum = 0; regnum < SP_REGNUM; regnum++) | |
61 | { | |
62 | if (fsr.regs[regnum]) | |
63 | { | |
81dc176f | 64 | write_register (regnum, read_memory_unsigned_integer (fsr.regs[regnum], 2)); |
e05bda9f MH |
65 | } |
66 | } | |
67 | if (fsr.regs[PSW_REGNUM]) | |
68 | { | |
81dc176f | 69 | write_register (PSW_REGNUM, read_memory_unsigned_integer (fsr.regs[PSW_REGNUM], 2)); |
e05bda9f MH |
70 | } |
71 | ||
b70b03b0 MH |
72 | write_register (PC_REGNUM, read_register(13)); |
73 | write_register (SP_REGNUM, fp + frame->size); | |
74 | target_store_registers (-1); | |
e05bda9f MH |
75 | flush_cached_frames (); |
76 | } | |
77 | ||
78 | static int | |
79 | check_prologue (op) | |
80 | unsigned short op; | |
81 | { | |
82 | /* st rn, @-sp */ | |
83 | if ((op & 0x7E1F) == 0x6C1F) | |
84 | return 1; | |
85 | ||
86 | /* st2w rn, @-sp */ | |
87 | if ((op & 0x7E3F) == 0x6E1F) | |
88 | return 1; | |
89 | ||
90 | /* subi sp, n */ | |
91 | if ((op & 0x7FE1) == 0x01E1) | |
92 | return 1; | |
93 | ||
94 | /* mv r11, sp */ | |
95 | if (op == 0x417E) | |
96 | return 1; | |
97 | ||
98 | /* nop */ | |
99 | if (op == 0x5E00) | |
100 | return 1; | |
101 | ||
102 | /* st rn, @sp */ | |
103 | if ((op & 0x7E1F) == 0x681E) | |
104 | return 1; | |
105 | ||
106 | /* st2w rn, @sp */ | |
107 | if ((op & 0x7E3F) == 0x3A1E) | |
108 | return 1; | |
109 | ||
e05bda9f | 110 | return 0; |
7b3fa778 MH |
111 | } |
112 | ||
113 | CORE_ADDR | |
e05bda9f MH |
114 | d10v_skip_prologue (pc) |
115 | CORE_ADDR pc; | |
7b3fa778 | 116 | { |
e05bda9f MH |
117 | unsigned long op; |
118 | unsigned short op1, op2; | |
119 | ||
120 | if (target_read_memory (pc, (char *)&op, 4)) | |
121 | return pc; /* Can't access it -- assume no prologue. */ | |
122 | ||
123 | while (1) | |
124 | { | |
81dc176f | 125 | op = (unsigned long)read_memory_integer (pc, 4); |
e05bda9f MH |
126 | if ((op & 0xC0000000) == 0xC0000000) |
127 | { | |
128 | /* long instruction */ | |
129 | if ( ((op & 0x3FFF0000) != 0x01FF0000) && /* add3 sp,sp,n */ | |
130 | ((op & 0x3F0F0000) != 0x340F0000) && /* st rn, @(offset,sp) */ | |
131 | ((op & 0x3F1F0000) != 0x350F0000)) /* st2w rn, @(offset,sp) */ | |
132 | break; | |
133 | } | |
134 | else | |
135 | { | |
136 | /* short instructions */ | |
137 | op1 = (op & 0x3FFF8000) >> 15; | |
138 | op2 = op & 0x7FFF; | |
139 | if (!check_prologue(op1) || !check_prologue(op2)) | |
140 | break; | |
141 | } | |
142 | pc += 4; | |
143 | } | |
144 | return pc; | |
7b3fa778 MH |
145 | } |
146 | ||
e05bda9f MH |
147 | /* Given a GDB frame, determine the address of the calling function's frame. |
148 | This will be used to create a new GDB frame struct, and then | |
149 | INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame. | |
81dc176f | 150 | */ |
e05bda9f | 151 | |
7b3fa778 MH |
152 | CORE_ADDR |
153 | d10v_frame_chain (frame) | |
154 | struct frame_info *frame; | |
155 | { | |
e05bda9f | 156 | struct frame_saved_regs fsr; |
3b1af95c MH |
157 | |
158 | if (inside_entry_file (frame->pc)) | |
159 | return 0; | |
160 | ||
e05bda9f | 161 | d10v_frame_find_saved_regs (frame, &fsr); |
3b1af95c MH |
162 | |
163 | if (!fsr.regs[FP_REGNUM]) | |
164 | { | |
165 | return (CORE_ADDR)fsr.regs[SP_REGNUM]; | |
166 | } | |
81dc176f | 167 | return read_memory_unsigned_integer(fsr.regs[FP_REGNUM],2); |
7b3fa778 MH |
168 | } |
169 | ||
e05bda9f MH |
170 | static int next_addr; |
171 | ||
172 | static int | |
173 | prologue_find_regs (op, fsr, addr) | |
174 | unsigned short op; | |
175 | struct frame_saved_regs *fsr; | |
176 | CORE_ADDR addr; | |
177 | { | |
178 | int n; | |
179 | ||
180 | /* st rn, @-sp */ | |
181 | if ((op & 0x7E1F) == 0x6C1F) | |
182 | { | |
183 | n = (op & 0x1E0) >> 5; | |
184 | next_addr -= 2; | |
185 | fsr->regs[n] = next_addr; | |
186 | return 1; | |
187 | } | |
188 | ||
189 | /* st2w rn, @-sp */ | |
190 | else if ((op & 0x7E3F) == 0x6E1F) | |
191 | { | |
192 | n = (op & 0x1E0) >> 5; | |
193 | next_addr -= 4; | |
194 | fsr->regs[n] = next_addr; | |
195 | fsr->regs[n+1] = next_addr+2; | |
196 | return 1; | |
197 | } | |
198 | ||
199 | /* subi sp, n */ | |
200 | if ((op & 0x7FE1) == 0x01E1) | |
201 | { | |
202 | n = (op & 0x1E) >> 1; | |
203 | if (n == 0) | |
204 | n = 16; | |
205 | next_addr -= n; | |
206 | return 1; | |
207 | } | |
208 | ||
209 | /* mv r11, sp */ | |
210 | if (op == 0x417E) | |
3b1af95c | 211 | return 1; |
e05bda9f MH |
212 | |
213 | /* nop */ | |
214 | if (op == 0x5E00) | |
215 | return 1; | |
216 | ||
217 | /* st rn, @sp */ | |
218 | if ((op & 0x7E1F) == 0x681E) | |
219 | { | |
220 | n = (op & 0x1E0) >> 5; | |
221 | fsr->regs[n] = next_addr; | |
222 | return 1; | |
223 | } | |
224 | ||
225 | /* st2w rn, @sp */ | |
226 | if ((op & 0x7E3F) == 0x3A1E) | |
227 | { | |
228 | n = (op & 0x1E0) >> 5; | |
229 | fsr->regs[n] = next_addr; | |
230 | fsr->regs[n+1] = next_addr+2; | |
231 | return 1; | |
232 | } | |
233 | ||
234 | return 0; | |
235 | } | |
236 | ||
7b3fa778 MH |
237 | /* Put here the code to store, into a struct frame_saved_regs, the |
238 | addresses of the saved registers of frame described by FRAME_INFO. | |
239 | This includes special registers such as pc and fp saved in special | |
240 | ways in the stack frame. sp is even more special: the address we | |
241 | return for it IS the sp for the next frame. */ | |
242 | void | |
243 | d10v_frame_find_saved_regs (fi, fsr) | |
244 | struct frame_info *fi; | |
245 | struct frame_saved_regs *fsr; | |
e05bda9f MH |
246 | { |
247 | CORE_ADDR fp, pc; | |
248 | unsigned long op; | |
249 | unsigned short op1, op2; | |
250 | int i; | |
251 | ||
252 | fp = fi->frame; | |
253 | memset (fsr, 0, sizeof (*fsr)); | |
254 | next_addr = 0; | |
255 | ||
256 | pc = get_pc_function_start (fi->pc); | |
257 | ||
258 | while (1) | |
259 | { | |
81dc176f | 260 | op = (unsigned long)read_memory_integer (pc, 4); |
e05bda9f MH |
261 | if ((op & 0xC0000000) == 0xC0000000) |
262 | { | |
263 | /* long instruction */ | |
264 | if ((op & 0x3FFF0000) == 0x01FF0000) | |
265 | { | |
266 | /* add3 sp,sp,n */ | |
267 | short n = op & 0xFFFF; | |
268 | next_addr += n; | |
269 | } | |
270 | else if ((op & 0x3F0F0000) == 0x340F0000) | |
271 | { | |
272 | /* st rn, @(offset,sp) */ | |
273 | short offset = op & 0xFFFF; | |
274 | short n = (op >> 20) & 0xF; | |
275 | fsr->regs[n] = next_addr + offset; | |
276 | } | |
277 | else if ((op & 0x3F1F0000) == 0x350F0000) | |
278 | { | |
279 | /* st2w rn, @(offset,sp) */ | |
280 | short offset = op & 0xFFFF; | |
281 | short n = (op >> 20) & 0xF; | |
282 | fsr->regs[n] = next_addr + offset; | |
283 | fsr->regs[n+1] = next_addr + offset + 2; | |
284 | } | |
285 | else | |
286 | break; | |
287 | } | |
288 | else | |
289 | { | |
290 | /* short instructions */ | |
291 | op1 = (op & 0x3FFF8000) >> 15; | |
292 | op2 = op & 0x7FFF; | |
293 | if (!prologue_find_regs(op1,fsr,pc) || !prologue_find_regs(op2,fsr,pc)) | |
294 | break; | |
295 | } | |
296 | pc += 4; | |
297 | } | |
298 | ||
299 | fi->size = -next_addr; | |
e05bda9f | 300 | |
3b1af95c | 301 | for (i=0; i<NUM_REGS-1; i++) |
e05bda9f MH |
302 | if (fsr->regs[i]) |
303 | { | |
304 | fsr->regs[i] = fp - (next_addr - fsr->regs[i]); | |
e05bda9f | 305 | } |
81dc176f MH |
306 | |
307 | if (fsr->regs[13]) | |
308 | fi->return_pc = (read_memory_unsigned_integer(fsr->regs[13],2)-1) << 2; | |
309 | else | |
310 | fi->return_pc = (read_register(13) - 1) << 2; | |
b70b03b0 | 311 | |
3b1af95c | 312 | /* th SP is not normally (ever?) saved, but check anyway */ |
b70b03b0 | 313 | if (!fsr->regs[SP_REGNUM]) |
3b1af95c MH |
314 | { |
315 | /* if the FP was saved, that means the current FP is valid, */ | |
316 | /* otherwise, it isn't being used, so we use the SP instead */ | |
317 | if (fsr->regs[FP_REGNUM]) | |
318 | fsr->regs[SP_REGNUM] = read_register(FP_REGNUM) + fi->size; | |
319 | else | |
320 | fsr->regs[SP_REGNUM] = read_register(SP_REGNUM) + fi->size; | |
321 | } | |
7b3fa778 MH |
322 | } |
323 | ||
324 | void | |
325 | d10v_init_extra_frame_info (fromleaf, fi) | |
326 | int fromleaf; | |
327 | struct frame_info *fi; | |
328 | { | |
329 | struct frame_saved_regs dummy; | |
e05bda9f | 330 | |
3b1af95c | 331 | if (fi->next && (fi->pc == 0)) |
81dc176f MH |
332 | fi->pc = fi->next->return_pc; |
333 | ||
e05bda9f | 334 | d10v_frame_find_saved_regs (fi, &dummy); |
3b1af95c MH |
335 | if (!dummy.regs[FP_REGNUM]) |
336 | { | |
337 | fi->frame = dummy.regs[SP_REGNUM] - fi->size; | |
338 | d10v_frame_find_saved_regs (fi, &dummy); | |
339 | } | |
7b3fa778 MH |
340 | } |
341 | ||
342 | static void | |
343 | show_regs (args, from_tty) | |
344 | char *args; | |
345 | int from_tty; | |
346 | { | |
347 | long long num1, num2; | |
348 | printf_filtered ("PC=%04x (0x%x) PSW=%04x RPT_S=%04x RPT_E=%04x RPT_C=%04x\n", | |
349 | read_register (PC_REGNUM), read_register (PC_REGNUM) << 2, | |
350 | read_register (PSW_REGNUM), | |
351 | read_register (24), | |
352 | read_register (25), | |
353 | read_register (23)); | |
354 | printf_filtered ("R0-R7 %04x %04x %04x %04x %04x %04x %04x %04x\n", | |
355 | read_register (0), | |
356 | read_register (1), | |
357 | read_register (2), | |
358 | read_register (3), | |
359 | read_register (4), | |
360 | read_register (5), | |
361 | read_register (6), | |
362 | read_register (7)); | |
363 | printf_filtered ("R8-R15 %04x %04x %04x %04x %04x %04x %04x %04x\n", | |
364 | read_register (8), | |
365 | read_register (9), | |
366 | read_register (10), | |
367 | read_register (11), | |
368 | read_register (12), | |
369 | read_register (13), | |
370 | read_register (14), | |
371 | read_register (15)); | |
372 | read_register_gen (A0_REGNUM, (char *)&num1); | |
373 | read_register_gen (A0_REGNUM+1, (char *)&num2); | |
374 | printf_filtered ("A0-A1 %010llx %010llx\n",num1, num2); | |
81dc176f | 375 | } |
7b3fa778 MH |
376 | |
377 | void | |
378 | _initialize_d10v_tdep () | |
379 | { | |
7b3fa778 MH |
380 | tm_print_insn = print_insn_d10v; |
381 | add_com ("regs", class_vars, show_regs, "Print all registers"); | |
382 | } | |
383 | ||
384 | CORE_ADDR | |
385 | d10v_read_register_pid (regno, pid) | |
386 | int regno, pid; | |
387 | { | |
388 | int save_pid; | |
389 | CORE_ADDR retval; | |
390 | ||
391 | if (pid == inferior_pid) | |
392 | return (read_register(regno)) << 2; | |
393 | ||
394 | save_pid = inferior_pid; | |
395 | inferior_pid = pid; | |
396 | retval = read_register (regno); | |
397 | inferior_pid = save_pid; | |
398 | return (retval << 2); | |
399 | } | |
400 | ||
401 | void | |
402 | d10v_write_register_pid (regno, val, pid) | |
403 | int regno; | |
404 | LONGEST val; | |
405 | int pid; | |
406 | { | |
407 | int save_pid; | |
408 | ||
409 | val >>= 2; | |
410 | ||
411 | if (pid == inferior_pid) | |
412 | { | |
413 | write_register (regno, val); | |
414 | return; | |
415 | } | |
416 | ||
417 | save_pid = inferior_pid; | |
418 | inferior_pid = pid; | |
419 | write_register (regno, val); | |
420 | inferior_pid = save_pid; | |
421 | } | |
3b1af95c MH |
422 | |
423 | ||
424 | void | |
425 | d10v_fix_call_dummy (dummyname, start_sp, fun, nargs, args, type, gcc_p) | |
426 | char *dummyname; | |
427 | CORE_ADDR start_sp; | |
428 | CORE_ADDR fun; | |
429 | int nargs; | |
430 | value_ptr *args; | |
431 | struct type *type; | |
432 | int gcc_p; | |
433 | { | |
434 | int regnum, i; | |
435 | CORE_ADDR sp; | |
436 | char buffer[MAX_REGISTER_RAW_SIZE]; | |
437 | ||
438 | sp = start_sp; | |
439 | for (regnum = 0; regnum < NUM_REGS-1; regnum++) | |
440 | { | |
441 | store_address (buffer, REGISTER_RAW_SIZE(regnum), read_register(regnum)); | |
442 | write_memory (sp, buffer, REGISTER_RAW_SIZE(regnum)); | |
443 | sp -= REGISTER_RAW_SIZE(regnum); | |
444 | } | |
445 | write_register (SP_REGNUM, (LONGEST)sp); | |
446 | /* now we need to load PC with the return address */ | |
447 | write_register (PC_REGNUM, (LONGEST)d10v_call_dummy_address()>>2); | |
448 | write_register (LR_REGNUM, (LONGEST)d10v_call_dummy_address()>>2); | |
449 | target_store_registers (-1); | |
450 | flush_cached_frames (); | |
451 | } | |
452 | ||
453 | CORE_ADDR | |
454 | d10v_push_arguments (nargs, args, sp, struct_return, struct_addr) | |
455 | int nargs; | |
456 | value_ptr *args; | |
457 | CORE_ADDR sp; | |
458 | int struct_return; | |
459 | CORE_ADDR struct_addr; | |
460 | { | |
461 | int i, len, regnum=2; | |
462 | char *contents; | |
463 | ||
464 | for (i = 0; i < nargs; i++) | |
465 | { | |
466 | value_ptr arg = args[i]; | |
467 | struct type *arg_type = check_typedef (VALUE_TYPE (arg)); | |
468 | switch (TYPE_CODE (arg_type)) | |
469 | { | |
470 | case TYPE_CODE_INT: | |
471 | case TYPE_CODE_BOOL: | |
472 | case TYPE_CODE_CHAR: | |
473 | case TYPE_CODE_RANGE: | |
474 | case TYPE_CODE_ENUM: | |
475 | break; | |
476 | default: | |
477 | break; | |
478 | } | |
479 | len = TYPE_LENGTH (arg_type); | |
480 | contents = VALUE_CONTENTS(arg); | |
481 | switch (len) | |
482 | { | |
483 | case 1: | |
484 | write_register (regnum++, (LONGEST)(*contents)); | |
485 | break; | |
486 | case 2: | |
487 | write_register (regnum++, (LONGEST)(*(short *)contents)); | |
488 | break; | |
489 | case 4: | |
490 | { | |
491 | LONGEST val = *(long *)contents; | |
492 | write_register (regnum++, val >> 16 ); | |
493 | write_register (regnum++, val & 0xFFFF ); | |
494 | } | |
495 | break; | |
496 | default: | |
497 | } | |
498 | } | |
499 | } | |
500 | ||
501 | CORE_ADDR | |
502 | d10v_call_dummy_address () | |
503 | { | |
504 | CORE_ADDR entry, retval; | |
505 | struct minimal_symbol *sym; | |
506 | ||
507 | entry = entry_point_address (); | |
508 | ||
509 | if (entry != 0) | |
510 | { | |
511 | return entry; | |
512 | } | |
513 | ||
514 | sym = lookup_minimal_symbol ("_start", NULL, symfile_objfile); | |
515 | ||
516 | if (!sym || MSYMBOL_TYPE (sym) != mst_text) | |
517 | retval = 0; | |
518 | else | |
519 | retval = SYMBOL_VALUE_ADDRESS (sym); | |
520 | return retval; | |
521 | } | |
522 | ||
523 | /* Given a return value in `regbuf' with a type `valtype', | |
524 | extract and copy its value into `valbuf'. */ | |
525 | ||
526 | void | |
527 | d10v_extract_return_value (valtype, regbuf, valbuf) | |
528 | struct type *valtype; | |
529 | char regbuf[REGISTER_BYTES]; | |
530 | char *valbuf; | |
531 | { | |
532 | memcpy (valbuf, regbuf + REGISTER_BYTE (2), TYPE_LENGTH (valtype)); | |
533 | } |