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45a70ed6 SG |
1 | /* Target-dependent code for Mitsubishi D30V, for GDB. |
2 | Copyright (C) 1996, 1997 Free Software Foundation, Inc. | |
3 | ||
4 | This file is part of GDB. | |
5 | ||
6 | This program is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2 of the License, or | |
9 | (at your option) any later version. | |
10 | ||
11 | This program is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with this program; if not, write to the Free Software | |
18 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | |
19 | ||
20 | /* Contributed by Martin Hunt, hunt@cygnus.com */ | |
21 | ||
22 | #include "defs.h" | |
23 | #include "frame.h" | |
24 | #include "obstack.h" | |
25 | #include "symtab.h" | |
26 | #include "gdbtypes.h" | |
27 | #include "gdbcmd.h" | |
28 | #include "gdbcore.h" | |
29 | #include "gdb_string.h" | |
30 | #include "value.h" | |
31 | #include "inferior.h" | |
32 | #include "dis-asm.h" | |
33 | #include "symfile.h" | |
34 | #include "objfiles.h" | |
35 | ||
36 | void d30v_frame_find_saved_regs PARAMS ((struct frame_info *fi, | |
37 | struct frame_saved_regs *fsr)); | |
38 | static void d30v_pop_dummy_frame PARAMS ((struct frame_info *fi)); | |
39 | ||
40 | /* Discard from the stack the innermost frame, restoring all saved | |
41 | registers. */ | |
42 | ||
43 | void | |
44 | d30v_pop_frame () | |
45 | { | |
46 | struct frame_info *frame = get_current_frame (); | |
47 | CORE_ADDR fp; | |
48 | int regnum; | |
49 | struct frame_saved_regs fsr; | |
50 | char raw_buffer[8]; | |
51 | ||
52 | fp = FRAME_FP (frame); | |
53 | if (frame->dummy) | |
54 | { | |
55 | d30v_pop_dummy_frame(frame); | |
56 | return; | |
57 | } | |
58 | ||
59 | /* fill out fsr with the address of where each */ | |
60 | /* register was stored in the frame */ | |
61 | get_frame_saved_regs (frame, &fsr); | |
62 | ||
63 | /* now update the current registers with the old values */ | |
64 | for (regnum = A0_REGNUM; regnum < A0_REGNUM+2 ; regnum++) | |
65 | { | |
66 | if (fsr.regs[regnum]) | |
67 | { | |
68 | read_memory (fsr.regs[regnum], raw_buffer, 8); | |
69 | write_register_bytes (REGISTER_BYTE (regnum), raw_buffer, 8); | |
70 | } | |
71 | } | |
72 | for (regnum = 0; regnum < SP_REGNUM; regnum++) | |
73 | { | |
74 | if (fsr.regs[regnum]) | |
75 | { | |
76 | write_register (regnum, read_memory_unsigned_integer (fsr.regs[regnum], 2)); | |
77 | } | |
78 | } | |
79 | if (fsr.regs[PSW_REGNUM]) | |
80 | { | |
81 | write_register (PSW_REGNUM, read_memory_unsigned_integer (fsr.regs[PSW_REGNUM], 2)); | |
82 | } | |
83 | ||
84 | write_register (PC_REGNUM, read_register(13)); | |
85 | write_register (SP_REGNUM, fp + frame->size); | |
86 | target_store_registers (-1); | |
87 | flush_cached_frames (); | |
88 | } | |
89 | ||
90 | static int | |
91 | check_prologue (op) | |
92 | unsigned short op; | |
93 | { | |
94 | /* st rn, @-sp */ | |
95 | if ((op & 0x7E1F) == 0x6C1F) | |
96 | return 1; | |
97 | ||
98 | /* st2w rn, @-sp */ | |
99 | if ((op & 0x7E3F) == 0x6E1F) | |
100 | return 1; | |
101 | ||
102 | /* subi sp, n */ | |
103 | if ((op & 0x7FE1) == 0x01E1) | |
104 | return 1; | |
105 | ||
106 | /* mv r11, sp */ | |
107 | if (op == 0x417E) | |
108 | return 1; | |
109 | ||
110 | /* nop */ | |
111 | if (op == 0x5E00) | |
112 | return 1; | |
113 | ||
114 | /* st rn, @sp */ | |
115 | if ((op & 0x7E1F) == 0x681E) | |
116 | return 1; | |
117 | ||
118 | /* st2w rn, @sp */ | |
119 | if ((op & 0x7E3F) == 0x3A1E) | |
120 | return 1; | |
121 | ||
122 | return 0; | |
123 | } | |
124 | ||
125 | CORE_ADDR | |
126 | d30v_skip_prologue (pc) | |
127 | CORE_ADDR pc; | |
128 | { | |
129 | unsigned long op; | |
130 | unsigned short op1, op2; | |
131 | CORE_ADDR func_addr, func_end; | |
132 | struct symtab_and_line sal; | |
133 | ||
134 | /* If we have line debugging information, then the end of the */ | |
135 | /* prologue should the first assembly instruction of the first source line */ | |
136 | if (find_pc_partial_function (pc, NULL, &func_addr, &func_end)) | |
137 | { | |
138 | sal = find_pc_line (func_addr, 0); | |
139 | if ( sal.end && sal.end < func_end) | |
140 | return sal.end; | |
141 | } | |
142 | ||
143 | if (target_read_memory (pc, (char *)&op, 4)) | |
144 | return pc; /* Can't access it -- assume no prologue. */ | |
145 | ||
146 | while (1) | |
147 | { | |
148 | op = (unsigned long)read_memory_integer (pc, 4); | |
149 | if ((op & 0xC0000000) == 0xC0000000) | |
150 | { | |
151 | /* long instruction */ | |
152 | if ( ((op & 0x3FFF0000) != 0x01FF0000) && /* add3 sp,sp,n */ | |
153 | ((op & 0x3F0F0000) != 0x340F0000) && /* st rn, @(offset,sp) */ | |
154 | ((op & 0x3F1F0000) != 0x350F0000)) /* st2w rn, @(offset,sp) */ | |
155 | break; | |
156 | } | |
157 | else | |
158 | { | |
159 | /* short instructions */ | |
160 | if ((op & 0xC0000000) == 0x80000000) | |
161 | { | |
162 | op2 = (op & 0x3FFF8000) >> 15; | |
163 | op1 = op & 0x7FFF; | |
164 | } | |
165 | else | |
166 | { | |
167 | op1 = (op & 0x3FFF8000) >> 15; | |
168 | op2 = op & 0x7FFF; | |
169 | } | |
170 | if (check_prologue(op1)) | |
171 | { | |
172 | if (!check_prologue(op2)) | |
173 | { | |
174 | /* if the previous opcode was really part of the prologue */ | |
175 | /* and not just a NOP, then we want to break after both instructions */ | |
176 | if (op1 != 0x5E00) | |
177 | pc += 4; | |
178 | break; | |
179 | } | |
180 | } | |
181 | else | |
182 | break; | |
183 | } | |
184 | pc += 4; | |
185 | } | |
186 | return pc; | |
187 | } | |
188 | ||
189 | /* Given a GDB frame, determine the address of the calling function's frame. | |
190 | This will be used to create a new GDB frame struct, and then | |
191 | INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame. | |
192 | */ | |
193 | ||
194 | CORE_ADDR | |
195 | d30v_frame_chain (frame) | |
196 | struct frame_info *frame; | |
197 | { | |
198 | struct frame_saved_regs fsr; | |
199 | ||
200 | d30v_frame_find_saved_regs (frame, &fsr); | |
201 | ||
202 | if (frame->return_pc == IMEM_START) | |
203 | return (CORE_ADDR)0; | |
204 | ||
205 | if (!fsr.regs[FP_REGNUM]) | |
206 | { | |
207 | if (!fsr.regs[SP_REGNUM] || fsr.regs[SP_REGNUM] == STACK_START) | |
208 | return (CORE_ADDR)0; | |
209 | ||
210 | return fsr.regs[SP_REGNUM]; | |
211 | } | |
212 | ||
213 | if (!read_memory_unsigned_integer(fsr.regs[FP_REGNUM],2)) | |
214 | return (CORE_ADDR)0; | |
215 | ||
216 | return read_memory_unsigned_integer(fsr.regs[FP_REGNUM],2)| DMEM_START; | |
217 | } | |
218 | ||
219 | static int next_addr, uses_frame; | |
220 | ||
221 | static int | |
222 | prologue_find_regs (op, fsr, addr) | |
223 | unsigned short op; | |
224 | struct frame_saved_regs *fsr; | |
225 | CORE_ADDR addr; | |
226 | { | |
227 | int n; | |
228 | ||
229 | /* st rn, @-sp */ | |
230 | if ((op & 0x7E1F) == 0x6C1F) | |
231 | { | |
232 | n = (op & 0x1E0) >> 5; | |
233 | next_addr -= 2; | |
234 | fsr->regs[n] = next_addr; | |
235 | return 1; | |
236 | } | |
237 | ||
238 | /* st2w rn, @-sp */ | |
239 | else if ((op & 0x7E3F) == 0x6E1F) | |
240 | { | |
241 | n = (op & 0x1E0) >> 5; | |
242 | next_addr -= 4; | |
243 | fsr->regs[n] = next_addr; | |
244 | fsr->regs[n+1] = next_addr+2; | |
245 | return 1; | |
246 | } | |
247 | ||
248 | /* subi sp, n */ | |
249 | if ((op & 0x7FE1) == 0x01E1) | |
250 | { | |
251 | n = (op & 0x1E) >> 1; | |
252 | if (n == 0) | |
253 | n = 16; | |
254 | next_addr -= n; | |
255 | return 1; | |
256 | } | |
257 | ||
258 | /* mv r11, sp */ | |
259 | if (op == 0x417E) | |
260 | { | |
261 | uses_frame = 1; | |
262 | return 1; | |
263 | } | |
264 | ||
265 | /* nop */ | |
266 | if (op == 0x5E00) | |
267 | return 1; | |
268 | ||
269 | /* st rn, @sp */ | |
270 | if ((op & 0x7E1F) == 0x681E) | |
271 | { | |
272 | n = (op & 0x1E0) >> 5; | |
273 | fsr->regs[n] = next_addr; | |
274 | return 1; | |
275 | } | |
276 | ||
277 | /* st2w rn, @sp */ | |
278 | if ((op & 0x7E3F) == 0x3A1E) | |
279 | { | |
280 | n = (op & 0x1E0) >> 5; | |
281 | fsr->regs[n] = next_addr; | |
282 | fsr->regs[n+1] = next_addr+2; | |
283 | return 1; | |
284 | } | |
285 | ||
286 | return 0; | |
287 | } | |
288 | ||
289 | /* Put here the code to store, into a struct frame_saved_regs, the | |
290 | addresses of the saved registers of frame described by FRAME_INFO. | |
291 | This includes special registers such as pc and fp saved in special | |
292 | ways in the stack frame. sp is even more special: the address we | |
293 | return for it IS the sp for the next frame. */ | |
294 | void | |
295 | d30v_frame_find_saved_regs (fi, fsr) | |
296 | struct frame_info *fi; | |
297 | struct frame_saved_regs *fsr; | |
298 | { | |
299 | CORE_ADDR fp, pc; | |
300 | unsigned long op; | |
301 | unsigned short op1, op2; | |
302 | int i; | |
303 | ||
304 | fp = fi->frame; | |
305 | memset (fsr, 0, sizeof (*fsr)); | |
306 | next_addr = 0; | |
307 | ||
308 | pc = get_pc_function_start (fi->pc); | |
309 | ||
310 | uses_frame = 0; | |
311 | while (1) | |
312 | { | |
313 | op = (unsigned long)read_memory_integer (pc, 4); | |
314 | if ((op & 0xC0000000) == 0xC0000000) | |
315 | { | |
316 | /* long instruction */ | |
317 | if ((op & 0x3FFF0000) == 0x01FF0000) | |
318 | { | |
319 | /* add3 sp,sp,n */ | |
320 | short n = op & 0xFFFF; | |
321 | next_addr += n; | |
322 | } | |
323 | else if ((op & 0x3F0F0000) == 0x340F0000) | |
324 | { | |
325 | /* st rn, @(offset,sp) */ | |
326 | short offset = op & 0xFFFF; | |
327 | short n = (op >> 20) & 0xF; | |
328 | fsr->regs[n] = next_addr + offset; | |
329 | } | |
330 | else if ((op & 0x3F1F0000) == 0x350F0000) | |
331 | { | |
332 | /* st2w rn, @(offset,sp) */ | |
333 | short offset = op & 0xFFFF; | |
334 | short n = (op >> 20) & 0xF; | |
335 | fsr->regs[n] = next_addr + offset; | |
336 | fsr->regs[n+1] = next_addr + offset + 2; | |
337 | } | |
338 | else | |
339 | break; | |
340 | } | |
341 | else | |
342 | { | |
343 | /* short instructions */ | |
344 | if ((op & 0xC0000000) == 0x80000000) | |
345 | { | |
346 | op2 = (op & 0x3FFF8000) >> 15; | |
347 | op1 = op & 0x7FFF; | |
348 | } | |
349 | else | |
350 | { | |
351 | op1 = (op & 0x3FFF8000) >> 15; | |
352 | op2 = op & 0x7FFF; | |
353 | } | |
354 | if (!prologue_find_regs(op1,fsr,pc) || !prologue_find_regs(op2,fsr,pc)) | |
355 | break; | |
356 | } | |
357 | pc += 4; | |
358 | } | |
359 | ||
360 | fi->size = -next_addr; | |
361 | ||
362 | if (!(fp & 0xffff)) | |
363 | fp = read_register(SP_REGNUM) | DMEM_START; | |
364 | ||
365 | for (i=0; i<NUM_REGS-1; i++) | |
366 | if (fsr->regs[i]) | |
367 | { | |
368 | fsr->regs[i] = fp - (next_addr - fsr->regs[i]); | |
369 | } | |
370 | ||
371 | if (fsr->regs[LR_REGNUM]) | |
372 | fi->return_pc = ((read_memory_unsigned_integer(fsr->regs[LR_REGNUM],2) - 1) << 2) | IMEM_START; | |
373 | else | |
374 | fi->return_pc = ((read_register(LR_REGNUM) - 1) << 2) | IMEM_START; | |
375 | ||
376 | /* th SP is not normally (ever?) saved, but check anyway */ | |
377 | if (!fsr->regs[SP_REGNUM]) | |
378 | { | |
379 | /* if the FP was saved, that means the current FP is valid, */ | |
380 | /* otherwise, it isn't being used, so we use the SP instead */ | |
381 | if (uses_frame) | |
382 | fsr->regs[SP_REGNUM] = read_register(FP_REGNUM) + fi->size; | |
383 | else | |
384 | { | |
385 | fsr->regs[SP_REGNUM] = fp + fi->size; | |
386 | fi->frameless = 1; | |
387 | fsr->regs[FP_REGNUM] = 0; | |
388 | } | |
389 | } | |
390 | } | |
391 | ||
392 | void | |
393 | d30v_init_extra_frame_info (fromleaf, fi) | |
394 | int fromleaf; | |
395 | struct frame_info *fi; | |
396 | { | |
397 | struct frame_saved_regs dummy; | |
398 | ||
399 | if (fi->next && ((fi->pc & 0xffff) == 0)) | |
400 | fi->pc = fi->next->return_pc; | |
401 | ||
402 | d30v_frame_find_saved_regs (fi, &dummy); | |
403 | } | |
404 | ||
405 | static void d30v_print_register PARAMS ((int regnum, int tabular)); | |
406 | ||
407 | static void | |
408 | d30v_print_register (regnum, tabular) | |
409 | int regnum; | |
410 | int tabular; | |
411 | { | |
412 | if (regnum < A0_REGNUM) | |
413 | { | |
414 | if (tabular) | |
415 | printf_filtered ("%08x", read_register (regnum)); | |
416 | else | |
417 | printf_filtered ("0x%x %d", read_register (regnum), | |
418 | read_register (regnum)); | |
419 | } | |
420 | else | |
421 | { | |
422 | char regbuf[MAX_REGISTER_RAW_SIZE]; | |
423 | ||
424 | read_relative_register_raw_bytes (regnum, regbuf); | |
425 | ||
426 | val_print (REGISTER_VIRTUAL_TYPE (regnum), regbuf, 0, | |
427 | gdb_stdout, 'x', 1, 0, Val_pretty_default); | |
428 | ||
429 | if (!tabular) | |
430 | { | |
431 | printf_filtered (" "); | |
432 | val_print (REGISTER_VIRTUAL_TYPE (regnum), regbuf, 0, | |
433 | gdb_stdout, 'd', 1, 0, Val_pretty_default); | |
434 | } | |
435 | } | |
436 | } | |
437 | ||
438 | void | |
439 | d30v_do_registers_info (regnum, fpregs) | |
440 | int regnum; | |
441 | int fpregs; | |
442 | { | |
443 | long long num1, num2; | |
444 | ||
445 | if (regnum != -1) | |
446 | { | |
447 | if (reg_names[0] == NULL || reg_names[0][0] == '\000') | |
448 | return; | |
449 | ||
450 | printf_filtered ("%s ", reg_names[regnum]); | |
451 | d30v_print_register (regnum, 0); | |
452 | ||
453 | printf_filtered ("\n"); | |
454 | return; | |
455 | } | |
456 | ||
457 | /* Have to print all the registers. Format them nicely. */ | |
458 | ||
459 | printf_filtered ("PC="); | |
460 | print_address (read_pc (), gdb_stdout); | |
461 | ||
462 | printf_filtered (" PSW="); | |
463 | d30v_print_register (PSW_REGNUM, 1); | |
464 | ||
465 | printf_filtered (" BPC="); | |
466 | print_address (read_register (BPC_REGNUM), gdb_stdout); | |
467 | ||
468 | printf_filtered (" BPSW="); | |
469 | d30v_print_register (BPSW_REGNUM, 1); | |
470 | printf_filtered ("\n"); | |
471 | ||
472 | printf_filtered ("DPC="); | |
473 | print_address (read_register (DPC_REGNUM), gdb_stdout); | |
474 | ||
475 | printf_filtered (" DPSW="); | |
476 | d30v_print_register (DPSW_REGNUM, 1); | |
477 | ||
478 | printf_filtered (" IBA="); | |
479 | print_address (read_register (IBA_REGNUM), gdb_stdout); | |
480 | printf_filtered ("\n"); | |
481 | ||
482 | printf_filtered ("RPT_C="); | |
483 | d30v_print_register (RPT_C_REGNUM, 1); | |
484 | ||
485 | printf_filtered (" RPT_S="); | |
486 | print_address (read_register (RPT_S_REGNUM), gdb_stdout); | |
487 | ||
488 | printf_filtered (" RPT_E="); | |
489 | print_address (read_register (RPT_E_REGNUM), gdb_stdout); | |
490 | printf_filtered ("\n"); | |
491 | ||
492 | printf_filtered ("MOD_S="); | |
493 | print_address (read_register (MOD_S_REGNUM), gdb_stdout); | |
494 | ||
495 | printf_filtered (" MOD_E="); | |
496 | print_address (read_register (MOD_E_REGNUM), gdb_stdout); | |
497 | printf_filtered ("\n"); | |
498 | ||
499 | printf_filtered ("EIT_VB="); | |
500 | print_address (read_register (EIT_VB_REGNUM), gdb_stdout); | |
501 | ||
502 | printf_filtered (" INT_S="); | |
503 | d30v_print_register (INT_S_REGNUM, 1); | |
504 | ||
505 | printf_filtered (" INT_M="); | |
506 | d30v_print_register (INT_M_REGNUM, 1); | |
507 | printf_filtered ("\n"); | |
508 | ||
509 | for (regnum = 0; regnum <= 63;) | |
510 | { | |
511 | int i; | |
512 | ||
513 | printf_filtered ("R%d-R%d ", regnum, regnum + 7); | |
514 | if (regnum < 10) | |
515 | printf_filtered (" "); | |
516 | if (regnum + 7 < 10) | |
517 | printf_filtered (" "); | |
518 | ||
519 | for (i = 0; i < 8; i++) | |
520 | { | |
521 | printf_filtered (" "); | |
522 | d30v_print_register (regnum++, 1); | |
523 | } | |
524 | ||
525 | printf_filtered ("\n"); | |
526 | } | |
527 | ||
528 | printf_filtered ("A0-A1 "); | |
529 | ||
530 | d30v_print_register (A0_REGNUM, 1); | |
531 | printf_filtered (" "); | |
532 | d30v_print_register (A1_REGNUM, 1); | |
533 | printf_filtered ("\n"); | |
534 | } | |
535 | ||
536 | CORE_ADDR | |
537 | d30v_fix_call_dummy (dummyname, start_sp, fun, nargs, args, type, gcc_p) | |
538 | char *dummyname; | |
539 | CORE_ADDR start_sp; | |
540 | CORE_ADDR fun; | |
541 | int nargs; | |
542 | value_ptr *args; | |
543 | struct type *type; | |
544 | int gcc_p; | |
545 | { | |
546 | int regnum; | |
547 | CORE_ADDR sp; | |
548 | char buffer[MAX_REGISTER_RAW_SIZE]; | |
549 | struct frame_info *frame = get_current_frame (); | |
550 | frame->dummy = start_sp; | |
551 | start_sp |= DMEM_START; | |
552 | ||
553 | sp = start_sp; | |
554 | for (regnum = 0; regnum < NUM_REGS; regnum++) | |
555 | { | |
556 | sp -= REGISTER_RAW_SIZE(regnum); | |
557 | store_address (buffer, REGISTER_RAW_SIZE(regnum), read_register(regnum)); | |
558 | write_memory (sp, buffer, REGISTER_RAW_SIZE(regnum)); | |
559 | } | |
560 | write_register (SP_REGNUM, (LONGEST)(sp & 0xffff)); | |
561 | /* now we need to load LR with the return address */ | |
562 | write_register (LR_REGNUM, (LONGEST)(d30v_call_dummy_address() & 0xffff) >> 2); | |
563 | return sp; | |
564 | } | |
565 | ||
566 | static void | |
567 | d30v_pop_dummy_frame (fi) | |
568 | struct frame_info *fi; | |
569 | { | |
570 | CORE_ADDR sp = fi->dummy; | |
571 | int regnum; | |
572 | ||
573 | for (regnum = 0; regnum < NUM_REGS; regnum++) | |
574 | { | |
575 | sp -= REGISTER_RAW_SIZE(regnum); | |
576 | write_register(regnum, read_memory_unsigned_integer (sp, REGISTER_RAW_SIZE(regnum))); | |
577 | } | |
578 | flush_cached_frames (); /* needed? */ | |
579 | } | |
580 | ||
581 | ||
582 | CORE_ADDR | |
583 | d30v_push_arguments (nargs, args, sp, struct_return, struct_addr) | |
584 | int nargs; | |
585 | value_ptr *args; | |
586 | CORE_ADDR sp; | |
587 | int struct_return; | |
588 | CORE_ADDR struct_addr; | |
589 | { | |
590 | int i, len, index=0, regnum=2; | |
591 | char buffer[4], *contents; | |
592 | LONGEST val; | |
593 | CORE_ADDR ptrs[10]; | |
594 | ||
595 | /* Pass 1. Put all large args on stack */ | |
596 | for (i = 0; i < nargs; i++) | |
597 | { | |
598 | value_ptr arg = args[i]; | |
599 | struct type *arg_type = check_typedef (VALUE_TYPE (arg)); | |
600 | len = TYPE_LENGTH (arg_type); | |
601 | contents = VALUE_CONTENTS(arg); | |
602 | val = extract_signed_integer (contents, len); | |
603 | if (len > 4) | |
604 | { | |
605 | /* put on stack and pass pointers */ | |
606 | sp -= len; | |
607 | write_memory (sp, contents, len); | |
608 | ptrs[index++] = sp; | |
609 | } | |
610 | } | |
611 | ||
612 | index = 0; | |
613 | ||
614 | for (i = 0; i < nargs; i++) | |
615 | { | |
616 | value_ptr arg = args[i]; | |
617 | struct type *arg_type = check_typedef (VALUE_TYPE (arg)); | |
618 | len = TYPE_LENGTH (arg_type); | |
619 | contents = VALUE_CONTENTS(arg); | |
620 | val = extract_signed_integer (contents, len); | |
621 | if (len > 4) | |
622 | { | |
623 | /* use a pointer to previously saved data */ | |
624 | if (regnum < 6) | |
625 | write_register (regnum++, ptrs[index++]); | |
626 | else | |
627 | { | |
628 | /* no more registers available. put it on the stack */ | |
629 | sp -= 2; | |
630 | store_address (buffer, 2, ptrs[index++]); | |
631 | write_memory (sp, buffer, 2); | |
632 | } | |
633 | } | |
634 | else | |
635 | { | |
636 | if (regnum < 6 ) | |
637 | { | |
638 | if (len == 4) | |
639 | write_register (regnum++, val>>16); | |
640 | write_register (regnum++, val & 0xffff); | |
641 | } | |
642 | else | |
643 | { | |
644 | sp -= len; | |
645 | store_address (buffer, len, val); | |
646 | write_memory (sp, buffer, len); | |
647 | } | |
648 | } | |
649 | } | |
650 | return sp; | |
651 | } | |
652 | ||
653 | ||
654 | /* pick an out-of-the-way place to set the return value */ | |
655 | /* for an inferior function call. The link register is set to this */ | |
656 | /* value and a momentary breakpoint is set there. When the breakpoint */ | |
657 | /* is hit, the dummy frame is popped and the previous environment is */ | |
658 | /* restored. */ | |
659 | ||
660 | CORE_ADDR | |
661 | d30v_call_dummy_address () | |
662 | { | |
663 | CORE_ADDR entry; | |
664 | struct minimal_symbol *sym; | |
665 | ||
666 | entry = entry_point_address (); | |
667 | ||
668 | if (entry != 0) | |
669 | return entry; | |
670 | ||
671 | sym = lookup_minimal_symbol ("_start", NULL, symfile_objfile); | |
672 | ||
673 | if (!sym || MSYMBOL_TYPE (sym) != mst_text) | |
674 | return 0; | |
675 | else | |
676 | return SYMBOL_VALUE_ADDRESS (sym); | |
677 | } | |
678 | ||
679 | /* Given a return value in `regbuf' with a type `valtype', | |
680 | extract and copy its value into `valbuf'. */ | |
681 | ||
682 | void | |
683 | d30v_extract_return_value (valtype, regbuf, valbuf) | |
684 | struct type *valtype; | |
685 | char regbuf[REGISTER_BYTES]; | |
686 | char *valbuf; | |
687 | { | |
688 | memcpy (valbuf, regbuf + REGISTER_BYTE (2), TYPE_LENGTH (valtype)); | |
689 | } | |
690 | ||
691 | /* The following code implements access to, and display of, the D30V's | |
692 | instruction trace buffer. The buffer consists of 64K or more | |
693 | 4-byte words of data, of which each words includes an 8-bit count, | |
694 | an 8-bit segment number, and a 16-bit instruction address. | |
695 | ||
696 | In theory, the trace buffer is continuously capturing instruction | |
697 | data that the CPU presents on its "debug bus", but in practice, the | |
698 | ROMified GDB stub only enables tracing when it continues or steps | |
699 | the program, and stops tracing when the program stops; so it | |
700 | actually works for GDB to read the buffer counter out of memory and | |
701 | then read each trace word. The counter records where the tracing | |
702 | stops, but there is no record of where it started, so we remember | |
703 | the PC when we resumed and then search backwards in the trace | |
704 | buffer for a word that includes that address. This is not perfect, | |
705 | because you will miss trace data if the resumption PC is the target | |
706 | of a branch. (The value of the buffer counter is semi-random, any | |
707 | trace data from a previous program stop is gone.) */ | |
708 | ||
709 | /* The address of the last word recorded in the trace buffer. */ | |
710 | ||
711 | #define DBBC_ADDR (0xd80000) | |
712 | ||
713 | /* The base of the trace buffer, at least for the "Board_0". */ | |
714 | ||
715 | #define TRACE_BUFFER_BASE (0xf40000) | |
716 | ||
717 | static void trace_command PARAMS ((char *, int)); | |
718 | ||
719 | static void untrace_command PARAMS ((char *, int)); | |
720 | ||
721 | static void trace_info PARAMS ((char *, int)); | |
722 | ||
723 | static void tdisassemble_command PARAMS ((char *, int)); | |
724 | ||
725 | static void display_trace PARAMS ((int, int)); | |
726 | ||
727 | /* True when instruction traces are being collected. */ | |
728 | ||
729 | static int tracing; | |
730 | ||
731 | /* Remembered PC. */ | |
732 | ||
733 | static CORE_ADDR last_pc; | |
734 | ||
735 | /* True when trace output should be displayed whenever program stops. */ | |
736 | ||
737 | static int trace_display; | |
738 | ||
739 | /* True when trace listing should include source lines. */ | |
740 | ||
741 | static int default_trace_show_source = 1; | |
742 | ||
743 | struct trace_buffer { | |
744 | int size; | |
745 | short *counts; | |
746 | CORE_ADDR *addrs; | |
747 | } trace_data; | |
748 | ||
749 | static void | |
750 | trace_command (args, from_tty) | |
751 | char *args; | |
752 | int from_tty; | |
753 | { | |
754 | /* Clear the host-side trace buffer, allocating space if needed. */ | |
755 | trace_data.size = 0; | |
756 | if (trace_data.counts == NULL) | |
757 | trace_data.counts = (short *) xmalloc (65536 * sizeof(short)); | |
758 | if (trace_data.addrs == NULL) | |
759 | trace_data.addrs = (CORE_ADDR *) xmalloc (65536 * sizeof(CORE_ADDR)); | |
760 | ||
761 | tracing = 1; | |
762 | ||
763 | printf_filtered ("Tracing is now on.\n"); | |
764 | } | |
765 | ||
766 | static void | |
767 | untrace_command (args, from_tty) | |
768 | char *args; | |
769 | int from_tty; | |
770 | { | |
771 | tracing = 0; | |
772 | ||
773 | printf_filtered ("Tracing is now off.\n"); | |
774 | } | |
775 | ||
776 | static void | |
777 | trace_info (args, from_tty) | |
778 | char *args; | |
779 | int from_tty; | |
780 | { | |
781 | int i; | |
782 | ||
783 | if (trace_data.size) | |
784 | { | |
785 | printf_filtered ("%d entries in trace buffer:\n", trace_data.size); | |
786 | ||
787 | for (i = 0; i < trace_data.size; ++i) | |
788 | { | |
789 | printf_filtered ("%d: %d instruction%s at 0x%x\n", | |
790 | i, trace_data.counts[i], | |
791 | (trace_data.counts[i] == 1 ? "" : "s"), | |
792 | trace_data.addrs[i]); | |
793 | } | |
794 | } | |
795 | else | |
796 | printf_filtered ("No entries in trace buffer.\n"); | |
797 | ||
798 | printf_filtered ("Tracing is currently %s.\n", (tracing ? "on" : "off")); | |
799 | } | |
800 | ||
801 | /* Print the instruction at address MEMADDR in debugged memory, | |
802 | on STREAM. Returns length of the instruction, in bytes. */ | |
803 | ||
804 | static int | |
805 | print_insn (memaddr, stream) | |
806 | CORE_ADDR memaddr; | |
807 | GDB_FILE *stream; | |
808 | { | |
809 | /* If there's no disassembler, something is very wrong. */ | |
810 | if (tm_print_insn == NULL) | |
811 | abort (); | |
812 | ||
813 | if (TARGET_BYTE_ORDER == BIG_ENDIAN) | |
814 | tm_print_insn_info.endian = BFD_ENDIAN_BIG; | |
815 | else | |
816 | tm_print_insn_info.endian = BFD_ENDIAN_LITTLE; | |
817 | return (*tm_print_insn) (memaddr, &tm_print_insn_info); | |
818 | } | |
819 | ||
820 | void | |
821 | d30v_eva_prepare_to_trace () | |
822 | { | |
823 | if (!tracing) | |
824 | return; | |
825 | ||
826 | last_pc = read_register (PC_REGNUM); | |
827 | } | |
828 | ||
829 | /* Collect trace data from the target board and format it into a form | |
830 | more useful for display. */ | |
831 | ||
832 | void | |
833 | d30v_eva_get_trace_data () | |
834 | { | |
835 | int count, i, j, oldsize; | |
836 | int trace_addr, trace_seg, trace_cnt, next_cnt; | |
837 | unsigned int last_trace, trace_word, next_word; | |
838 | unsigned int *tmpspace; | |
839 | ||
840 | if (!tracing) | |
841 | return; | |
842 | ||
843 | tmpspace = xmalloc (65536 * sizeof(unsigned int)); | |
844 | ||
845 | last_trace = read_memory_unsigned_integer (DBBC_ADDR, 2) << 2; | |
846 | ||
847 | /* Collect buffer contents from the target, stopping when we reach | |
848 | the word recorded when execution resumed. */ | |
849 | ||
850 | count = 0; | |
851 | while (last_trace > 0) | |
852 | { | |
853 | QUIT; | |
854 | trace_word = | |
855 | read_memory_unsigned_integer (TRACE_BUFFER_BASE + last_trace, 4); | |
856 | trace_addr = trace_word & 0xffff; | |
857 | last_trace -= 4; | |
858 | /* Ignore an apparently nonsensical entry. */ | |
859 | if (trace_addr == 0xffd5) | |
860 | continue; | |
861 | tmpspace[count++] = trace_word; | |
862 | if (trace_addr == last_pc) | |
863 | break; | |
864 | if (count > 65535) | |
865 | break; | |
866 | } | |
867 | ||
868 | /* Move the data to the host-side trace buffer, adjusting counts to | |
869 | include the last instruction executed and transforming the address | |
870 | into something that GDB likes. */ | |
871 | ||
872 | for (i = 0; i < count; ++i) | |
873 | { | |
874 | trace_word = tmpspace[i]; | |
875 | next_word = ((i == 0) ? 0 : tmpspace[i - 1]); | |
876 | trace_addr = trace_word & 0xffff; | |
877 | next_cnt = (next_word >> 24) & 0xff; | |
878 | j = trace_data.size + count - i - 1; | |
879 | trace_data.addrs[j] = (trace_addr << 2) + 0x1000000; | |
880 | trace_data.counts[j] = next_cnt + 1; | |
881 | } | |
882 | ||
883 | oldsize = trace_data.size; | |
884 | trace_data.size += count; | |
885 | ||
886 | free (tmpspace); | |
887 | ||
888 | if (trace_display) | |
889 | display_trace (oldsize, trace_data.size); | |
890 | } | |
891 | ||
892 | static void | |
893 | tdisassemble_command (arg, from_tty) | |
894 | char *arg; | |
895 | int from_tty; | |
896 | { | |
897 | int i, count; | |
898 | CORE_ADDR low, high; | |
899 | char *space_index; | |
900 | ||
901 | if (!arg) | |
902 | { | |
903 | low = 0; | |
904 | high = trace_data.size; | |
905 | } | |
906 | else if (!(space_index = (char *) strchr (arg, ' '))) | |
907 | { | |
908 | low = parse_and_eval_address (arg); | |
909 | high = low + 5; | |
910 | } | |
911 | else | |
912 | { | |
913 | /* Two arguments. */ | |
914 | *space_index = '\0'; | |
915 | low = parse_and_eval_address (arg); | |
916 | high = parse_and_eval_address (space_index + 1); | |
917 | if (high < low) | |
918 | high = low; | |
919 | } | |
920 | ||
921 | printf_filtered ("Dump of trace from %d to %d:\n", low, high); | |
922 | ||
923 | display_trace (low, high); | |
924 | ||
925 | printf_filtered ("End of trace dump.\n"); | |
926 | gdb_flush (gdb_stdout); | |
927 | } | |
928 | ||
929 | static void | |
930 | display_trace (low, high) | |
931 | int low, high; | |
932 | { | |
933 | int i, count, trace_show_source, first, suppress; | |
934 | CORE_ADDR next_address; | |
935 | ||
936 | trace_show_source = default_trace_show_source; | |
937 | if (!have_full_symbols () && !have_partial_symbols()) | |
938 | { | |
939 | trace_show_source = 0; | |
940 | printf_filtered ("No symbol table is loaded. Use the \"file\" command.\n"); | |
941 | printf_filtered ("Trace will not display any source.\n"); | |
942 | } | |
943 | ||
944 | first = 1; | |
945 | suppress = 0; | |
946 | for (i = low; i < high; ++i) | |
947 | { | |
948 | next_address = trace_data.addrs[i]; | |
949 | count = trace_data.counts[i]; | |
950 | while (count-- > 0) | |
951 | { | |
952 | QUIT; | |
953 | if (trace_show_source) | |
954 | { | |
955 | struct symtab_and_line sal, sal_prev; | |
956 | ||
957 | sal_prev = find_pc_line (next_address - 4, 0); | |
958 | sal = find_pc_line (next_address, 0); | |
959 | ||
960 | if (sal.symtab) | |
961 | { | |
962 | if (first || sal.line != sal_prev.line) | |
963 | print_source_lines (sal.symtab, sal.line, sal.line + 1, 0); | |
964 | suppress = 0; | |
965 | } | |
966 | else | |
967 | { | |
968 | if (!suppress) | |
969 | /* FIXME-32x64--assumes sal.pc fits in long. */ | |
970 | printf_filtered ("No source file for address %s.\n", | |
971 | local_hex_string((unsigned long) sal.pc)); | |
972 | suppress = 1; | |
973 | } | |
974 | } | |
975 | first = 0; | |
976 | print_address (next_address, gdb_stdout); | |
977 | printf_filtered (":"); | |
978 | printf_filtered ("\t"); | |
979 | wrap_here (" "); | |
980 | next_address = next_address + print_insn (next_address, gdb_stdout); | |
981 | printf_filtered ("\n"); | |
982 | gdb_flush (gdb_stdout); | |
983 | } | |
984 | } | |
985 | } | |
986 | ||
987 | extern void (*target_resume_hook) PARAMS ((void)); | |
988 | extern void (*target_wait_loop_hook) PARAMS ((void)); | |
989 | ||
990 | void | |
991 | _initialize_d30v_tdep () | |
992 | { | |
993 | tm_print_insn = print_insn_d30v; | |
994 | ||
995 | target_resume_hook = d30v_eva_prepare_to_trace; | |
996 | target_wait_loop_hook = d30v_eva_get_trace_data; | |
997 | ||
998 | add_com ("trace", class_support, trace_command, | |
999 | "Enable tracing of instruction execution."); | |
1000 | ||
1001 | add_com ("untrace", class_support, untrace_command, | |
1002 | "Disable tracing of instruction execution."); | |
1003 | ||
1004 | add_com ("tdisassemble", class_vars, tdisassemble_command, | |
1005 | "Disassemble the trace buffer.\n\ | |
1006 | Two optional arguments specify a range of trace buffer entries\n\ | |
1007 | as reported by info trace (NOT addresses!)."); | |
1008 | ||
1009 | add_info ("trace", trace_info, | |
1010 | "Display info about the trace data buffer."); | |
1011 | ||
1012 | add_show_from_set (add_set_cmd ("tracedisplay", no_class, | |
1013 | var_integer, (char *)&trace_display, | |
1014 | "Set automatic display of trace.\n", &setlist), | |
1015 | &showlist); | |
1016 | add_show_from_set (add_set_cmd ("tracesource", no_class, | |
1017 | var_integer, (char *)&default_trace_show_source, | |
1018 | "Set display of source code with trace.\n", &setlist), | |
1019 | &showlist); | |
1020 | ||
1021 | } |