Commit | Line | Data |
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45a70ed6 SG |
1 | /* Target-dependent code for Mitsubishi D30V, for GDB. |
2 | Copyright (C) 1996, 1997 Free Software Foundation, Inc. | |
3 | ||
4 | This file is part of GDB. | |
5 | ||
6 | This program is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2 of the License, or | |
9 | (at your option) any later version. | |
10 | ||
11 | This program is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with this program; if not, write to the Free Software | |
18 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | |
19 | ||
20 | /* Contributed by Martin Hunt, hunt@cygnus.com */ | |
21 | ||
22 | #include "defs.h" | |
23 | #include "frame.h" | |
24 | #include "obstack.h" | |
25 | #include "symtab.h" | |
26 | #include "gdbtypes.h" | |
27 | #include "gdbcmd.h" | |
28 | #include "gdbcore.h" | |
29 | #include "gdb_string.h" | |
30 | #include "value.h" | |
31 | #include "inferior.h" | |
32 | #include "dis-asm.h" | |
33 | #include "symfile.h" | |
34 | #include "objfiles.h" | |
35 | ||
36 | void d30v_frame_find_saved_regs PARAMS ((struct frame_info *fi, | |
37 | struct frame_saved_regs *fsr)); | |
38 | static void d30v_pop_dummy_frame PARAMS ((struct frame_info *fi)); | |
5d62f957 MM |
39 | static void d30v_print_flags PARAMS ((void)); |
40 | static void print_flags_command PARAMS ((char *, int)); | |
45a70ed6 SG |
41 | |
42 | /* Discard from the stack the innermost frame, restoring all saved | |
43 | registers. */ | |
44 | ||
45 | void | |
46 | d30v_pop_frame () | |
47 | { | |
48 | struct frame_info *frame = get_current_frame (); | |
49 | CORE_ADDR fp; | |
50 | int regnum; | |
51 | struct frame_saved_regs fsr; | |
52 | char raw_buffer[8]; | |
53 | ||
54 | fp = FRAME_FP (frame); | |
55 | if (frame->dummy) | |
56 | { | |
57 | d30v_pop_dummy_frame(frame); | |
58 | return; | |
59 | } | |
60 | ||
61 | /* fill out fsr with the address of where each */ | |
62 | /* register was stored in the frame */ | |
63 | get_frame_saved_regs (frame, &fsr); | |
64 | ||
65 | /* now update the current registers with the old values */ | |
66 | for (regnum = A0_REGNUM; regnum < A0_REGNUM+2 ; regnum++) | |
67 | { | |
68 | if (fsr.regs[regnum]) | |
69 | { | |
70 | read_memory (fsr.regs[regnum], raw_buffer, 8); | |
71 | write_register_bytes (REGISTER_BYTE (regnum), raw_buffer, 8); | |
72 | } | |
73 | } | |
74 | for (regnum = 0; regnum < SP_REGNUM; regnum++) | |
75 | { | |
76 | if (fsr.regs[regnum]) | |
77 | { | |
78 | write_register (regnum, read_memory_unsigned_integer (fsr.regs[regnum], 2)); | |
79 | } | |
80 | } | |
81 | if (fsr.regs[PSW_REGNUM]) | |
82 | { | |
83 | write_register (PSW_REGNUM, read_memory_unsigned_integer (fsr.regs[PSW_REGNUM], 2)); | |
84 | } | |
85 | ||
86 | write_register (PC_REGNUM, read_register(13)); | |
87 | write_register (SP_REGNUM, fp + frame->size); | |
88 | target_store_registers (-1); | |
89 | flush_cached_frames (); | |
90 | } | |
91 | ||
92 | static int | |
93 | check_prologue (op) | |
94 | unsigned short op; | |
95 | { | |
96 | /* st rn, @-sp */ | |
97 | if ((op & 0x7E1F) == 0x6C1F) | |
98 | return 1; | |
99 | ||
100 | /* st2w rn, @-sp */ | |
101 | if ((op & 0x7E3F) == 0x6E1F) | |
102 | return 1; | |
103 | ||
104 | /* subi sp, n */ | |
105 | if ((op & 0x7FE1) == 0x01E1) | |
106 | return 1; | |
107 | ||
108 | /* mv r11, sp */ | |
109 | if (op == 0x417E) | |
110 | return 1; | |
111 | ||
112 | /* nop */ | |
113 | if (op == 0x5E00) | |
114 | return 1; | |
115 | ||
116 | /* st rn, @sp */ | |
117 | if ((op & 0x7E1F) == 0x681E) | |
118 | return 1; | |
119 | ||
120 | /* st2w rn, @sp */ | |
121 | if ((op & 0x7E3F) == 0x3A1E) | |
122 | return 1; | |
123 | ||
124 | return 0; | |
125 | } | |
126 | ||
127 | CORE_ADDR | |
128 | d30v_skip_prologue (pc) | |
129 | CORE_ADDR pc; | |
130 | { | |
131 | unsigned long op; | |
132 | unsigned short op1, op2; | |
133 | CORE_ADDR func_addr, func_end; | |
134 | struct symtab_and_line sal; | |
135 | ||
c2f76613 MM |
136 | /* XXX -- these need to be updated, the instruction patterns are actually |
137 | for the d10v, not the d30v. */ | |
45a70ed6 SG |
138 | /* If we have line debugging information, then the end of the */ |
139 | /* prologue should the first assembly instruction of the first source line */ | |
140 | if (find_pc_partial_function (pc, NULL, &func_addr, &func_end)) | |
141 | { | |
142 | sal = find_pc_line (func_addr, 0); | |
143 | if ( sal.end && sal.end < func_end) | |
144 | return sal.end; | |
145 | } | |
146 | ||
147 | if (target_read_memory (pc, (char *)&op, 4)) | |
148 | return pc; /* Can't access it -- assume no prologue. */ | |
149 | ||
150 | while (1) | |
151 | { | |
152 | op = (unsigned long)read_memory_integer (pc, 4); | |
153 | if ((op & 0xC0000000) == 0xC0000000) | |
154 | { | |
155 | /* long instruction */ | |
156 | if ( ((op & 0x3FFF0000) != 0x01FF0000) && /* add3 sp,sp,n */ | |
157 | ((op & 0x3F0F0000) != 0x340F0000) && /* st rn, @(offset,sp) */ | |
158 | ((op & 0x3F1F0000) != 0x350F0000)) /* st2w rn, @(offset,sp) */ | |
159 | break; | |
160 | } | |
161 | else | |
162 | { | |
163 | /* short instructions */ | |
164 | if ((op & 0xC0000000) == 0x80000000) | |
165 | { | |
166 | op2 = (op & 0x3FFF8000) >> 15; | |
167 | op1 = op & 0x7FFF; | |
168 | } | |
169 | else | |
170 | { | |
171 | op1 = (op & 0x3FFF8000) >> 15; | |
172 | op2 = op & 0x7FFF; | |
173 | } | |
174 | if (check_prologue(op1)) | |
175 | { | |
176 | if (!check_prologue(op2)) | |
177 | { | |
178 | /* if the previous opcode was really part of the prologue */ | |
179 | /* and not just a NOP, then we want to break after both instructions */ | |
180 | if (op1 != 0x5E00) | |
181 | pc += 4; | |
182 | break; | |
183 | } | |
184 | } | |
185 | else | |
186 | break; | |
187 | } | |
188 | pc += 4; | |
189 | } | |
190 | return pc; | |
191 | } | |
192 | ||
193 | /* Given a GDB frame, determine the address of the calling function's frame. | |
194 | This will be used to create a new GDB frame struct, and then | |
195 | INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame. | |
196 | */ | |
197 | ||
198 | CORE_ADDR | |
199 | d30v_frame_chain (frame) | |
200 | struct frame_info *frame; | |
201 | { | |
202 | struct frame_saved_regs fsr; | |
203 | ||
204 | d30v_frame_find_saved_regs (frame, &fsr); | |
205 | ||
206 | if (frame->return_pc == IMEM_START) | |
207 | return (CORE_ADDR)0; | |
208 | ||
209 | if (!fsr.regs[FP_REGNUM]) | |
210 | { | |
211 | if (!fsr.regs[SP_REGNUM] || fsr.regs[SP_REGNUM] == STACK_START) | |
212 | return (CORE_ADDR)0; | |
213 | ||
214 | return fsr.regs[SP_REGNUM]; | |
215 | } | |
216 | ||
217 | if (!read_memory_unsigned_integer(fsr.regs[FP_REGNUM],2)) | |
218 | return (CORE_ADDR)0; | |
219 | ||
220 | return read_memory_unsigned_integer(fsr.regs[FP_REGNUM],2)| DMEM_START; | |
221 | } | |
222 | ||
223 | static int next_addr, uses_frame; | |
224 | ||
225 | static int | |
226 | prologue_find_regs (op, fsr, addr) | |
227 | unsigned short op; | |
228 | struct frame_saved_regs *fsr; | |
229 | CORE_ADDR addr; | |
230 | { | |
231 | int n; | |
232 | ||
c2f76613 MM |
233 | /* XXX -- these need to be updated, the instruction patterns are actually |
234 | for the d10v, not the d30v. */ | |
45a70ed6 SG |
235 | /* st rn, @-sp */ |
236 | if ((op & 0x7E1F) == 0x6C1F) | |
237 | { | |
238 | n = (op & 0x1E0) >> 5; | |
239 | next_addr -= 2; | |
240 | fsr->regs[n] = next_addr; | |
241 | return 1; | |
242 | } | |
243 | ||
244 | /* st2w rn, @-sp */ | |
245 | else if ((op & 0x7E3F) == 0x6E1F) | |
246 | { | |
247 | n = (op & 0x1E0) >> 5; | |
248 | next_addr -= 4; | |
249 | fsr->regs[n] = next_addr; | |
250 | fsr->regs[n+1] = next_addr+2; | |
251 | return 1; | |
252 | } | |
253 | ||
254 | /* subi sp, n */ | |
255 | if ((op & 0x7FE1) == 0x01E1) | |
256 | { | |
257 | n = (op & 0x1E) >> 1; | |
258 | if (n == 0) | |
259 | n = 16; | |
260 | next_addr -= n; | |
261 | return 1; | |
262 | } | |
263 | ||
264 | /* mv r11, sp */ | |
265 | if (op == 0x417E) | |
266 | { | |
267 | uses_frame = 1; | |
268 | return 1; | |
269 | } | |
270 | ||
271 | /* nop */ | |
272 | if (op == 0x5E00) | |
273 | return 1; | |
274 | ||
275 | /* st rn, @sp */ | |
276 | if ((op & 0x7E1F) == 0x681E) | |
277 | { | |
278 | n = (op & 0x1E0) >> 5; | |
279 | fsr->regs[n] = next_addr; | |
280 | return 1; | |
281 | } | |
282 | ||
283 | /* st2w rn, @sp */ | |
284 | if ((op & 0x7E3F) == 0x3A1E) | |
285 | { | |
286 | n = (op & 0x1E0) >> 5; | |
287 | fsr->regs[n] = next_addr; | |
288 | fsr->regs[n+1] = next_addr+2; | |
289 | return 1; | |
290 | } | |
291 | ||
292 | return 0; | |
293 | } | |
294 | ||
295 | /* Put here the code to store, into a struct frame_saved_regs, the | |
296 | addresses of the saved registers of frame described by FRAME_INFO. | |
297 | This includes special registers such as pc and fp saved in special | |
298 | ways in the stack frame. sp is even more special: the address we | |
299 | return for it IS the sp for the next frame. */ | |
c2f76613 MM |
300 | /* XXX -- these need to be updated, the instruction patterns are actually |
301 | for the d10v, not the d30v. */ | |
45a70ed6 SG |
302 | void |
303 | d30v_frame_find_saved_regs (fi, fsr) | |
304 | struct frame_info *fi; | |
305 | struct frame_saved_regs *fsr; | |
306 | { | |
307 | CORE_ADDR fp, pc; | |
308 | unsigned long op; | |
309 | unsigned short op1, op2; | |
310 | int i; | |
311 | ||
312 | fp = fi->frame; | |
313 | memset (fsr, 0, sizeof (*fsr)); | |
314 | next_addr = 0; | |
315 | ||
316 | pc = get_pc_function_start (fi->pc); | |
317 | ||
318 | uses_frame = 0; | |
319 | while (1) | |
320 | { | |
321 | op = (unsigned long)read_memory_integer (pc, 4); | |
322 | if ((op & 0xC0000000) == 0xC0000000) | |
323 | { | |
324 | /* long instruction */ | |
325 | if ((op & 0x3FFF0000) == 0x01FF0000) | |
326 | { | |
327 | /* add3 sp,sp,n */ | |
328 | short n = op & 0xFFFF; | |
329 | next_addr += n; | |
330 | } | |
331 | else if ((op & 0x3F0F0000) == 0x340F0000) | |
332 | { | |
333 | /* st rn, @(offset,sp) */ | |
334 | short offset = op & 0xFFFF; | |
335 | short n = (op >> 20) & 0xF; | |
336 | fsr->regs[n] = next_addr + offset; | |
337 | } | |
338 | else if ((op & 0x3F1F0000) == 0x350F0000) | |
339 | { | |
340 | /* st2w rn, @(offset,sp) */ | |
341 | short offset = op & 0xFFFF; | |
342 | short n = (op >> 20) & 0xF; | |
343 | fsr->regs[n] = next_addr + offset; | |
344 | fsr->regs[n+1] = next_addr + offset + 2; | |
345 | } | |
346 | else | |
347 | break; | |
348 | } | |
349 | else | |
350 | { | |
351 | /* short instructions */ | |
352 | if ((op & 0xC0000000) == 0x80000000) | |
353 | { | |
354 | op2 = (op & 0x3FFF8000) >> 15; | |
355 | op1 = op & 0x7FFF; | |
356 | } | |
357 | else | |
358 | { | |
359 | op1 = (op & 0x3FFF8000) >> 15; | |
360 | op2 = op & 0x7FFF; | |
361 | } | |
362 | if (!prologue_find_regs(op1,fsr,pc) || !prologue_find_regs(op2,fsr,pc)) | |
363 | break; | |
364 | } | |
365 | pc += 4; | |
366 | } | |
367 | ||
368 | fi->size = -next_addr; | |
369 | ||
370 | if (!(fp & 0xffff)) | |
371 | fp = read_register(SP_REGNUM) | DMEM_START; | |
372 | ||
373 | for (i=0; i<NUM_REGS-1; i++) | |
374 | if (fsr->regs[i]) | |
375 | { | |
376 | fsr->regs[i] = fp - (next_addr - fsr->regs[i]); | |
377 | } | |
378 | ||
379 | if (fsr->regs[LR_REGNUM]) | |
380 | fi->return_pc = ((read_memory_unsigned_integer(fsr->regs[LR_REGNUM],2) - 1) << 2) | IMEM_START; | |
381 | else | |
382 | fi->return_pc = ((read_register(LR_REGNUM) - 1) << 2) | IMEM_START; | |
383 | ||
384 | /* th SP is not normally (ever?) saved, but check anyway */ | |
385 | if (!fsr->regs[SP_REGNUM]) | |
386 | { | |
387 | /* if the FP was saved, that means the current FP is valid, */ | |
388 | /* otherwise, it isn't being used, so we use the SP instead */ | |
389 | if (uses_frame) | |
390 | fsr->regs[SP_REGNUM] = read_register(FP_REGNUM) + fi->size; | |
391 | else | |
392 | { | |
393 | fsr->regs[SP_REGNUM] = fp + fi->size; | |
394 | fi->frameless = 1; | |
395 | fsr->regs[FP_REGNUM] = 0; | |
396 | } | |
397 | } | |
398 | } | |
399 | ||
400 | void | |
401 | d30v_init_extra_frame_info (fromleaf, fi) | |
402 | int fromleaf; | |
403 | struct frame_info *fi; | |
404 | { | |
405 | struct frame_saved_regs dummy; | |
406 | ||
407 | if (fi->next && ((fi->pc & 0xffff) == 0)) | |
408 | fi->pc = fi->next->return_pc; | |
409 | ||
410 | d30v_frame_find_saved_regs (fi, &dummy); | |
411 | } | |
412 | ||
413 | static void d30v_print_register PARAMS ((int regnum, int tabular)); | |
414 | ||
415 | static void | |
416 | d30v_print_register (regnum, tabular) | |
417 | int regnum; | |
418 | int tabular; | |
419 | { | |
420 | if (regnum < A0_REGNUM) | |
421 | { | |
422 | if (tabular) | |
423 | printf_filtered ("%08x", read_register (regnum)); | |
424 | else | |
425 | printf_filtered ("0x%x %d", read_register (regnum), | |
426 | read_register (regnum)); | |
427 | } | |
428 | else | |
429 | { | |
430 | char regbuf[MAX_REGISTER_RAW_SIZE]; | |
431 | ||
432 | read_relative_register_raw_bytes (regnum, regbuf); | |
433 | ||
434 | val_print (REGISTER_VIRTUAL_TYPE (regnum), regbuf, 0, | |
435 | gdb_stdout, 'x', 1, 0, Val_pretty_default); | |
436 | ||
437 | if (!tabular) | |
438 | { | |
439 | printf_filtered (" "); | |
440 | val_print (REGISTER_VIRTUAL_TYPE (regnum), regbuf, 0, | |
441 | gdb_stdout, 'd', 1, 0, Val_pretty_default); | |
442 | } | |
443 | } | |
444 | } | |
445 | ||
5d62f957 MM |
446 | static void |
447 | d30v_print_flags () | |
448 | { | |
449 | long psw = read_register (PSW_REGNUM); | |
450 | printf_filtered ("flags #1"); | |
451 | printf_filtered (" (sm) %d", (psw & PSW_SM) != 0); | |
452 | printf_filtered (" (ea) %d", (psw & PSW_EA) != 0); | |
453 | printf_filtered (" (db) %d", (psw & PSW_DB) != 0); | |
454 | printf_filtered (" (ds) %d", (psw & PSW_DS) != 0); | |
455 | printf_filtered (" (ie) %d", (psw & PSW_IE) != 0); | |
456 | printf_filtered (" (rp) %d", (psw & PSW_RP) != 0); | |
457 | printf_filtered (" (md) %d\n", (psw & PSW_MD) != 0); | |
458 | ||
459 | printf_filtered ("flags #2"); | |
460 | printf_filtered (" (f0) %d", (psw & PSW_F0) != 0); | |
461 | printf_filtered (" (f1) %d", (psw & PSW_F1) != 0); | |
462 | printf_filtered (" (f2) %d", (psw & PSW_F2) != 0); | |
463 | printf_filtered (" (f3) %d", (psw & PSW_F3) != 0); | |
464 | printf_filtered (" (s) %d", (psw & PSW_S) != 0); | |
465 | printf_filtered (" (v) %d", (psw & PSW_V) != 0); | |
466 | printf_filtered (" (va) %d", (psw & PSW_VA) != 0); | |
467 | printf_filtered (" (c) %d\n", (psw & PSW_C) != 0); | |
468 | } | |
469 | ||
470 | static void | |
471 | print_flags_command (args, from_tty) | |
472 | char *args; | |
473 | int from_tty; | |
474 | { | |
475 | d30v_print_flags (); | |
476 | } | |
477 | ||
45a70ed6 SG |
478 | void |
479 | d30v_do_registers_info (regnum, fpregs) | |
480 | int regnum; | |
481 | int fpregs; | |
482 | { | |
483 | long long num1, num2; | |
5d62f957 | 484 | long psw; |
45a70ed6 SG |
485 | |
486 | if (regnum != -1) | |
487 | { | |
488 | if (reg_names[0] == NULL || reg_names[0][0] == '\000') | |
489 | return; | |
490 | ||
491 | printf_filtered ("%s ", reg_names[regnum]); | |
492 | d30v_print_register (regnum, 0); | |
493 | ||
494 | printf_filtered ("\n"); | |
495 | return; | |
496 | } | |
497 | ||
498 | /* Have to print all the registers. Format them nicely. */ | |
499 | ||
500 | printf_filtered ("PC="); | |
501 | print_address (read_pc (), gdb_stdout); | |
502 | ||
503 | printf_filtered (" PSW="); | |
504 | d30v_print_register (PSW_REGNUM, 1); | |
505 | ||
506 | printf_filtered (" BPC="); | |
507 | print_address (read_register (BPC_REGNUM), gdb_stdout); | |
508 | ||
509 | printf_filtered (" BPSW="); | |
510 | d30v_print_register (BPSW_REGNUM, 1); | |
511 | printf_filtered ("\n"); | |
512 | ||
513 | printf_filtered ("DPC="); | |
514 | print_address (read_register (DPC_REGNUM), gdb_stdout); | |
515 | ||
516 | printf_filtered (" DPSW="); | |
517 | d30v_print_register (DPSW_REGNUM, 1); | |
518 | ||
519 | printf_filtered (" IBA="); | |
520 | print_address (read_register (IBA_REGNUM), gdb_stdout); | |
521 | printf_filtered ("\n"); | |
522 | ||
523 | printf_filtered ("RPT_C="); | |
524 | d30v_print_register (RPT_C_REGNUM, 1); | |
525 | ||
526 | printf_filtered (" RPT_S="); | |
527 | print_address (read_register (RPT_S_REGNUM), gdb_stdout); | |
528 | ||
529 | printf_filtered (" RPT_E="); | |
530 | print_address (read_register (RPT_E_REGNUM), gdb_stdout); | |
531 | printf_filtered ("\n"); | |
532 | ||
533 | printf_filtered ("MOD_S="); | |
534 | print_address (read_register (MOD_S_REGNUM), gdb_stdout); | |
535 | ||
536 | printf_filtered (" MOD_E="); | |
537 | print_address (read_register (MOD_E_REGNUM), gdb_stdout); | |
538 | printf_filtered ("\n"); | |
539 | ||
540 | printf_filtered ("EIT_VB="); | |
541 | print_address (read_register (EIT_VB_REGNUM), gdb_stdout); | |
542 | ||
543 | printf_filtered (" INT_S="); | |
544 | d30v_print_register (INT_S_REGNUM, 1); | |
545 | ||
546 | printf_filtered (" INT_M="); | |
547 | d30v_print_register (INT_M_REGNUM, 1); | |
548 | printf_filtered ("\n"); | |
549 | ||
5d62f957 | 550 | d30v_print_flags (); |
45a70ed6 SG |
551 | for (regnum = 0; regnum <= 63;) |
552 | { | |
553 | int i; | |
554 | ||
555 | printf_filtered ("R%d-R%d ", regnum, regnum + 7); | |
556 | if (regnum < 10) | |
557 | printf_filtered (" "); | |
558 | if (regnum + 7 < 10) | |
559 | printf_filtered (" "); | |
560 | ||
561 | for (i = 0; i < 8; i++) | |
562 | { | |
563 | printf_filtered (" "); | |
564 | d30v_print_register (regnum++, 1); | |
565 | } | |
566 | ||
567 | printf_filtered ("\n"); | |
568 | } | |
569 | ||
570 | printf_filtered ("A0-A1 "); | |
571 | ||
572 | d30v_print_register (A0_REGNUM, 1); | |
573 | printf_filtered (" "); | |
574 | d30v_print_register (A1_REGNUM, 1); | |
575 | printf_filtered ("\n"); | |
576 | } | |
577 | ||
578 | CORE_ADDR | |
579 | d30v_fix_call_dummy (dummyname, start_sp, fun, nargs, args, type, gcc_p) | |
580 | char *dummyname; | |
581 | CORE_ADDR start_sp; | |
582 | CORE_ADDR fun; | |
583 | int nargs; | |
584 | value_ptr *args; | |
585 | struct type *type; | |
586 | int gcc_p; | |
587 | { | |
588 | int regnum; | |
589 | CORE_ADDR sp; | |
590 | char buffer[MAX_REGISTER_RAW_SIZE]; | |
591 | struct frame_info *frame = get_current_frame (); | |
592 | frame->dummy = start_sp; | |
593 | start_sp |= DMEM_START; | |
594 | ||
595 | sp = start_sp; | |
596 | for (regnum = 0; regnum < NUM_REGS; regnum++) | |
597 | { | |
598 | sp -= REGISTER_RAW_SIZE(regnum); | |
599 | store_address (buffer, REGISTER_RAW_SIZE(regnum), read_register(regnum)); | |
600 | write_memory (sp, buffer, REGISTER_RAW_SIZE(regnum)); | |
601 | } | |
602 | write_register (SP_REGNUM, (LONGEST)(sp & 0xffff)); | |
603 | /* now we need to load LR with the return address */ | |
604 | write_register (LR_REGNUM, (LONGEST)(d30v_call_dummy_address() & 0xffff) >> 2); | |
605 | return sp; | |
606 | } | |
607 | ||
608 | static void | |
609 | d30v_pop_dummy_frame (fi) | |
610 | struct frame_info *fi; | |
611 | { | |
612 | CORE_ADDR sp = fi->dummy; | |
613 | int regnum; | |
614 | ||
615 | for (regnum = 0; regnum < NUM_REGS; regnum++) | |
616 | { | |
617 | sp -= REGISTER_RAW_SIZE(regnum); | |
618 | write_register(regnum, read_memory_unsigned_integer (sp, REGISTER_RAW_SIZE(regnum))); | |
619 | } | |
620 | flush_cached_frames (); /* needed? */ | |
621 | } | |
622 | ||
623 | ||
624 | CORE_ADDR | |
625 | d30v_push_arguments (nargs, args, sp, struct_return, struct_addr) | |
626 | int nargs; | |
627 | value_ptr *args; | |
628 | CORE_ADDR sp; | |
629 | int struct_return; | |
630 | CORE_ADDR struct_addr; | |
631 | { | |
632 | int i, len, index=0, regnum=2; | |
633 | char buffer[4], *contents; | |
634 | LONGEST val; | |
635 | CORE_ADDR ptrs[10]; | |
636 | ||
637 | /* Pass 1. Put all large args on stack */ | |
638 | for (i = 0; i < nargs; i++) | |
639 | { | |
640 | value_ptr arg = args[i]; | |
641 | struct type *arg_type = check_typedef (VALUE_TYPE (arg)); | |
642 | len = TYPE_LENGTH (arg_type); | |
643 | contents = VALUE_CONTENTS(arg); | |
644 | val = extract_signed_integer (contents, len); | |
645 | if (len > 4) | |
646 | { | |
647 | /* put on stack and pass pointers */ | |
648 | sp -= len; | |
649 | write_memory (sp, contents, len); | |
650 | ptrs[index++] = sp; | |
651 | } | |
652 | } | |
653 | ||
654 | index = 0; | |
655 | ||
656 | for (i = 0; i < nargs; i++) | |
657 | { | |
658 | value_ptr arg = args[i]; | |
659 | struct type *arg_type = check_typedef (VALUE_TYPE (arg)); | |
660 | len = TYPE_LENGTH (arg_type); | |
661 | contents = VALUE_CONTENTS(arg); | |
662 | val = extract_signed_integer (contents, len); | |
663 | if (len > 4) | |
664 | { | |
665 | /* use a pointer to previously saved data */ | |
666 | if (regnum < 6) | |
667 | write_register (regnum++, ptrs[index++]); | |
668 | else | |
669 | { | |
670 | /* no more registers available. put it on the stack */ | |
671 | sp -= 2; | |
672 | store_address (buffer, 2, ptrs[index++]); | |
673 | write_memory (sp, buffer, 2); | |
674 | } | |
675 | } | |
676 | else | |
677 | { | |
678 | if (regnum < 6 ) | |
679 | { | |
680 | if (len == 4) | |
681 | write_register (regnum++, val>>16); | |
682 | write_register (regnum++, val & 0xffff); | |
683 | } | |
684 | else | |
685 | { | |
686 | sp -= len; | |
687 | store_address (buffer, len, val); | |
688 | write_memory (sp, buffer, len); | |
689 | } | |
690 | } | |
691 | } | |
692 | return sp; | |
693 | } | |
694 | ||
695 | ||
696 | /* pick an out-of-the-way place to set the return value */ | |
697 | /* for an inferior function call. The link register is set to this */ | |
698 | /* value and a momentary breakpoint is set there. When the breakpoint */ | |
699 | /* is hit, the dummy frame is popped and the previous environment is */ | |
700 | /* restored. */ | |
701 | ||
702 | CORE_ADDR | |
703 | d30v_call_dummy_address () | |
704 | { | |
705 | CORE_ADDR entry; | |
706 | struct minimal_symbol *sym; | |
707 | ||
708 | entry = entry_point_address (); | |
709 | ||
710 | if (entry != 0) | |
711 | return entry; | |
712 | ||
713 | sym = lookup_minimal_symbol ("_start", NULL, symfile_objfile); | |
714 | ||
715 | if (!sym || MSYMBOL_TYPE (sym) != mst_text) | |
716 | return 0; | |
717 | else | |
718 | return SYMBOL_VALUE_ADDRESS (sym); | |
719 | } | |
720 | ||
721 | /* Given a return value in `regbuf' with a type `valtype', | |
722 | extract and copy its value into `valbuf'. */ | |
723 | ||
724 | void | |
725 | d30v_extract_return_value (valtype, regbuf, valbuf) | |
726 | struct type *valtype; | |
727 | char regbuf[REGISTER_BYTES]; | |
728 | char *valbuf; | |
729 | { | |
730 | memcpy (valbuf, regbuf + REGISTER_BYTE (2), TYPE_LENGTH (valtype)); | |
731 | } | |
732 | ||
733 | /* The following code implements access to, and display of, the D30V's | |
734 | instruction trace buffer. The buffer consists of 64K or more | |
735 | 4-byte words of data, of which each words includes an 8-bit count, | |
736 | an 8-bit segment number, and a 16-bit instruction address. | |
737 | ||
738 | In theory, the trace buffer is continuously capturing instruction | |
739 | data that the CPU presents on its "debug bus", but in practice, the | |
740 | ROMified GDB stub only enables tracing when it continues or steps | |
741 | the program, and stops tracing when the program stops; so it | |
742 | actually works for GDB to read the buffer counter out of memory and | |
743 | then read each trace word. The counter records where the tracing | |
744 | stops, but there is no record of where it started, so we remember | |
745 | the PC when we resumed and then search backwards in the trace | |
746 | buffer for a word that includes that address. This is not perfect, | |
747 | because you will miss trace data if the resumption PC is the target | |
748 | of a branch. (The value of the buffer counter is semi-random, any | |
749 | trace data from a previous program stop is gone.) */ | |
750 | ||
751 | /* The address of the last word recorded in the trace buffer. */ | |
752 | ||
753 | #define DBBC_ADDR (0xd80000) | |
754 | ||
755 | /* The base of the trace buffer, at least for the "Board_0". */ | |
756 | ||
757 | #define TRACE_BUFFER_BASE (0xf40000) | |
758 | ||
759 | static void trace_command PARAMS ((char *, int)); | |
760 | ||
761 | static void untrace_command PARAMS ((char *, int)); | |
762 | ||
763 | static void trace_info PARAMS ((char *, int)); | |
764 | ||
765 | static void tdisassemble_command PARAMS ((char *, int)); | |
766 | ||
767 | static void display_trace PARAMS ((int, int)); | |
768 | ||
769 | /* True when instruction traces are being collected. */ | |
770 | ||
771 | static int tracing; | |
772 | ||
773 | /* Remembered PC. */ | |
774 | ||
775 | static CORE_ADDR last_pc; | |
776 | ||
777 | /* True when trace output should be displayed whenever program stops. */ | |
778 | ||
779 | static int trace_display; | |
780 | ||
781 | /* True when trace listing should include source lines. */ | |
782 | ||
783 | static int default_trace_show_source = 1; | |
784 | ||
785 | struct trace_buffer { | |
786 | int size; | |
787 | short *counts; | |
788 | CORE_ADDR *addrs; | |
789 | } trace_data; | |
790 | ||
791 | static void | |
792 | trace_command (args, from_tty) | |
793 | char *args; | |
794 | int from_tty; | |
795 | { | |
796 | /* Clear the host-side trace buffer, allocating space if needed. */ | |
797 | trace_data.size = 0; | |
798 | if (trace_data.counts == NULL) | |
799 | trace_data.counts = (short *) xmalloc (65536 * sizeof(short)); | |
800 | if (trace_data.addrs == NULL) | |
801 | trace_data.addrs = (CORE_ADDR *) xmalloc (65536 * sizeof(CORE_ADDR)); | |
802 | ||
803 | tracing = 1; | |
804 | ||
805 | printf_filtered ("Tracing is now on.\n"); | |
806 | } | |
807 | ||
808 | static void | |
809 | untrace_command (args, from_tty) | |
810 | char *args; | |
811 | int from_tty; | |
812 | { | |
813 | tracing = 0; | |
814 | ||
815 | printf_filtered ("Tracing is now off.\n"); | |
816 | } | |
817 | ||
818 | static void | |
819 | trace_info (args, from_tty) | |
820 | char *args; | |
821 | int from_tty; | |
822 | { | |
823 | int i; | |
824 | ||
825 | if (trace_data.size) | |
826 | { | |
827 | printf_filtered ("%d entries in trace buffer:\n", trace_data.size); | |
828 | ||
829 | for (i = 0; i < trace_data.size; ++i) | |
830 | { | |
831 | printf_filtered ("%d: %d instruction%s at 0x%x\n", | |
832 | i, trace_data.counts[i], | |
833 | (trace_data.counts[i] == 1 ? "" : "s"), | |
834 | trace_data.addrs[i]); | |
835 | } | |
836 | } | |
837 | else | |
838 | printf_filtered ("No entries in trace buffer.\n"); | |
839 | ||
840 | printf_filtered ("Tracing is currently %s.\n", (tracing ? "on" : "off")); | |
841 | } | |
842 | ||
843 | /* Print the instruction at address MEMADDR in debugged memory, | |
844 | on STREAM. Returns length of the instruction, in bytes. */ | |
845 | ||
846 | static int | |
847 | print_insn (memaddr, stream) | |
848 | CORE_ADDR memaddr; | |
849 | GDB_FILE *stream; | |
850 | { | |
851 | /* If there's no disassembler, something is very wrong. */ | |
852 | if (tm_print_insn == NULL) | |
853 | abort (); | |
854 | ||
855 | if (TARGET_BYTE_ORDER == BIG_ENDIAN) | |
856 | tm_print_insn_info.endian = BFD_ENDIAN_BIG; | |
857 | else | |
858 | tm_print_insn_info.endian = BFD_ENDIAN_LITTLE; | |
859 | return (*tm_print_insn) (memaddr, &tm_print_insn_info); | |
860 | } | |
861 | ||
862 | void | |
863 | d30v_eva_prepare_to_trace () | |
864 | { | |
865 | if (!tracing) | |
866 | return; | |
867 | ||
868 | last_pc = read_register (PC_REGNUM); | |
869 | } | |
870 | ||
871 | /* Collect trace data from the target board and format it into a form | |
872 | more useful for display. */ | |
873 | ||
874 | void | |
875 | d30v_eva_get_trace_data () | |
876 | { | |
877 | int count, i, j, oldsize; | |
878 | int trace_addr, trace_seg, trace_cnt, next_cnt; | |
879 | unsigned int last_trace, trace_word, next_word; | |
880 | unsigned int *tmpspace; | |
881 | ||
882 | if (!tracing) | |
883 | return; | |
884 | ||
885 | tmpspace = xmalloc (65536 * sizeof(unsigned int)); | |
886 | ||
887 | last_trace = read_memory_unsigned_integer (DBBC_ADDR, 2) << 2; | |
888 | ||
889 | /* Collect buffer contents from the target, stopping when we reach | |
890 | the word recorded when execution resumed. */ | |
891 | ||
892 | count = 0; | |
893 | while (last_trace > 0) | |
894 | { | |
895 | QUIT; | |
896 | trace_word = | |
897 | read_memory_unsigned_integer (TRACE_BUFFER_BASE + last_trace, 4); | |
898 | trace_addr = trace_word & 0xffff; | |
899 | last_trace -= 4; | |
900 | /* Ignore an apparently nonsensical entry. */ | |
901 | if (trace_addr == 0xffd5) | |
902 | continue; | |
903 | tmpspace[count++] = trace_word; | |
904 | if (trace_addr == last_pc) | |
905 | break; | |
906 | if (count > 65535) | |
907 | break; | |
908 | } | |
909 | ||
910 | /* Move the data to the host-side trace buffer, adjusting counts to | |
911 | include the last instruction executed and transforming the address | |
912 | into something that GDB likes. */ | |
913 | ||
914 | for (i = 0; i < count; ++i) | |
915 | { | |
916 | trace_word = tmpspace[i]; | |
917 | next_word = ((i == 0) ? 0 : tmpspace[i - 1]); | |
918 | trace_addr = trace_word & 0xffff; | |
919 | next_cnt = (next_word >> 24) & 0xff; | |
920 | j = trace_data.size + count - i - 1; | |
921 | trace_data.addrs[j] = (trace_addr << 2) + 0x1000000; | |
922 | trace_data.counts[j] = next_cnt + 1; | |
923 | } | |
924 | ||
925 | oldsize = trace_data.size; | |
926 | trace_data.size += count; | |
927 | ||
928 | free (tmpspace); | |
929 | ||
930 | if (trace_display) | |
931 | display_trace (oldsize, trace_data.size); | |
932 | } | |
933 | ||
934 | static void | |
935 | tdisassemble_command (arg, from_tty) | |
936 | char *arg; | |
937 | int from_tty; | |
938 | { | |
939 | int i, count; | |
940 | CORE_ADDR low, high; | |
941 | char *space_index; | |
942 | ||
943 | if (!arg) | |
944 | { | |
945 | low = 0; | |
946 | high = trace_data.size; | |
947 | } | |
948 | else if (!(space_index = (char *) strchr (arg, ' '))) | |
949 | { | |
950 | low = parse_and_eval_address (arg); | |
951 | high = low + 5; | |
952 | } | |
953 | else | |
954 | { | |
955 | /* Two arguments. */ | |
956 | *space_index = '\0'; | |
957 | low = parse_and_eval_address (arg); | |
958 | high = parse_and_eval_address (space_index + 1); | |
959 | if (high < low) | |
960 | high = low; | |
961 | } | |
962 | ||
963 | printf_filtered ("Dump of trace from %d to %d:\n", low, high); | |
964 | ||
965 | display_trace (low, high); | |
966 | ||
967 | printf_filtered ("End of trace dump.\n"); | |
968 | gdb_flush (gdb_stdout); | |
969 | } | |
970 | ||
971 | static void | |
972 | display_trace (low, high) | |
973 | int low, high; | |
974 | { | |
975 | int i, count, trace_show_source, first, suppress; | |
976 | CORE_ADDR next_address; | |
977 | ||
978 | trace_show_source = default_trace_show_source; | |
979 | if (!have_full_symbols () && !have_partial_symbols()) | |
980 | { | |
981 | trace_show_source = 0; | |
982 | printf_filtered ("No symbol table is loaded. Use the \"file\" command.\n"); | |
983 | printf_filtered ("Trace will not display any source.\n"); | |
984 | } | |
985 | ||
986 | first = 1; | |
987 | suppress = 0; | |
988 | for (i = low; i < high; ++i) | |
989 | { | |
990 | next_address = trace_data.addrs[i]; | |
991 | count = trace_data.counts[i]; | |
992 | while (count-- > 0) | |
993 | { | |
994 | QUIT; | |
995 | if (trace_show_source) | |
996 | { | |
997 | struct symtab_and_line sal, sal_prev; | |
998 | ||
999 | sal_prev = find_pc_line (next_address - 4, 0); | |
1000 | sal = find_pc_line (next_address, 0); | |
1001 | ||
1002 | if (sal.symtab) | |
1003 | { | |
1004 | if (first || sal.line != sal_prev.line) | |
1005 | print_source_lines (sal.symtab, sal.line, sal.line + 1, 0); | |
1006 | suppress = 0; | |
1007 | } | |
1008 | else | |
1009 | { | |
1010 | if (!suppress) | |
1011 | /* FIXME-32x64--assumes sal.pc fits in long. */ | |
1012 | printf_filtered ("No source file for address %s.\n", | |
1013 | local_hex_string((unsigned long) sal.pc)); | |
1014 | suppress = 1; | |
1015 | } | |
1016 | } | |
1017 | first = 0; | |
1018 | print_address (next_address, gdb_stdout); | |
1019 | printf_filtered (":"); | |
1020 | printf_filtered ("\t"); | |
1021 | wrap_here (" "); | |
1022 | next_address = next_address + print_insn (next_address, gdb_stdout); | |
1023 | printf_filtered ("\n"); | |
1024 | gdb_flush (gdb_stdout); | |
1025 | } | |
1026 | } | |
1027 | } | |
1028 | ||
1029 | extern void (*target_resume_hook) PARAMS ((void)); | |
1030 | extern void (*target_wait_loop_hook) PARAMS ((void)); | |
1031 | ||
1032 | void | |
1033 | _initialize_d30v_tdep () | |
1034 | { | |
1035 | tm_print_insn = print_insn_d30v; | |
1036 | ||
1037 | target_resume_hook = d30v_eva_prepare_to_trace; | |
1038 | target_wait_loop_hook = d30v_eva_get_trace_data; | |
1039 | ||
5d62f957 MM |
1040 | add_info ("flags", print_flags_command, "Print d30v flags."); |
1041 | ||
45a70ed6 SG |
1042 | add_com ("trace", class_support, trace_command, |
1043 | "Enable tracing of instruction execution."); | |
1044 | ||
1045 | add_com ("untrace", class_support, untrace_command, | |
1046 | "Disable tracing of instruction execution."); | |
1047 | ||
1048 | add_com ("tdisassemble", class_vars, tdisassemble_command, | |
1049 | "Disassemble the trace buffer.\n\ | |
1050 | Two optional arguments specify a range of trace buffer entries\n\ | |
1051 | as reported by info trace (NOT addresses!)."); | |
1052 | ||
1053 | add_info ("trace", trace_info, | |
1054 | "Display info about the trace data buffer."); | |
1055 | ||
1056 | add_show_from_set (add_set_cmd ("tracedisplay", no_class, | |
1057 | var_integer, (char *)&trace_display, | |
1058 | "Set automatic display of trace.\n", &setlist), | |
1059 | &showlist); | |
1060 | add_show_from_set (add_set_cmd ("tracesource", no_class, | |
1061 | var_integer, (char *)&default_trace_show_source, | |
1062 | "Set display of source code with trace.\n", &setlist), | |
1063 | &showlist); | |
1064 | ||
1065 | } |