Commit | Line | Data |
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45a70ed6 SG |
1 | /* Target-dependent code for Mitsubishi D30V, for GDB. |
2 | Copyright (C) 1996, 1997 Free Software Foundation, Inc. | |
3 | ||
4 | This file is part of GDB. | |
5 | ||
6 | This program is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2 of the License, or | |
9 | (at your option) any later version. | |
10 | ||
11 | This program is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with this program; if not, write to the Free Software | |
18 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | |
19 | ||
20 | /* Contributed by Martin Hunt, hunt@cygnus.com */ | |
21 | ||
22 | #include "defs.h" | |
23 | #include "frame.h" | |
24 | #include "obstack.h" | |
25 | #include "symtab.h" | |
26 | #include "gdbtypes.h" | |
27 | #include "gdbcmd.h" | |
28 | #include "gdbcore.h" | |
29 | #include "gdb_string.h" | |
30 | #include "value.h" | |
31 | #include "inferior.h" | |
32 | #include "dis-asm.h" | |
33 | #include "symfile.h" | |
34 | #include "objfiles.h" | |
35 | ||
36 | void d30v_frame_find_saved_regs PARAMS ((struct frame_info *fi, | |
37 | struct frame_saved_regs *fsr)); | |
38 | static void d30v_pop_dummy_frame PARAMS ((struct frame_info *fi)); | |
5d62f957 MM |
39 | static void d30v_print_flags PARAMS ((void)); |
40 | static void print_flags_command PARAMS ((char *, int)); | |
45a70ed6 | 41 | |
7359fb1d DT |
42 | /* the following defines assume: |
43 | fp is r61, lr is r62, sp is r63, and ?? is r22 | |
44 | if that changes, they will need to be updated */ | |
45 | ||
46 | #define OP_MASK_ALL_BUT_RA 0x0ffc0fff /* throw away Ra, keep the rest */ | |
47 | ||
48 | #define OP_STW_SPM 0x054c0fc0 /* stw Ra, @(sp-) */ | |
49 | #define OP_STW_SP_R0 0x05400fc0 /* stw Ra, @(sp,r0) */ | |
50 | #define OP_STW_SP_IMM0 0x05480fc0 /* st Ra, @(sp, 0x0) */ | |
51 | #define OP_STW_R22P_R0 0x05440580 /* stw Ra, @(r22+,r0) */ | |
52 | ||
53 | #define OP_ST2W_SPM 0x056c0fc0 /* st2w Ra, @(sp-) */ | |
54 | #define OP_ST2W_SP_R0 0x05600fc0 /* st2w Ra, @(sp, r0) */ | |
55 | #define OP_ST2W_SP_IMM0 0x05680fc0 /* st2w Ra, @(sp, 0x0) */ | |
56 | #define OP_ST2W_R22P_R0 0x05640580 /* st2w Ra, @(r22+, r0) */ | |
57 | ||
58 | #define OP_MASK_OPCODE 0x0ffc0000 /* just the opcode, ign operands */ | |
59 | #define OP_NOP 0x00f00000 /* nop */ | |
60 | ||
61 | #define OP_MASK_ALL_BUT_IMM 0x0fffffc0 /* throw away imm, keep the rest */ | |
62 | #define OP_SUB_SP_IMM 0x082bffc0 /* sub sp,sp,imm */ | |
63 | #define OP_ADD_SP_IMM 0x080bffc0 /* add sp,sp,imm */ | |
64 | #define OP_ADD_R22_SP_IMM 0x08096fc0 /* add r22,sp,imm */ | |
65 | #define OP_STW_FP_SP_IMM 0x054bdfc0 /* stw fp,@(sp,imm) */ | |
36985eca | 66 | #define OP_OR_SP_R0_IMM 0x03abf000 /* or sp,r0,imm */ |
7359fb1d DT |
67 | |
68 | /* no mask */ | |
69 | #define OP_OR_FP_R0_SP 0x03a3d03f /* or fp,r0,sp */ | |
70 | #define OP_OR_FP_SP_R0 0x03a3dfc0 /* or fp,sp,r0 */ | |
71 | #define OP_OR_FP_IMM0_SP 0x03abd03f /* or fp,0x0,sp */ | |
72 | #define OP_STW_FP_R22P_R0 0x0547d580 /* stw fp,@(r22+,r0) */ | |
73 | #define OP_STW_LR_R22P_R0 0x0547e580 /* stw lr,@(r22+,r0) */ | |
74 | ||
75 | #define OP_MASK_OP_AND_RB 0x0ff80fc0 /* keep op and rb,throw away rest */ | |
76 | #define OP_STW_SP_IMM 0x05480fc0 /* stw Ra,@(sp,imm) */ | |
77 | #define OP_ST2W_SP_IMM 0x05680fc0 /* st2w Ra,@(sp,imm) */ | |
78 | #define OP_STW_FP_IMM 0x05480f40 /* stw Ra,@(fp,imm) */ | |
79 | #define OP_STW_FP_R0 0x05400f40 /* stw Ra,@(fp,r0) */ | |
80 | ||
81 | #define OP_MASK_FM_BIT 0x80000000 | |
82 | #define OP_MASK_CC_BITS 0x70000000 | |
83 | #define OP_MASK_SUB_INST 0x0fffffff | |
84 | ||
85 | #define EXTRACT_RA(op) (((op) >> 12) & 0x3f) | |
86 | #define EXTRACT_RB(op) (((op) >> 6) & 0x3f) | |
87 | #define EXTRACT_RC(op) (((op) & 0x3f) | |
88 | #define EXTRACT_UIMM6(op) ((op) & 0x3f) | |
89 | #define EXTRACT_IMM6(op) ((((int)EXTRACT_UIMM6(op)) << 26) >> 26) | |
90 | #define EXTRACT_IMM26(op) ((((op)&0x0ff00000) >> 2) | ((op)&0x0003ffff)) | |
91 | #define EXTRACT_IMM32(opl, opr) ((EXTRACT_UIMM6(opl) << 26)|EXTRACT_IMM26(opr)) | |
92 | ||
45a70ed6 SG |
93 | /* Discard from the stack the innermost frame, restoring all saved |
94 | registers. */ | |
95 | ||
96 | void | |
97 | d30v_pop_frame () | |
98 | { | |
99 | struct frame_info *frame = get_current_frame (); | |
100 | CORE_ADDR fp; | |
101 | int regnum; | |
102 | struct frame_saved_regs fsr; | |
103 | char raw_buffer[8]; | |
104 | ||
105 | fp = FRAME_FP (frame); | |
106 | if (frame->dummy) | |
107 | { | |
108 | d30v_pop_dummy_frame(frame); | |
109 | return; | |
110 | } | |
111 | ||
112 | /* fill out fsr with the address of where each */ | |
113 | /* register was stored in the frame */ | |
114 | get_frame_saved_regs (frame, &fsr); | |
115 | ||
116 | /* now update the current registers with the old values */ | |
117 | for (regnum = A0_REGNUM; regnum < A0_REGNUM+2 ; regnum++) | |
118 | { | |
119 | if (fsr.regs[regnum]) | |
120 | { | |
121 | read_memory (fsr.regs[regnum], raw_buffer, 8); | |
122 | write_register_bytes (REGISTER_BYTE (regnum), raw_buffer, 8); | |
123 | } | |
124 | } | |
125 | for (regnum = 0; regnum < SP_REGNUM; regnum++) | |
126 | { | |
127 | if (fsr.regs[regnum]) | |
128 | { | |
7359fb1d | 129 | write_register (regnum, read_memory_unsigned_integer (fsr.regs[regnum], 4)); |
45a70ed6 SG |
130 | } |
131 | } | |
132 | if (fsr.regs[PSW_REGNUM]) | |
133 | { | |
7359fb1d | 134 | write_register (PSW_REGNUM, read_memory_unsigned_integer (fsr.regs[PSW_REGNUM], 4)); |
45a70ed6 SG |
135 | } |
136 | ||
7359fb1d | 137 | write_register (PC_REGNUM, read_register(LR_REGNUM)); |
45a70ed6 SG |
138 | write_register (SP_REGNUM, fp + frame->size); |
139 | target_store_registers (-1); | |
140 | flush_cached_frames (); | |
141 | } | |
142 | ||
143 | static int | |
144 | check_prologue (op) | |
7359fb1d | 145 | unsigned long op; |
45a70ed6 | 146 | { |
7359fb1d DT |
147 | /* add sp,sp,imm -- observed */ |
148 | if ((op & OP_MASK_ALL_BUT_IMM) == OP_ADD_SP_IMM) | |
45a70ed6 SG |
149 | return 1; |
150 | ||
7359fb1d DT |
151 | /* add r22,sp,imm -- observed */ |
152 | if ((op & OP_MASK_ALL_BUT_IMM) == OP_ADD_R22_SP_IMM) | |
45a70ed6 SG |
153 | return 1; |
154 | ||
7359fb1d DT |
155 | /* or fp,r0,sp -- observed */ |
156 | if (op == OP_OR_FP_R0_SP) | |
45a70ed6 SG |
157 | return 1; |
158 | ||
7359fb1d DT |
159 | /* nop */ |
160 | if ((op & OP_MASK_OPCODE) == OP_NOP) | |
45a70ed6 SG |
161 | return 1; |
162 | ||
7359fb1d DT |
163 | /* stw Ra,@(sp,r0) */ |
164 | if ((op & OP_MASK_ALL_BUT_RA) == OP_STW_SP_R0) | |
45a70ed6 SG |
165 | return 1; |
166 | ||
7359fb1d DT |
167 | /* stw Ra,@(sp,0x0) */ |
168 | if ((op & OP_MASK_ALL_BUT_RA) == OP_STW_SP_IMM0) | |
45a70ed6 SG |
169 | return 1; |
170 | ||
7359fb1d DT |
171 | /* st2w Ra,@(sp,r0) */ |
172 | if ((op & OP_MASK_ALL_BUT_RA) == OP_ST2W_SP_R0) | |
173 | return 1; | |
174 | ||
175 | /* st2w Ra,@(sp,0x0) */ | |
176 | if ((op & OP_MASK_ALL_BUT_RA) == OP_ST2W_SP_IMM0) | |
177 | return 1; | |
178 | ||
179 | /* stw fp, @(r22+,r0) -- observed */ | |
180 | if (op == OP_STW_FP_R22P_R0) | |
181 | return 1; | |
182 | ||
183 | /* stw r62, @(r22+,r0) -- observed */ | |
184 | if (op == OP_STW_LR_R22P_R0) | |
185 | return 1; | |
186 | ||
187 | /* stw Ra, @(fp,r0) -- observed */ | |
188 | if ((op & OP_MASK_ALL_BUT_RA) == OP_STW_FP_R0) | |
189 | return 1; /* first arg */ | |
190 | ||
191 | /* stw Ra, @(fp,imm) -- observed */ | |
192 | if ((op & OP_MASK_OP_AND_RB) == OP_STW_FP_IMM) | |
193 | return 1; /* second and subsequent args */ | |
194 | ||
195 | /* stw fp,@(sp,imm) -- observed */ | |
196 | if ((op & OP_MASK_ALL_BUT_IMM) == OP_STW_FP_SP_IMM) | |
197 | return 1; | |
198 | ||
199 | /* st2w Ra,@(r22+,r0) */ | |
200 | if ((op & OP_MASK_ALL_BUT_RA) == OP_ST2W_R22P_R0) | |
45a70ed6 SG |
201 | return 1; |
202 | ||
7359fb1d DT |
203 | /* stw Ra, @(sp-) */ |
204 | if ((op & OP_MASK_ALL_BUT_RA) == OP_STW_SPM) | |
205 | return 1; | |
206 | ||
207 | /* st2w Ra, @(sp-) */ | |
208 | if ((op & OP_MASK_ALL_BUT_RA) == OP_ST2W_SPM) | |
209 | return 1; | |
210 | ||
211 | /* sub.? sp,sp,imm */ | |
212 | if ((op & OP_MASK_ALL_BUT_IMM) == OP_SUB_SP_IMM) | |
213 | return 1; | |
214 | ||
45a70ed6 SG |
215 | return 0; |
216 | } | |
217 | ||
218 | CORE_ADDR | |
219 | d30v_skip_prologue (pc) | |
220 | CORE_ADDR pc; | |
221 | { | |
7359fb1d DT |
222 | unsigned long op[2]; |
223 | unsigned long opl, opr; /* left / right sub operations */ | |
224 | unsigned long fm0, fm1; /* left / right mode bits */ | |
225 | unsigned long cc0, cc1; | |
226 | unsigned long op1, op2; | |
45a70ed6 SG |
227 | CORE_ADDR func_addr, func_end; |
228 | struct symtab_and_line sal; | |
229 | ||
230 | /* If we have line debugging information, then the end of the */ | |
231 | /* prologue should the first assembly instruction of the first source line */ | |
232 | if (find_pc_partial_function (pc, NULL, &func_addr, &func_end)) | |
233 | { | |
234 | sal = find_pc_line (func_addr, 0); | |
235 | if ( sal.end && sal.end < func_end) | |
236 | return sal.end; | |
237 | } | |
238 | ||
7359fb1d | 239 | if (target_read_memory (pc, (char *)&op[0], 8)) |
45a70ed6 SG |
240 | return pc; /* Can't access it -- assume no prologue. */ |
241 | ||
242 | while (1) | |
243 | { | |
7359fb1d DT |
244 | opl = (unsigned long)read_memory_integer (pc, 4); |
245 | opr = (unsigned long)read_memory_integer (pc+4, 4); | |
246 | ||
247 | fm0 = (opl & OP_MASK_FM_BIT); | |
248 | fm1 = (opr & OP_MASK_FM_BIT); | |
249 | ||
250 | cc0 = (opl & OP_MASK_CC_BITS); | |
251 | cc1 = (opr & OP_MASK_CC_BITS); | |
252 | ||
253 | opl = (opl & OP_MASK_SUB_INST); | |
254 | opr = (opr & OP_MASK_SUB_INST); | |
255 | ||
256 | if (fm0 && fm1) | |
45a70ed6 | 257 | { |
7359fb1d DT |
258 | /* long instruction (opl contains the opcode) */ |
259 | if (((opl & OP_MASK_ALL_BUT_IMM) != OP_ADD_SP_IMM) && /* add sp,sp,imm */ | |
260 | ((opl & OP_MASK_ALL_BUT_IMM) != OP_ADD_R22_SP_IMM) && /* add r22,sp,imm */ | |
261 | ((opl & OP_MASK_OP_AND_RB) != OP_STW_SP_IMM) && /* stw Ra, @(sp,imm) */ | |
262 | ((opl & OP_MASK_OP_AND_RB) != OP_ST2W_SP_IMM)) /* st2w Ra, @(sp,imm) */ | |
45a70ed6 SG |
263 | break; |
264 | } | |
265 | else | |
266 | { | |
267 | /* short instructions */ | |
7359fb1d | 268 | if (fm0 && !fm1) |
45a70ed6 | 269 | { |
7359fb1d DT |
270 | op1 = opr; |
271 | op2 = opl; | |
45a70ed6 SG |
272 | } |
273 | else | |
274 | { | |
7359fb1d DT |
275 | op1 = opl; |
276 | op2 = opr; | |
45a70ed6 SG |
277 | } |
278 | if (check_prologue(op1)) | |
279 | { | |
280 | if (!check_prologue(op2)) | |
281 | { | |
282 | /* if the previous opcode was really part of the prologue */ | |
283 | /* and not just a NOP, then we want to break after both instructions */ | |
7359fb1d DT |
284 | if ((op1 & OP_MASK_OPCODE) != OP_NOP) |
285 | pc += 8; | |
45a70ed6 SG |
286 | break; |
287 | } | |
288 | } | |
289 | else | |
290 | break; | |
291 | } | |
7359fb1d | 292 | pc += 8; |
45a70ed6 SG |
293 | } |
294 | return pc; | |
295 | } | |
296 | ||
36985eca DT |
297 | static int end_of_stack; |
298 | ||
45a70ed6 SG |
299 | /* Given a GDB frame, determine the address of the calling function's frame. |
300 | This will be used to create a new GDB frame struct, and then | |
301 | INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame. | |
302 | */ | |
303 | ||
304 | CORE_ADDR | |
305 | d30v_frame_chain (frame) | |
306 | struct frame_info *frame; | |
307 | { | |
308 | struct frame_saved_regs fsr; | |
309 | ||
310 | d30v_frame_find_saved_regs (frame, &fsr); | |
311 | ||
36985eca DT |
312 | if (end_of_stack) |
313 | return (CORE_ADDR)0; | |
314 | ||
45a70ed6 SG |
315 | if (frame->return_pc == IMEM_START) |
316 | return (CORE_ADDR)0; | |
317 | ||
318 | if (!fsr.regs[FP_REGNUM]) | |
319 | { | |
320 | if (!fsr.regs[SP_REGNUM] || fsr.regs[SP_REGNUM] == STACK_START) | |
321 | return (CORE_ADDR)0; | |
322 | ||
323 | return fsr.regs[SP_REGNUM]; | |
324 | } | |
325 | ||
7359fb1d | 326 | if (!read_memory_unsigned_integer(fsr.regs[FP_REGNUM],4)) |
45a70ed6 SG |
327 | return (CORE_ADDR)0; |
328 | ||
7ae2b433 | 329 | return read_memory_unsigned_integer(fsr.regs[FP_REGNUM],4); |
45a70ed6 SG |
330 | } |
331 | ||
332 | static int next_addr, uses_frame; | |
7359fb1d | 333 | static int frame_size; |
45a70ed6 SG |
334 | |
335 | static int | |
336 | prologue_find_regs (op, fsr, addr) | |
7359fb1d | 337 | unsigned long op; |
45a70ed6 SG |
338 | struct frame_saved_regs *fsr; |
339 | CORE_ADDR addr; | |
340 | { | |
341 | int n; | |
7359fb1d | 342 | int offset; |
45a70ed6 | 343 | |
7359fb1d DT |
344 | /* add sp,sp,imm -- observed */ |
345 | if ((op & OP_MASK_ALL_BUT_IMM) == OP_ADD_SP_IMM) | |
45a70ed6 | 346 | { |
7359fb1d DT |
347 | offset = EXTRACT_IMM6(op); |
348 | /*next_addr += offset;*/ | |
349 | frame_size += -offset; | |
45a70ed6 SG |
350 | return 1; |
351 | } | |
352 | ||
7359fb1d DT |
353 | /* add r22,sp,imm -- observed */ |
354 | if ((op & OP_MASK_ALL_BUT_IMM) == OP_ADD_R22_SP_IMM) | |
45a70ed6 | 355 | { |
7359fb1d DT |
356 | offset = EXTRACT_IMM6(op); |
357 | next_addr = (offset - frame_size); | |
358 | return 1; | |
359 | } | |
360 | ||
361 | /* stw Ra, @(fp, offset) -- observed */ | |
362 | if ((op & OP_MASK_OP_AND_RB) == OP_STW_FP_IMM) | |
363 | { | |
364 | n = EXTRACT_RA(op); | |
365 | offset = EXTRACT_IMM6(op); | |
366 | fsr->regs[n] = (offset - frame_size); | |
45a70ed6 SG |
367 | return 1; |
368 | } | |
369 | ||
7359fb1d DT |
370 | /* stw Ra, @(fp, r0) -- observed */ |
371 | if ((op & OP_MASK_ALL_BUT_RA) == OP_STW_FP_R0) | |
45a70ed6 | 372 | { |
7359fb1d DT |
373 | n = EXTRACT_RA(op); |
374 | fsr->regs[n] = (- frame_size); | |
45a70ed6 SG |
375 | return 1; |
376 | } | |
377 | ||
7359fb1d DT |
378 | /* or fp,0,sp -- observed */ |
379 | if ((op == OP_OR_FP_R0_SP) || | |
380 | (op == OP_OR_FP_SP_R0) || | |
381 | (op == OP_OR_FP_IMM0_SP)) | |
45a70ed6 SG |
382 | { |
383 | uses_frame = 1; | |
384 | return 1; | |
385 | } | |
386 | ||
387 | /* nop */ | |
7359fb1d | 388 | if ((op & OP_MASK_OPCODE) == OP_NOP) |
45a70ed6 SG |
389 | return 1; |
390 | ||
7359fb1d DT |
391 | /* stw Ra,@(r22+,r0) -- observed */ |
392 | if ((op & OP_MASK_ALL_BUT_RA) == OP_STW_R22P_R0) | |
393 | { | |
394 | n = EXTRACT_RA(op); | |
395 | fsr->regs[n] = next_addr; | |
396 | next_addr += 4; | |
397 | return 1; | |
398 | } | |
399 | #if 0 /* subsumed in pattern above */ | |
400 | /* stw fp,@(r22+,r0) -- observed */ | |
401 | if (op == OP_STW_FP_R22P_R0) | |
402 | { | |
403 | fsr->regs[FP_REGNUM] = next_addr; /* XXX */ | |
404 | next_addr += 4; | |
405 | return 1; | |
406 | } | |
407 | ||
408 | /* stw r62,@(r22+,r0) -- observed */ | |
409 | if (op == OP_STW_LR_R22P_R0) | |
410 | { | |
411 | fsr->regs[LR_REGNUM] = next_addr; | |
412 | next_addr += 4; | |
413 | return 1; | |
414 | } | |
415 | #endif | |
416 | /* st2w Ra,@(r22+,r0) -- observed */ | |
417 | if ((op & OP_MASK_ALL_BUT_RA) == OP_ST2W_R22P_R0) | |
418 | { | |
419 | n = EXTRACT_RA(op); | |
420 | fsr->regs[n] = next_addr; | |
421 | fsr->regs[n+1] = next_addr + 4; | |
422 | next_addr += 8; | |
423 | return 1; | |
424 | } | |
425 | ||
426 | /* stw rn, @(sp-) */ | |
427 | if ((op & OP_MASK_ALL_BUT_RA) == OP_STW_SPM) | |
428 | { | |
429 | n = EXTRACT_RA(op); | |
430 | fsr->regs[n] = next_addr; | |
431 | next_addr -= 4; | |
432 | return 1; | |
433 | } | |
434 | ||
435 | /* st2w Ra, @(sp-) */ | |
436 | else if ((op & OP_MASK_ALL_BUT_RA) == OP_ST2W_SPM) | |
45a70ed6 | 437 | { |
7359fb1d | 438 | n = EXTRACT_RA(op); |
45a70ed6 | 439 | fsr->regs[n] = next_addr; |
7359fb1d DT |
440 | fsr->regs[n+1] = next_addr+4; |
441 | next_addr -= 8; | |
442 | return 1; | |
443 | } | |
444 | ||
445 | /* sub sp,sp,imm */ | |
446 | if ((op & OP_MASK_ALL_BUT_IMM) == OP_SUB_SP_IMM) | |
447 | { | |
448 | offset = EXTRACT_IMM6(op); | |
7ae2b433 | 449 | frame_size += -offset; |
45a70ed6 SG |
450 | return 1; |
451 | } | |
452 | ||
7ae2b433 | 453 | /* st rn, @(sp,0) -- observed */ |
7359fb1d DT |
454 | if (((op & OP_MASK_ALL_BUT_RA) == OP_STW_SP_R0) || |
455 | ((op & OP_MASK_ALL_BUT_RA) == OP_STW_SP_IMM0)) | |
45a70ed6 | 456 | { |
7359fb1d | 457 | n = EXTRACT_RA(op); |
7ae2b433 | 458 | fsr->regs[n] = (- frame_size); |
7359fb1d DT |
459 | return 1; |
460 | } | |
461 | ||
462 | /* st2w rn, @(sp,0) */ | |
463 | if (((op & OP_MASK_ALL_BUT_RA) == OP_ST2W_SP_R0) || | |
464 | ((op & OP_MASK_ALL_BUT_RA) == OP_ST2W_SP_IMM0)) | |
465 | { | |
466 | n = EXTRACT_RA(op); | |
7ae2b433 DT |
467 | fsr->regs[n] = (- frame_size); |
468 | fsr->regs[n+1] = (- frame_size) + 4; | |
45a70ed6 SG |
469 | return 1; |
470 | } | |
471 | ||
36985eca DT |
472 | /* stw fp,@(sp,imm) -- observed */ |
473 | if ((op & OP_MASK_ALL_BUT_IMM) == OP_STW_FP_SP_IMM) | |
474 | { | |
475 | offset = EXTRACT_IMM6(op); | |
476 | fsr->regs[FP_REGNUM] = (offset - frame_size); | |
477 | return 1; | |
478 | } | |
45a70ed6 SG |
479 | return 0; |
480 | } | |
481 | ||
482 | /* Put here the code to store, into a struct frame_saved_regs, the | |
483 | addresses of the saved registers of frame described by FRAME_INFO. | |
484 | This includes special registers such as pc and fp saved in special | |
485 | ways in the stack frame. sp is even more special: the address we | |
486 | return for it IS the sp for the next frame. */ | |
487 | void | |
488 | d30v_frame_find_saved_regs (fi, fsr) | |
489 | struct frame_info *fi; | |
490 | struct frame_saved_regs *fsr; | |
491 | { | |
492 | CORE_ADDR fp, pc; | |
7359fb1d DT |
493 | unsigned long opl, opr; |
494 | unsigned long op1, op2; | |
495 | unsigned long fm0, fm1; | |
45a70ed6 SG |
496 | int i; |
497 | ||
498 | fp = fi->frame; | |
499 | memset (fsr, 0, sizeof (*fsr)); | |
500 | next_addr = 0; | |
7359fb1d | 501 | frame_size = 0; |
36985eca | 502 | end_of_stack = 0; |
45a70ed6 SG |
503 | |
504 | pc = get_pc_function_start (fi->pc); | |
505 | ||
506 | uses_frame = 0; | |
7ae2b433 | 507 | while (pc < fi->pc) |
45a70ed6 | 508 | { |
7359fb1d DT |
509 | opl = (unsigned long)read_memory_integer (pc, 4); |
510 | opr = (unsigned long)read_memory_integer (pc+4, 4); | |
511 | ||
512 | fm0 = (opl & OP_MASK_FM_BIT); | |
513 | fm1 = (opr & OP_MASK_FM_BIT); | |
514 | ||
515 | opl = (opl & OP_MASK_SUB_INST); | |
516 | opr = (opr & OP_MASK_SUB_INST); | |
517 | ||
518 | if (fm0 && fm1) | |
45a70ed6 SG |
519 | { |
520 | /* long instruction */ | |
7359fb1d DT |
521 | if ((opl & OP_MASK_ALL_BUT_IMM) == OP_ADD_SP_IMM) |
522 | { | |
523 | /* add sp,sp,n */ | |
524 | long offset = EXTRACT_IMM32(opl, opr); | |
525 | frame_size += -offset; | |
526 | } | |
527 | else if ((opl & OP_MASK_ALL_BUT_IMM) == OP_ADD_R22_SP_IMM) | |
45a70ed6 | 528 | { |
7359fb1d DT |
529 | /* add r22,sp,offset */ |
530 | long offset = EXTRACT_IMM32(opl,opr); | |
531 | next_addr = (offset - frame_size); | |
45a70ed6 | 532 | } |
7359fb1d | 533 | else if ((opl & OP_MASK_OP_AND_RB) == OP_STW_SP_IMM) |
45a70ed6 | 534 | { |
7359fb1d DT |
535 | /* st Ra, @(sp,imm) */ |
536 | long offset = EXTRACT_IMM32(opl, opr); | |
537 | short n = EXTRACT_RA(opl); | |
538 | fsr->regs[n] = (offset - frame_size); | |
45a70ed6 | 539 | } |
7359fb1d | 540 | else if ((opl & OP_MASK_OP_AND_RB) == OP_ST2W_SP_IMM) |
45a70ed6 | 541 | { |
7359fb1d DT |
542 | /* st2w Ra, @(sp,offset) */ |
543 | long offset = EXTRACT_IMM32(opl, opr); | |
544 | short n = EXTRACT_RA(opl); | |
545 | fsr->regs[n] = (offset - frame_size); | |
546 | fsr->regs[n+1] = (offset - frame_size) + 4; | |
45a70ed6 | 547 | } |
36985eca DT |
548 | else if ((opl & OP_MASK_ALL_BUT_IMM) == OP_OR_SP_R0_IMM) |
549 | { | |
550 | end_of_stack = 1; | |
551 | } | |
45a70ed6 SG |
552 | else |
553 | break; | |
554 | } | |
555 | else | |
556 | { | |
557 | /* short instructions */ | |
7359fb1d | 558 | if (fm0 && !fm1) |
45a70ed6 | 559 | { |
7359fb1d DT |
560 | op2 = opl; |
561 | op1 = opr; | |
45a70ed6 SG |
562 | } |
563 | else | |
564 | { | |
7359fb1d DT |
565 | op1 = opl; |
566 | op2 = opr; | |
45a70ed6 SG |
567 | } |
568 | if (!prologue_find_regs(op1,fsr,pc) || !prologue_find_regs(op2,fsr,pc)) | |
569 | break; | |
570 | } | |
7359fb1d | 571 | pc += 8; |
45a70ed6 SG |
572 | } |
573 | ||
7359fb1d | 574 | fi->size = frame_size; |
7359fb1d | 575 | #if 0 |
36985eca DT |
576 | if (!fp || !uses_frame) |
577 | fp = read_register(SP_REGNUM); | |
7359fb1d | 578 | #else |
36985eca | 579 | if (!fp) |
7359fb1d DT |
580 | fp = read_register(SP_REGNUM); |
581 | #endif | |
45a70ed6 SG |
582 | for (i=0; i<NUM_REGS-1; i++) |
583 | if (fsr->regs[i]) | |
584 | { | |
7359fb1d | 585 | fsr->regs[i] = fsr->regs[i] + fp + frame_size; |
45a70ed6 SG |
586 | } |
587 | ||
588 | if (fsr->regs[LR_REGNUM]) | |
7359fb1d | 589 | fi->return_pc = read_memory_unsigned_integer(fsr->regs[LR_REGNUM],4); |
45a70ed6 | 590 | else |
7359fb1d | 591 | fi->return_pc = read_register(LR_REGNUM); |
45a70ed6 | 592 | |
7ae2b433 | 593 | /* the SP is not normally (ever?) saved, but check anyway */ |
45a70ed6 SG |
594 | if (!fsr->regs[SP_REGNUM]) |
595 | { | |
596 | /* if the FP was saved, that means the current FP is valid, */ | |
597 | /* otherwise, it isn't being used, so we use the SP instead */ | |
598 | if (uses_frame) | |
599 | fsr->regs[SP_REGNUM] = read_register(FP_REGNUM) + fi->size; | |
600 | else | |
601 | { | |
602 | fsr->regs[SP_REGNUM] = fp + fi->size; | |
603 | fi->frameless = 1; | |
604 | fsr->regs[FP_REGNUM] = 0; | |
605 | } | |
606 | } | |
607 | } | |
608 | ||
609 | void | |
610 | d30v_init_extra_frame_info (fromleaf, fi) | |
611 | int fromleaf; | |
612 | struct frame_info *fi; | |
613 | { | |
614 | struct frame_saved_regs dummy; | |
615 | ||
7359fb1d | 616 | if (fi->next && (fi->pc == 0)) |
45a70ed6 SG |
617 | fi->pc = fi->next->return_pc; |
618 | ||
619 | d30v_frame_find_saved_regs (fi, &dummy); | |
620 | } | |
621 | ||
7359fb1d DT |
622 | void |
623 | d30v_init_frame_pc (fromleaf, prev) | |
624 | int fromleaf; | |
625 | struct frame_info *prev; | |
626 | { | |
627 | /* default value, put here so we can breakpoint on it and | |
628 | see if the default value is really the right thing to use */ | |
629 | prev->pc = (fromleaf ? SAVED_PC_AFTER_CALL (prev->next) : \ | |
630 | prev->next ? FRAME_SAVED_PC (prev->next) : read_pc ()); | |
631 | } | |
632 | ||
45a70ed6 SG |
633 | static void d30v_print_register PARAMS ((int regnum, int tabular)); |
634 | ||
635 | static void | |
636 | d30v_print_register (regnum, tabular) | |
637 | int regnum; | |
638 | int tabular; | |
639 | { | |
640 | if (regnum < A0_REGNUM) | |
641 | { | |
642 | if (tabular) | |
643 | printf_filtered ("%08x", read_register (regnum)); | |
644 | else | |
645 | printf_filtered ("0x%x %d", read_register (regnum), | |
646 | read_register (regnum)); | |
647 | } | |
648 | else | |
649 | { | |
650 | char regbuf[MAX_REGISTER_RAW_SIZE]; | |
651 | ||
652 | read_relative_register_raw_bytes (regnum, regbuf); | |
653 | ||
654 | val_print (REGISTER_VIRTUAL_TYPE (regnum), regbuf, 0, | |
655 | gdb_stdout, 'x', 1, 0, Val_pretty_default); | |
656 | ||
657 | if (!tabular) | |
658 | { | |
659 | printf_filtered (" "); | |
660 | val_print (REGISTER_VIRTUAL_TYPE (regnum), regbuf, 0, | |
661 | gdb_stdout, 'd', 1, 0, Val_pretty_default); | |
662 | } | |
663 | } | |
664 | } | |
665 | ||
5d62f957 MM |
666 | static void |
667 | d30v_print_flags () | |
668 | { | |
669 | long psw = read_register (PSW_REGNUM); | |
670 | printf_filtered ("flags #1"); | |
671 | printf_filtered (" (sm) %d", (psw & PSW_SM) != 0); | |
672 | printf_filtered (" (ea) %d", (psw & PSW_EA) != 0); | |
673 | printf_filtered (" (db) %d", (psw & PSW_DB) != 0); | |
674 | printf_filtered (" (ds) %d", (psw & PSW_DS) != 0); | |
675 | printf_filtered (" (ie) %d", (psw & PSW_IE) != 0); | |
676 | printf_filtered (" (rp) %d", (psw & PSW_RP) != 0); | |
677 | printf_filtered (" (md) %d\n", (psw & PSW_MD) != 0); | |
678 | ||
679 | printf_filtered ("flags #2"); | |
680 | printf_filtered (" (f0) %d", (psw & PSW_F0) != 0); | |
681 | printf_filtered (" (f1) %d", (psw & PSW_F1) != 0); | |
682 | printf_filtered (" (f2) %d", (psw & PSW_F2) != 0); | |
683 | printf_filtered (" (f3) %d", (psw & PSW_F3) != 0); | |
684 | printf_filtered (" (s) %d", (psw & PSW_S) != 0); | |
685 | printf_filtered (" (v) %d", (psw & PSW_V) != 0); | |
686 | printf_filtered (" (va) %d", (psw & PSW_VA) != 0); | |
687 | printf_filtered (" (c) %d\n", (psw & PSW_C) != 0); | |
688 | } | |
689 | ||
690 | static void | |
691 | print_flags_command (args, from_tty) | |
692 | char *args; | |
693 | int from_tty; | |
694 | { | |
695 | d30v_print_flags (); | |
696 | } | |
697 | ||
45a70ed6 SG |
698 | void |
699 | d30v_do_registers_info (regnum, fpregs) | |
700 | int regnum; | |
701 | int fpregs; | |
702 | { | |
703 | long long num1, num2; | |
5d62f957 | 704 | long psw; |
45a70ed6 SG |
705 | |
706 | if (regnum != -1) | |
707 | { | |
708 | if (reg_names[0] == NULL || reg_names[0][0] == '\000') | |
709 | return; | |
710 | ||
711 | printf_filtered ("%s ", reg_names[regnum]); | |
712 | d30v_print_register (regnum, 0); | |
713 | ||
714 | printf_filtered ("\n"); | |
715 | return; | |
716 | } | |
717 | ||
718 | /* Have to print all the registers. Format them nicely. */ | |
719 | ||
720 | printf_filtered ("PC="); | |
721 | print_address (read_pc (), gdb_stdout); | |
722 | ||
723 | printf_filtered (" PSW="); | |
724 | d30v_print_register (PSW_REGNUM, 1); | |
725 | ||
726 | printf_filtered (" BPC="); | |
727 | print_address (read_register (BPC_REGNUM), gdb_stdout); | |
728 | ||
729 | printf_filtered (" BPSW="); | |
730 | d30v_print_register (BPSW_REGNUM, 1); | |
731 | printf_filtered ("\n"); | |
732 | ||
733 | printf_filtered ("DPC="); | |
734 | print_address (read_register (DPC_REGNUM), gdb_stdout); | |
735 | ||
736 | printf_filtered (" DPSW="); | |
737 | d30v_print_register (DPSW_REGNUM, 1); | |
738 | ||
739 | printf_filtered (" IBA="); | |
740 | print_address (read_register (IBA_REGNUM), gdb_stdout); | |
741 | printf_filtered ("\n"); | |
742 | ||
743 | printf_filtered ("RPT_C="); | |
744 | d30v_print_register (RPT_C_REGNUM, 1); | |
745 | ||
746 | printf_filtered (" RPT_S="); | |
747 | print_address (read_register (RPT_S_REGNUM), gdb_stdout); | |
748 | ||
749 | printf_filtered (" RPT_E="); | |
750 | print_address (read_register (RPT_E_REGNUM), gdb_stdout); | |
751 | printf_filtered ("\n"); | |
752 | ||
753 | printf_filtered ("MOD_S="); | |
754 | print_address (read_register (MOD_S_REGNUM), gdb_stdout); | |
755 | ||
756 | printf_filtered (" MOD_E="); | |
757 | print_address (read_register (MOD_E_REGNUM), gdb_stdout); | |
758 | printf_filtered ("\n"); | |
759 | ||
760 | printf_filtered ("EIT_VB="); | |
761 | print_address (read_register (EIT_VB_REGNUM), gdb_stdout); | |
762 | ||
763 | printf_filtered (" INT_S="); | |
764 | d30v_print_register (INT_S_REGNUM, 1); | |
765 | ||
766 | printf_filtered (" INT_M="); | |
767 | d30v_print_register (INT_M_REGNUM, 1); | |
768 | printf_filtered ("\n"); | |
769 | ||
5d62f957 | 770 | d30v_print_flags (); |
45a70ed6 SG |
771 | for (regnum = 0; regnum <= 63;) |
772 | { | |
773 | int i; | |
774 | ||
775 | printf_filtered ("R%d-R%d ", regnum, regnum + 7); | |
776 | if (regnum < 10) | |
777 | printf_filtered (" "); | |
778 | if (regnum + 7 < 10) | |
779 | printf_filtered (" "); | |
780 | ||
781 | for (i = 0; i < 8; i++) | |
782 | { | |
783 | printf_filtered (" "); | |
784 | d30v_print_register (regnum++, 1); | |
785 | } | |
786 | ||
787 | printf_filtered ("\n"); | |
788 | } | |
789 | ||
790 | printf_filtered ("A0-A1 "); | |
791 | ||
792 | d30v_print_register (A0_REGNUM, 1); | |
793 | printf_filtered (" "); | |
794 | d30v_print_register (A1_REGNUM, 1); | |
795 | printf_filtered ("\n"); | |
796 | } | |
797 | ||
798 | CORE_ADDR | |
799 | d30v_fix_call_dummy (dummyname, start_sp, fun, nargs, args, type, gcc_p) | |
800 | char *dummyname; | |
801 | CORE_ADDR start_sp; | |
802 | CORE_ADDR fun; | |
803 | int nargs; | |
804 | value_ptr *args; | |
805 | struct type *type; | |
806 | int gcc_p; | |
807 | { | |
808 | int regnum; | |
809 | CORE_ADDR sp; | |
810 | char buffer[MAX_REGISTER_RAW_SIZE]; | |
811 | struct frame_info *frame = get_current_frame (); | |
812 | frame->dummy = start_sp; | |
7359fb1d | 813 | /*start_sp |= DMEM_START;*/ |
45a70ed6 SG |
814 | |
815 | sp = start_sp; | |
816 | for (regnum = 0; regnum < NUM_REGS; regnum++) | |
817 | { | |
818 | sp -= REGISTER_RAW_SIZE(regnum); | |
819 | store_address (buffer, REGISTER_RAW_SIZE(regnum), read_register(regnum)); | |
820 | write_memory (sp, buffer, REGISTER_RAW_SIZE(regnum)); | |
821 | } | |
7359fb1d | 822 | write_register (SP_REGNUM, (LONGEST)sp); |
45a70ed6 | 823 | /* now we need to load LR with the return address */ |
7359fb1d | 824 | write_register (LR_REGNUM, (LONGEST)d30v_call_dummy_address()); |
45a70ed6 SG |
825 | return sp; |
826 | } | |
827 | ||
828 | static void | |
829 | d30v_pop_dummy_frame (fi) | |
830 | struct frame_info *fi; | |
831 | { | |
832 | CORE_ADDR sp = fi->dummy; | |
833 | int regnum; | |
834 | ||
835 | for (regnum = 0; regnum < NUM_REGS; regnum++) | |
836 | { | |
837 | sp -= REGISTER_RAW_SIZE(regnum); | |
838 | write_register(regnum, read_memory_unsigned_integer (sp, REGISTER_RAW_SIZE(regnum))); | |
839 | } | |
840 | flush_cached_frames (); /* needed? */ | |
841 | } | |
842 | ||
843 | ||
844 | CORE_ADDR | |
845 | d30v_push_arguments (nargs, args, sp, struct_return, struct_addr) | |
846 | int nargs; | |
847 | value_ptr *args; | |
848 | CORE_ADDR sp; | |
849 | int struct_return; | |
850 | CORE_ADDR struct_addr; | |
851 | { | |
852 | int i, len, index=0, regnum=2; | |
853 | char buffer[4], *contents; | |
854 | LONGEST val; | |
855 | CORE_ADDR ptrs[10]; | |
856 | ||
7359fb1d | 857 | #if 0 |
45a70ed6 SG |
858 | /* Pass 1. Put all large args on stack */ |
859 | for (i = 0; i < nargs; i++) | |
860 | { | |
861 | value_ptr arg = args[i]; | |
862 | struct type *arg_type = check_typedef (VALUE_TYPE (arg)); | |
863 | len = TYPE_LENGTH (arg_type); | |
864 | contents = VALUE_CONTENTS(arg); | |
865 | val = extract_signed_integer (contents, len); | |
866 | if (len > 4) | |
867 | { | |
868 | /* put on stack and pass pointers */ | |
869 | sp -= len; | |
870 | write_memory (sp, contents, len); | |
871 | ptrs[index++] = sp; | |
872 | } | |
873 | } | |
7359fb1d | 874 | #endif |
45a70ed6 SG |
875 | index = 0; |
876 | ||
877 | for (i = 0; i < nargs; i++) | |
878 | { | |
879 | value_ptr arg = args[i]; | |
880 | struct type *arg_type = check_typedef (VALUE_TYPE (arg)); | |
881 | len = TYPE_LENGTH (arg_type); | |
882 | contents = VALUE_CONTENTS(arg); | |
45a70ed6 SG |
883 | if (len > 4) |
884 | { | |
7359fb1d DT |
885 | /* we need multiple registers */ |
886 | int ndx; | |
887 | ||
7ae2b433 | 888 | for (ndx = 0; len > 0; ndx += 8, len -= 8) |
45a70ed6 | 889 | { |
7ae2b433 DT |
890 | if (regnum & 1) |
891 | regnum++; /* all args > 4 bytes start in even register */ | |
892 | ||
7359fb1d DT |
893 | if (regnum < 18) |
894 | { | |
7ae2b433 DT |
895 | val = extract_signed_integer (&contents[ndx], 4); |
896 | write_register (regnum++, val); | |
7359fb1d | 897 | |
7ae2b433 DT |
898 | if (len >= 8) |
899 | val = extract_signed_integer (&contents[ndx+4], 4); | |
900 | else | |
901 | val = extract_signed_integer (&contents[ndx+4], len-4); | |
7359fb1d DT |
902 | write_register (regnum++, val); |
903 | } | |
904 | else | |
905 | { | |
906 | /* no more registers available. put it on the stack */ | |
7ae2b433 DT |
907 | |
908 | /* all args > 4 bytes are padded to a multiple of 8 bytes | |
909 | and start on an 8 byte boundary */ | |
910 | if (sp & 7) | |
911 | sp -= (sp & 7); /* align it */ | |
912 | ||
913 | sp -= ((len + 7) & ~7); /* allocate space */ | |
7359fb1d DT |
914 | write_memory (sp, &contents[ndx], len); |
915 | break; | |
916 | } | |
45a70ed6 SG |
917 | } |
918 | } | |
919 | else | |
920 | { | |
7359fb1d | 921 | if (regnum < 18 ) |
45a70ed6 | 922 | { |
7ae2b433 | 923 | val = extract_signed_integer (contents, len); |
7359fb1d | 924 | write_register (regnum++, val); |
45a70ed6 SG |
925 | } |
926 | else | |
927 | { | |
7ae2b433 DT |
928 | /* all args are padded to a multiple of 4 bytes (at least) */ |
929 | sp -= ((len + 3) & ~3); | |
930 | write_memory (sp, contents, len); | |
45a70ed6 SG |
931 | } |
932 | } | |
933 | } | |
7ae2b433 DT |
934 | if (sp & 7) |
935 | /* stack pointer is not on an 8 byte boundary -- align it */ | |
936 | sp -= (sp & 7); | |
45a70ed6 SG |
937 | return sp; |
938 | } | |
939 | ||
940 | ||
941 | /* pick an out-of-the-way place to set the return value */ | |
942 | /* for an inferior function call. The link register is set to this */ | |
943 | /* value and a momentary breakpoint is set there. When the breakpoint */ | |
944 | /* is hit, the dummy frame is popped and the previous environment is */ | |
945 | /* restored. */ | |
946 | ||
947 | CORE_ADDR | |
948 | d30v_call_dummy_address () | |
949 | { | |
950 | CORE_ADDR entry; | |
951 | struct minimal_symbol *sym; | |
952 | ||
953 | entry = entry_point_address (); | |
954 | ||
955 | if (entry != 0) | |
956 | return entry; | |
957 | ||
958 | sym = lookup_minimal_symbol ("_start", NULL, symfile_objfile); | |
959 | ||
960 | if (!sym || MSYMBOL_TYPE (sym) != mst_text) | |
961 | return 0; | |
962 | else | |
963 | return SYMBOL_VALUE_ADDRESS (sym); | |
964 | } | |
965 | ||
966 | /* Given a return value in `regbuf' with a type `valtype', | |
967 | extract and copy its value into `valbuf'. */ | |
968 | ||
969 | void | |
970 | d30v_extract_return_value (valtype, regbuf, valbuf) | |
971 | struct type *valtype; | |
972 | char regbuf[REGISTER_BYTES]; | |
973 | char *valbuf; | |
974 | { | |
975 | memcpy (valbuf, regbuf + REGISTER_BYTE (2), TYPE_LENGTH (valtype)); | |
976 | } | |
977 | ||
978 | /* The following code implements access to, and display of, the D30V's | |
979 | instruction trace buffer. The buffer consists of 64K or more | |
980 | 4-byte words of data, of which each words includes an 8-bit count, | |
981 | an 8-bit segment number, and a 16-bit instruction address. | |
982 | ||
983 | In theory, the trace buffer is continuously capturing instruction | |
984 | data that the CPU presents on its "debug bus", but in practice, the | |
985 | ROMified GDB stub only enables tracing when it continues or steps | |
986 | the program, and stops tracing when the program stops; so it | |
987 | actually works for GDB to read the buffer counter out of memory and | |
988 | then read each trace word. The counter records where the tracing | |
989 | stops, but there is no record of where it started, so we remember | |
990 | the PC when we resumed and then search backwards in the trace | |
991 | buffer for a word that includes that address. This is not perfect, | |
992 | because you will miss trace data if the resumption PC is the target | |
993 | of a branch. (The value of the buffer counter is semi-random, any | |
994 | trace data from a previous program stop is gone.) */ | |
995 | ||
996 | /* The address of the last word recorded in the trace buffer. */ | |
997 | ||
998 | #define DBBC_ADDR (0xd80000) | |
999 | ||
1000 | /* The base of the trace buffer, at least for the "Board_0". */ | |
1001 | ||
1002 | #define TRACE_BUFFER_BASE (0xf40000) | |
1003 | ||
1004 | static void trace_command PARAMS ((char *, int)); | |
1005 | ||
1006 | static void untrace_command PARAMS ((char *, int)); | |
1007 | ||
1008 | static void trace_info PARAMS ((char *, int)); | |
1009 | ||
1010 | static void tdisassemble_command PARAMS ((char *, int)); | |
1011 | ||
1012 | static void display_trace PARAMS ((int, int)); | |
1013 | ||
1014 | /* True when instruction traces are being collected. */ | |
1015 | ||
1016 | static int tracing; | |
1017 | ||
1018 | /* Remembered PC. */ | |
1019 | ||
1020 | static CORE_ADDR last_pc; | |
1021 | ||
1022 | /* True when trace output should be displayed whenever program stops. */ | |
1023 | ||
1024 | static int trace_display; | |
1025 | ||
1026 | /* True when trace listing should include source lines. */ | |
1027 | ||
1028 | static int default_trace_show_source = 1; | |
1029 | ||
1030 | struct trace_buffer { | |
1031 | int size; | |
1032 | short *counts; | |
1033 | CORE_ADDR *addrs; | |
1034 | } trace_data; | |
1035 | ||
1036 | static void | |
1037 | trace_command (args, from_tty) | |
1038 | char *args; | |
1039 | int from_tty; | |
1040 | { | |
1041 | /* Clear the host-side trace buffer, allocating space if needed. */ | |
1042 | trace_data.size = 0; | |
1043 | if (trace_data.counts == NULL) | |
1044 | trace_data.counts = (short *) xmalloc (65536 * sizeof(short)); | |
1045 | if (trace_data.addrs == NULL) | |
1046 | trace_data.addrs = (CORE_ADDR *) xmalloc (65536 * sizeof(CORE_ADDR)); | |
1047 | ||
1048 | tracing = 1; | |
1049 | ||
1050 | printf_filtered ("Tracing is now on.\n"); | |
1051 | } | |
1052 | ||
1053 | static void | |
1054 | untrace_command (args, from_tty) | |
1055 | char *args; | |
1056 | int from_tty; | |
1057 | { | |
1058 | tracing = 0; | |
1059 | ||
1060 | printf_filtered ("Tracing is now off.\n"); | |
1061 | } | |
1062 | ||
1063 | static void | |
1064 | trace_info (args, from_tty) | |
1065 | char *args; | |
1066 | int from_tty; | |
1067 | { | |
1068 | int i; | |
1069 | ||
1070 | if (trace_data.size) | |
1071 | { | |
1072 | printf_filtered ("%d entries in trace buffer:\n", trace_data.size); | |
1073 | ||
1074 | for (i = 0; i < trace_data.size; ++i) | |
1075 | { | |
1076 | printf_filtered ("%d: %d instruction%s at 0x%x\n", | |
1077 | i, trace_data.counts[i], | |
1078 | (trace_data.counts[i] == 1 ? "" : "s"), | |
1079 | trace_data.addrs[i]); | |
1080 | } | |
1081 | } | |
1082 | else | |
1083 | printf_filtered ("No entries in trace buffer.\n"); | |
1084 | ||
1085 | printf_filtered ("Tracing is currently %s.\n", (tracing ? "on" : "off")); | |
1086 | } | |
1087 | ||
1088 | /* Print the instruction at address MEMADDR in debugged memory, | |
1089 | on STREAM. Returns length of the instruction, in bytes. */ | |
1090 | ||
1091 | static int | |
1092 | print_insn (memaddr, stream) | |
1093 | CORE_ADDR memaddr; | |
1094 | GDB_FILE *stream; | |
1095 | { | |
1096 | /* If there's no disassembler, something is very wrong. */ | |
1097 | if (tm_print_insn == NULL) | |
1098 | abort (); | |
1099 | ||
1100 | if (TARGET_BYTE_ORDER == BIG_ENDIAN) | |
1101 | tm_print_insn_info.endian = BFD_ENDIAN_BIG; | |
1102 | else | |
1103 | tm_print_insn_info.endian = BFD_ENDIAN_LITTLE; | |
1104 | return (*tm_print_insn) (memaddr, &tm_print_insn_info); | |
1105 | } | |
1106 | ||
1107 | void | |
1108 | d30v_eva_prepare_to_trace () | |
1109 | { | |
1110 | if (!tracing) | |
1111 | return; | |
1112 | ||
1113 | last_pc = read_register (PC_REGNUM); | |
1114 | } | |
1115 | ||
1116 | /* Collect trace data from the target board and format it into a form | |
1117 | more useful for display. */ | |
1118 | ||
1119 | void | |
1120 | d30v_eva_get_trace_data () | |
1121 | { | |
1122 | int count, i, j, oldsize; | |
1123 | int trace_addr, trace_seg, trace_cnt, next_cnt; | |
1124 | unsigned int last_trace, trace_word, next_word; | |
1125 | unsigned int *tmpspace; | |
1126 | ||
1127 | if (!tracing) | |
1128 | return; | |
1129 | ||
1130 | tmpspace = xmalloc (65536 * sizeof(unsigned int)); | |
1131 | ||
1132 | last_trace = read_memory_unsigned_integer (DBBC_ADDR, 2) << 2; | |
1133 | ||
1134 | /* Collect buffer contents from the target, stopping when we reach | |
1135 | the word recorded when execution resumed. */ | |
1136 | ||
1137 | count = 0; | |
1138 | while (last_trace > 0) | |
1139 | { | |
1140 | QUIT; | |
1141 | trace_word = | |
1142 | read_memory_unsigned_integer (TRACE_BUFFER_BASE + last_trace, 4); | |
1143 | trace_addr = trace_word & 0xffff; | |
1144 | last_trace -= 4; | |
1145 | /* Ignore an apparently nonsensical entry. */ | |
1146 | if (trace_addr == 0xffd5) | |
1147 | continue; | |
1148 | tmpspace[count++] = trace_word; | |
1149 | if (trace_addr == last_pc) | |
1150 | break; | |
1151 | if (count > 65535) | |
1152 | break; | |
1153 | } | |
1154 | ||
1155 | /* Move the data to the host-side trace buffer, adjusting counts to | |
1156 | include the last instruction executed and transforming the address | |
1157 | into something that GDB likes. */ | |
1158 | ||
1159 | for (i = 0; i < count; ++i) | |
1160 | { | |
1161 | trace_word = tmpspace[i]; | |
1162 | next_word = ((i == 0) ? 0 : tmpspace[i - 1]); | |
1163 | trace_addr = trace_word & 0xffff; | |
1164 | next_cnt = (next_word >> 24) & 0xff; | |
1165 | j = trace_data.size + count - i - 1; | |
1166 | trace_data.addrs[j] = (trace_addr << 2) + 0x1000000; | |
1167 | trace_data.counts[j] = next_cnt + 1; | |
1168 | } | |
1169 | ||
1170 | oldsize = trace_data.size; | |
1171 | trace_data.size += count; | |
1172 | ||
1173 | free (tmpspace); | |
1174 | ||
1175 | if (trace_display) | |
1176 | display_trace (oldsize, trace_data.size); | |
1177 | } | |
1178 | ||
1179 | static void | |
1180 | tdisassemble_command (arg, from_tty) | |
1181 | char *arg; | |
1182 | int from_tty; | |
1183 | { | |
1184 | int i, count; | |
1185 | CORE_ADDR low, high; | |
1186 | char *space_index; | |
1187 | ||
1188 | if (!arg) | |
1189 | { | |
1190 | low = 0; | |
1191 | high = trace_data.size; | |
1192 | } | |
1193 | else if (!(space_index = (char *) strchr (arg, ' '))) | |
1194 | { | |
1195 | low = parse_and_eval_address (arg); | |
1196 | high = low + 5; | |
1197 | } | |
1198 | else | |
1199 | { | |
1200 | /* Two arguments. */ | |
1201 | *space_index = '\0'; | |
1202 | low = parse_and_eval_address (arg); | |
1203 | high = parse_and_eval_address (space_index + 1); | |
1204 | if (high < low) | |
1205 | high = low; | |
1206 | } | |
1207 | ||
1208 | printf_filtered ("Dump of trace from %d to %d:\n", low, high); | |
1209 | ||
1210 | display_trace (low, high); | |
1211 | ||
1212 | printf_filtered ("End of trace dump.\n"); | |
1213 | gdb_flush (gdb_stdout); | |
1214 | } | |
1215 | ||
1216 | static void | |
1217 | display_trace (low, high) | |
1218 | int low, high; | |
1219 | { | |
1220 | int i, count, trace_show_source, first, suppress; | |
1221 | CORE_ADDR next_address; | |
1222 | ||
1223 | trace_show_source = default_trace_show_source; | |
1224 | if (!have_full_symbols () && !have_partial_symbols()) | |
1225 | { | |
1226 | trace_show_source = 0; | |
1227 | printf_filtered ("No symbol table is loaded. Use the \"file\" command.\n"); | |
1228 | printf_filtered ("Trace will not display any source.\n"); | |
1229 | } | |
1230 | ||
1231 | first = 1; | |
1232 | suppress = 0; | |
1233 | for (i = low; i < high; ++i) | |
1234 | { | |
1235 | next_address = trace_data.addrs[i]; | |
1236 | count = trace_data.counts[i]; | |
1237 | while (count-- > 0) | |
1238 | { | |
1239 | QUIT; | |
1240 | if (trace_show_source) | |
1241 | { | |
1242 | struct symtab_and_line sal, sal_prev; | |
1243 | ||
1244 | sal_prev = find_pc_line (next_address - 4, 0); | |
1245 | sal = find_pc_line (next_address, 0); | |
1246 | ||
1247 | if (sal.symtab) | |
1248 | { | |
1249 | if (first || sal.line != sal_prev.line) | |
1250 | print_source_lines (sal.symtab, sal.line, sal.line + 1, 0); | |
1251 | suppress = 0; | |
1252 | } | |
1253 | else | |
1254 | { | |
1255 | if (!suppress) | |
1256 | /* FIXME-32x64--assumes sal.pc fits in long. */ | |
1257 | printf_filtered ("No source file for address %s.\n", | |
1258 | local_hex_string((unsigned long) sal.pc)); | |
1259 | suppress = 1; | |
1260 | } | |
1261 | } | |
1262 | first = 0; | |
1263 | print_address (next_address, gdb_stdout); | |
1264 | printf_filtered (":"); | |
1265 | printf_filtered ("\t"); | |
1266 | wrap_here (" "); | |
1267 | next_address = next_address + print_insn (next_address, gdb_stdout); | |
1268 | printf_filtered ("\n"); | |
1269 | gdb_flush (gdb_stdout); | |
1270 | } | |
1271 | } | |
1272 | } | |
1273 | ||
1274 | extern void (*target_resume_hook) PARAMS ((void)); | |
1275 | extern void (*target_wait_loop_hook) PARAMS ((void)); | |
1276 | ||
1277 | void | |
1278 | _initialize_d30v_tdep () | |
1279 | { | |
1280 | tm_print_insn = print_insn_d30v; | |
1281 | ||
1282 | target_resume_hook = d30v_eva_prepare_to_trace; | |
1283 | target_wait_loop_hook = d30v_eva_get_trace_data; | |
1284 | ||
5d62f957 MM |
1285 | add_info ("flags", print_flags_command, "Print d30v flags."); |
1286 | ||
45a70ed6 SG |
1287 | add_com ("trace", class_support, trace_command, |
1288 | "Enable tracing of instruction execution."); | |
1289 | ||
1290 | add_com ("untrace", class_support, untrace_command, | |
7359fb1d | 1291 | "Disable tracing of instruction execution."); |
45a70ed6 SG |
1292 | |
1293 | add_com ("tdisassemble", class_vars, tdisassemble_command, | |
1294 | "Disassemble the trace buffer.\n\ | |
1295 | Two optional arguments specify a range of trace buffer entries\n\ | |
1296 | as reported by info trace (NOT addresses!)."); | |
1297 | ||
1298 | add_info ("trace", trace_info, | |
1299 | "Display info about the trace data buffer."); | |
1300 | ||
1301 | add_show_from_set (add_set_cmd ("tracedisplay", no_class, | |
1302 | var_integer, (char *)&trace_display, | |
1303 | "Set automatic display of trace.\n", &setlist), | |
1304 | &showlist); | |
1305 | add_show_from_set (add_set_cmd ("tracesource", no_class, | |
1306 | var_integer, (char *)&default_trace_show_source, | |
1307 | "Set display of source code with trace.\n", &setlist), | |
1308 | &showlist); | |
1309 | ||
1310 | } |