Revert the last change.
[deliverable/binutils-gdb.git] / gdb / dcache.c
CommitLineData
69517000
AC
1/* Caching code for GDB, the GNU debugger.
2
9b254dd1 3 Copyright (C) 1992, 1993, 1995, 1996, 1998, 1999, 2000, 2001, 2003, 2007,
0fb0cc75 4 2008, 2009 Free Software Foundation, Inc.
c906108c
SS
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
a9762ec7 10 the Free Software Foundation; either version 3 of the License, or
c906108c
SS
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
a9762ec7 19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
c906108c
SS
20
21#include "defs.h"
22#include "dcache.h"
23#include "gdbcmd.h"
24#include "gdb_string.h"
25#include "gdbcore.h"
4930751a 26#include "target.h"
4e5d721f 27#include "inferior.h"
25f122dc 28#include "splay-tree.h"
c906108c 29
29e57380
C
30/* The data cache could lead to incorrect results because it doesn't
31 know about volatile variables, thus making it impossible to debug
32 functions which use memory mapped I/O devices. Set the nocache
33 memory region attribute in those cases.
c906108c 34
25f122dc 35 In general the dcache speeds up performance. Some speed improvement
c906108c
SS
36 comes from the actual caching mechanism, but the major gain is in
37 the reduction of the remote protocol overhead; instead of reading
38 or writing a large area of memory in 4 byte requests, the cache
25f122dc
DE
39 bundles up the requests into LINE_SIZE chunks, reducing overhead
40 significantly. This is most useful when accessing a large amount
41 of data, such as when performing a backtrace.
42
43 The cache is a splay tree along with a linked list for replacement.
44 Each block caches a LINE_SIZE area of memory. Wtihin each line we remember
45 the address of the line (which must be a multiple of LINE_SIZE) and the
46 actual data block.
47
48 Lines are only allocated as needed, so DCACHE_SIZE really specifies the
49 *maximum* number of lines in the cache.
50
51 At present, the cache is write-through rather than writeback: as soon
52 as data is written to the cache, it is also immediately written to
53 the target. Therefore, cache lines are never "dirty". Whether a given
54 line is valid or not depends on where it is stored in the dcache_struct;
55 there is no per-block valid flag. */
c906108c 56
29e57380 57/* NOTE: Interaction of dcache and memory region attributes
c906108c 58
29e57380
C
59 As there is no requirement that memory region attributes be aligned
60 to or be a multiple of the dcache page size, dcache_read_line() and
61 dcache_write_line() must break up the page by memory region. If a
62 chunk does not have the cache attribute set, an invalid memory type
63 is set, etc., then the chunk is skipped. Those chunks are handled
64 in target_xfer_memory() (or target_xfer_memory_partial()).
c906108c 65
29e57380
C
66 This doesn't occur very often. The most common occurance is when
67 the last bit of the .text segment and the first bit of the .data
68 segment fall within the same dcache page with a ro/cacheable memory
69 region defined for the .text segment and a rw/non-cacheable memory
25f122dc 70 region defined for the .data segment. */
c906108c 71
25f122dc
DE
72/* The maximum number of lines stored. The total size of the cache is
73 equal to DCACHE_SIZE times LINE_SIZE. */
74#define DCACHE_SIZE 4096
c906108c 75
25f122dc
DE
76/* The size of a cache line. Smaller values reduce the time taken to
77 read a single byte and make the cache more granular, but increase
78 overhead and reduce the effectiveness of the cache as a prefetcher. */
79#define LINE_SIZE_POWER 6
c906108c
SS
80#define LINE_SIZE (1 << LINE_SIZE_POWER)
81
82/* Each cache block holds LINE_SIZE bytes of data
83 starting at a multiple-of-LINE_SIZE address. */
84
c5aa993b 85#define LINE_SIZE_MASK ((LINE_SIZE - 1))
c906108c
SS
86#define XFORM(x) ((x) & LINE_SIZE_MASK)
87#define MASK(x) ((x) & ~LINE_SIZE_MASK)
88
c906108c 89struct dcache_block
25f122dc
DE
90{
91 struct dcache_block *newer; /* for LRU and free list */
92 CORE_ADDR addr; /* address of data */
93 gdb_byte data[LINE_SIZE]; /* bytes at given address */
94 int refs; /* # hits */
95};
29e57380 96
c5aa993b 97struct dcache_struct
25f122dc
DE
98{
99 splay_tree tree;
100 struct dcache_block *oldest;
101 struct dcache_block *newest;
c906108c 102
25f122dc 103 struct dcache_block *freelist;
c906108c 104
25f122dc
DE
105 /* The number of in-use lines in the cache. */
106 int size;
4e5d721f
DE
107
108 /* The ptid of last inferior to use cache or null_ptid. */
109 ptid_t ptid;
25f122dc 110};
c906108c 111
8edbea78 112static struct dcache_block *dcache_hit (DCACHE *dcache, CORE_ADDR addr);
c906108c 113
8edbea78 114static int dcache_write_line (DCACHE *dcache, struct dcache_block *db);
c906108c 115
8edbea78 116static int dcache_read_line (DCACHE *dcache, struct dcache_block *db);
c906108c 117
8edbea78
C
118static struct dcache_block *dcache_alloc (DCACHE *dcache, CORE_ADDR addr);
119
a14ed312 120static void dcache_info (char *exp, int tty);
c906108c 121
a14ed312 122void _initialize_dcache (void);
c906108c 123
4e5d721f 124static int dcache_enabled_p = 0; /* OBSOLETE */
07128da0 125
920d2a44
AC
126static void
127show_dcache_enabled_p (struct ui_file *file, int from_tty,
128 struct cmd_list_element *c, const char *value)
129{
4e5d721f 130 fprintf_filtered (file, _("Deprecated remotecache flag is %s.\n"), value);
920d2a44
AC
131}
132
25f122dc 133static DCACHE *last_cache; /* Used by info dcache */
c906108c
SS
134
135/* Free all the data cache blocks, thus discarding all cached data. */
136
137void
4930751a 138dcache_invalidate (DCACHE *dcache)
c906108c 139{
25f122dc 140 struct dcache_block *block, *next;
c906108c 141
25f122dc 142 block = dcache->oldest;
c906108c 143
25f122dc 144 while (block)
c906108c 145 {
25f122dc
DE
146 splay_tree_remove (dcache->tree, (splay_tree_key) block->addr);
147 next = block->newer;
c906108c 148
25f122dc
DE
149 block->newer = dcache->freelist;
150 dcache->freelist = block;
151
152 block = next;
c906108c
SS
153 }
154
25f122dc
DE
155 dcache->oldest = NULL;
156 dcache->newest = NULL;
157 dcache->size = 0;
4e5d721f
DE
158 dcache->ptid = null_ptid;
159}
160
161/* Invalidate the line associated with ADDR. */
162
163static void
164dcache_invalidate_line (DCACHE *dcache, CORE_ADDR addr)
165{
166 struct dcache_block *db = dcache_hit (dcache, addr);
167
168 if (db)
169 {
170 splay_tree_remove (dcache->tree, (splay_tree_key) db->addr);
171 db->newer = dcache->freelist;
172 dcache->freelist = db;
173 --dcache->size;
174 }
c906108c
SS
175}
176
177/* If addr is present in the dcache, return the address of the block
25f122dc 178 containing it. */
c906108c
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179
180static struct dcache_block *
fba45db2 181dcache_hit (DCACHE *dcache, CORE_ADDR addr)
c906108c 182{
52f0bd74 183 struct dcache_block *db;
c906108c 184
25f122dc
DE
185 splay_tree_node node = splay_tree_lookup (dcache->tree,
186 (splay_tree_key) MASK (addr));
c906108c 187
25f122dc
DE
188 if (!node)
189 return NULL;
c906108c 190
25f122dc
DE
191 db = (struct dcache_block *) node->value;
192 db->refs++;
193 return db;
c906108c
SS
194}
195
25f122dc 196/* Fill a cache line from target memory. */
c906108c 197
8edbea78
C
198static int
199dcache_read_line (DCACHE *dcache, struct dcache_block *db)
200{
201 CORE_ADDR memaddr;
6c932e54 202 gdb_byte *myaddr;
8edbea78
C
203 int len;
204 int res;
29e57380
C
205 int reg_len;
206 struct mem_region *region;
8edbea78 207
8edbea78
C
208 len = LINE_SIZE;
209 memaddr = db->addr;
210 myaddr = db->data;
211
212 while (len > 0)
213 {
25f122dc
DE
214 /* Don't overrun if this block is right at the end of the region. */
215 region = lookup_mem_region (memaddr);
216 if (region->hi == 0 || memaddr + len < region->hi)
29e57380
C
217 reg_len = len;
218 else
219 reg_len = region->hi - memaddr;
220
4e5d721f
DE
221 /* Skip non-readable regions. The cache attribute can be ignored,
222 since we may be loading this for a stack access. */
223 if (region->attrib.mode == MEM_WO)
29e57380
C
224 {
225 memaddr += reg_len;
226 myaddr += reg_len;
227 len -= reg_len;
228 continue;
229 }
230
cf7a04e8
DJ
231 res = target_read (&current_target, TARGET_OBJECT_RAW_MEMORY,
232 NULL, myaddr, memaddr, reg_len);
233 if (res < reg_len)
234 return 0;
8edbea78 235
cf7a04e8
DJ
236 memaddr += res;
237 myaddr += res;
238 len -= res;
8edbea78
C
239 }
240
8edbea78
C
241 return 1;
242}
243
c906108c 244/* Get a free cache block, put or keep it on the valid list,
f1d7622b 245 and return its address. */
c906108c
SS
246
247static struct dcache_block *
f1d7622b 248dcache_alloc (DCACHE *dcache, CORE_ADDR addr)
c906108c 249{
52f0bd74 250 struct dcache_block *db;
c906108c 251
25f122dc 252 if (dcache->size >= DCACHE_SIZE)
c906108c 253 {
25f122dc
DE
254 /* Evict the least recently used line. */
255 db = dcache->oldest;
256 dcache->oldest = db->newer;
257
258 splay_tree_remove (dcache->tree, (splay_tree_key) db->addr);
c906108c
SS
259 }
260 else
261 {
25f122dc
DE
262 db = dcache->freelist;
263 if (db)
264 dcache->freelist = db->newer;
265 else
266 db = xmalloc (sizeof (struct dcache_block));
c906108c 267
25f122dc 268 dcache->size++;
c906108c
SS
269 }
270
25f122dc
DE
271 db->addr = MASK (addr);
272 db->newer = NULL;
f1d7622b 273 db->refs = 0;
f1d7622b 274
25f122dc
DE
275 if (dcache->newest)
276 dcache->newest->newer = db;
c906108c 277
25f122dc 278 dcache->newest = db;
c906108c 279
25f122dc
DE
280 if (!dcache->oldest)
281 dcache->oldest = db;
c906108c 282
25f122dc
DE
283 splay_tree_insert (dcache->tree, (splay_tree_key) db->addr,
284 (splay_tree_value) db);
c906108c 285
25f122dc 286 return db;
c906108c
SS
287}
288
8edbea78
C
289/* Using the data cache DCACHE return the contents of the byte at
290 address ADDR in the remote machine.
291
25f122dc 292 Returns 1 for success, 0 for error. */
8edbea78
C
293
294static int
6c932e54 295dcache_peek_byte (DCACHE *dcache, CORE_ADDR addr, gdb_byte *ptr)
8edbea78 296{
52f0bd74 297 struct dcache_block *db = dcache_hit (dcache, addr);
8edbea78
C
298
299 if (!db)
300 {
301 db = dcache_alloc (dcache, addr);
25f122dc
DE
302
303 if (!dcache_read_line (dcache, db))
8edbea78
C
304 return 0;
305 }
306
307 *ptr = db->data[XFORM (addr)];
308 return 1;
309}
310
c906108c 311/* Write the byte at PTR into ADDR in the data cache.
25f122dc
DE
312
313 The caller is responsible for also promptly writing the data
314 through to target memory.
315
316 If addr is not in cache, this function does nothing; writing to
317 an area of memory which wasn't present in the cache doesn't cause
318 it to be loaded in.
319
4e5d721f 320 Always return 1 (meaning success) to simplify dcache_xfer_memory. */
c906108c
SS
321
322static int
6c932e54 323dcache_poke_byte (DCACHE *dcache, CORE_ADDR addr, gdb_byte *ptr)
c906108c 324{
52f0bd74 325 struct dcache_block *db = dcache_hit (dcache, addr);
c906108c 326
25f122dc
DE
327 if (db)
328 db->data[XFORM (addr)] = *ptr;
c906108c 329
c906108c
SS
330 return 1;
331}
332
25f122dc
DE
333static int
334dcache_splay_tree_compare (splay_tree_key a, splay_tree_key b)
335{
336 if (a > b)
337 return 1;
338 else if (a == b)
339 return 0;
340 else
341 return -1;
342}
343
c906108c 344/* Initialize the data cache. */
25f122dc 345
c906108c 346DCACHE *
4930751a 347dcache_init (void)
c906108c 348{
c906108c 349 DCACHE *dcache;
25f122dc 350 int i;
c906108c
SS
351
352 dcache = (DCACHE *) xmalloc (sizeof (*dcache));
c906108c 353
25f122dc
DE
354 dcache->tree = splay_tree_new (dcache_splay_tree_compare,
355 NULL,
356 NULL);
c906108c 357
25f122dc
DE
358 dcache->oldest = NULL;
359 dcache->newest = NULL;
360 dcache->freelist = NULL;
361 dcache->size = 0;
4e5d721f 362 dcache->ptid = null_ptid;
c906108c 363 last_cache = dcache;
25f122dc 364
c906108c
SS
365 return dcache;
366}
367
25f122dc
DE
368/* Free a data cache. */
369
e99586d5
C
370void
371dcache_free (DCACHE *dcache)
372{
25f122dc
DE
373 struct dcache_block *db, *next;
374
e99586d5
C
375 if (last_cache == dcache)
376 last_cache = NULL;
377
25f122dc
DE
378 splay_tree_delete (dcache->tree);
379 for (db = dcache->freelist; db != NULL; db = next)
380 {
381 next = db->newer;
382 xfree (db);
383 }
b8c9b27d 384 xfree (dcache);
e99586d5
C
385}
386
c906108c
SS
387/* Read or write LEN bytes from inferior memory at MEMADDR, transferring
388 to or from debugger address MYADDR. Write to inferior if SHOULD_WRITE is
389 nonzero.
390
4e5d721f 391 The meaning of the result is the same as for target_write. */
c906108c
SS
392
393int
25f122dc
DE
394dcache_xfer_memory (struct target_ops *ops, DCACHE *dcache,
395 CORE_ADDR memaddr, gdb_byte *myaddr,
1b0ba102 396 int len, int should_write)
c906108c
SS
397{
398 int i;
25f122dc 399 int res;
6c932e54 400 int (*xfunc) (DCACHE *dcache, CORE_ADDR addr, gdb_byte *ptr);
29e57380 401 xfunc = should_write ? dcache_poke_byte : dcache_peek_byte;
c906108c 402
4e5d721f
DE
403 /* If this is a different inferior from what we've recorded,
404 flush the cache. */
405
406 if (! ptid_equal (inferior_ptid, dcache->ptid))
407 {
408 dcache_invalidate (dcache);
409 dcache->ptid = inferior_ptid;
410 }
411
25f122dc
DE
412 /* Do write-through first, so that if it fails, we don't write to
413 the cache at all. */
414
415 if (should_write)
416 {
417 res = target_write (ops, TARGET_OBJECT_RAW_MEMORY,
418 NULL, myaddr, memaddr, len);
4e5d721f
DE
419 if (res <= 0)
420 return res;
421 /* Update LEN to what was actually written. */
422 len = res;
25f122dc
DE
423 }
424
29e57380 425 for (i = 0; i < len; i++)
c906108c 426 {
29e57380 427 if (!xfunc (dcache, memaddr + i, myaddr + i))
4e5d721f
DE
428 {
429 /* That failed. Discard its cache line so we don't have a
430 partially read line. */
431 dcache_invalidate_line (dcache, memaddr + i);
432 /* If we're writing, we still wrote LEN bytes. */
433 if (should_write)
434 return len;
435 else
436 return i;
437 }
c906108c 438 }
25f122dc
DE
439
440 return len;
441}
c906108c 442
25f122dc
DE
443/* FIXME: There would be some benefit to making the cache write-back and
444 moving the writeback operation to a higher layer, as it could occur
445 after a sequence of smaller writes have been completed (as when a stack
446 frame is constructed for an inferior function call). Note that only
447 moving it up one level to target_xfer_memory[_partial]() is not
448 sufficient since we want to coalesce memory transfers that are
449 "logically" connected but not actually a single call to one of the
450 memory transfer functions. */
29e57380 451
4e5d721f
DE
452/* Just update any cache lines which are already present. This is called
453 by memory_xfer_partial in cases where the access would otherwise not go
454 through the cache. */
455
456void
457dcache_update (DCACHE *dcache, CORE_ADDR memaddr, gdb_byte *myaddr, int len)
458{
459 int i;
460 for (i = 0; i < len; i++)
461 dcache_poke_byte (dcache, memaddr + i, myaddr + i);
462}
463
25f122dc
DE
464static void
465dcache_print_line (int index)
466{
467 splay_tree_node n;
468 struct dcache_block *db;
469 int i, j;
470
471 if (!last_cache)
472 {
473 printf_filtered (_("No data cache available.\n"));
474 return;
475 }
476
477 n = splay_tree_min (last_cache->tree);
478
479 for (i = index; i > 0; --i)
480 {
481 if (!n)
482 break;
483 n = splay_tree_successor (last_cache->tree, n->key);
484 }
485
486 if (!n)
487 {
488 printf_filtered (_("No such cache line exists.\n"));
489 return;
490 }
29e57380 491
25f122dc
DE
492 db = (struct dcache_block *) n->value;
493
51939b3d
DE
494 printf_filtered (_("Line %d: address %s [%d hits]\n"),
495 index, paddress (target_gdbarch, db->addr), db->refs);
25f122dc
DE
496
497 for (j = 0; j < LINE_SIZE; j++)
498 {
499 printf_filtered ("%02x ", db->data[j]);
500
501 /* Print a newline every 16 bytes (48 characters) */
502 if ((j % 16 == 15) && (j != LINE_SIZE - 1))
503 printf_filtered ("\n");
504 }
505 printf_filtered ("\n");
c906108c
SS
506}
507
c5aa993b 508static void
fba45db2 509dcache_info (char *exp, int tty)
c906108c 510{
25f122dc
DE
511 splay_tree_node n;
512 int i, refcount, lineno;
513
514 if (exp)
515 {
516 char *linestart;
517 i = strtol (exp, &linestart, 10);
518 if (linestart == exp || i < 0)
519 {
520 printf_filtered (_("Usage: info dcache [linenumber]\n"));
521 return;
522 }
c906108c 523
25f122dc
DE
524 dcache_print_line (i);
525 return;
526 }
527
528 printf_filtered (_("Dcache line width %d, maximum size %d\n"),
c906108c
SS
529 LINE_SIZE, DCACHE_SIZE);
530
4e5d721f 531 if (!last_cache || ptid_equal (last_cache->ptid, null_ptid))
c906108c 532 {
25f122dc
DE
533 printf_filtered (_("No data cache available.\n"));
534 return;
535 }
5e2039ea 536
4e5d721f
DE
537 printf_filtered (_("Contains data for %s\n"),
538 target_pid_to_str (last_cache->ptid));
539
25f122dc 540 refcount = 0;
c906108c 541
25f122dc
DE
542 n = splay_tree_min (last_cache->tree);
543 i = 0;
c906108c 544
25f122dc
DE
545 while (n)
546 {
547 struct dcache_block *db = (struct dcache_block *) n->value;
548
51939b3d
DE
549 printf_filtered (_("Line %d: address %s [%d hits]\n"),
550 i, paddress (target_gdbarch, db->addr), db->refs);
25f122dc
DE
551 i++;
552 refcount += db->refs;
553
554 n = splay_tree_successor (last_cache->tree, n->key);
c906108c 555 }
25f122dc
DE
556
557 printf_filtered (_("Cache state: %d active lines, %d hits\n"), i, refcount);
c906108c
SS
558}
559
560void
fba45db2 561_initialize_dcache (void)
c906108c 562{
5bf193a2
AC
563 add_setshow_boolean_cmd ("remotecache", class_support,
564 &dcache_enabled_p, _("\
565Set cache use for remote targets."), _("\
566Show cache use for remote targets."), _("\
4e5d721f
DE
567This used to enable the data cache for remote targets. The cache\n\
568functionality is now controlled by the memory region system and the\n\
569\"stack-cache\" flag; \"remotecache\" now does nothing and\n\
570exists only for compatibility reasons."),
5bf193a2 571 NULL,
920d2a44 572 show_dcache_enabled_p,
5bf193a2 573 &setlist, &showlist);
c906108c
SS
574
575 add_info ("dcache", dcache_info,
07128da0
DE
576 _("\
577Print information on the dcache performance.\n\
25f122dc
DE
578With no arguments, this command prints the cache configuration and a\n\
579summary of each line in the cache. Use \"info dcache <lineno> to dump\"\n\
580the contents of a given line."));
c906108c 581}
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