Change fde table to a vector
[deliverable/binutils-gdb.git] / gdb / dwarf2 / frame.c
CommitLineData
cfc14b3a
MK
1/* Frame unwinder for frames with DWARF Call Frame Information.
2
b811d2c2 3 Copyright (C) 2003-2020 Free Software Foundation, Inc.
cfc14b3a
MK
4
5 Contributed by Mark Kettenis.
6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
a9762ec7 11 the Free Software Foundation; either version 3 of the License, or
cfc14b3a
MK
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
a9762ec7 20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
cfc14b3a
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21
22#include "defs.h"
82ca8957 23#include "dwarf2/expr.h"
4de283e4 24#include "dwarf2.h"
f4382c45 25#include "dwarf2/leb.h"
4de283e4 26#include "frame.h"
cfc14b3a
MK
27#include "frame-base.h"
28#include "frame-unwind.h"
29#include "gdbcore.h"
30#include "gdbtypes.h"
4de283e4 31#include "symtab.h"
cfc14b3a
MK
32#include "objfiles.h"
33#include "regcache.h"
f2da6b3a 34#include "value.h"
4de283e4 35#include "record.h"
cfc14b3a 36
4de283e4 37#include "complaints.h"
82ca8957
TT
38#include "dwarf2/frame.h"
39#include "dwarf2/read.h"
4de283e4 40#include "ax.h"
82ca8957
TT
41#include "dwarf2/loc.h"
42#include "dwarf2/frame-tailcall.h"
35e65c49 43#include "gdbsupport/gdb_binary_search.h"
1c90d9f0 44#if GDB_SELF_TEST
268a13a5 45#include "gdbsupport/selftest.h"
1c90d9f0
YQ
46#include "selftest-arch.h"
47#endif
93878f47 48#include <unordered_map>
cfc14b3a 49
39ef2f62
CB
50#include <algorithm>
51
ae0d2f24
UW
52struct comp_unit;
53
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MK
54/* Call Frame Information (CFI). */
55
56/* Common Information Entry (CIE). */
57
58struct dwarf2_cie
59{
ae0d2f24
UW
60 /* Computation Unit for this CIE. */
61 struct comp_unit *unit;
62
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MK
63 /* Offset into the .debug_frame section where this CIE was found.
64 Used to identify this CIE. */
65 ULONGEST cie_pointer;
66
67 /* Constant that is factored out of all advance location
68 instructions. */
69 ULONGEST code_alignment_factor;
70
71 /* Constants that is factored out of all offset instructions. */
72 LONGEST data_alignment_factor;
73
74 /* Return address column. */
75 ULONGEST return_address_register;
76
77 /* Instruction sequence to initialize a register set. */
f664829e
DE
78 const gdb_byte *initial_instructions;
79 const gdb_byte *end;
cfc14b3a 80
303b6f5d
DJ
81 /* Saved augmentation, in case it's needed later. */
82 char *augmentation;
83
cfc14b3a 84 /* Encoding of addresses. */
852483bc 85 gdb_byte encoding;
cfc14b3a 86
ae0d2f24
UW
87 /* Target address size in bytes. */
88 int addr_size;
89
0963b4bd 90 /* Target pointer size in bytes. */
8da614df
CV
91 int ptr_size;
92
7131cb6e
RH
93 /* True if a 'z' augmentation existed. */
94 unsigned char saw_z_augmentation;
95
56c987f6
AO
96 /* True if an 'S' augmentation existed. */
97 unsigned char signal_frame;
98
303b6f5d
DJ
99 /* The version recorded in the CIE. */
100 unsigned char version;
2dc7f7b3
TT
101
102 /* The segment size. */
103 unsigned char segment_size;
b01c8410 104};
303b6f5d 105
93878f47
TT
106/* The CIE table is used to find CIEs during parsing, but then
107 discarded. It maps from the CIE's offset to the CIE. */
108typedef std::unordered_map<ULONGEST, dwarf2_cie *> dwarf2_cie_table;
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109
110/* Frame Description Entry (FDE). */
111
112struct dwarf2_fde
113{
114 /* CIE for this FDE. */
115 struct dwarf2_cie *cie;
116
117 /* First location associated with this FDE. */
118 CORE_ADDR initial_location;
119
120 /* Number of bytes of program instructions described by this FDE. */
121 CORE_ADDR address_range;
122
123 /* Instruction sequence. */
f664829e
DE
124 const gdb_byte *instructions;
125 const gdb_byte *end;
cfc14b3a 126
4bf8967c
AS
127 /* True if this FDE is read from a .eh_frame instead of a .debug_frame
128 section. */
129 unsigned char eh_frame_p;
b01c8410 130};
4bf8967c 131
a9d65418 132typedef std::vector<dwarf2_fde *> dwarf2_fde_table;
cfc14b3a 133
ae0d2f24
UW
134/* A minimal decoding of DWARF2 compilation units. We only decode
135 what's needed to get to the call frame information. */
136
137struct comp_unit
138{
139 /* Keep the bfd convenient. */
140 bfd *abfd;
141
142 struct objfile *objfile;
143
ae0d2f24 144 /* Pointer to the .debug_frame section loaded into memory. */
d521ce57 145 const gdb_byte *dwarf_frame_buffer;
ae0d2f24
UW
146
147 /* Length of the loaded .debug_frame section. */
c098b58b 148 bfd_size_type dwarf_frame_size;
ae0d2f24
UW
149
150 /* Pointer to the .debug_frame section. */
151 asection *dwarf_frame_section;
152
153 /* Base for DW_EH_PE_datarel encodings. */
154 bfd_vma dbase;
155
156 /* Base for DW_EH_PE_textrel encodings. */
157 bfd_vma tbase;
158};
159
ac56253d
TT
160static struct dwarf2_fde *dwarf2_frame_find_fde (CORE_ADDR *pc,
161 CORE_ADDR *out_offset);
4fc771b8
DJ
162
163static int dwarf2_frame_adjust_regnum (struct gdbarch *gdbarch, int regnum,
164 int eh_frame_p);
ae0d2f24
UW
165
166static CORE_ADDR read_encoded_value (struct comp_unit *unit, gdb_byte encoding,
0d45f56e 167 int ptr_len, const gdb_byte *buf,
ae0d2f24
UW
168 unsigned int *bytes_read_ptr,
169 CORE_ADDR func_base);
cfc14b3a
MK
170\f
171
3c3bb058 172/* See dwarf2-frame.h. */
491144b5 173bool dwarf2_frame_unwinders_enabled_p = true;
3c3bb058 174
cfc14b3a
MK
175/* Store the length the expression for the CFA in the `cfa_reg' field,
176 which is unused in that case. */
177#define cfa_exp_len cfa_reg
178
afe37d6b
YQ
179dwarf2_frame_state::dwarf2_frame_state (CORE_ADDR pc_, struct dwarf2_cie *cie)
180 : pc (pc_), data_align (cie->data_alignment_factor),
181 code_align (cie->code_alignment_factor),
182 retaddr_column (cie->return_address_register)
cfc14b3a 183{
afe37d6b 184}
cfc14b3a
MK
185\f
186
187/* Helper functions for execute_stack_op. */
188
189static CORE_ADDR
192ca6d8 190read_addr_from_reg (struct frame_info *this_frame, int reg)
cfc14b3a 191{
4a4e5149 192 struct gdbarch *gdbarch = get_frame_arch (this_frame);
0fde2c53 193 int regnum = dwarf_reg_to_regnum_or_error (gdbarch, reg);
f2da6b3a 194
2ed3c037 195 return address_from_register (regnum, this_frame);
cfc14b3a
MK
196}
197
a6a5a945
LM
198/* Execute the required actions for both the DW_CFA_restore and
199DW_CFA_restore_extended instructions. */
200static void
201dwarf2_restore_rule (struct gdbarch *gdbarch, ULONGEST reg_num,
202 struct dwarf2_frame_state *fs, int eh_frame_p)
203{
204 ULONGEST reg;
205
a6a5a945 206 reg = dwarf2_frame_adjust_regnum (gdbarch, reg_num, eh_frame_p);
1c90d9f0 207 fs->regs.alloc_regs (reg + 1);
a6a5a945
LM
208
209 /* Check if this register was explicitly initialized in the
210 CIE initial instructions. If not, default the rule to
211 UNSPECIFIED. */
780942fc 212 if (reg < fs->initial.reg.size ())
a6a5a945
LM
213 fs->regs.reg[reg] = fs->initial.reg[reg];
214 else
215 fs->regs.reg[reg].how = DWARF2_FRAME_REG_UNSPECIFIED;
216
217 if (fs->regs.reg[reg].how == DWARF2_FRAME_REG_UNSPECIFIED)
0fde2c53
DE
218 {
219 int regnum = dwarf_reg_to_regnum (gdbarch, reg);
220
b98664d3 221 complaint (_("\
a6a5a945 222incomplete CFI data; DW_CFA_restore unspecified\n\
5af949e3 223register %s (#%d) at %s"),
0fde2c53
DE
224 gdbarch_register_name (gdbarch, regnum), regnum,
225 paddress (gdbarch, fs->pc));
226 }
a6a5a945
LM
227}
228
192ca6d8 229class dwarf_expr_executor : public dwarf_expr_context
9e8b7a03 230{
192ca6d8
TT
231 public:
232
233 struct frame_info *this_frame;
234
632e107b 235 CORE_ADDR read_addr_from_reg (int reg) override
192ca6d8
TT
236 {
237 return ::read_addr_from_reg (this_frame, reg);
238 }
239
632e107b 240 struct value *get_reg_value (struct type *type, int reg) override
192ca6d8
TT
241 {
242 struct gdbarch *gdbarch = get_frame_arch (this_frame);
243 int regnum = dwarf_reg_to_regnum_or_error (gdbarch, reg);
244
245 return value_from_register (type, regnum, this_frame);
246 }
247
632e107b 248 void read_mem (gdb_byte *buf, CORE_ADDR addr, size_t len) override
192ca6d8
TT
249 {
250 read_memory (addr, buf, len);
251 }
befbff86 252
632e107b 253 void get_frame_base (const gdb_byte **start, size_t *length) override
befbff86
TT
254 {
255 invalid ("DW_OP_fbreg");
256 }
257
258 void push_dwarf_reg_entry_value (enum call_site_parameter_kind kind,
259 union call_site_parameter_u kind_u,
632e107b 260 int deref_size) override
befbff86 261 {
216f72a1 262 invalid ("DW_OP_entry_value");
befbff86
TT
263 }
264
632e107b 265 CORE_ADDR get_object_address () override
befbff86
TT
266 {
267 invalid ("DW_OP_push_object_address");
268 }
269
632e107b 270 CORE_ADDR get_frame_cfa () override
befbff86
TT
271 {
272 invalid ("DW_OP_call_frame_cfa");
273 }
274
632e107b 275 CORE_ADDR get_tls_address (CORE_ADDR offset) override
befbff86
TT
276 {
277 invalid ("DW_OP_form_tls_address");
278 }
279
632e107b 280 void dwarf_call (cu_offset die_offset) override
befbff86
TT
281 {
282 invalid ("DW_OP_call*");
283 }
284
a6b786da
KB
285 struct value *dwarf_variable_value (sect_offset sect_off) override
286 {
287 invalid ("DW_OP_GNU_variable_value");
288 }
289
632e107b 290 CORE_ADDR get_addr_index (unsigned int index) override
befbff86 291 {
336d760d 292 invalid ("DW_OP_addrx or DW_OP_GNU_addr_index");
befbff86
TT
293 }
294
295 private:
296
297 void invalid (const char *op) ATTRIBUTE_NORETURN
298 {
299 error (_("%s is invalid in this context"), op);
300 }
9e8b7a03
JK
301};
302
cfc14b3a 303static CORE_ADDR
0d45f56e 304execute_stack_op (const gdb_byte *exp, ULONGEST len, int addr_size,
ac56253d
TT
305 CORE_ADDR offset, struct frame_info *this_frame,
306 CORE_ADDR initial, int initial_in_stack_memory)
cfc14b3a 307{
cfc14b3a
MK
308 CORE_ADDR result;
309
192ca6d8 310 dwarf_expr_executor ctx;
eb115069 311 scoped_value_mark free_values;
4a227398 312
192ca6d8 313 ctx.this_frame = this_frame;
718b9626
TT
314 ctx.gdbarch = get_frame_arch (this_frame);
315 ctx.addr_size = addr_size;
316 ctx.ref_addr_size = -1;
317 ctx.offset = offset;
cfc14b3a 318
595d2e30
TT
319 ctx.push_address (initial, initial_in_stack_memory);
320 ctx.eval (exp, len);
cfc14b3a 321
718b9626 322 if (ctx.location == DWARF_VALUE_MEMORY)
595d2e30 323 result = ctx.fetch_address (0);
718b9626 324 else if (ctx.location == DWARF_VALUE_REGISTER)
192ca6d8 325 result = ctx.read_addr_from_reg (value_as_long (ctx.fetch (0)));
f2c7657e 326 else
cec03d70
TT
327 {
328 /* This is actually invalid DWARF, but if we ever do run across
329 it somehow, we might as well support it. So, instead, report
330 it as unimplemented. */
3e43a32a
MS
331 error (_("\
332Not implemented: computing unwound register using explicit value operator"));
cec03d70 333 }
cfc14b3a 334
cfc14b3a
MK
335 return result;
336}
337\f
338
111c6489
JK
339/* Execute FDE program from INSN_PTR possibly up to INSN_END or up to inferior
340 PC. Modify FS state accordingly. Return current INSN_PTR where the
341 execution has stopped, one can resume it on the next call. */
342
343static const gdb_byte *
0d45f56e 344execute_cfa_program (struct dwarf2_fde *fde, const gdb_byte *insn_ptr,
9f6f94ff
TT
345 const gdb_byte *insn_end, struct gdbarch *gdbarch,
346 CORE_ADDR pc, struct dwarf2_frame_state *fs)
cfc14b3a 347{
ae0d2f24 348 int eh_frame_p = fde->eh_frame_p;
507a579c 349 unsigned int bytes_read;
e17a4113 350 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
cfc14b3a
MK
351
352 while (insn_ptr < insn_end && fs->pc <= pc)
353 {
852483bc 354 gdb_byte insn = *insn_ptr++;
9fccedf7
DE
355 uint64_t utmp, reg;
356 int64_t offset;
cfc14b3a
MK
357
358 if ((insn & 0xc0) == DW_CFA_advance_loc)
359 fs->pc += (insn & 0x3f) * fs->code_align;
360 else if ((insn & 0xc0) == DW_CFA_offset)
361 {
362 reg = insn & 0x3f;
4fc771b8 363 reg = dwarf2_frame_adjust_regnum (gdbarch, reg, eh_frame_p);
f664829e 364 insn_ptr = safe_read_uleb128 (insn_ptr, insn_end, &utmp);
cfc14b3a 365 offset = utmp * fs->data_align;
1c90d9f0 366 fs->regs.alloc_regs (reg + 1);
05cbe71a 367 fs->regs.reg[reg].how = DWARF2_FRAME_REG_SAVED_OFFSET;
cfc14b3a
MK
368 fs->regs.reg[reg].loc.offset = offset;
369 }
370 else if ((insn & 0xc0) == DW_CFA_restore)
371 {
cfc14b3a 372 reg = insn & 0x3f;
a6a5a945 373 dwarf2_restore_rule (gdbarch, reg, fs, eh_frame_p);
cfc14b3a
MK
374 }
375 else
376 {
377 switch (insn)
378 {
379 case DW_CFA_set_loc:
ae0d2f24 380 fs->pc = read_encoded_value (fde->cie->unit, fde->cie->encoding,
8da614df 381 fde->cie->ptr_size, insn_ptr,
ae0d2f24
UW
382 &bytes_read, fde->initial_location);
383 /* Apply the objfile offset for relocatable objects. */
b3b3bada 384 fs->pc += fde->cie->unit->objfile->text_section_offset ();
cfc14b3a
MK
385 insn_ptr += bytes_read;
386 break;
387
388 case DW_CFA_advance_loc1:
e17a4113 389 utmp = extract_unsigned_integer (insn_ptr, 1, byte_order);
cfc14b3a
MK
390 fs->pc += utmp * fs->code_align;
391 insn_ptr++;
392 break;
393 case DW_CFA_advance_loc2:
e17a4113 394 utmp = extract_unsigned_integer (insn_ptr, 2, byte_order);
cfc14b3a
MK
395 fs->pc += utmp * fs->code_align;
396 insn_ptr += 2;
397 break;
398 case DW_CFA_advance_loc4:
e17a4113 399 utmp = extract_unsigned_integer (insn_ptr, 4, byte_order);
cfc14b3a
MK
400 fs->pc += utmp * fs->code_align;
401 insn_ptr += 4;
402 break;
403
404 case DW_CFA_offset_extended:
f664829e 405 insn_ptr = safe_read_uleb128 (insn_ptr, insn_end, &reg);
4fc771b8 406 reg = dwarf2_frame_adjust_regnum (gdbarch, reg, eh_frame_p);
f664829e 407 insn_ptr = safe_read_uleb128 (insn_ptr, insn_end, &utmp);
cfc14b3a 408 offset = utmp * fs->data_align;
1c90d9f0 409 fs->regs.alloc_regs (reg + 1);
05cbe71a 410 fs->regs.reg[reg].how = DWARF2_FRAME_REG_SAVED_OFFSET;
cfc14b3a
MK
411 fs->regs.reg[reg].loc.offset = offset;
412 break;
413
414 case DW_CFA_restore_extended:
f664829e 415 insn_ptr = safe_read_uleb128 (insn_ptr, insn_end, &reg);
a6a5a945 416 dwarf2_restore_rule (gdbarch, reg, fs, eh_frame_p);
cfc14b3a
MK
417 break;
418
419 case DW_CFA_undefined:
f664829e 420 insn_ptr = safe_read_uleb128 (insn_ptr, insn_end, &reg);
4fc771b8 421 reg = dwarf2_frame_adjust_regnum (gdbarch, reg, eh_frame_p);
1c90d9f0 422 fs->regs.alloc_regs (reg + 1);
05cbe71a 423 fs->regs.reg[reg].how = DWARF2_FRAME_REG_UNDEFINED;
cfc14b3a
MK
424 break;
425
426 case DW_CFA_same_value:
f664829e 427 insn_ptr = safe_read_uleb128 (insn_ptr, insn_end, &reg);
4fc771b8 428 reg = dwarf2_frame_adjust_regnum (gdbarch, reg, eh_frame_p);
1c90d9f0 429 fs->regs.alloc_regs (reg + 1);
05cbe71a 430 fs->regs.reg[reg].how = DWARF2_FRAME_REG_SAME_VALUE;
cfc14b3a
MK
431 break;
432
433 case DW_CFA_register:
f664829e 434 insn_ptr = safe_read_uleb128 (insn_ptr, insn_end, &reg);
4fc771b8 435 reg = dwarf2_frame_adjust_regnum (gdbarch, reg, eh_frame_p);
f664829e 436 insn_ptr = safe_read_uleb128 (insn_ptr, insn_end, &utmp);
4fc771b8 437 utmp = dwarf2_frame_adjust_regnum (gdbarch, utmp, eh_frame_p);
1c90d9f0 438 fs->regs.alloc_regs (reg + 1);
05cbe71a 439 fs->regs.reg[reg].how = DWARF2_FRAME_REG_SAVED_REG;
cfc14b3a
MK
440 fs->regs.reg[reg].loc.reg = utmp;
441 break;
442
443 case DW_CFA_remember_state:
444 {
445 struct dwarf2_frame_state_reg_info *new_rs;
446
1c90d9f0 447 new_rs = new dwarf2_frame_state_reg_info (fs->regs);
cfc14b3a
MK
448 fs->regs.prev = new_rs;
449 }
450 break;
451
452 case DW_CFA_restore_state:
453 {
454 struct dwarf2_frame_state_reg_info *old_rs = fs->regs.prev;
455
50ea7769
MK
456 if (old_rs == NULL)
457 {
b98664d3 458 complaint (_("\
5af949e3
UW
459bad CFI data; mismatched DW_CFA_restore_state at %s"),
460 paddress (gdbarch, fs->pc));
50ea7769
MK
461 }
462 else
1c90d9f0 463 fs->regs = std::move (*old_rs);
cfc14b3a
MK
464 }
465 break;
466
467 case DW_CFA_def_cfa:
f664829e
DE
468 insn_ptr = safe_read_uleb128 (insn_ptr, insn_end, &reg);
469 fs->regs.cfa_reg = reg;
470 insn_ptr = safe_read_uleb128 (insn_ptr, insn_end, &utmp);
303b6f5d
DJ
471
472 if (fs->armcc_cfa_offsets_sf)
473 utmp *= fs->data_align;
474
2fd481e1
PP
475 fs->regs.cfa_offset = utmp;
476 fs->regs.cfa_how = CFA_REG_OFFSET;
cfc14b3a
MK
477 break;
478
479 case DW_CFA_def_cfa_register:
f664829e
DE
480 insn_ptr = safe_read_uleb128 (insn_ptr, insn_end, &reg);
481 fs->regs.cfa_reg = dwarf2_frame_adjust_regnum (gdbarch, reg,
2fd481e1
PP
482 eh_frame_p);
483 fs->regs.cfa_how = CFA_REG_OFFSET;
cfc14b3a
MK
484 break;
485
486 case DW_CFA_def_cfa_offset:
f664829e 487 insn_ptr = safe_read_uleb128 (insn_ptr, insn_end, &utmp);
303b6f5d
DJ
488
489 if (fs->armcc_cfa_offsets_sf)
490 utmp *= fs->data_align;
491
2fd481e1 492 fs->regs.cfa_offset = utmp;
cfc14b3a
MK
493 /* cfa_how deliberately not set. */
494 break;
495
a8504492
MK
496 case DW_CFA_nop:
497 break;
498
cfc14b3a 499 case DW_CFA_def_cfa_expression:
f664829e
DE
500 insn_ptr = safe_read_uleb128 (insn_ptr, insn_end, &utmp);
501 fs->regs.cfa_exp_len = utmp;
2fd481e1
PP
502 fs->regs.cfa_exp = insn_ptr;
503 fs->regs.cfa_how = CFA_EXP;
504 insn_ptr += fs->regs.cfa_exp_len;
cfc14b3a
MK
505 break;
506
507 case DW_CFA_expression:
f664829e 508 insn_ptr = safe_read_uleb128 (insn_ptr, insn_end, &reg);
4fc771b8 509 reg = dwarf2_frame_adjust_regnum (gdbarch, reg, eh_frame_p);
1c90d9f0 510 fs->regs.alloc_regs (reg + 1);
f664829e 511 insn_ptr = safe_read_uleb128 (insn_ptr, insn_end, &utmp);
b348037f
YQ
512 fs->regs.reg[reg].loc.exp.start = insn_ptr;
513 fs->regs.reg[reg].loc.exp.len = utmp;
05cbe71a 514 fs->regs.reg[reg].how = DWARF2_FRAME_REG_SAVED_EXP;
cfc14b3a
MK
515 insn_ptr += utmp;
516 break;
517
a8504492 518 case DW_CFA_offset_extended_sf:
f664829e 519 insn_ptr = safe_read_uleb128 (insn_ptr, insn_end, &reg);
4fc771b8 520 reg = dwarf2_frame_adjust_regnum (gdbarch, reg, eh_frame_p);
f664829e 521 insn_ptr = safe_read_sleb128 (insn_ptr, insn_end, &offset);
f6da8dd8 522 offset *= fs->data_align;
1c90d9f0 523 fs->regs.alloc_regs (reg + 1);
05cbe71a 524 fs->regs.reg[reg].how = DWARF2_FRAME_REG_SAVED_OFFSET;
a8504492
MK
525 fs->regs.reg[reg].loc.offset = offset;
526 break;
527
46ea248b 528 case DW_CFA_val_offset:
f664829e 529 insn_ptr = safe_read_uleb128 (insn_ptr, insn_end, &reg);
1c90d9f0 530 fs->regs.alloc_regs (reg + 1);
f664829e 531 insn_ptr = safe_read_uleb128 (insn_ptr, insn_end, &utmp);
46ea248b
AO
532 offset = utmp * fs->data_align;
533 fs->regs.reg[reg].how = DWARF2_FRAME_REG_SAVED_VAL_OFFSET;
534 fs->regs.reg[reg].loc.offset = offset;
535 break;
536
537 case DW_CFA_val_offset_sf:
f664829e 538 insn_ptr = safe_read_uleb128 (insn_ptr, insn_end, &reg);
1c90d9f0 539 fs->regs.alloc_regs (reg + 1);
f664829e 540 insn_ptr = safe_read_sleb128 (insn_ptr, insn_end, &offset);
46ea248b
AO
541 offset *= fs->data_align;
542 fs->regs.reg[reg].how = DWARF2_FRAME_REG_SAVED_VAL_OFFSET;
543 fs->regs.reg[reg].loc.offset = offset;
544 break;
545
546 case DW_CFA_val_expression:
f664829e 547 insn_ptr = safe_read_uleb128 (insn_ptr, insn_end, &reg);
1c90d9f0 548 fs->regs.alloc_regs (reg + 1);
f664829e 549 insn_ptr = safe_read_uleb128 (insn_ptr, insn_end, &utmp);
b348037f
YQ
550 fs->regs.reg[reg].loc.exp.start = insn_ptr;
551 fs->regs.reg[reg].loc.exp.len = utmp;
46ea248b
AO
552 fs->regs.reg[reg].how = DWARF2_FRAME_REG_SAVED_VAL_EXP;
553 insn_ptr += utmp;
554 break;
555
a8504492 556 case DW_CFA_def_cfa_sf:
f664829e
DE
557 insn_ptr = safe_read_uleb128 (insn_ptr, insn_end, &reg);
558 fs->regs.cfa_reg = dwarf2_frame_adjust_regnum (gdbarch, reg,
2fd481e1 559 eh_frame_p);
f664829e 560 insn_ptr = safe_read_sleb128 (insn_ptr, insn_end, &offset);
2fd481e1
PP
561 fs->regs.cfa_offset = offset * fs->data_align;
562 fs->regs.cfa_how = CFA_REG_OFFSET;
a8504492
MK
563 break;
564
565 case DW_CFA_def_cfa_offset_sf:
f664829e 566 insn_ptr = safe_read_sleb128 (insn_ptr, insn_end, &offset);
2fd481e1 567 fs->regs.cfa_offset = offset * fs->data_align;
a8504492 568 /* cfa_how deliberately not set. */
cfc14b3a
MK
569 break;
570
571 case DW_CFA_GNU_args_size:
572 /* Ignored. */
f664829e 573 insn_ptr = safe_read_uleb128 (insn_ptr, insn_end, &utmp);
cfc14b3a
MK
574 break;
575
58894217 576 case DW_CFA_GNU_negative_offset_extended:
f664829e 577 insn_ptr = safe_read_uleb128 (insn_ptr, insn_end, &reg);
4fc771b8 578 reg = dwarf2_frame_adjust_regnum (gdbarch, reg, eh_frame_p);
507a579c
PA
579 insn_ptr = safe_read_uleb128 (insn_ptr, insn_end, &utmp);
580 offset = utmp * fs->data_align;
1c90d9f0 581 fs->regs.alloc_regs (reg + 1);
58894217
JK
582 fs->regs.reg[reg].how = DWARF2_FRAME_REG_SAVED_OFFSET;
583 fs->regs.reg[reg].loc.offset = -offset;
584 break;
585
cfc14b3a 586 default:
b41c5a85
JW
587 if (insn >= DW_CFA_lo_user && insn <= DW_CFA_hi_user)
588 {
589 /* Handle vendor-specific CFI for different architectures. */
590 if (!gdbarch_execute_dwarf_cfa_vendor_op (gdbarch, insn, fs))
591 error (_("Call Frame Instruction op %d in vendor extension "
592 "space is not handled on this architecture."),
593 insn);
594 }
595 else
596 internal_error (__FILE__, __LINE__,
597 _("Unknown CFI encountered."));
cfc14b3a
MK
598 }
599 }
600 }
601
780942fc 602 if (fs->initial.reg.empty ())
111c6489
JK
603 {
604 /* Don't allow remember/restore between CIE and FDE programs. */
1c90d9f0 605 delete fs->regs.prev;
111c6489
JK
606 fs->regs.prev = NULL;
607 }
608
609 return insn_ptr;
cfc14b3a 610}
1c90d9f0
YQ
611
612#if GDB_SELF_TEST
613
614namespace selftests {
615
616/* Unit test to function execute_cfa_program. */
617
618static void
619execute_cfa_program_test (struct gdbarch *gdbarch)
620{
621 struct dwarf2_fde fde;
622 struct dwarf2_cie cie;
623
624 memset (&fde, 0, sizeof fde);
625 memset (&cie, 0, sizeof cie);
626
627 cie.data_alignment_factor = -4;
628 cie.code_alignment_factor = 2;
629 fde.cie = &cie;
630
631 dwarf2_frame_state fs (0, fde.cie);
632
633 gdb_byte insns[] =
634 {
635 DW_CFA_def_cfa, 1, 4, /* DW_CFA_def_cfa: r1 ofs 4 */
636 DW_CFA_offset | 0x2, 1, /* DW_CFA_offset: r2 at cfa-4 */
637 DW_CFA_remember_state,
638 DW_CFA_restore_state,
639 };
640
641 const gdb_byte *insn_end = insns + sizeof (insns);
642 const gdb_byte *out = execute_cfa_program (&fde, insns, insn_end, gdbarch,
643 0, &fs);
644
645 SELF_CHECK (out == insn_end);
646 SELF_CHECK (fs.pc == 0);
647
648 /* The instructions above only use r1 and r2, but the register numbers
649 used are adjusted by dwarf2_frame_adjust_regnum. */
650 auto r1 = dwarf2_frame_adjust_regnum (gdbarch, 1, fde.eh_frame_p);
651 auto r2 = dwarf2_frame_adjust_regnum (gdbarch, 2, fde.eh_frame_p);
652
780942fc 653 SELF_CHECK (fs.regs.reg.size () == (std::max (r1, r2) + 1));
1c90d9f0
YQ
654
655 SELF_CHECK (fs.regs.reg[r2].how == DWARF2_FRAME_REG_SAVED_OFFSET);
656 SELF_CHECK (fs.regs.reg[r2].loc.offset == -4);
657
780942fc 658 for (auto i = 0; i < fs.regs.reg.size (); i++)
1c90d9f0
YQ
659 if (i != r2)
660 SELF_CHECK (fs.regs.reg[i].how == DWARF2_FRAME_REG_UNSPECIFIED);
661
662 SELF_CHECK (fs.regs.cfa_reg == 1);
663 SELF_CHECK (fs.regs.cfa_offset == 4);
664 SELF_CHECK (fs.regs.cfa_how == CFA_REG_OFFSET);
665 SELF_CHECK (fs.regs.cfa_exp == NULL);
666 SELF_CHECK (fs.regs.prev == NULL);
667}
668
669} // namespace selftests
670#endif /* GDB_SELF_TEST */
671
8f22cb90 672\f
cfc14b3a 673
8f22cb90 674/* Architecture-specific operations. */
cfc14b3a 675
8f22cb90
MK
676/* Per-architecture data key. */
677static struct gdbarch_data *dwarf2_frame_data;
678
679struct dwarf2_frame_ops
680{
681 /* Pre-initialize the register state REG for register REGNUM. */
aff37fc1
DM
682 void (*init_reg) (struct gdbarch *, int, struct dwarf2_frame_state_reg *,
683 struct frame_info *);
3ed09a32 684
4a4e5149 685 /* Check whether the THIS_FRAME is a signal trampoline. */
3ed09a32 686 int (*signal_frame_p) (struct gdbarch *, struct frame_info *);
4bf8967c 687
4fc771b8
DJ
688 /* Convert .eh_frame register number to DWARF register number, or
689 adjust .debug_frame register number. */
690 int (*adjust_regnum) (struct gdbarch *, int, int);
cfc14b3a
MK
691};
692
8f22cb90
MK
693/* Default architecture-specific register state initialization
694 function. */
695
696static void
697dwarf2_frame_default_init_reg (struct gdbarch *gdbarch, int regnum,
aff37fc1 698 struct dwarf2_frame_state_reg *reg,
4a4e5149 699 struct frame_info *this_frame)
8f22cb90
MK
700{
701 /* If we have a register that acts as a program counter, mark it as
702 a destination for the return address. If we have a register that
703 serves as the stack pointer, arrange for it to be filled with the
704 call frame address (CFA). The other registers are marked as
705 unspecified.
706
707 We copy the return address to the program counter, since many
708 parts in GDB assume that it is possible to get the return address
709 by unwinding the program counter register. However, on ISA's
710 with a dedicated return address register, the CFI usually only
711 contains information to unwind that return address register.
712
713 The reason we're treating the stack pointer special here is
714 because in many cases GCC doesn't emit CFI for the stack pointer
715 and implicitly assumes that it is equal to the CFA. This makes
716 some sense since the DWARF specification (version 3, draft 8,
717 p. 102) says that:
718
719 "Typically, the CFA is defined to be the value of the stack
720 pointer at the call site in the previous frame (which may be
721 different from its value on entry to the current frame)."
722
723 However, this isn't true for all platforms supported by GCC
724 (e.g. IBM S/390 and zSeries). Those architectures should provide
725 their own architecture-specific initialization function. */
05cbe71a 726
ad010def 727 if (regnum == gdbarch_pc_regnum (gdbarch))
8f22cb90 728 reg->how = DWARF2_FRAME_REG_RA;
ad010def 729 else if (regnum == gdbarch_sp_regnum (gdbarch))
8f22cb90
MK
730 reg->how = DWARF2_FRAME_REG_CFA;
731}
05cbe71a 732
8f22cb90 733/* Return a default for the architecture-specific operations. */
05cbe71a 734
8f22cb90 735static void *
030f20e1 736dwarf2_frame_init (struct obstack *obstack)
8f22cb90
MK
737{
738 struct dwarf2_frame_ops *ops;
739
030f20e1 740 ops = OBSTACK_ZALLOC (obstack, struct dwarf2_frame_ops);
8f22cb90
MK
741 ops->init_reg = dwarf2_frame_default_init_reg;
742 return ops;
743}
05cbe71a 744
8f22cb90
MK
745/* Set the architecture-specific register state initialization
746 function for GDBARCH to INIT_REG. */
747
748void
749dwarf2_frame_set_init_reg (struct gdbarch *gdbarch,
750 void (*init_reg) (struct gdbarch *, int,
aff37fc1
DM
751 struct dwarf2_frame_state_reg *,
752 struct frame_info *))
8f22cb90 753{
9a3c8263
SM
754 struct dwarf2_frame_ops *ops
755 = (struct dwarf2_frame_ops *) gdbarch_data (gdbarch, dwarf2_frame_data);
8f22cb90 756
8f22cb90
MK
757 ops->init_reg = init_reg;
758}
759
760/* Pre-initialize the register state REG for register REGNUM. */
05cbe71a
MK
761
762static void
763dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
aff37fc1 764 struct dwarf2_frame_state_reg *reg,
4a4e5149 765 struct frame_info *this_frame)
05cbe71a 766{
9a3c8263
SM
767 struct dwarf2_frame_ops *ops
768 = (struct dwarf2_frame_ops *) gdbarch_data (gdbarch, dwarf2_frame_data);
8f22cb90 769
4a4e5149 770 ops->init_reg (gdbarch, regnum, reg, this_frame);
05cbe71a 771}
3ed09a32
DJ
772
773/* Set the architecture-specific signal trampoline recognition
774 function for GDBARCH to SIGNAL_FRAME_P. */
775
776void
777dwarf2_frame_set_signal_frame_p (struct gdbarch *gdbarch,
778 int (*signal_frame_p) (struct gdbarch *,
779 struct frame_info *))
780{
9a3c8263
SM
781 struct dwarf2_frame_ops *ops
782 = (struct dwarf2_frame_ops *) gdbarch_data (gdbarch, dwarf2_frame_data);
3ed09a32
DJ
783
784 ops->signal_frame_p = signal_frame_p;
785}
786
787/* Query the architecture-specific signal frame recognizer for
4a4e5149 788 THIS_FRAME. */
3ed09a32
DJ
789
790static int
791dwarf2_frame_signal_frame_p (struct gdbarch *gdbarch,
4a4e5149 792 struct frame_info *this_frame)
3ed09a32 793{
9a3c8263
SM
794 struct dwarf2_frame_ops *ops
795 = (struct dwarf2_frame_ops *) gdbarch_data (gdbarch, dwarf2_frame_data);
3ed09a32
DJ
796
797 if (ops->signal_frame_p == NULL)
798 return 0;
4a4e5149 799 return ops->signal_frame_p (gdbarch, this_frame);
3ed09a32 800}
4bf8967c 801
4fc771b8
DJ
802/* Set the architecture-specific adjustment of .eh_frame and .debug_frame
803 register numbers. */
4bf8967c
AS
804
805void
4fc771b8
DJ
806dwarf2_frame_set_adjust_regnum (struct gdbarch *gdbarch,
807 int (*adjust_regnum) (struct gdbarch *,
808 int, int))
4bf8967c 809{
9a3c8263
SM
810 struct dwarf2_frame_ops *ops
811 = (struct dwarf2_frame_ops *) gdbarch_data (gdbarch, dwarf2_frame_data);
4bf8967c 812
4fc771b8 813 ops->adjust_regnum = adjust_regnum;
4bf8967c
AS
814}
815
4fc771b8
DJ
816/* Translate a .eh_frame register to DWARF register, or adjust a .debug_frame
817 register. */
4bf8967c 818
4fc771b8 819static int
3e43a32a
MS
820dwarf2_frame_adjust_regnum (struct gdbarch *gdbarch,
821 int regnum, int eh_frame_p)
4bf8967c 822{
9a3c8263
SM
823 struct dwarf2_frame_ops *ops
824 = (struct dwarf2_frame_ops *) gdbarch_data (gdbarch, dwarf2_frame_data);
4bf8967c 825
4fc771b8 826 if (ops->adjust_regnum == NULL)
4bf8967c 827 return regnum;
4fc771b8 828 return ops->adjust_regnum (gdbarch, regnum, eh_frame_p);
4bf8967c 829}
303b6f5d
DJ
830
831static void
832dwarf2_frame_find_quirks (struct dwarf2_frame_state *fs,
833 struct dwarf2_fde *fde)
834{
43f3e411 835 struct compunit_symtab *cust;
303b6f5d 836
43f3e411
DE
837 cust = find_pc_compunit_symtab (fs->pc);
838 if (cust == NULL)
303b6f5d
DJ
839 return;
840
43f3e411 841 if (producer_is_realview (COMPUNIT_PRODUCER (cust)))
a6c727b2
DJ
842 {
843 if (fde->cie->version == 1)
844 fs->armcc_cfa_offsets_sf = 1;
845
846 if (fde->cie->version == 1)
847 fs->armcc_cfa_offsets_reversed = 1;
848
849 /* The reversed offset problem is present in some compilers
850 using DWARF3, but it was eventually fixed. Check the ARM
851 defined augmentations, which are in the format "armcc" followed
852 by a list of one-character options. The "+" option means
853 this problem is fixed (no quirk needed). If the armcc
854 augmentation is missing, the quirk is needed. */
855 if (fde->cie->version == 3
61012eef 856 && (!startswith (fde->cie->augmentation, "armcc")
a6c727b2
DJ
857 || strchr (fde->cie->augmentation + 5, '+') == NULL))
858 fs->armcc_cfa_offsets_reversed = 1;
859
860 return;
861 }
303b6f5d 862}
8f22cb90
MK
863\f
864
a8fd5589
TT
865/* See dwarf2-frame.h. */
866
867int
868dwarf2_fetch_cfa_info (struct gdbarch *gdbarch, CORE_ADDR pc,
869 struct dwarf2_per_cu_data *data,
870 int *regnum_out, LONGEST *offset_out,
871 CORE_ADDR *text_offset_out,
872 const gdb_byte **cfa_start_out,
873 const gdb_byte **cfa_end_out)
9f6f94ff 874{
9f6f94ff 875 struct dwarf2_fde *fde;
22e048c9 876 CORE_ADDR text_offset;
afe37d6b 877 CORE_ADDR pc1 = pc;
9f6f94ff
TT
878
879 /* Find the correct FDE. */
afe37d6b 880 fde = dwarf2_frame_find_fde (&pc1, &text_offset);
9f6f94ff
TT
881 if (fde == NULL)
882 error (_("Could not compute CFA; needed to translate this expression"));
883
afe37d6b 884 dwarf2_frame_state fs (pc1, fde->cie);
9f6f94ff
TT
885
886 /* Check for "quirks" - known bugs in producers. */
887 dwarf2_frame_find_quirks (&fs, fde);
888
889 /* First decode all the insns in the CIE. */
890 execute_cfa_program (fde, fde->cie->initial_instructions,
891 fde->cie->end, gdbarch, pc, &fs);
892
893 /* Save the initialized register set. */
894 fs.initial = fs.regs;
9f6f94ff
TT
895
896 /* Then decode the insns in the FDE up to our target PC. */
897 execute_cfa_program (fde, fde->instructions, fde->end, gdbarch, pc, &fs);
898
899 /* Calculate the CFA. */
900 switch (fs.regs.cfa_how)
901 {
902 case CFA_REG_OFFSET:
903 {
0fde2c53 904 int regnum = dwarf_reg_to_regnum_or_error (gdbarch, fs.regs.cfa_reg);
a8fd5589
TT
905
906 *regnum_out = regnum;
907 if (fs.armcc_cfa_offsets_reversed)
908 *offset_out = -fs.regs.cfa_offset;
909 else
910 *offset_out = fs.regs.cfa_offset;
911 return 1;
9f6f94ff 912 }
9f6f94ff
TT
913
914 case CFA_EXP:
a8fd5589
TT
915 *text_offset_out = text_offset;
916 *cfa_start_out = fs.regs.cfa_exp;
917 *cfa_end_out = fs.regs.cfa_exp + fs.regs.cfa_exp_len;
918 return 0;
9f6f94ff
TT
919
920 default:
921 internal_error (__FILE__, __LINE__, _("Unknown CFA rule."));
922 }
923}
924
925\f
8f22cb90
MK
926struct dwarf2_frame_cache
927{
928 /* DWARF Call Frame Address. */
929 CORE_ADDR cfa;
930
8fbca658
PA
931 /* Set if the return address column was marked as unavailable
932 (required non-collected memory or registers to compute). */
933 int unavailable_retaddr;
934
0228dfb9
DJ
935 /* Set if the return address column was marked as undefined. */
936 int undefined_retaddr;
937
8f22cb90
MK
938 /* Saved registers, indexed by GDB register number, not by DWARF
939 register number. */
940 struct dwarf2_frame_state_reg *reg;
8d5a9abc
MK
941
942 /* Return address register. */
943 struct dwarf2_frame_state_reg retaddr_reg;
ae0d2f24
UW
944
945 /* Target address size in bytes. */
946 int addr_size;
ac56253d
TT
947
948 /* The .text offset. */
949 CORE_ADDR text_offset;
111c6489 950
1ec56e88
PA
951 /* True if we already checked whether this frame is the bottom frame
952 of a virtual tail call frame chain. */
953 int checked_tailcall_bottom;
954
111c6489
JK
955 /* If not NULL then this frame is the bottom frame of a TAILCALL_FRAME
956 sequence. If NULL then it is a normal case with no TAILCALL_FRAME
957 involved. Non-bottom frames of a virtual tail call frames chain use
958 dwarf2_tailcall_frame_unwind unwinder so this field does not apply for
959 them. */
960 void *tailcall_cache;
1ec56e88
PA
961
962 /* The number of bytes to subtract from TAILCALL_FRAME frames frame
963 base to get the SP, to simulate the return address pushed on the
964 stack. */
965 LONGEST entry_cfa_sp_offset;
966 int entry_cfa_sp_offset_p;
8f22cb90 967};
05cbe71a 968
b9362cc7 969static struct dwarf2_frame_cache *
4a4e5149 970dwarf2_frame_cache (struct frame_info *this_frame, void **this_cache)
cfc14b3a 971{
4a4e5149 972 struct gdbarch *gdbarch = get_frame_arch (this_frame);
f6efe3f8 973 const int num_regs = gdbarch_num_cooked_regs (gdbarch);
cfc14b3a 974 struct dwarf2_frame_cache *cache;
cfc14b3a 975 struct dwarf2_fde *fde;
111c6489 976 CORE_ADDR entry_pc;
111c6489 977 const gdb_byte *instr;
cfc14b3a
MK
978
979 if (*this_cache)
9a3c8263 980 return (struct dwarf2_frame_cache *) *this_cache;
cfc14b3a
MK
981
982 /* Allocate a new cache. */
983 cache = FRAME_OBSTACK_ZALLOC (struct dwarf2_frame_cache);
984 cache->reg = FRAME_OBSTACK_CALLOC (num_regs, struct dwarf2_frame_state_reg);
8fbca658 985 *this_cache = cache;
cfc14b3a 986
cfc14b3a
MK
987 /* Unwind the PC.
988
4a4e5149 989 Note that if the next frame is never supposed to return (i.e. a call
cfc14b3a 990 to abort), the compiler might optimize away the instruction at
4a4e5149 991 its return address. As a result the return address will
cfc14b3a 992 point at some random instruction, and the CFI for that
e4e9607c 993 instruction is probably worthless to us. GCC's unwinder solves
cfc14b3a
MK
994 this problem by substracting 1 from the return address to get an
995 address in the middle of a presumed call instruction (or the
996 instruction in the associated delay slot). This should only be
997 done for "normal" frames and not for resume-type frames (signal
e4e9607c 998 handlers, sentinel frames, dummy frames). The function
ad1193e7 999 get_frame_address_in_block does just this. It's not clear how
e4e9607c
MK
1000 reliable the method is though; there is the potential for the
1001 register state pre-call being different to that on return. */
afe37d6b 1002 CORE_ADDR pc1 = get_frame_address_in_block (this_frame);
cfc14b3a
MK
1003
1004 /* Find the correct FDE. */
afe37d6b 1005 fde = dwarf2_frame_find_fde (&pc1, &cache->text_offset);
cfc14b3a
MK
1006 gdb_assert (fde != NULL);
1007
afe37d6b
YQ
1008 /* Allocate and initialize the frame state. */
1009 struct dwarf2_frame_state fs (pc1, fde->cie);
1010
ae0d2f24 1011 cache->addr_size = fde->cie->addr_size;
cfc14b3a 1012
303b6f5d 1013 /* Check for "quirks" - known bugs in producers. */
afe37d6b 1014 dwarf2_frame_find_quirks (&fs, fde);
303b6f5d 1015
cfc14b3a 1016 /* First decode all the insns in the CIE. */
ae0d2f24 1017 execute_cfa_program (fde, fde->cie->initial_instructions,
0c92d8c1 1018 fde->cie->end, gdbarch,
afe37d6b 1019 get_frame_address_in_block (this_frame), &fs);
cfc14b3a
MK
1020
1021 /* Save the initialized register set. */
afe37d6b 1022 fs.initial = fs.regs;
cfc14b3a 1023
1aff7173
KB
1024 /* Fetching the entry pc for THIS_FRAME won't necessarily result
1025 in an address that's within the range of FDE locations. This
1026 is due to the possibility of the function occupying non-contiguous
1027 ranges. */
1028 if (get_frame_func_if_available (this_frame, &entry_pc)
1029 && fde->initial_location <= entry_pc
1030 && entry_pc < fde->initial_location + fde->address_range)
111c6489
JK
1031 {
1032 /* Decode the insns in the FDE up to the entry PC. */
1033 instr = execute_cfa_program (fde, fde->instructions, fde->end, gdbarch,
afe37d6b 1034 entry_pc, &fs);
111c6489 1035
afe37d6b
YQ
1036 if (fs.regs.cfa_how == CFA_REG_OFFSET
1037 && (dwarf_reg_to_regnum (gdbarch, fs.regs.cfa_reg)
111c6489
JK
1038 == gdbarch_sp_regnum (gdbarch)))
1039 {
afe37d6b 1040 cache->entry_cfa_sp_offset = fs.regs.cfa_offset;
1ec56e88 1041 cache->entry_cfa_sp_offset_p = 1;
111c6489
JK
1042 }
1043 }
1044 else
1045 instr = fde->instructions;
1046
cfc14b3a 1047 /* Then decode the insns in the FDE up to our target PC. */
111c6489 1048 execute_cfa_program (fde, instr, fde->end, gdbarch,
afe37d6b 1049 get_frame_address_in_block (this_frame), &fs);
cfc14b3a 1050
a70b8144 1051 try
cfc14b3a 1052 {
8fbca658 1053 /* Calculate the CFA. */
afe37d6b 1054 switch (fs.regs.cfa_how)
8fbca658
PA
1055 {
1056 case CFA_REG_OFFSET:
afe37d6b
YQ
1057 cache->cfa = read_addr_from_reg (this_frame, fs.regs.cfa_reg);
1058 if (fs.armcc_cfa_offsets_reversed)
1059 cache->cfa -= fs.regs.cfa_offset;
8fbca658 1060 else
afe37d6b 1061 cache->cfa += fs.regs.cfa_offset;
8fbca658
PA
1062 break;
1063
1064 case CFA_EXP:
1065 cache->cfa =
afe37d6b 1066 execute_stack_op (fs.regs.cfa_exp, fs.regs.cfa_exp_len,
8fbca658
PA
1067 cache->addr_size, cache->text_offset,
1068 this_frame, 0, 0);
1069 break;
1070
1071 default:
1072 internal_error (__FILE__, __LINE__, _("Unknown CFA rule."));
1073 }
1074 }
230d2906 1075 catch (const gdb_exception_error &ex)
8fbca658
PA
1076 {
1077 if (ex.error == NOT_AVAILABLE_ERROR)
1078 {
1079 cache->unavailable_retaddr = 1;
1080 return cache;
1081 }
cfc14b3a 1082
eedc3f4f 1083 throw;
cfc14b3a
MK
1084 }
1085
05cbe71a 1086 /* Initialize the register state. */
3e2c4033
AC
1087 {
1088 int regnum;
e4e9607c 1089
3e2c4033 1090 for (regnum = 0; regnum < num_regs; regnum++)
4a4e5149 1091 dwarf2_frame_init_reg (gdbarch, regnum, &cache->reg[regnum], this_frame);
3e2c4033
AC
1092 }
1093
1094 /* Go through the DWARF2 CFI generated table and save its register
79c4cb80
MK
1095 location information in the cache. Note that we don't skip the
1096 return address column; it's perfectly all right for it to
0fde2c53 1097 correspond to a real register. */
3e2c4033
AC
1098 {
1099 int column; /* CFI speak for "register number". */
e4e9607c 1100
780942fc 1101 for (column = 0; column < fs.regs.reg.size (); column++)
3e2c4033 1102 {
3e2c4033 1103 /* Use the GDB register number as the destination index. */
0fde2c53 1104 int regnum = dwarf_reg_to_regnum (gdbarch, column);
3e2c4033 1105
0fde2c53 1106 /* Protect against a target returning a bad register. */
3e2c4033
AC
1107 if (regnum < 0 || regnum >= num_regs)
1108 continue;
1109
1110 /* NOTE: cagney/2003-09-05: CFI should specify the disposition
e4e9607c
MK
1111 of all debug info registers. If it doesn't, complain (but
1112 not too loudly). It turns out that GCC assumes that an
3e2c4033
AC
1113 unspecified register implies "same value" when CFI (draft
1114 7) specifies nothing at all. Such a register could equally
1115 be interpreted as "undefined". Also note that this check
e4e9607c
MK
1116 isn't sufficient; it only checks that all registers in the
1117 range [0 .. max column] are specified, and won't detect
3e2c4033 1118 problems when a debug info register falls outside of the
e4e9607c 1119 table. We need a way of iterating through all the valid
3e2c4033 1120 DWARF2 register numbers. */
afe37d6b 1121 if (fs.regs.reg[column].how == DWARF2_FRAME_REG_UNSPECIFIED)
f059bf6f
AC
1122 {
1123 if (cache->reg[regnum].how == DWARF2_FRAME_REG_UNSPECIFIED)
b98664d3 1124 complaint (_("\
5af949e3 1125incomplete CFI data; unspecified registers (e.g., %s) at %s"),
f059bf6f 1126 gdbarch_register_name (gdbarch, regnum),
afe37d6b 1127 paddress (gdbarch, fs.pc));
f059bf6f 1128 }
35889917 1129 else
afe37d6b 1130 cache->reg[regnum] = fs.regs.reg[column];
3e2c4033
AC
1131 }
1132 }
cfc14b3a 1133
8d5a9abc
MK
1134 /* Eliminate any DWARF2_FRAME_REG_RA rules, and save the information
1135 we need for evaluating DWARF2_FRAME_REG_RA_OFFSET rules. */
35889917
MK
1136 {
1137 int regnum;
1138
1139 for (regnum = 0; regnum < num_regs; regnum++)
1140 {
8d5a9abc
MK
1141 if (cache->reg[regnum].how == DWARF2_FRAME_REG_RA
1142 || cache->reg[regnum].how == DWARF2_FRAME_REG_RA_OFFSET)
35889917 1143 {
780942fc
TT
1144 const std::vector<struct dwarf2_frame_state_reg> &regs
1145 = fs.regs.reg;
1146 ULONGEST retaddr_column = fs.retaddr_column;
05cbe71a 1147
d4f10bf2
MK
1148 /* It seems rather bizarre to specify an "empty" column as
1149 the return adress column. However, this is exactly
1150 what GCC does on some targets. It turns out that GCC
1151 assumes that the return address can be found in the
1152 register corresponding to the return address column.
8d5a9abc
MK
1153 Incidentally, that's how we should treat a return
1154 address column specifying "same value" too. */
780942fc
TT
1155 if (fs.retaddr_column < fs.regs.reg.size ()
1156 && regs[retaddr_column].how != DWARF2_FRAME_REG_UNSPECIFIED
1157 && regs[retaddr_column].how != DWARF2_FRAME_REG_SAME_VALUE)
8d5a9abc
MK
1158 {
1159 if (cache->reg[regnum].how == DWARF2_FRAME_REG_RA)
780942fc 1160 cache->reg[regnum] = regs[retaddr_column];
8d5a9abc 1161 else
780942fc 1162 cache->retaddr_reg = regs[retaddr_column];
8d5a9abc 1163 }
35889917
MK
1164 else
1165 {
8d5a9abc
MK
1166 if (cache->reg[regnum].how == DWARF2_FRAME_REG_RA)
1167 {
afe37d6b 1168 cache->reg[regnum].loc.reg = fs.retaddr_column;
8d5a9abc
MK
1169 cache->reg[regnum].how = DWARF2_FRAME_REG_SAVED_REG;
1170 }
1171 else
1172 {
afe37d6b 1173 cache->retaddr_reg.loc.reg = fs.retaddr_column;
8d5a9abc
MK
1174 cache->retaddr_reg.how = DWARF2_FRAME_REG_SAVED_REG;
1175 }
35889917
MK
1176 }
1177 }
1178 }
1179 }
cfc14b3a 1180
780942fc 1181 if (fs.retaddr_column < fs.regs.reg.size ()
afe37d6b 1182 && fs.regs.reg[fs.retaddr_column].how == DWARF2_FRAME_REG_UNDEFINED)
0228dfb9
DJ
1183 cache->undefined_retaddr = 1;
1184
cfc14b3a
MK
1185 return cache;
1186}
1187
8fbca658
PA
1188static enum unwind_stop_reason
1189dwarf2_frame_unwind_stop_reason (struct frame_info *this_frame,
1190 void **this_cache)
1191{
1192 struct dwarf2_frame_cache *cache
1193 = dwarf2_frame_cache (this_frame, this_cache);
1194
1195 if (cache->unavailable_retaddr)
1196 return UNWIND_UNAVAILABLE;
1197
1198 if (cache->undefined_retaddr)
1199 return UNWIND_OUTERMOST;
1200
1201 return UNWIND_NO_REASON;
1202}
1203
cfc14b3a 1204static void
4a4e5149 1205dwarf2_frame_this_id (struct frame_info *this_frame, void **this_cache,
cfc14b3a
MK
1206 struct frame_id *this_id)
1207{
1208 struct dwarf2_frame_cache *cache =
4a4e5149 1209 dwarf2_frame_cache (this_frame, this_cache);
cfc14b3a 1210
8fbca658 1211 if (cache->unavailable_retaddr)
5ce0145d
PA
1212 (*this_id) = frame_id_build_unavailable_stack (get_frame_func (this_frame));
1213 else if (cache->undefined_retaddr)
8fbca658 1214 return;
5ce0145d
PA
1215 else
1216 (*this_id) = frame_id_build (cache->cfa, get_frame_func (this_frame));
93d42b30
DJ
1217}
1218
4a4e5149
DJ
1219static struct value *
1220dwarf2_frame_prev_register (struct frame_info *this_frame, void **this_cache,
1221 int regnum)
93d42b30 1222{
4a4e5149 1223 struct gdbarch *gdbarch = get_frame_arch (this_frame);
93d42b30 1224 struct dwarf2_frame_cache *cache =
4a4e5149
DJ
1225 dwarf2_frame_cache (this_frame, this_cache);
1226 CORE_ADDR addr;
1227 int realnum;
cfc14b3a 1228
1ec56e88
PA
1229 /* Check whether THIS_FRAME is the bottom frame of a virtual tail
1230 call frame chain. */
1231 if (!cache->checked_tailcall_bottom)
1232 {
1233 cache->checked_tailcall_bottom = 1;
1234 dwarf2_tailcall_sniffer_first (this_frame, &cache->tailcall_cache,
1235 (cache->entry_cfa_sp_offset_p
1236 ? &cache->entry_cfa_sp_offset : NULL));
1237 }
1238
111c6489
JK
1239 /* Non-bottom frames of a virtual tail call frames chain use
1240 dwarf2_tailcall_frame_unwind unwinder so this code does not apply for
1241 them. If dwarf2_tailcall_prev_register_first does not have specific value
1242 unwind the register, tail call frames are assumed to have the register set
1243 of the top caller. */
1244 if (cache->tailcall_cache)
1245 {
1246 struct value *val;
1247
1248 val = dwarf2_tailcall_prev_register_first (this_frame,
1249 &cache->tailcall_cache,
1250 regnum);
1251 if (val)
1252 return val;
1253 }
1254
cfc14b3a
MK
1255 switch (cache->reg[regnum].how)
1256 {
05cbe71a 1257 case DWARF2_FRAME_REG_UNDEFINED:
3e2c4033 1258 /* If CFI explicitly specified that the value isn't defined,
e4e9607c 1259 mark it as optimized away; the value isn't available. */
4a4e5149 1260 return frame_unwind_got_optimized (this_frame, regnum);
cfc14b3a 1261
05cbe71a 1262 case DWARF2_FRAME_REG_SAVED_OFFSET:
4a4e5149
DJ
1263 addr = cache->cfa + cache->reg[regnum].loc.offset;
1264 return frame_unwind_got_memory (this_frame, regnum, addr);
cfc14b3a 1265
05cbe71a 1266 case DWARF2_FRAME_REG_SAVED_REG:
0fde2c53
DE
1267 realnum = dwarf_reg_to_regnum_or_error
1268 (gdbarch, cache->reg[regnum].loc.reg);
4a4e5149 1269 return frame_unwind_got_register (this_frame, regnum, realnum);
cfc14b3a 1270
05cbe71a 1271 case DWARF2_FRAME_REG_SAVED_EXP:
b348037f
YQ
1272 addr = execute_stack_op (cache->reg[regnum].loc.exp.start,
1273 cache->reg[regnum].loc.exp.len,
ac56253d
TT
1274 cache->addr_size, cache->text_offset,
1275 this_frame, cache->cfa, 1);
4a4e5149 1276 return frame_unwind_got_memory (this_frame, regnum, addr);
cfc14b3a 1277
46ea248b 1278 case DWARF2_FRAME_REG_SAVED_VAL_OFFSET:
4a4e5149
DJ
1279 addr = cache->cfa + cache->reg[regnum].loc.offset;
1280 return frame_unwind_got_constant (this_frame, regnum, addr);
46ea248b
AO
1281
1282 case DWARF2_FRAME_REG_SAVED_VAL_EXP:
b348037f
YQ
1283 addr = execute_stack_op (cache->reg[regnum].loc.exp.start,
1284 cache->reg[regnum].loc.exp.len,
ac56253d
TT
1285 cache->addr_size, cache->text_offset,
1286 this_frame, cache->cfa, 1);
4a4e5149 1287 return frame_unwind_got_constant (this_frame, regnum, addr);
46ea248b 1288
05cbe71a 1289 case DWARF2_FRAME_REG_UNSPECIFIED:
3e2c4033
AC
1290 /* GCC, in its infinite wisdom decided to not provide unwind
1291 information for registers that are "same value". Since
1292 DWARF2 (3 draft 7) doesn't define such behavior, said
1293 registers are actually undefined (which is different to CFI
1294 "undefined"). Code above issues a complaint about this.
1295 Here just fudge the books, assume GCC, and that the value is
1296 more inner on the stack. */
4a4e5149 1297 return frame_unwind_got_register (this_frame, regnum, regnum);
3e2c4033 1298
05cbe71a 1299 case DWARF2_FRAME_REG_SAME_VALUE:
4a4e5149 1300 return frame_unwind_got_register (this_frame, regnum, regnum);
cfc14b3a 1301
05cbe71a 1302 case DWARF2_FRAME_REG_CFA:
4a4e5149 1303 return frame_unwind_got_address (this_frame, regnum, cache->cfa);
35889917 1304
ea7963f0 1305 case DWARF2_FRAME_REG_CFA_OFFSET:
4a4e5149
DJ
1306 addr = cache->cfa + cache->reg[regnum].loc.offset;
1307 return frame_unwind_got_address (this_frame, regnum, addr);
ea7963f0 1308
8d5a9abc 1309 case DWARF2_FRAME_REG_RA_OFFSET:
4a4e5149 1310 addr = cache->reg[regnum].loc.offset;
0fde2c53 1311 regnum = dwarf_reg_to_regnum_or_error
4a4e5149
DJ
1312 (gdbarch, cache->retaddr_reg.loc.reg);
1313 addr += get_frame_register_unsigned (this_frame, regnum);
1314 return frame_unwind_got_address (this_frame, regnum, addr);
8d5a9abc 1315
b39cc962
DJ
1316 case DWARF2_FRAME_REG_FN:
1317 return cache->reg[regnum].loc.fn (this_frame, this_cache, regnum);
1318
cfc14b3a 1319 default:
e2e0b3e5 1320 internal_error (__FILE__, __LINE__, _("Unknown register rule."));
cfc14b3a
MK
1321 }
1322}
1323
111c6489
JK
1324/* Proxy for tailcall_frame_dealloc_cache for bottom frame of a virtual tail
1325 call frames chain. */
1326
1327static void
1328dwarf2_frame_dealloc_cache (struct frame_info *self, void *this_cache)
1329{
1330 struct dwarf2_frame_cache *cache = dwarf2_frame_cache (self, &this_cache);
1331
1332 if (cache->tailcall_cache)
1333 dwarf2_tailcall_frame_unwind.dealloc_cache (self, cache->tailcall_cache);
1334}
1335
4a4e5149
DJ
1336static int
1337dwarf2_frame_sniffer (const struct frame_unwind *self,
1338 struct frame_info *this_frame, void **this_cache)
cfc14b3a 1339{
3c3bb058
AB
1340 if (!dwarf2_frame_unwinders_enabled_p)
1341 return 0;
1342
30baf67b 1343 /* Grab an address that is guaranteed to reside somewhere within the
4a4e5149 1344 function. get_frame_pc(), with a no-return next function, can
93d42b30
DJ
1345 end up returning something past the end of this function's body.
1346 If the frame we're sniffing for is a signal frame whose start
1347 address is placed on the stack by the OS, its FDE must
4a4e5149
DJ
1348 extend one byte before its start address or we could potentially
1349 select the FDE of the previous function. */
1350 CORE_ADDR block_addr = get_frame_address_in_block (this_frame);
ac56253d 1351 struct dwarf2_fde *fde = dwarf2_frame_find_fde (&block_addr, NULL);
9a619af0 1352
56c987f6 1353 if (!fde)
4a4e5149 1354 return 0;
3ed09a32
DJ
1355
1356 /* On some targets, signal trampolines may have unwind information.
1357 We need to recognize them so that we set the frame type
1358 correctly. */
1359
56c987f6 1360 if (fde->cie->signal_frame
4a4e5149
DJ
1361 || dwarf2_frame_signal_frame_p (get_frame_arch (this_frame),
1362 this_frame))
1363 return self->type == SIGTRAMP_FRAME;
1364
111c6489
JK
1365 if (self->type != NORMAL_FRAME)
1366 return 0;
1367
111c6489 1368 return 1;
4a4e5149
DJ
1369}
1370
1371static const struct frame_unwind dwarf2_frame_unwind =
1372{
1373 NORMAL_FRAME,
8fbca658 1374 dwarf2_frame_unwind_stop_reason,
4a4e5149
DJ
1375 dwarf2_frame_this_id,
1376 dwarf2_frame_prev_register,
1377 NULL,
111c6489
JK
1378 dwarf2_frame_sniffer,
1379 dwarf2_frame_dealloc_cache
4a4e5149
DJ
1380};
1381
1382static const struct frame_unwind dwarf2_signal_frame_unwind =
1383{
1384 SIGTRAMP_FRAME,
8fbca658 1385 dwarf2_frame_unwind_stop_reason,
4a4e5149
DJ
1386 dwarf2_frame_this_id,
1387 dwarf2_frame_prev_register,
1388 NULL,
111c6489
JK
1389 dwarf2_frame_sniffer,
1390
1391 /* TAILCALL_CACHE can never be in such frame to need dealloc_cache. */
1392 NULL
4a4e5149 1393};
cfc14b3a 1394
4a4e5149
DJ
1395/* Append the DWARF-2 frame unwinders to GDBARCH's list. */
1396
1397void
1398dwarf2_append_unwinders (struct gdbarch *gdbarch)
1399{
111c6489
JK
1400 /* TAILCALL_FRAME must be first to find the record by
1401 dwarf2_tailcall_sniffer_first. */
1402 frame_unwind_append_unwinder (gdbarch, &dwarf2_tailcall_frame_unwind);
1403
4a4e5149
DJ
1404 frame_unwind_append_unwinder (gdbarch, &dwarf2_frame_unwind);
1405 frame_unwind_append_unwinder (gdbarch, &dwarf2_signal_frame_unwind);
cfc14b3a
MK
1406}
1407\f
1408
1409/* There is no explicitly defined relationship between the CFA and the
1410 location of frame's local variables and arguments/parameters.
1411 Therefore, frame base methods on this page should probably only be
1412 used as a last resort, just to avoid printing total garbage as a
1413 response to the "info frame" command. */
1414
1415static CORE_ADDR
4a4e5149 1416dwarf2_frame_base_address (struct frame_info *this_frame, void **this_cache)
cfc14b3a
MK
1417{
1418 struct dwarf2_frame_cache *cache =
4a4e5149 1419 dwarf2_frame_cache (this_frame, this_cache);
cfc14b3a
MK
1420
1421 return cache->cfa;
1422}
1423
1424static const struct frame_base dwarf2_frame_base =
1425{
1426 &dwarf2_frame_unwind,
1427 dwarf2_frame_base_address,
1428 dwarf2_frame_base_address,
1429 dwarf2_frame_base_address
1430};
1431
1432const struct frame_base *
4a4e5149 1433dwarf2_frame_base_sniffer (struct frame_info *this_frame)
cfc14b3a 1434{
4a4e5149 1435 CORE_ADDR block_addr = get_frame_address_in_block (this_frame);
9a619af0 1436
ac56253d 1437 if (dwarf2_frame_find_fde (&block_addr, NULL))
cfc14b3a
MK
1438 return &dwarf2_frame_base;
1439
1440 return NULL;
1441}
e7802207
TT
1442
1443/* Compute the CFA for THIS_FRAME, but only if THIS_FRAME came from
1444 the DWARF unwinder. This is used to implement
1445 DW_OP_call_frame_cfa. */
1446
1447CORE_ADDR
1448dwarf2_frame_cfa (struct frame_info *this_frame)
1449{
0b722aec
MM
1450 if (frame_unwinder_is (this_frame, &record_btrace_tailcall_frame_unwind)
1451 || frame_unwinder_is (this_frame, &record_btrace_frame_unwind))
1452 throw_error (NOT_AVAILABLE_ERROR,
1453 _("cfa not available for record btrace target"));
1454
e7802207
TT
1455 while (get_frame_type (this_frame) == INLINE_FRAME)
1456 this_frame = get_prev_frame (this_frame);
32261e52
MM
1457 if (get_frame_unwind_stop_reason (this_frame) == UNWIND_UNAVAILABLE)
1458 throw_error (NOT_AVAILABLE_ERROR,
1459 _("can't compute CFA for this frame: "
1460 "required registers or memory are unavailable"));
14aba1ac
JB
1461
1462 if (get_frame_id (this_frame).stack_status != FID_STACK_VALID)
1463 throw_error (NOT_AVAILABLE_ERROR,
1464 _("can't compute CFA for this frame: "
1465 "frame base not available"));
1466
e7802207
TT
1467 return get_frame_base (this_frame);
1468}
cfc14b3a 1469\f
a9d65418 1470static const struct objfile_key<dwarf2_fde_table> dwarf2_frame_objfile_data;
0d0e1a63 1471
cfc14b3a
MK
1472\f
1473
1474/* Pointer encoding helper functions. */
1475
1476/* GCC supports exception handling based on DWARF2 CFI. However, for
1477 technical reasons, it encodes addresses in its FDE's in a different
1478 way. Several "pointer encodings" are supported. The encoding
1479 that's used for a particular FDE is determined by the 'R'
1480 augmentation in the associated CIE. The argument of this
1481 augmentation is a single byte.
1482
1483 The address can be encoded as 2 bytes, 4 bytes, 8 bytes, or as a
1484 LEB128. This is encoded in bits 0, 1 and 2. Bit 3 encodes whether
1485 the address is signed or unsigned. Bits 4, 5 and 6 encode how the
1486 address should be interpreted (absolute, relative to the current
1487 position in the FDE, ...). Bit 7, indicates that the address
1488 should be dereferenced. */
1489
852483bc 1490static gdb_byte
cfc14b3a
MK
1491encoding_for_size (unsigned int size)
1492{
1493 switch (size)
1494 {
1495 case 2:
1496 return DW_EH_PE_udata2;
1497 case 4:
1498 return DW_EH_PE_udata4;
1499 case 8:
1500 return DW_EH_PE_udata8;
1501 default:
e2e0b3e5 1502 internal_error (__FILE__, __LINE__, _("Unsupported address size"));
cfc14b3a
MK
1503 }
1504}
1505
cfc14b3a 1506static CORE_ADDR
852483bc 1507read_encoded_value (struct comp_unit *unit, gdb_byte encoding,
0d45f56e
TT
1508 int ptr_len, const gdb_byte *buf,
1509 unsigned int *bytes_read_ptr,
ae0d2f24 1510 CORE_ADDR func_base)
cfc14b3a 1511{
68f6cf99 1512 ptrdiff_t offset;
cfc14b3a
MK
1513 CORE_ADDR base;
1514
1515 /* GCC currently doesn't generate DW_EH_PE_indirect encodings for
1516 FDE's. */
1517 if (encoding & DW_EH_PE_indirect)
1518 internal_error (__FILE__, __LINE__,
e2e0b3e5 1519 _("Unsupported encoding: DW_EH_PE_indirect"));
cfc14b3a 1520
68f6cf99
MK
1521 *bytes_read_ptr = 0;
1522
cfc14b3a
MK
1523 switch (encoding & 0x70)
1524 {
1525 case DW_EH_PE_absptr:
1526 base = 0;
1527 break;
1528 case DW_EH_PE_pcrel:
fd361982 1529 base = bfd_section_vma (unit->dwarf_frame_section);
852483bc 1530 base += (buf - unit->dwarf_frame_buffer);
cfc14b3a 1531 break;
0912c7f2
MK
1532 case DW_EH_PE_datarel:
1533 base = unit->dbase;
1534 break;
0fd85043
CV
1535 case DW_EH_PE_textrel:
1536 base = unit->tbase;
1537 break;
03ac2a74 1538 case DW_EH_PE_funcrel:
ae0d2f24 1539 base = func_base;
03ac2a74 1540 break;
68f6cf99
MK
1541 case DW_EH_PE_aligned:
1542 base = 0;
852483bc 1543 offset = buf - unit->dwarf_frame_buffer;
68f6cf99
MK
1544 if ((offset % ptr_len) != 0)
1545 {
1546 *bytes_read_ptr = ptr_len - (offset % ptr_len);
1547 buf += *bytes_read_ptr;
1548 }
1549 break;
cfc14b3a 1550 default:
3e43a32a
MS
1551 internal_error (__FILE__, __LINE__,
1552 _("Invalid or unsupported encoding"));
cfc14b3a
MK
1553 }
1554
b04de778 1555 if ((encoding & 0x07) == 0x00)
f2fec864
DJ
1556 {
1557 encoding |= encoding_for_size (ptr_len);
1558 if (bfd_get_sign_extend_vma (unit->abfd))
1559 encoding |= DW_EH_PE_signed;
1560 }
cfc14b3a
MK
1561
1562 switch (encoding & 0x0f)
1563 {
a81b10ae
MK
1564 case DW_EH_PE_uleb128:
1565 {
9fccedf7 1566 uint64_t value;
0d45f56e 1567 const gdb_byte *end_buf = buf + (sizeof (value) + 1) * 8 / 7;
9a619af0 1568
f664829e 1569 *bytes_read_ptr += safe_read_uleb128 (buf, end_buf, &value) - buf;
a81b10ae
MK
1570 return base + value;
1571 }
cfc14b3a 1572 case DW_EH_PE_udata2:
68f6cf99 1573 *bytes_read_ptr += 2;
cfc14b3a
MK
1574 return (base + bfd_get_16 (unit->abfd, (bfd_byte *) buf));
1575 case DW_EH_PE_udata4:
68f6cf99 1576 *bytes_read_ptr += 4;
cfc14b3a
MK
1577 return (base + bfd_get_32 (unit->abfd, (bfd_byte *) buf));
1578 case DW_EH_PE_udata8:
68f6cf99 1579 *bytes_read_ptr += 8;
cfc14b3a 1580 return (base + bfd_get_64 (unit->abfd, (bfd_byte *) buf));
a81b10ae
MK
1581 case DW_EH_PE_sleb128:
1582 {
9fccedf7 1583 int64_t value;
0d45f56e 1584 const gdb_byte *end_buf = buf + (sizeof (value) + 1) * 8 / 7;
9a619af0 1585
f664829e 1586 *bytes_read_ptr += safe_read_sleb128 (buf, end_buf, &value) - buf;
a81b10ae
MK
1587 return base + value;
1588 }
cfc14b3a 1589 case DW_EH_PE_sdata2:
68f6cf99 1590 *bytes_read_ptr += 2;
cfc14b3a
MK
1591 return (base + bfd_get_signed_16 (unit->abfd, (bfd_byte *) buf));
1592 case DW_EH_PE_sdata4:
68f6cf99 1593 *bytes_read_ptr += 4;
cfc14b3a
MK
1594 return (base + bfd_get_signed_32 (unit->abfd, (bfd_byte *) buf));
1595 case DW_EH_PE_sdata8:
68f6cf99 1596 *bytes_read_ptr += 8;
cfc14b3a
MK
1597 return (base + bfd_get_signed_64 (unit->abfd, (bfd_byte *) buf));
1598 default:
3e43a32a
MS
1599 internal_error (__FILE__, __LINE__,
1600 _("Invalid or unsupported encoding"));
cfc14b3a
MK
1601 }
1602}
1603\f
1604
b01c8410
PP
1605/* Find CIE with the given CIE_POINTER in CIE_TABLE. */
1606static struct dwarf2_cie *
93878f47 1607find_cie (const dwarf2_cie_table &cie_table, ULONGEST cie_pointer)
b01c8410 1608{
93878f47
TT
1609 auto iter = cie_table.find (cie_pointer);
1610 if (iter != cie_table.end ())
1611 return iter->second;
cfc14b3a
MK
1612 return NULL;
1613}
1614
35e65c49
CB
1615static inline int
1616bsearch_fde_cmp (const dwarf2_fde *fde, CORE_ADDR seek_pc)
b01c8410 1617{
35e65c49 1618 if (fde->initial_location + fde->address_range <= seek_pc)
b01c8410 1619 return -1;
35e65c49 1620 if (fde->initial_location <= seek_pc)
b01c8410
PP
1621 return 0;
1622 return 1;
cfc14b3a
MK
1623}
1624
1625/* Find the FDE for *PC. Return a pointer to the FDE, and store the
85102364 1626 initial location associated with it into *PC. */
cfc14b3a
MK
1627
1628static struct dwarf2_fde *
ac56253d 1629dwarf2_frame_find_fde (CORE_ADDR *pc, CORE_ADDR *out_offset)
cfc14b3a 1630{
2030c079 1631 for (objfile *objfile : current_program_space->objfiles ())
cfc14b3a 1632 {
a9d65418 1633 dwarf2_fde_table *fde_table;
cfc14b3a 1634 CORE_ADDR offset;
b01c8410 1635 CORE_ADDR seek_pc;
cfc14b3a 1636
924d79e2 1637 fde_table = dwarf2_frame_objfile_data.get (objfile);
b01c8410 1638 if (fde_table == NULL)
be391dca
TT
1639 {
1640 dwarf2_build_frame_info (objfile);
924d79e2 1641 fde_table = dwarf2_frame_objfile_data.get (objfile);
be391dca
TT
1642 }
1643 gdb_assert (fde_table != NULL);
1644
a9d65418 1645 if (fde_table->empty ())
4ae9ee8e
DJ
1646 continue;
1647
6a053cb1 1648 gdb_assert (!objfile->section_offsets.empty ());
b3b3bada 1649 offset = objfile->text_section_offset ();
4ae9ee8e 1650
a9d65418
TT
1651 gdb_assert (!fde_table->empty ());
1652 if (*pc < offset + (*fde_table)[0]->initial_location)
b01c8410
PP
1653 continue;
1654
1655 seek_pc = *pc - offset;
a9d65418
TT
1656 auto it = gdb::binary_search (fde_table->begin (), fde_table->end (),
1657 seek_pc, bsearch_fde_cmp);
1658 if (it != fde_table->end ())
b01c8410 1659 {
35e65c49 1660 *pc = (*it)->initial_location + offset;
ac56253d
TT
1661 if (out_offset)
1662 *out_offset = offset;
35e65c49 1663 return *it;
b01c8410 1664 }
cfc14b3a 1665 }
cfc14b3a
MK
1666 return NULL;
1667}
1668
a9d65418 1669/* Add FDE to FDE_TABLE. */
cfc14b3a 1670static void
a9d65418 1671add_fde (dwarf2_fde_table *fde_table, struct dwarf2_fde *fde)
cfc14b3a 1672{
b01c8410
PP
1673 if (fde->address_range == 0)
1674 /* Discard useless FDEs. */
1675 return;
1676
a9d65418 1677 fde_table->push_back (fde);
cfc14b3a
MK
1678}
1679
cfc14b3a 1680#define DW64_CIE_ID 0xffffffffffffffffULL
cfc14b3a 1681
8bd90839
FM
1682/* Defines the type of eh_frames that are expected to be decoded: CIE, FDE
1683 or any of them. */
1684
1685enum eh_frame_type
1686{
1687 EH_CIE_TYPE_ID = 1 << 0,
1688 EH_FDE_TYPE_ID = 1 << 1,
1689 EH_CIE_OR_FDE_TYPE_ID = EH_CIE_TYPE_ID | EH_FDE_TYPE_ID
1690};
1691
f664829e
DE
1692static const gdb_byte *decode_frame_entry (struct comp_unit *unit,
1693 const gdb_byte *start,
1694 int eh_frame_p,
93878f47 1695 dwarf2_cie_table &cie_table,
a9d65418 1696 dwarf2_fde_table *fde_table,
f664829e 1697 enum eh_frame_type entry_type);
8bd90839
FM
1698
1699/* Decode the next CIE or FDE, entry_type specifies the expected type.
1700 Return NULL if invalid input, otherwise the next byte to be processed. */
cfc14b3a 1701
f664829e
DE
1702static const gdb_byte *
1703decode_frame_entry_1 (struct comp_unit *unit, const gdb_byte *start,
1704 int eh_frame_p,
93878f47 1705 dwarf2_cie_table &cie_table,
a9d65418 1706 dwarf2_fde_table *fde_table,
8bd90839 1707 enum eh_frame_type entry_type)
cfc14b3a 1708{
5e2b427d 1709 struct gdbarch *gdbarch = get_objfile_arch (unit->objfile);
f664829e 1710 const gdb_byte *buf, *end;
723adb65 1711 ULONGEST length;
cfc14b3a 1712 unsigned int bytes_read;
6896c0c7
RH
1713 int dwarf64_p;
1714 ULONGEST cie_id;
cfc14b3a 1715 ULONGEST cie_pointer;
9fccedf7
DE
1716 int64_t sleb128;
1717 uint64_t uleb128;
cfc14b3a 1718
6896c0c7 1719 buf = start;
4075cb26 1720 length = read_initial_length (unit->abfd, buf, &bytes_read, false);
cfc14b3a 1721 buf += bytes_read;
723adb65 1722 end = buf + (size_t) length;
6896c0c7 1723
cfc14b3a
MK
1724 if (length == 0)
1725 return end;
1726
723adb65
SL
1727 /* Are we still within the section? */
1728 if (end <= buf || end > unit->dwarf_frame_buffer + unit->dwarf_frame_size)
1729 return NULL;
1730
6896c0c7
RH
1731 /* Distinguish between 32 and 64-bit encoded frame info. */
1732 dwarf64_p = (bytes_read == 12);
cfc14b3a 1733
6896c0c7 1734 /* In a .eh_frame section, zero is used to distinguish CIEs from FDEs. */
cfc14b3a
MK
1735 if (eh_frame_p)
1736 cie_id = 0;
1737 else if (dwarf64_p)
1738 cie_id = DW64_CIE_ID;
6896c0c7
RH
1739 else
1740 cie_id = DW_CIE_ID;
cfc14b3a
MK
1741
1742 if (dwarf64_p)
1743 {
1744 cie_pointer = read_8_bytes (unit->abfd, buf);
1745 buf += 8;
1746 }
1747 else
1748 {
1749 cie_pointer = read_4_bytes (unit->abfd, buf);
1750 buf += 4;
1751 }
1752
1753 if (cie_pointer == cie_id)
1754 {
1755 /* This is a CIE. */
1756 struct dwarf2_cie *cie;
1757 char *augmentation;
28ba0b33 1758 unsigned int cie_version;
cfc14b3a 1759
8bd90839
FM
1760 /* Check that a CIE was expected. */
1761 if ((entry_type & EH_CIE_TYPE_ID) == 0)
1762 error (_("Found a CIE when not expecting it."));
1763
cfc14b3a
MK
1764 /* Record the offset into the .debug_frame section of this CIE. */
1765 cie_pointer = start - unit->dwarf_frame_buffer;
1766
1767 /* Check whether we've already read it. */
b01c8410 1768 if (find_cie (cie_table, cie_pointer))
cfc14b3a
MK
1769 return end;
1770
8d749320 1771 cie = XOBNEW (&unit->objfile->objfile_obstack, struct dwarf2_cie);
cfc14b3a
MK
1772 cie->initial_instructions = NULL;
1773 cie->cie_pointer = cie_pointer;
1774
1775 /* The encoding for FDE's in a normal .debug_frame section
32b05c07
MK
1776 depends on the target address size. */
1777 cie->encoding = DW_EH_PE_absptr;
cfc14b3a 1778
56c987f6
AO
1779 /* We'll determine the final value later, but we need to
1780 initialize it conservatively. */
1781 cie->signal_frame = 0;
1782
cfc14b3a 1783 /* Check version number. */
28ba0b33 1784 cie_version = read_1_byte (unit->abfd, buf);
2dc7f7b3 1785 if (cie_version != 1 && cie_version != 3 && cie_version != 4)
6896c0c7 1786 return NULL;
303b6f5d 1787 cie->version = cie_version;
cfc14b3a
MK
1788 buf += 1;
1789
1790 /* Interpret the interesting bits of the augmentation. */
303b6f5d 1791 cie->augmentation = augmentation = (char *) buf;
852483bc 1792 buf += (strlen (augmentation) + 1);
cfc14b3a 1793
303b6f5d
DJ
1794 /* Ignore armcc augmentations. We only use them for quirks,
1795 and that doesn't happen until later. */
61012eef 1796 if (startswith (augmentation, "armcc"))
303b6f5d
DJ
1797 augmentation += strlen (augmentation);
1798
cfc14b3a
MK
1799 /* The GCC 2.x "eh" augmentation has a pointer immediately
1800 following the augmentation string, so it must be handled
1801 first. */
1802 if (augmentation[0] == 'e' && augmentation[1] == 'h')
1803 {
1804 /* Skip. */
5e2b427d 1805 buf += gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT;
cfc14b3a
MK
1806 augmentation += 2;
1807 }
1808
2dc7f7b3
TT
1809 if (cie->version >= 4)
1810 {
1811 /* FIXME: check that this is the same as from the CU header. */
1812 cie->addr_size = read_1_byte (unit->abfd, buf);
1813 ++buf;
1814 cie->segment_size = read_1_byte (unit->abfd, buf);
1815 ++buf;
1816 }
1817 else
1818 {
8da614df 1819 cie->addr_size = gdbarch_dwarf2_addr_size (gdbarch);
2dc7f7b3
TT
1820 cie->segment_size = 0;
1821 }
8da614df
CV
1822 /* Address values in .eh_frame sections are defined to have the
1823 target's pointer size. Watchout: This breaks frame info for
1824 targets with pointer size < address size, unless a .debug_frame
0963b4bd 1825 section exists as well. */
8da614df
CV
1826 if (eh_frame_p)
1827 cie->ptr_size = gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT;
1828 else
1829 cie->ptr_size = cie->addr_size;
2dc7f7b3 1830
f664829e
DE
1831 buf = gdb_read_uleb128 (buf, end, &uleb128);
1832 if (buf == NULL)
1833 return NULL;
1834 cie->code_alignment_factor = uleb128;
cfc14b3a 1835
f664829e
DE
1836 buf = gdb_read_sleb128 (buf, end, &sleb128);
1837 if (buf == NULL)
1838 return NULL;
1839 cie->data_alignment_factor = sleb128;
cfc14b3a 1840
28ba0b33
PB
1841 if (cie_version == 1)
1842 {
1843 cie->return_address_register = read_1_byte (unit->abfd, buf);
f664829e 1844 ++buf;
28ba0b33
PB
1845 }
1846 else
f664829e
DE
1847 {
1848 buf = gdb_read_uleb128 (buf, end, &uleb128);
1849 if (buf == NULL)
1850 return NULL;
1851 cie->return_address_register = uleb128;
1852 }
1853
4fc771b8 1854 cie->return_address_register
5e2b427d 1855 = dwarf2_frame_adjust_regnum (gdbarch,
4fc771b8
DJ
1856 cie->return_address_register,
1857 eh_frame_p);
4bf8967c 1858
7131cb6e
RH
1859 cie->saw_z_augmentation = (*augmentation == 'z');
1860 if (cie->saw_z_augmentation)
cfc14b3a 1861 {
b926417a 1862 uint64_t uleb_length;
cfc14b3a 1863
b926417a 1864 buf = gdb_read_uleb128 (buf, end, &uleb_length);
f664829e 1865 if (buf == NULL)
6896c0c7 1866 return NULL;
b926417a 1867 cie->initial_instructions = buf + uleb_length;
cfc14b3a
MK
1868 augmentation++;
1869 }
1870
1871 while (*augmentation)
1872 {
1873 /* "L" indicates a byte showing how the LSDA pointer is encoded. */
1874 if (*augmentation == 'L')
1875 {
1876 /* Skip. */
1877 buf++;
1878 augmentation++;
1879 }
1880
1881 /* "R" indicates a byte indicating how FDE addresses are encoded. */
1882 else if (*augmentation == 'R')
1883 {
1884 cie->encoding = *buf++;
1885 augmentation++;
1886 }
1887
1888 /* "P" indicates a personality routine in the CIE augmentation. */
1889 else if (*augmentation == 'P')
1890 {
1234d960 1891 /* Skip. Avoid indirection since we throw away the result. */
852483bc 1892 gdb_byte encoding = (*buf++) & ~DW_EH_PE_indirect;
8da614df 1893 read_encoded_value (unit, encoding, cie->ptr_size,
ae0d2f24 1894 buf, &bytes_read, 0);
f724bf08 1895 buf += bytes_read;
cfc14b3a
MK
1896 augmentation++;
1897 }
1898
56c987f6
AO
1899 /* "S" indicates a signal frame, such that the return
1900 address must not be decremented to locate the call frame
1901 info for the previous frame; it might even be the first
1902 instruction of a function, so decrementing it would take
1903 us to a different function. */
1904 else if (*augmentation == 'S')
1905 {
1906 cie->signal_frame = 1;
1907 augmentation++;
1908 }
1909
3e9a2e52
DJ
1910 /* Otherwise we have an unknown augmentation. Assume that either
1911 there is no augmentation data, or we saw a 'z' prefix. */
cfc14b3a
MK
1912 else
1913 {
3e9a2e52
DJ
1914 if (cie->initial_instructions)
1915 buf = cie->initial_instructions;
cfc14b3a
MK
1916 break;
1917 }
1918 }
1919
1920 cie->initial_instructions = buf;
1921 cie->end = end;
b01c8410 1922 cie->unit = unit;
cfc14b3a 1923
93878f47 1924 cie_table[cie->cie_pointer] = cie;
cfc14b3a
MK
1925 }
1926 else
1927 {
1928 /* This is a FDE. */
1929 struct dwarf2_fde *fde;
3e29f34a 1930 CORE_ADDR addr;
cfc14b3a 1931
8bd90839
FM
1932 /* Check that an FDE was expected. */
1933 if ((entry_type & EH_FDE_TYPE_ID) == 0)
1934 error (_("Found an FDE when not expecting it."));
1935
6896c0c7
RH
1936 /* In an .eh_frame section, the CIE pointer is the delta between the
1937 address within the FDE where the CIE pointer is stored and the
1938 address of the CIE. Convert it to an offset into the .eh_frame
1939 section. */
cfc14b3a
MK
1940 if (eh_frame_p)
1941 {
cfc14b3a
MK
1942 cie_pointer = buf - unit->dwarf_frame_buffer - cie_pointer;
1943 cie_pointer -= (dwarf64_p ? 8 : 4);
1944 }
1945
6896c0c7
RH
1946 /* In either case, validate the result is still within the section. */
1947 if (cie_pointer >= unit->dwarf_frame_size)
1948 return NULL;
1949
8d749320 1950 fde = XOBNEW (&unit->objfile->objfile_obstack, struct dwarf2_fde);
b01c8410 1951 fde->cie = find_cie (cie_table, cie_pointer);
cfc14b3a
MK
1952 if (fde->cie == NULL)
1953 {
1954 decode_frame_entry (unit, unit->dwarf_frame_buffer + cie_pointer,
8bd90839
FM
1955 eh_frame_p, cie_table, fde_table,
1956 EH_CIE_TYPE_ID);
b01c8410 1957 fde->cie = find_cie (cie_table, cie_pointer);
cfc14b3a
MK
1958 }
1959
1960 gdb_assert (fde->cie != NULL);
1961
3e29f34a
MR
1962 addr = read_encoded_value (unit, fde->cie->encoding, fde->cie->ptr_size,
1963 buf, &bytes_read, 0);
1964 fde->initial_location = gdbarch_adjust_dwarf2_addr (gdbarch, addr);
cfc14b3a
MK
1965 buf += bytes_read;
1966
1967 fde->address_range =
ae0d2f24 1968 read_encoded_value (unit, fde->cie->encoding & 0x0f,
8da614df 1969 fde->cie->ptr_size, buf, &bytes_read, 0);
3e29f34a
MR
1970 addr = gdbarch_adjust_dwarf2_addr (gdbarch, addr + fde->address_range);
1971 fde->address_range = addr - fde->initial_location;
cfc14b3a
MK
1972 buf += bytes_read;
1973
7131cb6e
RH
1974 /* A 'z' augmentation in the CIE implies the presence of an
1975 augmentation field in the FDE as well. The only thing known
1976 to be in here at present is the LSDA entry for EH. So we
1977 can skip the whole thing. */
1978 if (fde->cie->saw_z_augmentation)
1979 {
b926417a 1980 uint64_t uleb_length;
7131cb6e 1981
b926417a 1982 buf = gdb_read_uleb128 (buf, end, &uleb_length);
f664829e
DE
1983 if (buf == NULL)
1984 return NULL;
b926417a 1985 buf += uleb_length;
6896c0c7
RH
1986 if (buf > end)
1987 return NULL;
7131cb6e
RH
1988 }
1989
cfc14b3a
MK
1990 fde->instructions = buf;
1991 fde->end = end;
1992
4bf8967c
AS
1993 fde->eh_frame_p = eh_frame_p;
1994
b01c8410 1995 add_fde (fde_table, fde);
cfc14b3a
MK
1996 }
1997
1998 return end;
1999}
6896c0c7 2000
8bd90839
FM
2001/* Read a CIE or FDE in BUF and decode it. Entry_type specifies whether we
2002 expect an FDE or a CIE. */
2003
f664829e
DE
2004static const gdb_byte *
2005decode_frame_entry (struct comp_unit *unit, const gdb_byte *start,
2006 int eh_frame_p,
93878f47 2007 dwarf2_cie_table &cie_table,
a9d65418 2008 dwarf2_fde_table *fde_table,
8bd90839 2009 enum eh_frame_type entry_type)
6896c0c7
RH
2010{
2011 enum { NONE, ALIGN4, ALIGN8, FAIL } workaround = NONE;
f664829e 2012 const gdb_byte *ret;
6896c0c7
RH
2013 ptrdiff_t start_offset;
2014
2015 while (1)
2016 {
b01c8410 2017 ret = decode_frame_entry_1 (unit, start, eh_frame_p,
8bd90839 2018 cie_table, fde_table, entry_type);
6896c0c7
RH
2019 if (ret != NULL)
2020 break;
2021
2022 /* We have corrupt input data of some form. */
2023
2024 /* ??? Try, weakly, to work around compiler/assembler/linker bugs
2025 and mismatches wrt padding and alignment of debug sections. */
2026 /* Note that there is no requirement in the standard for any
2027 alignment at all in the frame unwind sections. Testing for
2028 alignment before trying to interpret data would be incorrect.
2029
2030 However, GCC traditionally arranged for frame sections to be
2031 sized such that the FDE length and CIE fields happen to be
2032 aligned (in theory, for performance). This, unfortunately,
2033 was done with .align directives, which had the side effect of
2034 forcing the section to be aligned by the linker.
2035
2036 This becomes a problem when you have some other producer that
2037 creates frame sections that are not as strictly aligned. That
2038 produces a hole in the frame info that gets filled by the
2039 linker with zeros.
2040
2041 The GCC behaviour is arguably a bug, but it's effectively now
2042 part of the ABI, so we're now stuck with it, at least at the
2043 object file level. A smart linker may decide, in the process
2044 of compressing duplicate CIE information, that it can rewrite
2045 the entire output section without this extra padding. */
2046
2047 start_offset = start - unit->dwarf_frame_buffer;
2048 if (workaround < ALIGN4 && (start_offset & 3) != 0)
2049 {
2050 start += 4 - (start_offset & 3);
2051 workaround = ALIGN4;
2052 continue;
2053 }
2054 if (workaround < ALIGN8 && (start_offset & 7) != 0)
2055 {
2056 start += 8 - (start_offset & 7);
2057 workaround = ALIGN8;
2058 continue;
2059 }
2060
2061 /* Nothing left to try. Arrange to return as if we've consumed
2062 the entire input section. Hopefully we'll get valid info from
2063 the other of .debug_frame/.eh_frame. */
2064 workaround = FAIL;
2065 ret = unit->dwarf_frame_buffer + unit->dwarf_frame_size;
2066 break;
2067 }
2068
2069 switch (workaround)
2070 {
2071 case NONE:
2072 break;
2073
2074 case ALIGN4:
b98664d3 2075 complaint (_("\
3e43a32a 2076Corrupt data in %s:%s; align 4 workaround apparently succeeded"),
6896c0c7
RH
2077 unit->dwarf_frame_section->owner->filename,
2078 unit->dwarf_frame_section->name);
2079 break;
2080
2081 case ALIGN8:
b98664d3 2082 complaint (_("\
3e43a32a 2083Corrupt data in %s:%s; align 8 workaround apparently succeeded"),
6896c0c7
RH
2084 unit->dwarf_frame_section->owner->filename,
2085 unit->dwarf_frame_section->name);
2086 break;
2087
2088 default:
b98664d3 2089 complaint (_("Corrupt data in %s:%s"),
6896c0c7
RH
2090 unit->dwarf_frame_section->owner->filename,
2091 unit->dwarf_frame_section->name);
2092 break;
2093 }
2094
2095 return ret;
2096}
cfc14b3a 2097\f
39ef2f62
CB
2098static bool
2099fde_is_less_than (const dwarf2_fde *aa, const dwarf2_fde *bb)
b01c8410 2100{
b01c8410 2101 if (aa->initial_location == bb->initial_location)
e5af178f
PP
2102 {
2103 if (aa->address_range != bb->address_range
2104 && aa->eh_frame_p == 0 && bb->eh_frame_p == 0)
2105 /* Linker bug, e.g. gold/10400.
2106 Work around it by keeping stable sort order. */
39ef2f62 2107 return aa < bb;
e5af178f
PP
2108 else
2109 /* Put eh_frame entries after debug_frame ones. */
39ef2f62 2110 return aa->eh_frame_p < bb->eh_frame_p;
e5af178f 2111 }
b01c8410 2112
39ef2f62 2113 return aa->initial_location < bb->initial_location;
b01c8410
PP
2114}
2115
cfc14b3a
MK
2116void
2117dwarf2_build_frame_info (struct objfile *objfile)
2118{
ae0d2f24 2119 struct comp_unit *unit;
f664829e 2120 const gdb_byte *frame_ptr;
93878f47 2121 dwarf2_cie_table cie_table;
a9d65418
TT
2122 dwarf2_fde_table fde_table;
2123 dwarf2_fde_table *fde_table2;
cfc14b3a
MK
2124
2125 /* Build a minimal decoding of the DWARF2 compilation unit. */
e39db4db 2126 unit = XOBNEW (&objfile->objfile_obstack, comp_unit);
ae0d2f24
UW
2127 unit->abfd = objfile->obfd;
2128 unit->objfile = objfile;
2129 unit->dbase = 0;
2130 unit->tbase = 0;
cfc14b3a 2131
d40102a1 2132 if (objfile->separate_debug_objfile_backlink == NULL)
cfc14b3a 2133 {
d40102a1
JB
2134 /* Do not read .eh_frame from separate file as they must be also
2135 present in the main file. */
2136 dwarf2_get_section_info (objfile, DWARF2_EH_FRAME,
2137 &unit->dwarf_frame_section,
2138 &unit->dwarf_frame_buffer,
2139 &unit->dwarf_frame_size);
2140 if (unit->dwarf_frame_size)
b01c8410 2141 {
d40102a1
JB
2142 asection *got, *txt;
2143
2144 /* FIXME: kettenis/20030602: This is the DW_EH_PE_datarel base
2145 that is used for the i386/amd64 target, which currently is
2146 the only target in GCC that supports/uses the
2147 DW_EH_PE_datarel encoding. */
2148 got = bfd_get_section_by_name (unit->abfd, ".got");
2149 if (got)
2150 unit->dbase = got->vma;
2151
2152 /* GCC emits the DW_EH_PE_textrel encoding type on sh and ia64
2153 so far. */
2154 txt = bfd_get_section_by_name (unit->abfd, ".text");
2155 if (txt)
2156 unit->tbase = txt->vma;
2157
a70b8144 2158 try
8bd90839
FM
2159 {
2160 frame_ptr = unit->dwarf_frame_buffer;
2161 while (frame_ptr < unit->dwarf_frame_buffer + unit->dwarf_frame_size)
2162 frame_ptr = decode_frame_entry (unit, frame_ptr, 1,
93878f47 2163 cie_table, &fde_table,
8bd90839
FM
2164 EH_CIE_OR_FDE_TYPE_ID);
2165 }
2166
230d2906 2167 catch (const gdb_exception_error &e)
8bd90839
FM
2168 {
2169 warning (_("skipping .eh_frame info of %s: %s"),
3d6e9d23 2170 objfile_name (objfile), e.what ());
8bd90839 2171
a9d65418 2172 fde_table.clear ();
93878f47 2173 /* The cie_table is discarded below. */
8bd90839 2174 }
d40102a1 2175
93878f47 2176 cie_table.clear ();
b01c8410 2177 }
cfc14b3a
MK
2178 }
2179
3017a003 2180 dwarf2_get_section_info (objfile, DWARF2_DEBUG_FRAME,
dce234bc
PP
2181 &unit->dwarf_frame_section,
2182 &unit->dwarf_frame_buffer,
2183 &unit->dwarf_frame_size);
2184 if (unit->dwarf_frame_size)
cfc14b3a 2185 {
a9d65418 2186 size_t num_old_fde_entries = fde_table.size ();
8bd90839 2187
a70b8144 2188 try
8bd90839
FM
2189 {
2190 frame_ptr = unit->dwarf_frame_buffer;
2191 while (frame_ptr < unit->dwarf_frame_buffer + unit->dwarf_frame_size)
2192 frame_ptr = decode_frame_entry (unit, frame_ptr, 0,
93878f47 2193 cie_table, &fde_table,
8bd90839
FM
2194 EH_CIE_OR_FDE_TYPE_ID);
2195 }
230d2906 2196 catch (const gdb_exception_error &e)
8bd90839
FM
2197 {
2198 warning (_("skipping .debug_frame info of %s: %s"),
3d6e9d23 2199 objfile_name (objfile), e.what ());
8bd90839 2200
a9d65418 2201 fde_table.resize (num_old_fde_entries);
8bd90839 2202 }
b01c8410
PP
2203 }
2204
a9d65418 2205 fde_table2 = new dwarf2_fde_table;
be391dca 2206
a9d65418
TT
2207 struct dwarf2_fde *fde_prev = NULL;
2208 struct dwarf2_fde *first_non_zero_fde = NULL;
b01c8410 2209
a9d65418
TT
2210 /* Prepare FDE table for lookups. */
2211 std::sort (fde_table.begin (), fde_table.end (), fde_is_less_than);
875cdfbb 2212
a9d65418
TT
2213 /* Check for leftovers from --gc-sections. The GNU linker sets
2214 the relevant symbols to zero, but doesn't zero the FDE *end*
2215 ranges because there's no relocation there. It's (offset,
2216 length), not (start, end). On targets where address zero is
2217 just another valid address this can be a problem, since the
2218 FDEs appear to be non-empty in the output --- we could pick
2219 out the wrong FDE. To work around this, when overlaps are
2220 detected, we prefer FDEs that do not start at zero.
2221
2222 Start by finding the first FDE with non-zero start. Below
2223 we'll discard all FDEs that start at zero and overlap this
2224 one. */
2225 for (struct dwarf2_fde *fde : fde_table)
2226 {
2227 if (fde->initial_location != 0)
875cdfbb 2228 {
a9d65418
TT
2229 first_non_zero_fde = fde;
2230 break;
875cdfbb 2231 }
a9d65418
TT
2232 }
2233
2234 /* Since we'll be doing bsearch, squeeze out identical (except
2235 for eh_frame_p) fde entries so bsearch result is predictable.
2236 Also discard leftovers from --gc-sections. */
2237 for (struct dwarf2_fde *fde : fde_table)
2238 {
2239 if (fde->initial_location == 0
2240 && first_non_zero_fde != NULL
2241 && (first_non_zero_fde->initial_location
2242 < fde->initial_location + fde->address_range))
2243 continue;
2244
2245 if (fde_prev != NULL
2246 && fde_prev->initial_location == fde->initial_location)
2247 continue;
b01c8410 2248
a9d65418
TT
2249 fde_table2->push_back (fde);
2250 fde_prev = fde;
cfc14b3a 2251 }
a9d65418 2252 fde_table2->shrink_to_fit ();
be391dca 2253
924d79e2 2254 dwarf2_frame_objfile_data.set (objfile, fde_table2);
cfc14b3a 2255}
0d0e1a63 2256
3c3bb058
AB
2257/* Handle 'maintenance show dwarf unwinders'. */
2258
2259static void
2260show_dwarf_unwinders_enabled_p (struct ui_file *file, int from_tty,
2261 struct cmd_list_element *c,
2262 const char *value)
2263{
2264 fprintf_filtered (file,
2265 _("The DWARF stack unwinders are currently %s.\n"),
2266 value);
2267}
2268
6c265988 2269void _initialize_dwarf2_frame ();
0d0e1a63 2270void
6c265988 2271_initialize_dwarf2_frame ()
0d0e1a63 2272{
030f20e1 2273 dwarf2_frame_data = gdbarch_data_register_pre_init (dwarf2_frame_init);
1c90d9f0 2274
3c3bb058
AB
2275 add_setshow_boolean_cmd ("unwinders", class_obscure,
2276 &dwarf2_frame_unwinders_enabled_p , _("\
2277Set whether the DWARF stack frame unwinders are used."), _("\
2278Show whether the DWARF stack frame unwinders are used."), _("\
2279When enabled the DWARF stack frame unwinders can be used for architectures\n\
2280that support the DWARF unwinders. Enabling the DWARF unwinders for an\n\
2281architecture that doesn't support them will have no effect."),
2282 NULL,
2283 show_dwarf_unwinders_enabled_p,
2284 &set_dwarf_cmdlist,
2285 &show_dwarf_cmdlist);
2286
1c90d9f0 2287#if GDB_SELF_TEST
1526853e
SM
2288 selftests::register_test_foreach_arch ("execute_cfa_program",
2289 selftests::execute_cfa_program_test);
1c90d9f0 2290#endif
0d0e1a63 2291}
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