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456f8b9d | 1 | /* Target-dependent code for the Fujitsu FR-V, for GDB, the GNU Debugger. |
1e698235 | 2 | Copyright 2002, 2003 Free Software Foundation, Inc. |
456f8b9d DB |
3 | |
4 | This file is part of GDB. | |
5 | ||
6 | This program is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2 of the License, or | |
9 | (at your option) any later version. | |
10 | ||
11 | This program is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with this program; if not, write to the Free Software | |
18 | Foundation, Inc., 59 Temple Place - Suite 330, | |
19 | Boston, MA 02111-1307, USA. */ | |
20 | ||
21 | #include "defs.h" | |
22 | #include "inferior.h" | |
23 | #include "symfile.h" /* for entry_point_address */ | |
24 | #include "gdbcore.h" | |
25 | #include "arch-utils.h" | |
26 | #include "regcache.h" | |
27 | ||
28 | extern void _initialize_frv_tdep (void); | |
29 | ||
30 | static gdbarch_init_ftype frv_gdbarch_init; | |
31 | ||
32 | static gdbarch_register_name_ftype frv_register_name; | |
33 | static gdbarch_register_raw_size_ftype frv_register_raw_size; | |
34 | static gdbarch_register_virtual_size_ftype frv_register_virtual_size; | |
35 | static gdbarch_register_virtual_type_ftype frv_register_virtual_type; | |
36 | static gdbarch_register_byte_ftype frv_register_byte; | |
37 | static gdbarch_breakpoint_from_pc_ftype frv_breakpoint_from_pc; | |
456f8b9d | 38 | static gdbarch_skip_prologue_ftype frv_skip_prologue; |
456f8b9d DB |
39 | static gdbarch_deprecated_extract_return_value_ftype frv_extract_return_value; |
40 | static gdbarch_deprecated_extract_struct_value_address_ftype frv_extract_struct_value_address; | |
41 | static gdbarch_use_struct_convention_ftype frv_use_struct_convention; | |
42 | static gdbarch_frameless_function_invocation_ftype frv_frameless_function_invocation; | |
43 | static gdbarch_init_extra_frame_info_ftype stupid_useless_init_extra_frame_info; | |
456f8b9d DB |
44 | static gdbarch_store_struct_return_ftype frv_store_struct_return; |
45 | static gdbarch_push_arguments_ftype frv_push_arguments; | |
46 | static gdbarch_push_return_address_ftype frv_push_return_address; | |
456f8b9d DB |
47 | static gdbarch_saved_pc_after_call_ftype frv_saved_pc_after_call; |
48 | ||
49 | static void frv_pop_frame_regular (struct frame_info *frame); | |
50 | ||
51 | /* Register numbers. You can change these as needed, but don't forget | |
52 | to update the simulator accordingly. */ | |
53 | enum { | |
54 | /* The total number of registers we know exist. */ | |
55 | frv_num_regs = 147, | |
56 | ||
57 | /* Register numbers 0 -- 63 are always reserved for general-purpose | |
58 | registers. The chip at hand may have less. */ | |
59 | first_gpr_regnum = 0, | |
60 | sp_regnum = 1, | |
61 | fp_regnum = 2, | |
62 | struct_return_regnum = 3, | |
63 | last_gpr_regnum = 63, | |
64 | ||
65 | /* Register numbers 64 -- 127 are always reserved for floating-point | |
66 | registers. The chip at hand may have less. */ | |
67 | first_fpr_regnum = 64, | |
68 | last_fpr_regnum = 127, | |
69 | ||
70 | /* Register numbers 128 on up are always reserved for special-purpose | |
71 | registers. */ | |
72 | first_spr_regnum = 128, | |
73 | pc_regnum = 128, | |
74 | psr_regnum = 129, | |
75 | ccr_regnum = 130, | |
76 | cccr_regnum = 131, | |
77 | tbr_regnum = 135, | |
78 | brr_regnum = 136, | |
79 | dbar0_regnum = 137, | |
80 | dbar1_regnum = 138, | |
81 | dbar2_regnum = 139, | |
82 | dbar3_regnum = 140, | |
83 | lr_regnum = 145, | |
84 | lcr_regnum = 146, | |
85 | last_spr_regnum = 146 | |
86 | }; | |
87 | ||
88 | static LONGEST frv_call_dummy_words[] = | |
89 | {0}; | |
90 | ||
91 | ||
92 | /* The contents of this structure can only be trusted after we've | |
93 | frv_frame_init_saved_regs on the frame. */ | |
94 | struct frame_extra_info | |
95 | { | |
96 | /* The offset from our frame pointer to our caller's stack | |
97 | pointer. */ | |
98 | int fp_to_callers_sp_offset; | |
99 | ||
100 | /* Non-zero if we've saved our return address on the stack yet. | |
101 | Zero if it's still sitting in the link register. */ | |
102 | int lr_saved_on_stack; | |
103 | }; | |
104 | ||
105 | ||
106 | /* A structure describing a particular variant of the FRV. | |
107 | We allocate and initialize one of these structures when we create | |
108 | the gdbarch object for a variant. | |
109 | ||
110 | At the moment, all the FR variants we support differ only in which | |
111 | registers are present; the portable code of GDB knows that | |
112 | registers whose names are the empty string don't exist, so the | |
113 | `register_names' array captures all the per-variant information we | |
114 | need. | |
115 | ||
116 | in the future, if we need to have per-variant maps for raw size, | |
117 | virtual type, etc., we should replace register_names with an array | |
118 | of structures, each of which gives all the necessary info for one | |
119 | register. Don't stick parallel arrays in here --- that's so | |
120 | Fortran. */ | |
121 | struct gdbarch_tdep | |
122 | { | |
123 | /* How many general-purpose registers does this variant have? */ | |
124 | int num_gprs; | |
125 | ||
126 | /* How many floating-point registers does this variant have? */ | |
127 | int num_fprs; | |
128 | ||
129 | /* How many hardware watchpoints can it support? */ | |
130 | int num_hw_watchpoints; | |
131 | ||
132 | /* How many hardware breakpoints can it support? */ | |
133 | int num_hw_breakpoints; | |
134 | ||
135 | /* Register names. */ | |
136 | char **register_names; | |
137 | }; | |
138 | ||
139 | #define CURRENT_VARIANT (gdbarch_tdep (current_gdbarch)) | |
140 | ||
141 | ||
142 | /* Allocate a new variant structure, and set up default values for all | |
143 | the fields. */ | |
144 | static struct gdbarch_tdep * | |
5ae5f592 | 145 | new_variant (void) |
456f8b9d DB |
146 | { |
147 | struct gdbarch_tdep *var; | |
148 | int r; | |
149 | char buf[20]; | |
150 | ||
151 | var = xmalloc (sizeof (*var)); | |
152 | memset (var, 0, sizeof (*var)); | |
153 | ||
154 | var->num_gprs = 64; | |
155 | var->num_fprs = 64; | |
156 | var->num_hw_watchpoints = 0; | |
157 | var->num_hw_breakpoints = 0; | |
158 | ||
159 | /* By default, don't supply any general-purpose or floating-point | |
160 | register names. */ | |
161 | var->register_names = (char **) xmalloc (frv_num_regs * sizeof (char *)); | |
162 | for (r = 0; r < frv_num_regs; r++) | |
163 | var->register_names[r] = ""; | |
164 | ||
165 | /* Do, however, supply default names for the special-purpose | |
166 | registers. */ | |
167 | for (r = first_spr_regnum; r <= last_spr_regnum; ++r) | |
168 | { | |
169 | sprintf (buf, "x%d", r); | |
170 | var->register_names[r] = xstrdup (buf); | |
171 | } | |
172 | ||
173 | var->register_names[pc_regnum] = "pc"; | |
174 | var->register_names[lr_regnum] = "lr"; | |
175 | var->register_names[lcr_regnum] = "lcr"; | |
176 | ||
177 | var->register_names[psr_regnum] = "psr"; | |
178 | var->register_names[ccr_regnum] = "ccr"; | |
179 | var->register_names[cccr_regnum] = "cccr"; | |
180 | var->register_names[tbr_regnum] = "tbr"; | |
181 | ||
182 | /* Debug registers. */ | |
183 | var->register_names[brr_regnum] = "brr"; | |
184 | var->register_names[dbar0_regnum] = "dbar0"; | |
185 | var->register_names[dbar1_regnum] = "dbar1"; | |
186 | var->register_names[dbar2_regnum] = "dbar2"; | |
187 | var->register_names[dbar3_regnum] = "dbar3"; | |
188 | ||
189 | return var; | |
190 | } | |
191 | ||
192 | ||
193 | /* Indicate that the variant VAR has NUM_GPRS general-purpose | |
194 | registers, and fill in the names array appropriately. */ | |
195 | static void | |
196 | set_variant_num_gprs (struct gdbarch_tdep *var, int num_gprs) | |
197 | { | |
198 | int r; | |
199 | ||
200 | var->num_gprs = num_gprs; | |
201 | ||
202 | for (r = 0; r < num_gprs; ++r) | |
203 | { | |
204 | char buf[20]; | |
205 | ||
206 | sprintf (buf, "gr%d", r); | |
207 | var->register_names[first_gpr_regnum + r] = xstrdup (buf); | |
208 | } | |
209 | } | |
210 | ||
211 | ||
212 | /* Indicate that the variant VAR has NUM_FPRS floating-point | |
213 | registers, and fill in the names array appropriately. */ | |
214 | static void | |
215 | set_variant_num_fprs (struct gdbarch_tdep *var, int num_fprs) | |
216 | { | |
217 | int r; | |
218 | ||
219 | var->num_fprs = num_fprs; | |
220 | ||
221 | for (r = 0; r < num_fprs; ++r) | |
222 | { | |
223 | char buf[20]; | |
224 | ||
225 | sprintf (buf, "fr%d", r); | |
226 | var->register_names[first_fpr_regnum + r] = xstrdup (buf); | |
227 | } | |
228 | } | |
229 | ||
230 | ||
231 | static const char * | |
232 | frv_register_name (int reg) | |
233 | { | |
234 | if (reg < 0) | |
235 | return "?toosmall?"; | |
236 | if (reg >= frv_num_regs) | |
237 | return "?toolarge?"; | |
238 | ||
239 | return CURRENT_VARIANT->register_names[reg]; | |
240 | } | |
241 | ||
242 | ||
243 | static int | |
244 | frv_register_raw_size (int reg) | |
245 | { | |
246 | return 4; | |
247 | } | |
248 | ||
249 | static int | |
250 | frv_register_virtual_size (int reg) | |
251 | { | |
252 | return 4; | |
253 | } | |
254 | ||
255 | static struct type * | |
256 | frv_register_virtual_type (int reg) | |
257 | { | |
258 | if (reg >= 64 && reg <= 127) | |
259 | return builtin_type_float; | |
260 | else | |
261 | return builtin_type_int; | |
262 | } | |
263 | ||
264 | static int | |
265 | frv_register_byte (int reg) | |
266 | { | |
267 | return (reg * 4); | |
268 | } | |
269 | ||
270 | static const unsigned char * | |
271 | frv_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenp) | |
272 | { | |
273 | static unsigned char breakpoint[] = {0xc0, 0x70, 0x00, 0x01}; | |
274 | *lenp = sizeof (breakpoint); | |
275 | return breakpoint; | |
276 | } | |
277 | ||
278 | static CORE_ADDR | |
279 | frv_frame_chain (struct frame_info *frame) | |
280 | { | |
281 | CORE_ADDR saved_fp_addr; | |
282 | ||
283 | if (frame->saved_regs && frame->saved_regs[fp_regnum] != 0) | |
284 | saved_fp_addr = frame->saved_regs[fp_regnum]; | |
285 | else | |
286 | /* Just assume it was saved in the usual place. */ | |
287 | saved_fp_addr = frame->frame; | |
288 | ||
289 | return read_memory_integer (saved_fp_addr, 4); | |
290 | } | |
291 | ||
292 | static CORE_ADDR | |
293 | frv_frame_saved_pc (struct frame_info *frame) | |
294 | { | |
295 | frv_frame_init_saved_regs (frame); | |
296 | ||
297 | /* Perhaps the prologue analyzer recorded where it was stored. | |
298 | (As of 14 Oct 2001, it never does.) */ | |
299 | if (frame->saved_regs && frame->saved_regs[pc_regnum] != 0) | |
300 | return read_memory_integer (frame->saved_regs[pc_regnum], 4); | |
301 | ||
302 | /* If the prologue analyzer tells us the link register was saved on | |
303 | the stack, get it from there. */ | |
304 | if (frame->extra_info->lr_saved_on_stack) | |
305 | return read_memory_integer (frame->frame + 8, 4); | |
306 | ||
307 | /* Otherwise, it's still in LR. | |
308 | However, if FRAME isn't the youngest frame, this is kind of | |
309 | suspicious --- if this frame called somebody else, then its LR | |
310 | has certainly been overwritten. */ | |
311 | if (! frame->next) | |
312 | return read_register (lr_regnum); | |
313 | ||
314 | /* By default, assume it's saved in the standard place, relative to | |
315 | the frame pointer. */ | |
316 | return read_memory_integer (frame->frame + 8, 4); | |
317 | } | |
318 | ||
319 | ||
320 | /* Return true if REG is a caller-saves ("scratch") register, | |
321 | false otherwise. */ | |
322 | static int | |
323 | is_caller_saves_reg (int reg) | |
324 | { | |
325 | return ((4 <= reg && reg <= 7) | |
326 | || (14 <= reg && reg <= 15) | |
327 | || (32 <= reg && reg <= 47)); | |
328 | } | |
329 | ||
330 | ||
331 | /* Return true if REG is a callee-saves register, false otherwise. */ | |
332 | static int | |
333 | is_callee_saves_reg (int reg) | |
334 | { | |
335 | return ((16 <= reg && reg <= 31) | |
336 | || (48 <= reg && reg <= 63)); | |
337 | } | |
338 | ||
339 | ||
340 | /* Return true if REG is an argument register, false otherwise. */ | |
341 | static int | |
342 | is_argument_reg (int reg) | |
343 | { | |
344 | return (8 <= reg && reg <= 13); | |
345 | } | |
346 | ||
347 | ||
348 | /* Scan an FR-V prologue, starting at PC, until frame->PC. | |
349 | If FRAME is non-zero, fill in its saved_regs with appropriate addresses. | |
350 | We assume FRAME's saved_regs array has already been allocated and cleared. | |
351 | Return the first PC value after the prologue. | |
352 | ||
353 | Note that, for unoptimized code, we almost don't need this function | |
354 | at all; all arguments and locals live on the stack, so we just need | |
355 | the FP to find everything. The catch: structures passed by value | |
356 | have their addresses living in registers; they're never spilled to | |
357 | the stack. So if you ever want to be able to get to these | |
358 | arguments in any frame but the top, you'll need to do this serious | |
359 | prologue analysis. */ | |
360 | static CORE_ADDR | |
361 | frv_analyze_prologue (CORE_ADDR pc, struct frame_info *frame) | |
362 | { | |
363 | /* When writing out instruction bitpatterns, we use the following | |
364 | letters to label instruction fields: | |
365 | P - The parallel bit. We don't use this. | |
366 | J - The register number of GRj in the instruction description. | |
367 | K - The register number of GRk in the instruction description. | |
368 | I - The register number of GRi. | |
369 | S - a signed imediate offset. | |
370 | U - an unsigned immediate offset. | |
371 | ||
372 | The dots below the numbers indicate where hex digit boundaries | |
373 | fall, to make it easier to check the numbers. */ | |
374 | ||
375 | /* Non-zero iff we've seen the instruction that initializes the | |
376 | frame pointer for this function's frame. */ | |
377 | int fp_set = 0; | |
378 | ||
379 | /* If fp_set is non_zero, then this is the distance from | |
380 | the stack pointer to frame pointer: fp = sp + fp_offset. */ | |
381 | int fp_offset = 0; | |
382 | ||
383 | /* Total size of frame prior to any alloca operations. */ | |
384 | int framesize = 0; | |
385 | ||
386 | /* The number of the general-purpose register we saved the return | |
387 | address ("link register") in, or -1 if we haven't moved it yet. */ | |
388 | int lr_save_reg = -1; | |
389 | ||
390 | /* Non-zero iff we've saved the LR onto the stack. */ | |
391 | int lr_saved_on_stack = 0; | |
392 | ||
393 | /* If gr_saved[i] is non-zero, then we've noticed that general | |
394 | register i has been saved at gr_sp_offset[i] from the stack | |
395 | pointer. */ | |
396 | char gr_saved[64]; | |
397 | int gr_sp_offset[64]; | |
398 | ||
399 | memset (gr_saved, 0, sizeof (gr_saved)); | |
400 | ||
401 | while (! frame || pc < frame->pc) | |
402 | { | |
403 | LONGEST op = read_memory_integer (pc, 4); | |
404 | ||
405 | /* The tests in this chain of ifs should be in order of | |
406 | decreasing selectivity, so that more particular patterns get | |
407 | to fire before less particular patterns. */ | |
408 | ||
409 | /* Setting the FP from the SP: | |
410 | ori sp, 0, fp | |
411 | P 000010 0100010 000001 000000000000 = 0x04881000 | |
412 | 0 111111 1111111 111111 111111111111 = 0x7fffffff | |
413 | . . . . . . . . | |
414 | We treat this as part of the prologue. */ | |
415 | if ((op & 0x7fffffff) == 0x04881000) | |
416 | { | |
417 | fp_set = 1; | |
418 | fp_offset = 0; | |
419 | } | |
420 | ||
421 | /* Move the link register to the scratch register grJ, before saving: | |
422 | movsg lr, grJ | |
423 | P 000100 0000011 010000 000111 JJJJJJ = 0x080d01c0 | |
424 | 0 111111 1111111 111111 111111 000000 = 0x7fffffc0 | |
425 | . . . . . . . . | |
426 | We treat this as part of the prologue. */ | |
427 | else if ((op & 0x7fffffc0) == 0x080d01c0) | |
428 | { | |
429 | int gr_j = op & 0x3f; | |
430 | ||
431 | /* If we're moving it to a scratch register, that's fine. */ | |
432 | if (is_caller_saves_reg (gr_j)) | |
433 | lr_save_reg = gr_j; | |
434 | /* Otherwise it's not a prologue instruction that we | |
435 | recognize. */ | |
436 | else | |
437 | break; | |
438 | } | |
439 | ||
440 | /* To save multiple callee-saves registers on the stack, at | |
441 | offset zero: | |
442 | ||
443 | std grK,@(sp,gr0) | |
444 | P KKKKKK 0000011 000001 000011 000000 = 0x000c10c0 | |
445 | 0 000000 1111111 111111 111111 111111 = 0x01ffffff | |
446 | ||
447 | stq grK,@(sp,gr0) | |
448 | P KKKKKK 0000011 000001 000100 000000 = 0x000c1100 | |
449 | 0 000000 1111111 111111 111111 111111 = 0x01ffffff | |
450 | . . . . . . . . | |
451 | We treat this as part of the prologue, and record the register's | |
452 | saved address in the frame structure. */ | |
453 | else if ((op & 0x01ffffff) == 0x000c10c0 | |
454 | || (op & 0x01ffffff) == 0x000c1100) | |
455 | { | |
456 | int gr_k = ((op >> 25) & 0x3f); | |
457 | int ope = ((op >> 6) & 0x3f); | |
458 | int count; | |
459 | int i; | |
460 | ||
461 | /* Is it an std or an stq? */ | |
462 | if (ope == 0x03) | |
463 | count = 2; | |
464 | else | |
465 | count = 4; | |
466 | ||
467 | /* Is it really a callee-saves register? */ | |
468 | if (is_callee_saves_reg (gr_k)) | |
469 | { | |
470 | for (i = 0; i < count; i++) | |
471 | { | |
472 | gr_saved[gr_k + i] = 1; | |
473 | gr_sp_offset[gr_k + i] = 4 * i; | |
474 | } | |
475 | } | |
476 | else | |
477 | /* It's not a prologue instruction. */ | |
478 | break; | |
479 | } | |
480 | ||
481 | /* Adjusting the stack pointer. (The stack pointer is GR1.) | |
482 | addi sp, S, sp | |
483 | P 000001 0010000 000001 SSSSSSSSSSSS = 0x02401000 | |
484 | 0 111111 1111111 111111 000000000000 = 0x7ffff000 | |
485 | . . . . . . . . | |
486 | We treat this as part of the prologue. */ | |
487 | else if ((op & 0x7ffff000) == 0x02401000) | |
488 | { | |
489 | /* Sign-extend the twelve-bit field. | |
490 | (Isn't there a better way to do this?) */ | |
491 | int s = (((op & 0xfff) - 0x800) & 0xfff) - 0x800; | |
492 | ||
493 | framesize -= s; | |
494 | } | |
495 | ||
496 | /* Setting the FP to a constant distance from the SP: | |
497 | addi sp, S, fp | |
498 | P 000010 0010000 000001 SSSSSSSSSSSS = 0x04401000 | |
499 | 0 111111 1111111 111111 000000000000 = 0x7ffff000 | |
500 | . . . . . . . . | |
501 | We treat this as part of the prologue. */ | |
502 | else if ((op & 0x7ffff000) == 0x04401000) | |
503 | { | |
504 | /* Sign-extend the twelve-bit field. | |
505 | (Isn't there a better way to do this?) */ | |
506 | int s = (((op & 0xfff) - 0x800) & 0xfff) - 0x800; | |
507 | fp_set = 1; | |
508 | fp_offset = s; | |
509 | } | |
510 | ||
511 | /* To spill an argument register to a scratch register: | |
512 | ori GRi, 0, GRk | |
513 | P KKKKKK 0100010 IIIIII 000000000000 = 0x00880000 | |
514 | 0 000000 1111111 000000 111111111111 = 0x01fc0fff | |
515 | . . . . . . . . | |
516 | For the time being, we treat this as a prologue instruction, | |
517 | assuming that GRi is an argument register. This one's kind | |
518 | of suspicious, because it seems like it could be part of a | |
519 | legitimate body instruction. But we only come here when the | |
520 | source info wasn't helpful, so we have to do the best we can. | |
521 | Hopefully once GCC and GDB agree on how to emit line number | |
522 | info for prologues, then this code will never come into play. */ | |
523 | else if ((op & 0x01fc0fff) == 0x00880000) | |
524 | { | |
525 | int gr_i = ((op >> 12) & 0x3f); | |
526 | ||
527 | /* If the source isn't an arg register, then this isn't a | |
528 | prologue instruction. */ | |
529 | if (! is_argument_reg (gr_i)) | |
530 | break; | |
531 | } | |
532 | ||
533 | /* To spill 16-bit values to the stack: | |
534 | sthi GRk, @(fp, s) | |
535 | P KKKKKK 1010001 000010 SSSSSSSSSSSS = 0x01442000 | |
536 | 0 000000 1111111 111111 000000000000 = 0x01fff000 | |
537 | . . . . . . . . | |
538 | And for 8-bit values, we use STB instructions. | |
539 | stbi GRk, @(fp, s) | |
540 | P KKKKKK 1010000 000010 SSSSSSSSSSSS = 0x01402000 | |
541 | 0 000000 1111111 111111 000000000000 = 0x01fff000 | |
542 | . . . . . . . . | |
543 | We check that GRk is really an argument register, and treat | |
544 | all such as part of the prologue. */ | |
545 | else if ( (op & 0x01fff000) == 0x01442000 | |
546 | || (op & 0x01fff000) == 0x01402000) | |
547 | { | |
548 | int gr_k = ((op >> 25) & 0x3f); | |
549 | ||
550 | if (! is_argument_reg (gr_k)) | |
551 | break; /* Source isn't an arg register. */ | |
552 | } | |
553 | ||
554 | /* To save multiple callee-saves register on the stack, at a | |
555 | non-zero offset: | |
556 | ||
557 | stdi GRk, @(sp, s) | |
558 | P KKKKKK 1010011 000001 SSSSSSSSSSSS = 0x014c1000 | |
559 | 0 000000 1111111 111111 000000000000 = 0x01fff000 | |
560 | . . . . . . . . | |
561 | stqi GRk, @(sp, s) | |
562 | P KKKKKK 1010100 000001 SSSSSSSSSSSS = 0x01501000 | |
563 | 0 000000 1111111 111111 000000000000 = 0x01fff000 | |
564 | . . . . . . . . | |
565 | We treat this as part of the prologue, and record the register's | |
566 | saved address in the frame structure. */ | |
567 | else if ((op & 0x01fff000) == 0x014c1000 | |
568 | || (op & 0x01fff000) == 0x01501000) | |
569 | { | |
570 | int gr_k = ((op >> 25) & 0x3f); | |
571 | int count; | |
572 | int i; | |
573 | ||
574 | /* Is it a stdi or a stqi? */ | |
575 | if ((op & 0x01fff000) == 0x014c1000) | |
576 | count = 2; | |
577 | else | |
578 | count = 4; | |
579 | ||
580 | /* Is it really a callee-saves register? */ | |
581 | if (is_callee_saves_reg (gr_k)) | |
582 | { | |
583 | /* Sign-extend the twelve-bit field. | |
584 | (Isn't there a better way to do this?) */ | |
585 | int s = (((op & 0xfff) - 0x800) & 0xfff) - 0x800; | |
586 | ||
587 | for (i = 0; i < count; i++) | |
588 | { | |
589 | gr_saved[gr_k + i] = 1; | |
590 | gr_sp_offset[gr_k + i] = s + (4 * i); | |
591 | } | |
592 | } | |
593 | else | |
594 | /* It's not a prologue instruction. */ | |
595 | break; | |
596 | } | |
597 | ||
598 | /* Storing any kind of integer register at any constant offset | |
599 | from any other register. | |
600 | ||
601 | st GRk, @(GRi, gr0) | |
602 | P KKKKKK 0000011 IIIIII 000010 000000 = 0x000c0080 | |
603 | 0 000000 1111111 000000 111111 111111 = 0x01fc0fff | |
604 | . . . . . . . . | |
605 | sti GRk, @(GRi, d12) | |
606 | P KKKKKK 1010010 IIIIII SSSSSSSSSSSS = 0x01480000 | |
607 | 0 000000 1111111 000000 000000000000 = 0x01fc0000 | |
608 | . . . . . . . . | |
609 | These could be almost anything, but a lot of prologue | |
610 | instructions fall into this pattern, so let's decode the | |
611 | instruction once, and then work at a higher level. */ | |
612 | else if (((op & 0x01fc0fff) == 0x000c0080) | |
613 | || ((op & 0x01fc0000) == 0x01480000)) | |
614 | { | |
615 | int gr_k = ((op >> 25) & 0x3f); | |
616 | int gr_i = ((op >> 12) & 0x3f); | |
617 | int offset; | |
618 | ||
619 | /* Are we storing with gr0 as an offset, or using an | |
620 | immediate value? */ | |
621 | if ((op & 0x01fc0fff) == 0x000c0080) | |
622 | offset = 0; | |
623 | else | |
624 | offset = (((op & 0xfff) - 0x800) & 0xfff) - 0x800; | |
625 | ||
626 | /* If the address isn't relative to the SP or FP, it's not a | |
627 | prologue instruction. */ | |
628 | if (gr_i != sp_regnum && gr_i != fp_regnum) | |
629 | break; | |
630 | ||
631 | /* Saving the old FP in the new frame (relative to the SP). */ | |
632 | if (gr_k == fp_regnum && gr_i == sp_regnum) | |
633 | ; | |
634 | ||
635 | /* Saving callee-saves register(s) on the stack, relative to | |
636 | the SP. */ | |
637 | else if (gr_i == sp_regnum | |
638 | && is_callee_saves_reg (gr_k)) | |
639 | { | |
640 | gr_saved[gr_k] = 1; | |
641 | gr_sp_offset[gr_k] = offset; | |
642 | } | |
643 | ||
644 | /* Saving the scratch register holding the return address. */ | |
645 | else if (lr_save_reg != -1 | |
646 | && gr_k == lr_save_reg) | |
647 | lr_saved_on_stack = 1; | |
648 | ||
649 | /* Spilling int-sized arguments to the stack. */ | |
650 | else if (is_argument_reg (gr_k)) | |
651 | ; | |
652 | ||
653 | /* It's not a store instruction we recognize, so this must | |
654 | be the end of the prologue. */ | |
655 | else | |
656 | break; | |
657 | } | |
658 | ||
659 | /* It's not any instruction we recognize, so this must be the end | |
660 | of the prologue. */ | |
661 | else | |
662 | break; | |
663 | ||
664 | pc += 4; | |
665 | } | |
666 | ||
667 | if (frame) | |
668 | { | |
669 | frame->extra_info->lr_saved_on_stack = lr_saved_on_stack; | |
670 | ||
671 | /* If we know the relationship between the stack and frame | |
672 | pointers, record the addresses of the registers we noticed. | |
673 | Note that we have to do this as a separate step at the end, | |
674 | because instructions may save relative to the SP, but we need | |
675 | their addresses relative to the FP. */ | |
676 | if (fp_set) | |
677 | { | |
678 | int i; | |
679 | ||
680 | for (i = 0; i < 64; i++) | |
681 | if (gr_saved[i]) | |
682 | frame->saved_regs[i] = (frame->frame | |
683 | - fp_offset + gr_sp_offset[i]); | |
684 | ||
685 | frame->extra_info->fp_to_callers_sp_offset = framesize - fp_offset; | |
686 | } | |
687 | } | |
688 | ||
689 | return pc; | |
690 | } | |
691 | ||
692 | ||
693 | static CORE_ADDR | |
694 | frv_skip_prologue (CORE_ADDR pc) | |
695 | { | |
696 | CORE_ADDR func_addr, func_end, new_pc; | |
697 | ||
698 | new_pc = pc; | |
699 | ||
700 | /* If the line table has entry for a line *within* the function | |
701 | (i.e., not in the prologue, and not past the end), then that's | |
702 | our location. */ | |
703 | if (find_pc_partial_function (pc, NULL, &func_addr, &func_end)) | |
704 | { | |
705 | struct symtab_and_line sal; | |
706 | ||
707 | sal = find_pc_line (func_addr, 0); | |
708 | ||
709 | if (sal.line != 0 && sal.end < func_end) | |
710 | { | |
711 | new_pc = sal.end; | |
712 | } | |
713 | } | |
714 | ||
715 | /* The FR-V prologue is at least five instructions long (twenty bytes). | |
716 | If we didn't find a real source location past that, then | |
717 | do a full analysis of the prologue. */ | |
718 | if (new_pc < pc + 20) | |
719 | new_pc = frv_analyze_prologue (pc, 0); | |
720 | ||
721 | return new_pc; | |
722 | } | |
723 | ||
724 | static void | |
725 | frv_frame_init_saved_regs (struct frame_info *frame) | |
726 | { | |
727 | if (frame->saved_regs) | |
728 | return; | |
729 | ||
730 | frame_saved_regs_zalloc (frame); | |
731 | frame->saved_regs[fp_regnum] = frame->frame; | |
732 | ||
733 | /* Find the beginning of this function, so we can analyze its | |
734 | prologue. */ | |
735 | { | |
736 | CORE_ADDR func_addr, func_end; | |
737 | ||
738 | if (find_pc_partial_function (frame->pc, NULL, &func_addr, &func_end)) | |
739 | frv_analyze_prologue (func_addr, frame); | |
740 | } | |
741 | } | |
742 | ||
743 | /* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of | |
744 | EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc | |
745 | and TYPE is the type (which is known to be struct, union or array). | |
746 | ||
747 | The frv returns all structs in memory. */ | |
748 | ||
749 | static int | |
750 | frv_use_struct_convention (int gcc_p, struct type *type) | |
751 | { | |
752 | return 1; | |
753 | } | |
754 | ||
755 | static void | |
756 | frv_extract_return_value (struct type *type, char *regbuf, char *valbuf) | |
757 | { | |
758 | memcpy (valbuf, (regbuf | |
759 | + frv_register_byte (8) | |
760 | + (TYPE_LENGTH (type) < 4 ? 4 - TYPE_LENGTH (type) : 0)), | |
761 | TYPE_LENGTH (type)); | |
762 | } | |
763 | ||
764 | static CORE_ADDR | |
765 | frv_extract_struct_value_address (char *regbuf) | |
766 | { | |
767 | return extract_address (regbuf + frv_register_byte (struct_return_regnum), | |
768 | 4); | |
769 | } | |
770 | ||
771 | static void | |
772 | frv_store_struct_return (CORE_ADDR addr, CORE_ADDR sp) | |
773 | { | |
774 | write_register (struct_return_regnum, addr); | |
775 | } | |
776 | ||
777 | static int | |
778 | frv_frameless_function_invocation (struct frame_info *frame) | |
779 | { | |
780 | return frameless_look_for_prologue (frame); | |
781 | } | |
782 | ||
783 | static CORE_ADDR | |
784 | frv_saved_pc_after_call (struct frame_info *frame) | |
785 | { | |
786 | return read_register (lr_regnum); | |
787 | } | |
788 | ||
789 | static void | |
790 | frv_init_extra_frame_info (int fromleaf, struct frame_info *frame) | |
791 | { | |
a00a19e9 | 792 | frame_extra_info_zalloc (frame, sizeof (struct frame_extra_info)); |
456f8b9d DB |
793 | frame->extra_info->fp_to_callers_sp_offset = 0; |
794 | frame->extra_info->lr_saved_on_stack = 0; | |
795 | } | |
796 | ||
797 | #define ROUND_UP(n,a) (((n)+(a)-1) & ~((a)-1)) | |
798 | #define ROUND_DOWN(n,a) ((n) & ~((a)-1)) | |
799 | ||
800 | static CORE_ADDR | |
801 | frv_push_arguments (int nargs, struct value **args, CORE_ADDR sp, | |
802 | int struct_return, CORE_ADDR struct_addr) | |
803 | { | |
804 | int argreg; | |
805 | int argnum; | |
806 | char *val; | |
807 | char valbuf[4]; | |
808 | struct value *arg; | |
809 | struct type *arg_type; | |
810 | int len; | |
811 | enum type_code typecode; | |
812 | CORE_ADDR regval; | |
813 | int stack_space; | |
814 | int stack_offset; | |
815 | ||
816 | #if 0 | |
817 | printf("Push %d args at sp = %x, struct_return=%d (%x)\n", | |
818 | nargs, (int) sp, struct_return, struct_addr); | |
819 | #endif | |
820 | ||
821 | stack_space = 0; | |
822 | for (argnum = 0; argnum < nargs; ++argnum) | |
823 | stack_space += ROUND_UP (TYPE_LENGTH (VALUE_TYPE (args[argnum])), 4); | |
824 | ||
825 | stack_space -= (6 * 4); | |
826 | if (stack_space > 0) | |
827 | sp -= stack_space; | |
828 | ||
829 | /* Make sure stack is dword aligned. */ | |
830 | sp = ROUND_DOWN (sp, 8); | |
831 | ||
832 | stack_offset = 0; | |
833 | ||
834 | argreg = 8; | |
835 | ||
836 | if (struct_return) | |
837 | write_register (struct_return_regnum, struct_addr); | |
838 | ||
839 | for (argnum = 0; argnum < nargs; ++argnum) | |
840 | { | |
841 | arg = args[argnum]; | |
842 | arg_type = check_typedef (VALUE_TYPE (arg)); | |
843 | len = TYPE_LENGTH (arg_type); | |
844 | typecode = TYPE_CODE (arg_type); | |
845 | ||
846 | if (typecode == TYPE_CODE_STRUCT || typecode == TYPE_CODE_UNION) | |
847 | { | |
848 | store_address (valbuf, 4, VALUE_ADDRESS (arg)); | |
849 | typecode = TYPE_CODE_PTR; | |
850 | len = 4; | |
851 | val = valbuf; | |
852 | } | |
853 | else | |
854 | { | |
855 | val = (char *) VALUE_CONTENTS (arg); | |
856 | } | |
857 | ||
858 | while (len > 0) | |
859 | { | |
860 | int partial_len = (len < 4 ? len : 4); | |
861 | ||
862 | if (argreg < 14) | |
863 | { | |
864 | regval = extract_address (val, partial_len); | |
865 | #if 0 | |
866 | printf(" Argnum %d data %x -> reg %d\n", | |
867 | argnum, (int) regval, argreg); | |
868 | #endif | |
869 | write_register (argreg, regval); | |
870 | ++argreg; | |
871 | } | |
872 | else | |
873 | { | |
874 | #if 0 | |
875 | printf(" Argnum %d data %x -> offset %d (%x)\n", | |
876 | argnum, *((int *)val), stack_offset, (int) (sp + stack_offset)); | |
877 | #endif | |
878 | write_memory (sp + stack_offset, val, partial_len); | |
879 | stack_offset += ROUND_UP(partial_len, 4); | |
880 | } | |
881 | len -= partial_len; | |
882 | val += partial_len; | |
883 | } | |
884 | } | |
885 | return sp; | |
886 | } | |
887 | ||
888 | static CORE_ADDR | |
889 | frv_push_return_address (CORE_ADDR pc, CORE_ADDR sp) | |
890 | { | |
891 | write_register (lr_regnum, CALL_DUMMY_ADDRESS ()); | |
892 | return sp; | |
893 | } | |
894 | ||
895 | static void | |
896 | frv_store_return_value (struct type *type, char *valbuf) | |
897 | { | |
898 | int length = TYPE_LENGTH (type); | |
899 | int reg8_offset = frv_register_byte (8); | |
900 | ||
901 | if (length <= 4) | |
73937e03 AC |
902 | deprecated_write_register_bytes (reg8_offset + (4 - length), valbuf, |
903 | length); | |
456f8b9d | 904 | else if (length == 8) |
73937e03 | 905 | deprecated_write_register_bytes (reg8_offset, valbuf, length); |
456f8b9d DB |
906 | else |
907 | internal_error (__FILE__, __LINE__, | |
908 | "Don't know how to return a %d-byte value.", length); | |
909 | } | |
910 | ||
911 | static void | |
912 | frv_pop_frame (void) | |
913 | { | |
914 | generic_pop_current_frame (frv_pop_frame_regular); | |
915 | } | |
916 | ||
917 | static void | |
918 | frv_pop_frame_regular (struct frame_info *frame) | |
919 | { | |
920 | CORE_ADDR fp; | |
921 | int regno; | |
922 | ||
923 | fp = frame->frame; | |
924 | ||
925 | frv_frame_init_saved_regs (frame); | |
926 | ||
927 | write_register (pc_regnum, frv_frame_saved_pc (frame)); | |
928 | for (regno = 0; regno < frv_num_regs; ++regno) | |
929 | { | |
930 | if (frame->saved_regs[regno] | |
931 | && regno != pc_regnum | |
932 | && regno != sp_regnum) | |
933 | { | |
934 | write_register (regno, | |
935 | read_memory_integer (frame->saved_regs[regno], 4)); | |
936 | } | |
937 | } | |
938 | write_register (sp_regnum, fp + frame->extra_info->fp_to_callers_sp_offset); | |
939 | flush_cached_frames (); | |
940 | } | |
941 | ||
942 | ||
943 | static void | |
944 | frv_remote_translate_xfer_address (CORE_ADDR memaddr, int nr_bytes, | |
945 | CORE_ADDR *targ_addr, int *targ_len) | |
946 | { | |
947 | *targ_addr = memaddr; | |
948 | *targ_len = nr_bytes; | |
949 | } | |
950 | ||
951 | ||
952 | /* Hardware watchpoint / breakpoint support for the FR500 | |
953 | and FR400. */ | |
954 | ||
955 | int | |
956 | frv_check_watch_resources (int type, int cnt, int ot) | |
957 | { | |
958 | struct gdbarch_tdep *var = CURRENT_VARIANT; | |
959 | ||
960 | /* Watchpoints not supported on simulator. */ | |
961 | if (strcmp (target_shortname, "sim") == 0) | |
962 | return 0; | |
963 | ||
964 | if (type == bp_hardware_breakpoint) | |
965 | { | |
966 | if (var->num_hw_breakpoints == 0) | |
967 | return 0; | |
968 | else if (cnt <= var->num_hw_breakpoints) | |
969 | return 1; | |
970 | } | |
971 | else | |
972 | { | |
973 | if (var->num_hw_watchpoints == 0) | |
974 | return 0; | |
975 | else if (ot) | |
976 | return -1; | |
977 | else if (cnt <= var->num_hw_watchpoints) | |
978 | return 1; | |
979 | } | |
980 | return -1; | |
981 | } | |
982 | ||
983 | ||
984 | CORE_ADDR | |
5ae5f592 | 985 | frv_stopped_data_address (void) |
456f8b9d DB |
986 | { |
987 | CORE_ADDR brr, dbar0, dbar1, dbar2, dbar3; | |
988 | ||
989 | brr = read_register (brr_regnum); | |
990 | dbar0 = read_register (dbar0_regnum); | |
991 | dbar1 = read_register (dbar1_regnum); | |
992 | dbar2 = read_register (dbar2_regnum); | |
993 | dbar3 = read_register (dbar3_regnum); | |
994 | ||
995 | if (brr & (1<<11)) | |
996 | return dbar0; | |
997 | else if (brr & (1<<10)) | |
998 | return dbar1; | |
999 | else if (brr & (1<<9)) | |
1000 | return dbar2; | |
1001 | else if (brr & (1<<8)) | |
1002 | return dbar3; | |
1003 | else | |
1004 | return 0; | |
1005 | } | |
1006 | ||
1007 | static struct gdbarch * | |
1008 | frv_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | |
1009 | { | |
1010 | struct gdbarch *gdbarch; | |
1011 | struct gdbarch_tdep *var; | |
1012 | ||
1013 | /* Check to see if we've already built an appropriate architecture | |
1014 | object for this executable. */ | |
1015 | arches = gdbarch_list_lookup_by_info (arches, &info); | |
1016 | if (arches) | |
1017 | return arches->gdbarch; | |
1018 | ||
1019 | /* Select the right tdep structure for this variant. */ | |
1020 | var = new_variant (); | |
1021 | switch (info.bfd_arch_info->mach) | |
1022 | { | |
1023 | case bfd_mach_frv: | |
1024 | case bfd_mach_frvsimple: | |
1025 | case bfd_mach_fr500: | |
1026 | case bfd_mach_frvtomcat: | |
1027 | set_variant_num_gprs (var, 64); | |
1028 | set_variant_num_fprs (var, 64); | |
1029 | break; | |
1030 | ||
1031 | case bfd_mach_fr400: | |
1032 | set_variant_num_gprs (var, 32); | |
1033 | set_variant_num_fprs (var, 32); | |
1034 | break; | |
1035 | ||
1036 | default: | |
1037 | /* Never heard of this variant. */ | |
1038 | return 0; | |
1039 | } | |
1040 | ||
1041 | gdbarch = gdbarch_alloc (&info, var); | |
1042 | ||
a5afb99f AC |
1043 | /* NOTE: cagney/2002-12-06: This can be deleted when this arch is |
1044 | ready to unwind the PC first (see frame.c:get_prev_frame()). */ | |
1045 | set_gdbarch_deprecated_init_frame_pc (gdbarch, init_frame_pc_default); | |
1046 | ||
456f8b9d DB |
1047 | set_gdbarch_short_bit (gdbarch, 16); |
1048 | set_gdbarch_int_bit (gdbarch, 32); | |
1049 | set_gdbarch_long_bit (gdbarch, 32); | |
1050 | set_gdbarch_long_long_bit (gdbarch, 64); | |
1051 | set_gdbarch_float_bit (gdbarch, 32); | |
1052 | set_gdbarch_double_bit (gdbarch, 64); | |
1053 | set_gdbarch_long_double_bit (gdbarch, 64); | |
1054 | set_gdbarch_ptr_bit (gdbarch, 32); | |
1055 | ||
1056 | set_gdbarch_num_regs (gdbarch, frv_num_regs); | |
1057 | set_gdbarch_sp_regnum (gdbarch, sp_regnum); | |
1058 | set_gdbarch_fp_regnum (gdbarch, fp_regnum); | |
1059 | set_gdbarch_pc_regnum (gdbarch, pc_regnum); | |
1060 | ||
1061 | set_gdbarch_register_name (gdbarch, frv_register_name); | |
1062 | set_gdbarch_register_size (gdbarch, 4); | |
1063 | set_gdbarch_register_bytes (gdbarch, frv_num_regs * 4); | |
1064 | set_gdbarch_register_byte (gdbarch, frv_register_byte); | |
1065 | set_gdbarch_register_raw_size (gdbarch, frv_register_raw_size); | |
a0ed5532 | 1066 | set_gdbarch_deprecated_max_register_raw_size (gdbarch, 4); |
456f8b9d | 1067 | set_gdbarch_register_virtual_size (gdbarch, frv_register_virtual_size); |
a0ed5532 | 1068 | set_gdbarch_deprecated_max_register_virtual_size (gdbarch, 4); |
456f8b9d DB |
1069 | set_gdbarch_register_virtual_type (gdbarch, frv_register_virtual_type); |
1070 | ||
1071 | set_gdbarch_skip_prologue (gdbarch, frv_skip_prologue); | |
1072 | set_gdbarch_breakpoint_from_pc (gdbarch, frv_breakpoint_from_pc); | |
1073 | ||
1074 | set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown); | |
1075 | set_gdbarch_frame_args_skip (gdbarch, 0); | |
1076 | set_gdbarch_frameless_function_invocation (gdbarch, frv_frameless_function_invocation); | |
1077 | ||
1078 | set_gdbarch_saved_pc_after_call (gdbarch, frv_saved_pc_after_call); | |
1079 | ||
618ce49f | 1080 | set_gdbarch_deprecated_frame_chain (gdbarch, frv_frame_chain); |
8bedc050 | 1081 | set_gdbarch_deprecated_frame_saved_pc (gdbarch, frv_frame_saved_pc); |
456f8b9d | 1082 | |
f30ee0bc | 1083 | set_gdbarch_deprecated_frame_init_saved_regs (gdbarch, frv_frame_init_saved_regs); |
456f8b9d DB |
1084 | |
1085 | set_gdbarch_use_struct_convention (gdbarch, frv_use_struct_convention); | |
1086 | set_gdbarch_deprecated_extract_return_value (gdbarch, frv_extract_return_value); | |
1087 | ||
1088 | set_gdbarch_store_struct_return (gdbarch, frv_store_struct_return); | |
ebba8386 | 1089 | set_gdbarch_deprecated_store_return_value (gdbarch, frv_store_return_value); |
456f8b9d DB |
1090 | set_gdbarch_deprecated_extract_struct_value_address (gdbarch, frv_extract_struct_value_address); |
1091 | ||
1092 | /* Settings for calling functions in the inferior. */ | |
456f8b9d | 1093 | set_gdbarch_call_dummy_length (gdbarch, 0); |
456f8b9d DB |
1094 | set_gdbarch_push_arguments (gdbarch, frv_push_arguments); |
1095 | set_gdbarch_push_return_address (gdbarch, frv_push_return_address); | |
749b82f6 | 1096 | set_gdbarch_deprecated_pop_frame (gdbarch, frv_pop_frame); |
456f8b9d DB |
1097 | |
1098 | set_gdbarch_call_dummy_p (gdbarch, 1); | |
1099 | set_gdbarch_call_dummy_words (gdbarch, frv_call_dummy_words); | |
1100 | set_gdbarch_sizeof_call_dummy_words (gdbarch, sizeof (frv_call_dummy_words)); | |
1101 | set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1); | |
e9582e71 | 1102 | set_gdbarch_deprecated_init_extra_frame_info (gdbarch, frv_init_extra_frame_info); |
456f8b9d DB |
1103 | |
1104 | /* Settings that should be unnecessary. */ | |
1105 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
1106 | ||
1107 | set_gdbarch_read_pc (gdbarch, generic_target_read_pc); | |
1108 | set_gdbarch_write_pc (gdbarch, generic_target_write_pc); | |
1109 | set_gdbarch_read_fp (gdbarch, generic_target_read_fp); | |
1110 | set_gdbarch_read_sp (gdbarch, generic_target_read_sp); | |
1111 | set_gdbarch_write_sp (gdbarch, generic_target_write_sp); | |
1112 | ||
456f8b9d DB |
1113 | set_gdbarch_call_dummy_address (gdbarch, entry_point_address); |
1114 | set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0); | |
1115 | set_gdbarch_call_dummy_start_offset (gdbarch, 0); | |
ae45cd16 | 1116 | set_gdbarch_deprecated_pc_in_call_dummy (gdbarch, deprecated_pc_in_call_dummy_at_entry_point); |
456f8b9d DB |
1117 | set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy); |
1118 | ||
456f8b9d DB |
1119 | set_gdbarch_decr_pc_after_break (gdbarch, 0); |
1120 | set_gdbarch_function_start_offset (gdbarch, 0); | |
1121 | set_gdbarch_register_convertible (gdbarch, generic_register_convertible_not); | |
1122 | ||
1123 | set_gdbarch_remote_translate_xfer_address | |
1124 | (gdbarch, frv_remote_translate_xfer_address); | |
1125 | ||
1126 | /* Hardware watchpoint / breakpoint support. */ | |
1127 | switch (info.bfd_arch_info->mach) | |
1128 | { | |
1129 | case bfd_mach_frv: | |
1130 | case bfd_mach_frvsimple: | |
1131 | case bfd_mach_fr500: | |
1132 | case bfd_mach_frvtomcat: | |
1133 | /* fr500-style hardware debugging support. */ | |
1134 | var->num_hw_watchpoints = 4; | |
1135 | var->num_hw_breakpoints = 4; | |
1136 | break; | |
1137 | ||
1138 | case bfd_mach_fr400: | |
1139 | /* fr400-style hardware debugging support. */ | |
1140 | var->num_hw_watchpoints = 2; | |
1141 | var->num_hw_breakpoints = 4; | |
1142 | break; | |
1143 | ||
1144 | default: | |
1145 | /* Otherwise, assume we don't have hardware debugging support. */ | |
1146 | var->num_hw_watchpoints = 0; | |
1147 | var->num_hw_breakpoints = 0; | |
1148 | break; | |
1149 | } | |
1150 | ||
1151 | return gdbarch; | |
1152 | } | |
1153 | ||
1154 | void | |
1155 | _initialize_frv_tdep (void) | |
1156 | { | |
1157 | register_gdbarch_init (bfd_arch_frv, frv_gdbarch_init); | |
1158 | ||
1159 | tm_print_insn = print_insn_frv; | |
1160 | } | |
1161 | ||
1162 | \f |