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456f8b9d | 1 | /* Target-dependent code for the Fujitsu FR-V, for GDB, the GNU Debugger. |
1e698235 | 2 | Copyright 2002, 2003 Free Software Foundation, Inc. |
456f8b9d DB |
3 | |
4 | This file is part of GDB. | |
5 | ||
6 | This program is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2 of the License, or | |
9 | (at your option) any later version. | |
10 | ||
11 | This program is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with this program; if not, write to the Free Software | |
18 | Foundation, Inc., 59 Temple Place - Suite 330, | |
19 | Boston, MA 02111-1307, USA. */ | |
20 | ||
21 | #include "defs.h" | |
8baa6f92 | 22 | #include "gdb_string.h" |
456f8b9d DB |
23 | #include "inferior.h" |
24 | #include "symfile.h" /* for entry_point_address */ | |
25 | #include "gdbcore.h" | |
26 | #include "arch-utils.h" | |
27 | #include "regcache.h" | |
8baa6f92 KB |
28 | #include "frame.h" |
29 | #include "trad-frame.h" | |
456f8b9d DB |
30 | |
31 | extern void _initialize_frv_tdep (void); | |
32 | ||
33 | static gdbarch_init_ftype frv_gdbarch_init; | |
34 | ||
35 | static gdbarch_register_name_ftype frv_register_name; | |
456f8b9d | 36 | static gdbarch_breakpoint_from_pc_ftype frv_breakpoint_from_pc; |
456f8b9d | 37 | static gdbarch_skip_prologue_ftype frv_skip_prologue; |
456f8b9d DB |
38 | static gdbarch_deprecated_extract_return_value_ftype frv_extract_return_value; |
39 | static gdbarch_deprecated_extract_struct_value_address_ftype frv_extract_struct_value_address; | |
456f8b9d | 40 | static gdbarch_frameless_function_invocation_ftype frv_frameless_function_invocation; |
aed7f26a MS |
41 | static gdbarch_deprecated_push_arguments_ftype frv_push_arguments; |
42 | static gdbarch_deprecated_saved_pc_after_call_ftype frv_saved_pc_after_call; | |
8baa6f92 | 43 | static void frv_frame_init_saved_regs (struct frame_info *frame); |
456f8b9d DB |
44 | |
45 | static void frv_pop_frame_regular (struct frame_info *frame); | |
46 | ||
47 | /* Register numbers. You can change these as needed, but don't forget | |
48 | to update the simulator accordingly. */ | |
49 | enum { | |
50 | /* The total number of registers we know exist. */ | |
51 | frv_num_regs = 147, | |
52 | ||
53 | /* Register numbers 0 -- 63 are always reserved for general-purpose | |
54 | registers. The chip at hand may have less. */ | |
55 | first_gpr_regnum = 0, | |
56 | sp_regnum = 1, | |
57 | fp_regnum = 2, | |
58 | struct_return_regnum = 3, | |
59 | last_gpr_regnum = 63, | |
60 | ||
61 | /* Register numbers 64 -- 127 are always reserved for floating-point | |
62 | registers. The chip at hand may have less. */ | |
63 | first_fpr_regnum = 64, | |
64 | last_fpr_regnum = 127, | |
65 | ||
66 | /* Register numbers 128 on up are always reserved for special-purpose | |
67 | registers. */ | |
68 | first_spr_regnum = 128, | |
69 | pc_regnum = 128, | |
70 | psr_regnum = 129, | |
71 | ccr_regnum = 130, | |
72 | cccr_regnum = 131, | |
73 | tbr_regnum = 135, | |
74 | brr_regnum = 136, | |
75 | dbar0_regnum = 137, | |
76 | dbar1_regnum = 138, | |
77 | dbar2_regnum = 139, | |
78 | dbar3_regnum = 140, | |
79 | lr_regnum = 145, | |
80 | lcr_regnum = 146, | |
81 | last_spr_regnum = 146 | |
82 | }; | |
83 | ||
84 | static LONGEST frv_call_dummy_words[] = | |
85 | {0}; | |
86 | ||
87 | ||
88 | /* The contents of this structure can only be trusted after we've | |
89 | frv_frame_init_saved_regs on the frame. */ | |
90 | struct frame_extra_info | |
91 | { | |
92 | /* The offset from our frame pointer to our caller's stack | |
93 | pointer. */ | |
94 | int fp_to_callers_sp_offset; | |
95 | ||
96 | /* Non-zero if we've saved our return address on the stack yet. | |
97 | Zero if it's still sitting in the link register. */ | |
98 | int lr_saved_on_stack; | |
8baa6f92 KB |
99 | |
100 | /* Table indicating the location of each and every register. */ | |
101 | struct trad_frame_saved_reg *saved_regs; | |
456f8b9d DB |
102 | }; |
103 | ||
104 | ||
105 | /* A structure describing a particular variant of the FRV. | |
106 | We allocate and initialize one of these structures when we create | |
107 | the gdbarch object for a variant. | |
108 | ||
109 | At the moment, all the FR variants we support differ only in which | |
110 | registers are present; the portable code of GDB knows that | |
111 | registers whose names are the empty string don't exist, so the | |
112 | `register_names' array captures all the per-variant information we | |
113 | need. | |
114 | ||
115 | in the future, if we need to have per-variant maps for raw size, | |
116 | virtual type, etc., we should replace register_names with an array | |
117 | of structures, each of which gives all the necessary info for one | |
118 | register. Don't stick parallel arrays in here --- that's so | |
119 | Fortran. */ | |
120 | struct gdbarch_tdep | |
121 | { | |
122 | /* How many general-purpose registers does this variant have? */ | |
123 | int num_gprs; | |
124 | ||
125 | /* How many floating-point registers does this variant have? */ | |
126 | int num_fprs; | |
127 | ||
128 | /* How many hardware watchpoints can it support? */ | |
129 | int num_hw_watchpoints; | |
130 | ||
131 | /* How many hardware breakpoints can it support? */ | |
132 | int num_hw_breakpoints; | |
133 | ||
134 | /* Register names. */ | |
135 | char **register_names; | |
136 | }; | |
137 | ||
138 | #define CURRENT_VARIANT (gdbarch_tdep (current_gdbarch)) | |
139 | ||
140 | ||
141 | /* Allocate a new variant structure, and set up default values for all | |
142 | the fields. */ | |
143 | static struct gdbarch_tdep * | |
5ae5f592 | 144 | new_variant (void) |
456f8b9d DB |
145 | { |
146 | struct gdbarch_tdep *var; | |
147 | int r; | |
148 | char buf[20]; | |
149 | ||
150 | var = xmalloc (sizeof (*var)); | |
151 | memset (var, 0, sizeof (*var)); | |
152 | ||
153 | var->num_gprs = 64; | |
154 | var->num_fprs = 64; | |
155 | var->num_hw_watchpoints = 0; | |
156 | var->num_hw_breakpoints = 0; | |
157 | ||
158 | /* By default, don't supply any general-purpose or floating-point | |
159 | register names. */ | |
160 | var->register_names = (char **) xmalloc (frv_num_regs * sizeof (char *)); | |
161 | for (r = 0; r < frv_num_regs; r++) | |
162 | var->register_names[r] = ""; | |
163 | ||
164 | /* Do, however, supply default names for the special-purpose | |
165 | registers. */ | |
166 | for (r = first_spr_regnum; r <= last_spr_regnum; ++r) | |
167 | { | |
168 | sprintf (buf, "x%d", r); | |
169 | var->register_names[r] = xstrdup (buf); | |
170 | } | |
171 | ||
172 | var->register_names[pc_regnum] = "pc"; | |
173 | var->register_names[lr_regnum] = "lr"; | |
174 | var->register_names[lcr_regnum] = "lcr"; | |
175 | ||
176 | var->register_names[psr_regnum] = "psr"; | |
177 | var->register_names[ccr_regnum] = "ccr"; | |
178 | var->register_names[cccr_regnum] = "cccr"; | |
179 | var->register_names[tbr_regnum] = "tbr"; | |
180 | ||
181 | /* Debug registers. */ | |
182 | var->register_names[brr_regnum] = "brr"; | |
183 | var->register_names[dbar0_regnum] = "dbar0"; | |
184 | var->register_names[dbar1_regnum] = "dbar1"; | |
185 | var->register_names[dbar2_regnum] = "dbar2"; | |
186 | var->register_names[dbar3_regnum] = "dbar3"; | |
187 | ||
188 | return var; | |
189 | } | |
190 | ||
191 | ||
192 | /* Indicate that the variant VAR has NUM_GPRS general-purpose | |
193 | registers, and fill in the names array appropriately. */ | |
194 | static void | |
195 | set_variant_num_gprs (struct gdbarch_tdep *var, int num_gprs) | |
196 | { | |
197 | int r; | |
198 | ||
199 | var->num_gprs = num_gprs; | |
200 | ||
201 | for (r = 0; r < num_gprs; ++r) | |
202 | { | |
203 | char buf[20]; | |
204 | ||
205 | sprintf (buf, "gr%d", r); | |
206 | var->register_names[first_gpr_regnum + r] = xstrdup (buf); | |
207 | } | |
208 | } | |
209 | ||
210 | ||
211 | /* Indicate that the variant VAR has NUM_FPRS floating-point | |
212 | registers, and fill in the names array appropriately. */ | |
213 | static void | |
214 | set_variant_num_fprs (struct gdbarch_tdep *var, int num_fprs) | |
215 | { | |
216 | int r; | |
217 | ||
218 | var->num_fprs = num_fprs; | |
219 | ||
220 | for (r = 0; r < num_fprs; ++r) | |
221 | { | |
222 | char buf[20]; | |
223 | ||
224 | sprintf (buf, "fr%d", r); | |
225 | var->register_names[first_fpr_regnum + r] = xstrdup (buf); | |
226 | } | |
227 | } | |
228 | ||
229 | ||
230 | static const char * | |
231 | frv_register_name (int reg) | |
232 | { | |
233 | if (reg < 0) | |
234 | return "?toosmall?"; | |
235 | if (reg >= frv_num_regs) | |
236 | return "?toolarge?"; | |
237 | ||
238 | return CURRENT_VARIANT->register_names[reg]; | |
239 | } | |
240 | ||
241 | ||
242 | static int | |
243 | frv_register_raw_size (int reg) | |
244 | { | |
245 | return 4; | |
246 | } | |
247 | ||
248 | static int | |
249 | frv_register_virtual_size (int reg) | |
250 | { | |
251 | return 4; | |
252 | } | |
253 | ||
254 | static struct type * | |
255 | frv_register_virtual_type (int reg) | |
256 | { | |
257 | if (reg >= 64 && reg <= 127) | |
258 | return builtin_type_float; | |
259 | else | |
260 | return builtin_type_int; | |
261 | } | |
262 | ||
263 | static int | |
264 | frv_register_byte (int reg) | |
265 | { | |
266 | return (reg * 4); | |
267 | } | |
268 | ||
269 | static const unsigned char * | |
270 | frv_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenp) | |
271 | { | |
272 | static unsigned char breakpoint[] = {0xc0, 0x70, 0x00, 0x01}; | |
273 | *lenp = sizeof (breakpoint); | |
274 | return breakpoint; | |
275 | } | |
276 | ||
277 | static CORE_ADDR | |
278 | frv_frame_chain (struct frame_info *frame) | |
279 | { | |
280 | CORE_ADDR saved_fp_addr; | |
8baa6f92 KB |
281 | struct frame_extra_info *extra_info = |
282 | get_frame_extra_info (frame); | |
456f8b9d | 283 | |
8baa6f92 KB |
284 | if (extra_info && |
285 | extra_info->saved_regs && | |
286 | extra_info->saved_regs[fp_regnum].addr != 0) | |
287 | saved_fp_addr = extra_info->saved_regs[fp_regnum].addr; | |
456f8b9d DB |
288 | else |
289 | /* Just assume it was saved in the usual place. */ | |
8baa6f92 | 290 | saved_fp_addr = get_frame_base (frame); |
456f8b9d DB |
291 | |
292 | return read_memory_integer (saved_fp_addr, 4); | |
293 | } | |
294 | ||
295 | static CORE_ADDR | |
296 | frv_frame_saved_pc (struct frame_info *frame) | |
297 | { | |
8baa6f92 KB |
298 | struct frame_extra_info *extra_info = |
299 | get_frame_extra_info (frame); | |
300 | ||
456f8b9d DB |
301 | frv_frame_init_saved_regs (frame); |
302 | ||
303 | /* Perhaps the prologue analyzer recorded where it was stored. | |
304 | (As of 14 Oct 2001, it never does.) */ | |
8baa6f92 KB |
305 | if (extra_info && extra_info->saved_regs && |
306 | extra_info->saved_regs[pc_regnum].addr != 0) | |
307 | return read_memory_integer (extra_info->saved_regs[pc_regnum].addr, 4); | |
456f8b9d DB |
308 | |
309 | /* If the prologue analyzer tells us the link register was saved on | |
310 | the stack, get it from there. */ | |
8baa6f92 KB |
311 | if (extra_info->lr_saved_on_stack) |
312 | return read_memory_integer (get_frame_base (frame) + 8, 4); | |
456f8b9d DB |
313 | |
314 | /* Otherwise, it's still in LR. | |
315 | However, if FRAME isn't the youngest frame, this is kind of | |
316 | suspicious --- if this frame called somebody else, then its LR | |
317 | has certainly been overwritten. */ | |
8baa6f92 | 318 | if (! get_next_frame (frame)) |
456f8b9d DB |
319 | return read_register (lr_regnum); |
320 | ||
321 | /* By default, assume it's saved in the standard place, relative to | |
322 | the frame pointer. */ | |
8baa6f92 | 323 | return read_memory_integer (get_frame_base (frame) + 8, 4); |
456f8b9d DB |
324 | } |
325 | ||
326 | ||
327 | /* Return true if REG is a caller-saves ("scratch") register, | |
328 | false otherwise. */ | |
329 | static int | |
330 | is_caller_saves_reg (int reg) | |
331 | { | |
332 | return ((4 <= reg && reg <= 7) | |
333 | || (14 <= reg && reg <= 15) | |
334 | || (32 <= reg && reg <= 47)); | |
335 | } | |
336 | ||
337 | ||
338 | /* Return true if REG is a callee-saves register, false otherwise. */ | |
339 | static int | |
340 | is_callee_saves_reg (int reg) | |
341 | { | |
342 | return ((16 <= reg && reg <= 31) | |
343 | || (48 <= reg && reg <= 63)); | |
344 | } | |
345 | ||
346 | ||
347 | /* Return true if REG is an argument register, false otherwise. */ | |
348 | static int | |
349 | is_argument_reg (int reg) | |
350 | { | |
351 | return (8 <= reg && reg <= 13); | |
352 | } | |
353 | ||
354 | ||
355 | /* Scan an FR-V prologue, starting at PC, until frame->PC. | |
356 | If FRAME is non-zero, fill in its saved_regs with appropriate addresses. | |
357 | We assume FRAME's saved_regs array has already been allocated and cleared. | |
358 | Return the first PC value after the prologue. | |
359 | ||
360 | Note that, for unoptimized code, we almost don't need this function | |
361 | at all; all arguments and locals live on the stack, so we just need | |
362 | the FP to find everything. The catch: structures passed by value | |
363 | have their addresses living in registers; they're never spilled to | |
364 | the stack. So if you ever want to be able to get to these | |
365 | arguments in any frame but the top, you'll need to do this serious | |
366 | prologue analysis. */ | |
367 | static CORE_ADDR | |
368 | frv_analyze_prologue (CORE_ADDR pc, struct frame_info *frame) | |
369 | { | |
370 | /* When writing out instruction bitpatterns, we use the following | |
371 | letters to label instruction fields: | |
372 | P - The parallel bit. We don't use this. | |
373 | J - The register number of GRj in the instruction description. | |
374 | K - The register number of GRk in the instruction description. | |
375 | I - The register number of GRi. | |
376 | S - a signed imediate offset. | |
377 | U - an unsigned immediate offset. | |
378 | ||
379 | The dots below the numbers indicate where hex digit boundaries | |
380 | fall, to make it easier to check the numbers. */ | |
381 | ||
382 | /* Non-zero iff we've seen the instruction that initializes the | |
383 | frame pointer for this function's frame. */ | |
384 | int fp_set = 0; | |
385 | ||
386 | /* If fp_set is non_zero, then this is the distance from | |
387 | the stack pointer to frame pointer: fp = sp + fp_offset. */ | |
388 | int fp_offset = 0; | |
389 | ||
390 | /* Total size of frame prior to any alloca operations. */ | |
391 | int framesize = 0; | |
392 | ||
393 | /* The number of the general-purpose register we saved the return | |
394 | address ("link register") in, or -1 if we haven't moved it yet. */ | |
395 | int lr_save_reg = -1; | |
396 | ||
397 | /* Non-zero iff we've saved the LR onto the stack. */ | |
398 | int lr_saved_on_stack = 0; | |
399 | ||
400 | /* If gr_saved[i] is non-zero, then we've noticed that general | |
401 | register i has been saved at gr_sp_offset[i] from the stack | |
402 | pointer. */ | |
403 | char gr_saved[64]; | |
404 | int gr_sp_offset[64]; | |
405 | ||
406 | memset (gr_saved, 0, sizeof (gr_saved)); | |
407 | ||
8baa6f92 | 408 | while (! frame || pc < get_frame_pc (frame)) |
456f8b9d DB |
409 | { |
410 | LONGEST op = read_memory_integer (pc, 4); | |
411 | ||
412 | /* The tests in this chain of ifs should be in order of | |
413 | decreasing selectivity, so that more particular patterns get | |
414 | to fire before less particular patterns. */ | |
415 | ||
416 | /* Setting the FP from the SP: | |
417 | ori sp, 0, fp | |
418 | P 000010 0100010 000001 000000000000 = 0x04881000 | |
419 | 0 111111 1111111 111111 111111111111 = 0x7fffffff | |
420 | . . . . . . . . | |
421 | We treat this as part of the prologue. */ | |
422 | if ((op & 0x7fffffff) == 0x04881000) | |
423 | { | |
424 | fp_set = 1; | |
425 | fp_offset = 0; | |
426 | } | |
427 | ||
428 | /* Move the link register to the scratch register grJ, before saving: | |
429 | movsg lr, grJ | |
430 | P 000100 0000011 010000 000111 JJJJJJ = 0x080d01c0 | |
431 | 0 111111 1111111 111111 111111 000000 = 0x7fffffc0 | |
432 | . . . . . . . . | |
433 | We treat this as part of the prologue. */ | |
434 | else if ((op & 0x7fffffc0) == 0x080d01c0) | |
435 | { | |
436 | int gr_j = op & 0x3f; | |
437 | ||
438 | /* If we're moving it to a scratch register, that's fine. */ | |
439 | if (is_caller_saves_reg (gr_j)) | |
440 | lr_save_reg = gr_j; | |
441 | /* Otherwise it's not a prologue instruction that we | |
442 | recognize. */ | |
443 | else | |
444 | break; | |
445 | } | |
446 | ||
447 | /* To save multiple callee-saves registers on the stack, at | |
448 | offset zero: | |
449 | ||
450 | std grK,@(sp,gr0) | |
451 | P KKKKKK 0000011 000001 000011 000000 = 0x000c10c0 | |
452 | 0 000000 1111111 111111 111111 111111 = 0x01ffffff | |
453 | ||
454 | stq grK,@(sp,gr0) | |
455 | P KKKKKK 0000011 000001 000100 000000 = 0x000c1100 | |
456 | 0 000000 1111111 111111 111111 111111 = 0x01ffffff | |
457 | . . . . . . . . | |
458 | We treat this as part of the prologue, and record the register's | |
459 | saved address in the frame structure. */ | |
460 | else if ((op & 0x01ffffff) == 0x000c10c0 | |
461 | || (op & 0x01ffffff) == 0x000c1100) | |
462 | { | |
463 | int gr_k = ((op >> 25) & 0x3f); | |
464 | int ope = ((op >> 6) & 0x3f); | |
465 | int count; | |
466 | int i; | |
467 | ||
468 | /* Is it an std or an stq? */ | |
469 | if (ope == 0x03) | |
470 | count = 2; | |
471 | else | |
472 | count = 4; | |
473 | ||
474 | /* Is it really a callee-saves register? */ | |
475 | if (is_callee_saves_reg (gr_k)) | |
476 | { | |
477 | for (i = 0; i < count; i++) | |
478 | { | |
479 | gr_saved[gr_k + i] = 1; | |
480 | gr_sp_offset[gr_k + i] = 4 * i; | |
481 | } | |
482 | } | |
483 | else | |
484 | /* It's not a prologue instruction. */ | |
485 | break; | |
486 | } | |
487 | ||
488 | /* Adjusting the stack pointer. (The stack pointer is GR1.) | |
489 | addi sp, S, sp | |
490 | P 000001 0010000 000001 SSSSSSSSSSSS = 0x02401000 | |
491 | 0 111111 1111111 111111 000000000000 = 0x7ffff000 | |
492 | . . . . . . . . | |
493 | We treat this as part of the prologue. */ | |
494 | else if ((op & 0x7ffff000) == 0x02401000) | |
495 | { | |
496 | /* Sign-extend the twelve-bit field. | |
497 | (Isn't there a better way to do this?) */ | |
498 | int s = (((op & 0xfff) - 0x800) & 0xfff) - 0x800; | |
499 | ||
500 | framesize -= s; | |
501 | } | |
502 | ||
503 | /* Setting the FP to a constant distance from the SP: | |
504 | addi sp, S, fp | |
505 | P 000010 0010000 000001 SSSSSSSSSSSS = 0x04401000 | |
506 | 0 111111 1111111 111111 000000000000 = 0x7ffff000 | |
507 | . . . . . . . . | |
508 | We treat this as part of the prologue. */ | |
509 | else if ((op & 0x7ffff000) == 0x04401000) | |
510 | { | |
511 | /* Sign-extend the twelve-bit field. | |
512 | (Isn't there a better way to do this?) */ | |
513 | int s = (((op & 0xfff) - 0x800) & 0xfff) - 0x800; | |
514 | fp_set = 1; | |
515 | fp_offset = s; | |
516 | } | |
517 | ||
518 | /* To spill an argument register to a scratch register: | |
519 | ori GRi, 0, GRk | |
520 | P KKKKKK 0100010 IIIIII 000000000000 = 0x00880000 | |
521 | 0 000000 1111111 000000 111111111111 = 0x01fc0fff | |
522 | . . . . . . . . | |
523 | For the time being, we treat this as a prologue instruction, | |
524 | assuming that GRi is an argument register. This one's kind | |
525 | of suspicious, because it seems like it could be part of a | |
526 | legitimate body instruction. But we only come here when the | |
527 | source info wasn't helpful, so we have to do the best we can. | |
528 | Hopefully once GCC and GDB agree on how to emit line number | |
529 | info for prologues, then this code will never come into play. */ | |
530 | else if ((op & 0x01fc0fff) == 0x00880000) | |
531 | { | |
532 | int gr_i = ((op >> 12) & 0x3f); | |
533 | ||
534 | /* If the source isn't an arg register, then this isn't a | |
535 | prologue instruction. */ | |
536 | if (! is_argument_reg (gr_i)) | |
537 | break; | |
538 | } | |
539 | ||
540 | /* To spill 16-bit values to the stack: | |
541 | sthi GRk, @(fp, s) | |
542 | P KKKKKK 1010001 000010 SSSSSSSSSSSS = 0x01442000 | |
543 | 0 000000 1111111 111111 000000000000 = 0x01fff000 | |
544 | . . . . . . . . | |
545 | And for 8-bit values, we use STB instructions. | |
546 | stbi GRk, @(fp, s) | |
547 | P KKKKKK 1010000 000010 SSSSSSSSSSSS = 0x01402000 | |
548 | 0 000000 1111111 111111 000000000000 = 0x01fff000 | |
549 | . . . . . . . . | |
550 | We check that GRk is really an argument register, and treat | |
551 | all such as part of the prologue. */ | |
552 | else if ( (op & 0x01fff000) == 0x01442000 | |
553 | || (op & 0x01fff000) == 0x01402000) | |
554 | { | |
555 | int gr_k = ((op >> 25) & 0x3f); | |
556 | ||
557 | if (! is_argument_reg (gr_k)) | |
558 | break; /* Source isn't an arg register. */ | |
559 | } | |
560 | ||
561 | /* To save multiple callee-saves register on the stack, at a | |
562 | non-zero offset: | |
563 | ||
564 | stdi GRk, @(sp, s) | |
565 | P KKKKKK 1010011 000001 SSSSSSSSSSSS = 0x014c1000 | |
566 | 0 000000 1111111 111111 000000000000 = 0x01fff000 | |
567 | . . . . . . . . | |
568 | stqi GRk, @(sp, s) | |
569 | P KKKKKK 1010100 000001 SSSSSSSSSSSS = 0x01501000 | |
570 | 0 000000 1111111 111111 000000000000 = 0x01fff000 | |
571 | . . . . . . . . | |
572 | We treat this as part of the prologue, and record the register's | |
573 | saved address in the frame structure. */ | |
574 | else if ((op & 0x01fff000) == 0x014c1000 | |
575 | || (op & 0x01fff000) == 0x01501000) | |
576 | { | |
577 | int gr_k = ((op >> 25) & 0x3f); | |
578 | int count; | |
579 | int i; | |
580 | ||
581 | /* Is it a stdi or a stqi? */ | |
582 | if ((op & 0x01fff000) == 0x014c1000) | |
583 | count = 2; | |
584 | else | |
585 | count = 4; | |
586 | ||
587 | /* Is it really a callee-saves register? */ | |
588 | if (is_callee_saves_reg (gr_k)) | |
589 | { | |
590 | /* Sign-extend the twelve-bit field. | |
591 | (Isn't there a better way to do this?) */ | |
592 | int s = (((op & 0xfff) - 0x800) & 0xfff) - 0x800; | |
593 | ||
594 | for (i = 0; i < count; i++) | |
595 | { | |
596 | gr_saved[gr_k + i] = 1; | |
597 | gr_sp_offset[gr_k + i] = s + (4 * i); | |
598 | } | |
599 | } | |
600 | else | |
601 | /* It's not a prologue instruction. */ | |
602 | break; | |
603 | } | |
604 | ||
605 | /* Storing any kind of integer register at any constant offset | |
606 | from any other register. | |
607 | ||
608 | st GRk, @(GRi, gr0) | |
609 | P KKKKKK 0000011 IIIIII 000010 000000 = 0x000c0080 | |
610 | 0 000000 1111111 000000 111111 111111 = 0x01fc0fff | |
611 | . . . . . . . . | |
612 | sti GRk, @(GRi, d12) | |
613 | P KKKKKK 1010010 IIIIII SSSSSSSSSSSS = 0x01480000 | |
614 | 0 000000 1111111 000000 000000000000 = 0x01fc0000 | |
615 | . . . . . . . . | |
616 | These could be almost anything, but a lot of prologue | |
617 | instructions fall into this pattern, so let's decode the | |
618 | instruction once, and then work at a higher level. */ | |
619 | else if (((op & 0x01fc0fff) == 0x000c0080) | |
620 | || ((op & 0x01fc0000) == 0x01480000)) | |
621 | { | |
622 | int gr_k = ((op >> 25) & 0x3f); | |
623 | int gr_i = ((op >> 12) & 0x3f); | |
624 | int offset; | |
625 | ||
626 | /* Are we storing with gr0 as an offset, or using an | |
627 | immediate value? */ | |
628 | if ((op & 0x01fc0fff) == 0x000c0080) | |
629 | offset = 0; | |
630 | else | |
631 | offset = (((op & 0xfff) - 0x800) & 0xfff) - 0x800; | |
632 | ||
633 | /* If the address isn't relative to the SP or FP, it's not a | |
634 | prologue instruction. */ | |
635 | if (gr_i != sp_regnum && gr_i != fp_regnum) | |
636 | break; | |
637 | ||
638 | /* Saving the old FP in the new frame (relative to the SP). */ | |
639 | if (gr_k == fp_regnum && gr_i == sp_regnum) | |
640 | ; | |
641 | ||
642 | /* Saving callee-saves register(s) on the stack, relative to | |
643 | the SP. */ | |
644 | else if (gr_i == sp_regnum | |
645 | && is_callee_saves_reg (gr_k)) | |
646 | { | |
647 | gr_saved[gr_k] = 1; | |
648 | gr_sp_offset[gr_k] = offset; | |
649 | } | |
650 | ||
651 | /* Saving the scratch register holding the return address. */ | |
652 | else if (lr_save_reg != -1 | |
653 | && gr_k == lr_save_reg) | |
654 | lr_saved_on_stack = 1; | |
655 | ||
656 | /* Spilling int-sized arguments to the stack. */ | |
657 | else if (is_argument_reg (gr_k)) | |
658 | ; | |
659 | ||
660 | /* It's not a store instruction we recognize, so this must | |
661 | be the end of the prologue. */ | |
662 | else | |
663 | break; | |
664 | } | |
665 | ||
666 | /* It's not any instruction we recognize, so this must be the end | |
667 | of the prologue. */ | |
668 | else | |
669 | break; | |
670 | ||
671 | pc += 4; | |
672 | } | |
673 | ||
674 | if (frame) | |
675 | { | |
8baa6f92 KB |
676 | struct frame_extra_info *extra_info = |
677 | get_frame_extra_info (frame); | |
678 | ||
679 | extra_info->lr_saved_on_stack = lr_saved_on_stack; | |
456f8b9d DB |
680 | |
681 | /* If we know the relationship between the stack and frame | |
682 | pointers, record the addresses of the registers we noticed. | |
683 | Note that we have to do this as a separate step at the end, | |
684 | because instructions may save relative to the SP, but we need | |
685 | their addresses relative to the FP. */ | |
686 | if (fp_set) | |
687 | { | |
8baa6f92 | 688 | struct trad_frame_saved_reg *saved_regs; |
456f8b9d DB |
689 | int i; |
690 | ||
8baa6f92 | 691 | saved_regs = extra_info->saved_regs; |
456f8b9d DB |
692 | for (i = 0; i < 64; i++) |
693 | if (gr_saved[i]) | |
8baa6f92 KB |
694 | trad_frame_set_value (saved_regs, i, |
695 | get_frame_base (frame) - fp_offset | |
696 | + gr_sp_offset[i]); | |
456f8b9d | 697 | |
8baa6f92 | 698 | extra_info->fp_to_callers_sp_offset = framesize - fp_offset; |
456f8b9d DB |
699 | } |
700 | } | |
701 | ||
702 | return pc; | |
703 | } | |
704 | ||
705 | ||
706 | static CORE_ADDR | |
707 | frv_skip_prologue (CORE_ADDR pc) | |
708 | { | |
709 | CORE_ADDR func_addr, func_end, new_pc; | |
710 | ||
711 | new_pc = pc; | |
712 | ||
713 | /* If the line table has entry for a line *within* the function | |
714 | (i.e., not in the prologue, and not past the end), then that's | |
715 | our location. */ | |
716 | if (find_pc_partial_function (pc, NULL, &func_addr, &func_end)) | |
717 | { | |
718 | struct symtab_and_line sal; | |
719 | ||
720 | sal = find_pc_line (func_addr, 0); | |
721 | ||
722 | if (sal.line != 0 && sal.end < func_end) | |
723 | { | |
724 | new_pc = sal.end; | |
725 | } | |
726 | } | |
727 | ||
728 | /* The FR-V prologue is at least five instructions long (twenty bytes). | |
729 | If we didn't find a real source location past that, then | |
730 | do a full analysis of the prologue. */ | |
731 | if (new_pc < pc + 20) | |
732 | new_pc = frv_analyze_prologue (pc, 0); | |
733 | ||
734 | return new_pc; | |
735 | } | |
736 | ||
737 | static void | |
738 | frv_frame_init_saved_regs (struct frame_info *frame) | |
739 | { | |
8baa6f92 KB |
740 | struct frame_extra_info *extra_info = |
741 | get_frame_extra_info (frame); | |
742 | ||
743 | if (extra_info && extra_info->saved_regs) | |
456f8b9d DB |
744 | return; |
745 | ||
8baa6f92 KB |
746 | extra_info->saved_regs = trad_frame_alloc_saved_regs (frame); |
747 | trad_frame_set_value (extra_info->saved_regs, | |
748 | fp_regnum, get_frame_base (frame)); | |
456f8b9d DB |
749 | |
750 | /* Find the beginning of this function, so we can analyze its | |
751 | prologue. */ | |
752 | { | |
753 | CORE_ADDR func_addr, func_end; | |
754 | ||
8baa6f92 KB |
755 | if (find_pc_partial_function (get_frame_pc (frame), |
756 | NULL, &func_addr, &func_end)) | |
456f8b9d DB |
757 | frv_analyze_prologue (func_addr, frame); |
758 | } | |
759 | } | |
760 | ||
456f8b9d DB |
761 | static void |
762 | frv_extract_return_value (struct type *type, char *regbuf, char *valbuf) | |
763 | { | |
764 | memcpy (valbuf, (regbuf | |
765 | + frv_register_byte (8) | |
766 | + (TYPE_LENGTH (type) < 4 ? 4 - TYPE_LENGTH (type) : 0)), | |
767 | TYPE_LENGTH (type)); | |
768 | } | |
769 | ||
770 | static CORE_ADDR | |
771 | frv_extract_struct_value_address (char *regbuf) | |
772 | { | |
8baa6f92 KB |
773 | return extract_unsigned_integer (regbuf + |
774 | frv_register_byte (struct_return_regnum), | |
7c0b4a20 | 775 | 4); |
456f8b9d DB |
776 | } |
777 | ||
778 | static void | |
779 | frv_store_struct_return (CORE_ADDR addr, CORE_ADDR sp) | |
780 | { | |
781 | write_register (struct_return_regnum, addr); | |
782 | } | |
783 | ||
784 | static int | |
785 | frv_frameless_function_invocation (struct frame_info *frame) | |
786 | { | |
787 | return frameless_look_for_prologue (frame); | |
788 | } | |
789 | ||
790 | static CORE_ADDR | |
791 | frv_saved_pc_after_call (struct frame_info *frame) | |
792 | { | |
793 | return read_register (lr_regnum); | |
794 | } | |
795 | ||
796 | static void | |
797 | frv_init_extra_frame_info (int fromleaf, struct frame_info *frame) | |
798 | { | |
8baa6f92 KB |
799 | struct frame_extra_info *extra_info = |
800 | frame_extra_info_zalloc (frame, sizeof (struct frame_extra_info)); | |
801 | ||
802 | extra_info->fp_to_callers_sp_offset = 0; | |
803 | extra_info->lr_saved_on_stack = 0; | |
804 | extra_info->saved_regs = trad_frame_alloc_saved_regs (frame); | |
456f8b9d DB |
805 | } |
806 | ||
807 | #define ROUND_UP(n,a) (((n)+(a)-1) & ~((a)-1)) | |
808 | #define ROUND_DOWN(n,a) ((n) & ~((a)-1)) | |
809 | ||
810 | static CORE_ADDR | |
811 | frv_push_arguments (int nargs, struct value **args, CORE_ADDR sp, | |
812 | int struct_return, CORE_ADDR struct_addr) | |
813 | { | |
814 | int argreg; | |
815 | int argnum; | |
816 | char *val; | |
817 | char valbuf[4]; | |
818 | struct value *arg; | |
819 | struct type *arg_type; | |
820 | int len; | |
821 | enum type_code typecode; | |
822 | CORE_ADDR regval; | |
823 | int stack_space; | |
824 | int stack_offset; | |
825 | ||
826 | #if 0 | |
827 | printf("Push %d args at sp = %x, struct_return=%d (%x)\n", | |
828 | nargs, (int) sp, struct_return, struct_addr); | |
829 | #endif | |
830 | ||
831 | stack_space = 0; | |
832 | for (argnum = 0; argnum < nargs; ++argnum) | |
833 | stack_space += ROUND_UP (TYPE_LENGTH (VALUE_TYPE (args[argnum])), 4); | |
834 | ||
835 | stack_space -= (6 * 4); | |
836 | if (stack_space > 0) | |
837 | sp -= stack_space; | |
838 | ||
839 | /* Make sure stack is dword aligned. */ | |
840 | sp = ROUND_DOWN (sp, 8); | |
841 | ||
842 | stack_offset = 0; | |
843 | ||
844 | argreg = 8; | |
845 | ||
846 | if (struct_return) | |
847 | write_register (struct_return_regnum, struct_addr); | |
848 | ||
849 | for (argnum = 0; argnum < nargs; ++argnum) | |
850 | { | |
851 | arg = args[argnum]; | |
852 | arg_type = check_typedef (VALUE_TYPE (arg)); | |
853 | len = TYPE_LENGTH (arg_type); | |
854 | typecode = TYPE_CODE (arg_type); | |
855 | ||
856 | if (typecode == TYPE_CODE_STRUCT || typecode == TYPE_CODE_UNION) | |
857 | { | |
fbd9dcd3 | 858 | store_unsigned_integer (valbuf, 4, VALUE_ADDRESS (arg)); |
456f8b9d DB |
859 | typecode = TYPE_CODE_PTR; |
860 | len = 4; | |
861 | val = valbuf; | |
862 | } | |
863 | else | |
864 | { | |
865 | val = (char *) VALUE_CONTENTS (arg); | |
866 | } | |
867 | ||
868 | while (len > 0) | |
869 | { | |
870 | int partial_len = (len < 4 ? len : 4); | |
871 | ||
872 | if (argreg < 14) | |
873 | { | |
7c0b4a20 | 874 | regval = extract_unsigned_integer (val, partial_len); |
456f8b9d DB |
875 | #if 0 |
876 | printf(" Argnum %d data %x -> reg %d\n", | |
877 | argnum, (int) regval, argreg); | |
878 | #endif | |
879 | write_register (argreg, regval); | |
880 | ++argreg; | |
881 | } | |
882 | else | |
883 | { | |
884 | #if 0 | |
885 | printf(" Argnum %d data %x -> offset %d (%x)\n", | |
886 | argnum, *((int *)val), stack_offset, (int) (sp + stack_offset)); | |
887 | #endif | |
888 | write_memory (sp + stack_offset, val, partial_len); | |
889 | stack_offset += ROUND_UP(partial_len, 4); | |
890 | } | |
891 | len -= partial_len; | |
892 | val += partial_len; | |
893 | } | |
894 | } | |
895 | return sp; | |
896 | } | |
897 | ||
898 | static CORE_ADDR | |
899 | frv_push_return_address (CORE_ADDR pc, CORE_ADDR sp) | |
900 | { | |
901 | write_register (lr_regnum, CALL_DUMMY_ADDRESS ()); | |
902 | return sp; | |
903 | } | |
904 | ||
905 | static void | |
906 | frv_store_return_value (struct type *type, char *valbuf) | |
907 | { | |
908 | int length = TYPE_LENGTH (type); | |
909 | int reg8_offset = frv_register_byte (8); | |
910 | ||
911 | if (length <= 4) | |
73937e03 AC |
912 | deprecated_write_register_bytes (reg8_offset + (4 - length), valbuf, |
913 | length); | |
456f8b9d | 914 | else if (length == 8) |
73937e03 | 915 | deprecated_write_register_bytes (reg8_offset, valbuf, length); |
456f8b9d DB |
916 | else |
917 | internal_error (__FILE__, __LINE__, | |
918 | "Don't know how to return a %d-byte value.", length); | |
919 | } | |
920 | ||
921 | static void | |
922 | frv_pop_frame (void) | |
923 | { | |
924 | generic_pop_current_frame (frv_pop_frame_regular); | |
925 | } | |
926 | ||
927 | static void | |
928 | frv_pop_frame_regular (struct frame_info *frame) | |
929 | { | |
8baa6f92 KB |
930 | struct frame_extra_info *extra_info; |
931 | struct trad_frame_saved_reg *saved_regs; | |
932 | ||
456f8b9d DB |
933 | CORE_ADDR fp; |
934 | int regno; | |
935 | ||
8baa6f92 | 936 | fp = get_frame_base (frame); |
456f8b9d DB |
937 | |
938 | frv_frame_init_saved_regs (frame); | |
8baa6f92 KB |
939 | extra_info = get_frame_extra_info (frame); |
940 | saved_regs = extra_info->saved_regs; | |
456f8b9d DB |
941 | write_register (pc_regnum, frv_frame_saved_pc (frame)); |
942 | for (regno = 0; regno < frv_num_regs; ++regno) | |
943 | { | |
8baa6f92 | 944 | if (extra_info->saved_regs[regno].addr |
456f8b9d DB |
945 | && regno != pc_regnum |
946 | && regno != sp_regnum) | |
947 | { | |
948 | write_register (regno, | |
8baa6f92 | 949 | read_memory_integer (saved_regs[regno].addr, 4)); |
456f8b9d DB |
950 | } |
951 | } | |
8baa6f92 | 952 | write_register (sp_regnum, fp + extra_info->fp_to_callers_sp_offset); |
456f8b9d DB |
953 | flush_cached_frames (); |
954 | } | |
955 | ||
456f8b9d DB |
956 | /* Hardware watchpoint / breakpoint support for the FR500 |
957 | and FR400. */ | |
958 | ||
959 | int | |
960 | frv_check_watch_resources (int type, int cnt, int ot) | |
961 | { | |
962 | struct gdbarch_tdep *var = CURRENT_VARIANT; | |
963 | ||
964 | /* Watchpoints not supported on simulator. */ | |
965 | if (strcmp (target_shortname, "sim") == 0) | |
966 | return 0; | |
967 | ||
968 | if (type == bp_hardware_breakpoint) | |
969 | { | |
970 | if (var->num_hw_breakpoints == 0) | |
971 | return 0; | |
972 | else if (cnt <= var->num_hw_breakpoints) | |
973 | return 1; | |
974 | } | |
975 | else | |
976 | { | |
977 | if (var->num_hw_watchpoints == 0) | |
978 | return 0; | |
979 | else if (ot) | |
980 | return -1; | |
981 | else if (cnt <= var->num_hw_watchpoints) | |
982 | return 1; | |
983 | } | |
984 | return -1; | |
985 | } | |
986 | ||
987 | ||
988 | CORE_ADDR | |
5ae5f592 | 989 | frv_stopped_data_address (void) |
456f8b9d DB |
990 | { |
991 | CORE_ADDR brr, dbar0, dbar1, dbar2, dbar3; | |
992 | ||
993 | brr = read_register (brr_regnum); | |
994 | dbar0 = read_register (dbar0_regnum); | |
995 | dbar1 = read_register (dbar1_regnum); | |
996 | dbar2 = read_register (dbar2_regnum); | |
997 | dbar3 = read_register (dbar3_regnum); | |
998 | ||
999 | if (brr & (1<<11)) | |
1000 | return dbar0; | |
1001 | else if (brr & (1<<10)) | |
1002 | return dbar1; | |
1003 | else if (brr & (1<<9)) | |
1004 | return dbar2; | |
1005 | else if (brr & (1<<8)) | |
1006 | return dbar3; | |
1007 | else | |
1008 | return 0; | |
1009 | } | |
1010 | ||
1011 | static struct gdbarch * | |
1012 | frv_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | |
1013 | { | |
1014 | struct gdbarch *gdbarch; | |
1015 | struct gdbarch_tdep *var; | |
1016 | ||
1017 | /* Check to see if we've already built an appropriate architecture | |
1018 | object for this executable. */ | |
1019 | arches = gdbarch_list_lookup_by_info (arches, &info); | |
1020 | if (arches) | |
1021 | return arches->gdbarch; | |
1022 | ||
1023 | /* Select the right tdep structure for this variant. */ | |
1024 | var = new_variant (); | |
1025 | switch (info.bfd_arch_info->mach) | |
1026 | { | |
1027 | case bfd_mach_frv: | |
1028 | case bfd_mach_frvsimple: | |
1029 | case bfd_mach_fr500: | |
1030 | case bfd_mach_frvtomcat: | |
1031 | set_variant_num_gprs (var, 64); | |
1032 | set_variant_num_fprs (var, 64); | |
1033 | break; | |
1034 | ||
1035 | case bfd_mach_fr400: | |
1036 | set_variant_num_gprs (var, 32); | |
1037 | set_variant_num_fprs (var, 32); | |
1038 | break; | |
1039 | ||
1040 | default: | |
1041 | /* Never heard of this variant. */ | |
1042 | return 0; | |
1043 | } | |
1044 | ||
1045 | gdbarch = gdbarch_alloc (&info, var); | |
1046 | ||
a5afb99f AC |
1047 | /* NOTE: cagney/2002-12-06: This can be deleted when this arch is |
1048 | ready to unwind the PC first (see frame.c:get_prev_frame()). */ | |
1049 | set_gdbarch_deprecated_init_frame_pc (gdbarch, init_frame_pc_default); | |
1050 | ||
456f8b9d DB |
1051 | set_gdbarch_short_bit (gdbarch, 16); |
1052 | set_gdbarch_int_bit (gdbarch, 32); | |
1053 | set_gdbarch_long_bit (gdbarch, 32); | |
1054 | set_gdbarch_long_long_bit (gdbarch, 64); | |
1055 | set_gdbarch_float_bit (gdbarch, 32); | |
1056 | set_gdbarch_double_bit (gdbarch, 64); | |
1057 | set_gdbarch_long_double_bit (gdbarch, 64); | |
1058 | set_gdbarch_ptr_bit (gdbarch, 32); | |
1059 | ||
1060 | set_gdbarch_num_regs (gdbarch, frv_num_regs); | |
1061 | set_gdbarch_sp_regnum (gdbarch, sp_regnum); | |
0ba6dca9 | 1062 | set_gdbarch_deprecated_fp_regnum (gdbarch, fp_regnum); |
456f8b9d DB |
1063 | set_gdbarch_pc_regnum (gdbarch, pc_regnum); |
1064 | ||
1065 | set_gdbarch_register_name (gdbarch, frv_register_name); | |
b1e29e33 | 1066 | set_gdbarch_deprecated_register_size (gdbarch, 4); |
b8b527c5 | 1067 | set_gdbarch_deprecated_register_bytes (gdbarch, frv_num_regs * 4); |
9c04cab7 AC |
1068 | set_gdbarch_deprecated_register_byte (gdbarch, frv_register_byte); |
1069 | set_gdbarch_deprecated_register_raw_size (gdbarch, frv_register_raw_size); | |
a0ed5532 | 1070 | set_gdbarch_deprecated_max_register_raw_size (gdbarch, 4); |
9c04cab7 | 1071 | set_gdbarch_deprecated_register_virtual_size (gdbarch, frv_register_virtual_size); |
a0ed5532 | 1072 | set_gdbarch_deprecated_max_register_virtual_size (gdbarch, 4); |
9c04cab7 | 1073 | set_gdbarch_deprecated_register_virtual_type (gdbarch, frv_register_virtual_type); |
456f8b9d DB |
1074 | |
1075 | set_gdbarch_skip_prologue (gdbarch, frv_skip_prologue); | |
1076 | set_gdbarch_breakpoint_from_pc (gdbarch, frv_breakpoint_from_pc); | |
1077 | ||
456f8b9d DB |
1078 | set_gdbarch_frame_args_skip (gdbarch, 0); |
1079 | set_gdbarch_frameless_function_invocation (gdbarch, frv_frameless_function_invocation); | |
1080 | ||
6913c89a | 1081 | set_gdbarch_deprecated_saved_pc_after_call (gdbarch, frv_saved_pc_after_call); |
456f8b9d | 1082 | |
618ce49f | 1083 | set_gdbarch_deprecated_frame_chain (gdbarch, frv_frame_chain); |
8bedc050 | 1084 | set_gdbarch_deprecated_frame_saved_pc (gdbarch, frv_frame_saved_pc); |
456f8b9d | 1085 | |
f30ee0bc | 1086 | set_gdbarch_deprecated_frame_init_saved_regs (gdbarch, frv_frame_init_saved_regs); |
456f8b9d | 1087 | |
1fd35568 | 1088 | set_gdbarch_use_struct_convention (gdbarch, always_use_struct_convention); |
456f8b9d DB |
1089 | set_gdbarch_deprecated_extract_return_value (gdbarch, frv_extract_return_value); |
1090 | ||
4183d812 | 1091 | set_gdbarch_deprecated_store_struct_return (gdbarch, frv_store_struct_return); |
ebba8386 | 1092 | set_gdbarch_deprecated_store_return_value (gdbarch, frv_store_return_value); |
456f8b9d DB |
1093 | set_gdbarch_deprecated_extract_struct_value_address (gdbarch, frv_extract_struct_value_address); |
1094 | ||
1095 | /* Settings for calling functions in the inferior. */ | |
b81774d8 | 1096 | set_gdbarch_deprecated_push_arguments (gdbarch, frv_push_arguments); |
28f617b3 | 1097 | set_gdbarch_deprecated_push_return_address (gdbarch, frv_push_return_address); |
749b82f6 | 1098 | set_gdbarch_deprecated_pop_frame (gdbarch, frv_pop_frame); |
456f8b9d | 1099 | |
b1e29e33 AC |
1100 | set_gdbarch_deprecated_call_dummy_words (gdbarch, frv_call_dummy_words); |
1101 | set_gdbarch_deprecated_sizeof_call_dummy_words (gdbarch, sizeof (frv_call_dummy_words)); | |
e9582e71 | 1102 | set_gdbarch_deprecated_init_extra_frame_info (gdbarch, frv_init_extra_frame_info); |
456f8b9d DB |
1103 | |
1104 | /* Settings that should be unnecessary. */ | |
1105 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
1106 | ||
456f8b9d | 1107 | set_gdbarch_write_pc (gdbarch, generic_target_write_pc); |
b46e02f6 | 1108 | set_gdbarch_deprecated_dummy_write_sp (gdbarch, deprecated_write_sp); |
456f8b9d | 1109 | |
ae45cd16 | 1110 | set_gdbarch_deprecated_pc_in_call_dummy (gdbarch, deprecated_pc_in_call_dummy_at_entry_point); |
456f8b9d | 1111 | |
456f8b9d DB |
1112 | set_gdbarch_decr_pc_after_break (gdbarch, 0); |
1113 | set_gdbarch_function_start_offset (gdbarch, 0); | |
456f8b9d DB |
1114 | |
1115 | set_gdbarch_remote_translate_xfer_address | |
aed7f26a | 1116 | (gdbarch, generic_remote_translate_xfer_address); |
456f8b9d DB |
1117 | |
1118 | /* Hardware watchpoint / breakpoint support. */ | |
1119 | switch (info.bfd_arch_info->mach) | |
1120 | { | |
1121 | case bfd_mach_frv: | |
1122 | case bfd_mach_frvsimple: | |
1123 | case bfd_mach_fr500: | |
1124 | case bfd_mach_frvtomcat: | |
1125 | /* fr500-style hardware debugging support. */ | |
1126 | var->num_hw_watchpoints = 4; | |
1127 | var->num_hw_breakpoints = 4; | |
1128 | break; | |
1129 | ||
1130 | case bfd_mach_fr400: | |
1131 | /* fr400-style hardware debugging support. */ | |
1132 | var->num_hw_watchpoints = 2; | |
1133 | var->num_hw_breakpoints = 4; | |
1134 | break; | |
1135 | ||
1136 | default: | |
1137 | /* Otherwise, assume we don't have hardware debugging support. */ | |
1138 | var->num_hw_watchpoints = 0; | |
1139 | var->num_hw_breakpoints = 0; | |
1140 | break; | |
1141 | } | |
1142 | ||
36482093 AC |
1143 | set_gdbarch_print_insn (gdbarch, print_insn_frv); |
1144 | ||
456f8b9d DB |
1145 | return gdbarch; |
1146 | } | |
1147 | ||
1148 | void | |
1149 | _initialize_frv_tdep (void) | |
1150 | { | |
1151 | register_gdbarch_init (bfd_arch_frv, frv_gdbarch_init); | |
456f8b9d DB |
1152 | } |
1153 | ||
aed7f26a | 1154 |