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49d45b20 JB |
1 | /* Target-dependent code for FT32. |
2 | ||
3666a048 | 3 | Copyright (C) 2009-2021 Free Software Foundation, Inc. |
49d45b20 JB |
4 | |
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 3 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ | |
19 | ||
20 | #include "defs.h" | |
d55e5aa6 | 21 | #include "frame.h" |
4de283e4 TT |
22 | #include "frame-unwind.h" |
23 | #include "frame-base.h" | |
24 | #include "symtab.h" | |
25 | #include "gdbtypes.h" | |
49d45b20 JB |
26 | #include "gdbcmd.h" |
27 | #include "gdbcore.h" | |
4de283e4 | 28 | #include "value.h" |
49d45b20 | 29 | #include "inferior.h" |
4de283e4 | 30 | #include "symfile.h" |
49d45b20 JB |
31 | #include "objfiles.h" |
32 | #include "osabi.h" | |
4de283e4 TT |
33 | #include "language.h" |
34 | #include "arch-utils.h" | |
49d45b20 JB |
35 | #include "regcache.h" |
36 | #include "trad-frame.h" | |
4de283e4 TT |
37 | #include "dis-asm.h" |
38 | #include "record.h" | |
39 | ||
40 | #include "opcode/ft32.h" | |
41 | ||
42 | #include "ft32-tdep.h" | |
43 | #include "gdb/sim-ft32.h" | |
44 | #include <algorithm> | |
49d45b20 JB |
45 | |
46 | #define RAM_BIAS 0x800000 /* Bias added to RAM addresses. */ | |
47 | ||
49d45b20 JB |
48 | /* Use an invalid address -1 as 'not available' marker. */ |
49 | enum { REG_UNAVAIL = (CORE_ADDR) (-1) }; | |
50 | ||
51 | struct ft32_frame_cache | |
52 | { | |
53 | /* Base address of the frame */ | |
54 | CORE_ADDR base; | |
55 | /* Function this frame belongs to */ | |
56 | CORE_ADDR pc; | |
57 | /* Total size of this frame */ | |
58 | LONGEST framesize; | |
59 | /* Saved registers in this frame */ | |
60 | CORE_ADDR saved_regs[FT32_NUM_REGS]; | |
61 | /* Saved SP in this frame */ | |
62 | CORE_ADDR saved_sp; | |
63 | /* Has the new frame been LINKed. */ | |
64 | bfd_boolean established; | |
65 | }; | |
66 | ||
67 | /* Implement the "frame_align" gdbarch method. */ | |
68 | ||
69 | static CORE_ADDR | |
70 | ft32_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp) | |
71 | { | |
72 | /* Align to the size of an instruction (so that they can safely be | |
73 | pushed onto the stack. */ | |
74 | return sp & ~1; | |
75 | } | |
76 | ||
49d45b20 | 77 | |
04180708 | 78 | constexpr gdb_byte ft32_break_insn[] = { 0x02, 0x00, 0x34, 0x00 }; |
49d45b20 | 79 | |
04180708 | 80 | typedef BP_MANIPULATION (ft32_break_insn) ft32_breakpoint; |
49d45b20 JB |
81 | |
82 | /* FT32 register names. */ | |
83 | ||
84 | static const char *const ft32_register_names[] = | |
85 | { | |
86 | "fp", "sp", | |
87 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", | |
88 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", | |
89 | "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", | |
90 | "r24", "r25", "r26", "r27", "r28", "cc", | |
91 | "pc" | |
92 | }; | |
93 | ||
94 | /* Implement the "register_name" gdbarch method. */ | |
95 | ||
96 | static const char * | |
97 | ft32_register_name (struct gdbarch *gdbarch, int reg_nr) | |
98 | { | |
99 | if (reg_nr < 0) | |
100 | return NULL; | |
101 | if (reg_nr >= FT32_NUM_REGS) | |
102 | return NULL; | |
103 | return ft32_register_names[reg_nr]; | |
104 | } | |
105 | ||
106 | /* Implement the "register_type" gdbarch method. */ | |
107 | ||
108 | static struct type * | |
109 | ft32_register_type (struct gdbarch *gdbarch, int reg_nr) | |
110 | { | |
111 | if (reg_nr == FT32_PC_REGNUM) | |
623fb775 | 112 | return gdbarch_tdep (gdbarch)->pc_type; |
49d45b20 JB |
113 | else if (reg_nr == FT32_SP_REGNUM || reg_nr == FT32_FP_REGNUM) |
114 | return builtin_type (gdbarch)->builtin_data_ptr; | |
115 | else | |
116 | return builtin_type (gdbarch)->builtin_int32; | |
117 | } | |
118 | ||
119 | /* Write into appropriate registers a function return value | |
120 | of type TYPE, given in virtual format. */ | |
121 | ||
122 | static void | |
123 | ft32_store_return_value (struct type *type, struct regcache *regcache, | |
124 | const gdb_byte *valbuf) | |
125 | { | |
ac7936df | 126 | struct gdbarch *gdbarch = regcache->arch (); |
49d45b20 JB |
127 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
128 | CORE_ADDR regval; | |
129 | int len = TYPE_LENGTH (type); | |
130 | ||
131 | /* Things always get returned in RET1_REGNUM, RET2_REGNUM. */ | |
132 | regval = extract_unsigned_integer (valbuf, len > 4 ? 4 : len, byte_order); | |
133 | regcache_cooked_write_unsigned (regcache, FT32_R0_REGNUM, regval); | |
134 | if (len > 4) | |
135 | { | |
136 | regval = extract_unsigned_integer (valbuf + 4, | |
137 | len - 4, byte_order); | |
138 | regcache_cooked_write_unsigned (regcache, FT32_R1_REGNUM, regval); | |
139 | } | |
140 | } | |
141 | ||
dcc31d28 JB |
142 | /* Fetch a single 32-bit instruction from address a. If memory contains |
143 | a compressed instruction pair, return the expanded instruction. */ | |
144 | ||
145 | static ULONGEST | |
146 | ft32_fetch_instruction (CORE_ADDR a, int *isize, | |
dda83cd7 | 147 | enum bfd_endian byte_order) |
dcc31d28 JB |
148 | { |
149 | unsigned int sc[2]; | |
150 | ULONGEST inst; | |
151 | ||
152 | CORE_ADDR a4 = a & ~3; | |
153 | inst = read_code_unsigned_integer (a4, 4, byte_order); | |
154 | *isize = ft32_decode_shortcode (a4, inst, sc) ? 2 : 4; | |
155 | if (*isize == 2) | |
156 | return sc[1 & (a >> 1)]; | |
157 | else | |
158 | return inst; | |
159 | } | |
160 | ||
49d45b20 JB |
161 | /* Decode the instructions within the given address range. Decide |
162 | when we must have reached the end of the function prologue. If a | |
163 | frame_info pointer is provided, fill in its saved_regs etc. | |
164 | ||
165 | Returns the address of the first instruction after the prologue. */ | |
166 | ||
49d45b20 JB |
167 | static CORE_ADDR |
168 | ft32_analyze_prologue (CORE_ADDR start_addr, CORE_ADDR end_addr, | |
169 | struct ft32_frame_cache *cache, | |
170 | struct gdbarch *gdbarch) | |
171 | { | |
172 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
173 | CORE_ADDR next_addr; | |
870f88f7 | 174 | ULONGEST inst; |
dcc31d28 | 175 | int isize = 0; |
ae4e2501 | 176 | int regnum, pushreg; |
177 | struct bound_minimal_symbol msymbol; | |
178 | const int first_saved_reg = 13; /* The first saved register. */ | |
179 | /* PROLOGS are addresses of the subroutine prologs, PROLOGS[n] | |
180 | is the address of __prolog_$rN. | |
181 | __prolog_$rN pushes registers from 13 through n inclusive. | |
182 | So for example CALL __prolog_$r15 is equivalent to: | |
183 | PUSH $r13 | |
184 | PUSH $r14 | |
185 | PUSH $r15 | |
186 | Note that PROLOGS[0] through PROLOGS[12] are unused. */ | |
187 | CORE_ADDR prologs[32]; | |
49d45b20 JB |
188 | |
189 | cache->saved_regs[FT32_PC_REGNUM] = 0; | |
190 | cache->framesize = 0; | |
191 | ||
ae4e2501 | 192 | for (regnum = first_saved_reg; regnum < 32; regnum++) |
193 | { | |
194 | char prolog_symbol[32]; | |
195 | ||
196 | snprintf (prolog_symbol, sizeof (prolog_symbol), "__prolog_$r%02d", | |
197 | regnum); | |
198 | msymbol = lookup_minimal_symbol (prolog_symbol, NULL, NULL); | |
199 | if (msymbol.minsym) | |
200 | prologs[regnum] = BMSYMBOL_VALUE_ADDRESS (msymbol); | |
201 | else | |
202 | prologs[regnum] = 0; | |
203 | } | |
204 | ||
49d45b20 | 205 | if (start_addr >= end_addr) |
ae4e2501 | 206 | return end_addr; |
49d45b20 JB |
207 | |
208 | cache->established = 0; | |
dcc31d28 | 209 | for (next_addr = start_addr; next_addr < end_addr; next_addr += isize) |
49d45b20 | 210 | { |
dcc31d28 | 211 | inst = ft32_fetch_instruction (next_addr, &isize, byte_order); |
49d45b20 | 212 | |
86feccb9 | 213 | if (FT32_IS_PUSH (inst)) |
49d45b20 | 214 | { |
ae4e2501 | 215 | pushreg = FT32_PUSH_REG (inst); |
49d45b20 | 216 | cache->framesize += 4; |
ae4e2501 | 217 | cache->saved_regs[FT32_R0_REGNUM + pushreg] = cache->framesize; |
49d45b20 | 218 | } |
ae4e2501 | 219 | else if (FT32_IS_CALL (inst)) |
220 | { | |
221 | for (regnum = first_saved_reg; regnum < 32; regnum++) | |
222 | { | |
223 | if ((4 * (inst & 0x3ffff)) == prologs[regnum]) | |
224 | { | |
225 | for (pushreg = first_saved_reg; pushreg <= regnum; | |
226 | pushreg++) | |
227 | { | |
228 | cache->framesize += 4; | |
229 | cache->saved_regs[FT32_R0_REGNUM + pushreg] = | |
230 | cache->framesize; | |
231 | } | |
ae4e2501 | 232 | } |
233 | } | |
234 | break; | |
235 | } | |
49d45b20 JB |
236 | else |
237 | break; | |
238 | } | |
239 | for (regnum = FT32_R0_REGNUM; regnum < FT32_PC_REGNUM; regnum++) | |
240 | { | |
241 | if (cache->saved_regs[regnum] != REG_UNAVAIL) | |
ae4e2501 | 242 | cache->saved_regs[regnum] = |
243 | cache->framesize - cache->saved_regs[regnum]; | |
49d45b20 JB |
244 | } |
245 | cache->saved_regs[FT32_PC_REGNUM] = cache->framesize; | |
246 | ||
247 | /* It is a LINK? */ | |
248 | if (next_addr < end_addr) | |
249 | { | |
dcc31d28 | 250 | inst = ft32_fetch_instruction (next_addr, &isize, byte_order); |
86feccb9 | 251 | if (FT32_IS_LINK (inst)) |
49d45b20 JB |
252 | { |
253 | cache->established = 1; | |
254 | for (regnum = FT32_R0_REGNUM; regnum < FT32_PC_REGNUM; regnum++) | |
255 | { | |
256 | if (cache->saved_regs[regnum] != REG_UNAVAIL) | |
257 | cache->saved_regs[regnum] += 4; | |
258 | } | |
259 | cache->saved_regs[FT32_PC_REGNUM] = cache->framesize + 4; | |
260 | cache->saved_regs[FT32_FP_REGNUM] = 0; | |
86feccb9 | 261 | cache->framesize += FT32_LINK_SIZE (inst); |
dcc31d28 | 262 | next_addr += isize; |
49d45b20 JB |
263 | } |
264 | } | |
265 | ||
266 | return next_addr; | |
267 | } | |
268 | ||
269 | /* Find the end of function prologue. */ | |
270 | ||
271 | static CORE_ADDR | |
272 | ft32_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) | |
273 | { | |
274 | CORE_ADDR func_addr = 0, func_end = 0; | |
275 | const char *func_name; | |
276 | ||
277 | /* See if we can determine the end of the prologue via the symbol table. | |
278 | If so, then return either PC, or the PC after the prologue, whichever | |
279 | is greater. */ | |
280 | if (find_pc_partial_function (pc, &func_name, &func_addr, &func_end)) | |
281 | { | |
282 | CORE_ADDR post_prologue_pc | |
283 | = skip_prologue_using_sal (gdbarch, func_addr); | |
284 | if (post_prologue_pc != 0) | |
325fac50 | 285 | return std::max (pc, post_prologue_pc); |
49d45b20 JB |
286 | else |
287 | { | |
288 | /* Can't determine prologue from the symbol table, need to examine | |
289 | instructions. */ | |
290 | struct symtab_and_line sal; | |
291 | struct symbol *sym; | |
292 | struct ft32_frame_cache cache; | |
293 | CORE_ADDR plg_end; | |
294 | ||
295 | memset (&cache, 0, sizeof cache); | |
296 | ||
297 | plg_end = ft32_analyze_prologue (func_addr, | |
298 | func_end, &cache, gdbarch); | |
299 | /* Found a function. */ | |
835a09d9 | 300 | sym = lookup_symbol (func_name, NULL, VAR_DOMAIN, NULL).symbol; |
49d45b20 | 301 | /* Don't use line number debug info for assembly source files. */ |
c1b5c1eb | 302 | if ((sym != NULL) && sym->language () != language_asm) |
49d45b20 JB |
303 | { |
304 | sal = find_pc_line (func_addr, 0); | |
305 | if (sal.end && sal.end < func_end) | |
306 | { | |
307 | /* Found a line number, use it as end of prologue. */ | |
308 | return sal.end; | |
309 | } | |
310 | } | |
311 | /* No useable line symbol. Use result of prologue parsing method. */ | |
312 | return plg_end; | |
313 | } | |
314 | } | |
315 | ||
316 | /* No function symbol -- just return the PC. */ | |
317 | return pc; | |
318 | } | |
319 | ||
623fb775 | 320 | /* Implementation of `pointer_to_address' gdbarch method. |
321 | ||
322 | On FT32 address space zero is RAM, address space 1 is flash. | |
323 | RAM appears at address RAM_BIAS, flash at address 0. */ | |
324 | ||
325 | static CORE_ADDR | |
326 | ft32_pointer_to_address (struct gdbarch *gdbarch, | |
327 | struct type *type, const gdb_byte *buf) | |
328 | { | |
329 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
330 | CORE_ADDR addr | |
331 | = extract_unsigned_integer (buf, TYPE_LENGTH (type), byte_order); | |
332 | ||
333 | if (TYPE_ADDRESS_CLASS_1 (type)) | |
334 | return addr; | |
335 | else | |
336 | return addr | RAM_BIAS; | |
337 | } | |
338 | ||
339 | /* Implementation of `address_class_type_flags' gdbarch method. | |
340 | ||
341 | This method maps DW_AT_address_class attributes to a | |
342 | type_instance_flag_value. */ | |
343 | ||
314ad88d | 344 | static type_instance_flags |
623fb775 | 345 | ft32_address_class_type_flags (int byte_size, int dwarf2_addr_class) |
346 | { | |
347 | /* The value 1 of the DW_AT_address_class attribute corresponds to the | |
348 | __flash__ qualifier, meaning pointer to data in FT32 program memory. | |
349 | */ | |
350 | if (dwarf2_addr_class == 1) | |
351 | return TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1; | |
352 | return 0; | |
353 | } | |
354 | ||
355 | /* Implementation of `address_class_type_flags_to_name' gdbarch method. | |
356 | ||
357 | Convert a type_instance_flag_value to an address space qualifier. */ | |
358 | ||
359 | static const char* | |
314ad88d PA |
360 | ft32_address_class_type_flags_to_name (struct gdbarch *gdbarch, |
361 | type_instance_flags type_flags) | |
623fb775 | 362 | { |
363 | if (type_flags & TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1) | |
364 | return "flash"; | |
365 | else | |
366 | return NULL; | |
367 | } | |
368 | ||
369 | /* Implementation of `address_class_name_to_type_flags' gdbarch method. | |
370 | ||
371 | Convert an address space qualifier to a type_instance_flag_value. */ | |
372 | ||
314ad88d | 373 | static bool |
623fb775 | 374 | ft32_address_class_name_to_type_flags (struct gdbarch *gdbarch, |
375 | const char* name, | |
314ad88d | 376 | type_instance_flags *type_flags_ptr) |
623fb775 | 377 | { |
378 | if (strcmp (name, "flash") == 0) | |
379 | { | |
380 | *type_flags_ptr = TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1; | |
314ad88d | 381 | return true; |
623fb775 | 382 | } |
383 | else | |
314ad88d | 384 | return false; |
623fb775 | 385 | } |
386 | ||
49d45b20 JB |
387 | /* Given a return value in `regbuf' with a type `valtype', |
388 | extract and copy its value into `valbuf'. */ | |
389 | ||
390 | static void | |
391 | ft32_extract_return_value (struct type *type, struct regcache *regcache, | |
392 | gdb_byte *dst) | |
393 | { | |
ac7936df | 394 | struct gdbarch *gdbarch = regcache->arch (); |
49d45b20 JB |
395 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
396 | bfd_byte *valbuf = dst; | |
397 | int len = TYPE_LENGTH (type); | |
398 | ULONGEST tmp; | |
399 | ||
400 | /* By using store_unsigned_integer we avoid having to do | |
401 | anything special for small big-endian values. */ | |
402 | regcache_cooked_read_unsigned (regcache, FT32_R0_REGNUM, &tmp); | |
403 | store_unsigned_integer (valbuf, (len > 4 ? len - 4 : len), byte_order, tmp); | |
404 | ||
405 | /* Ignore return values more than 8 bytes in size because the ft32 | |
406 | returns anything more than 8 bytes in the stack. */ | |
407 | if (len > 4) | |
408 | { | |
409 | regcache_cooked_read_unsigned (regcache, FT32_R1_REGNUM, &tmp); | |
410 | store_unsigned_integer (valbuf + len - 4, 4, byte_order, tmp); | |
411 | } | |
412 | } | |
413 | ||
414 | /* Implement the "return_value" gdbarch method. */ | |
415 | ||
416 | static enum return_value_convention | |
417 | ft32_return_value (struct gdbarch *gdbarch, struct value *function, | |
418 | struct type *valtype, struct regcache *regcache, | |
419 | gdb_byte *readbuf, const gdb_byte *writebuf) | |
420 | { | |
421 | if (TYPE_LENGTH (valtype) > 8) | |
422 | return RETURN_VALUE_STRUCT_CONVENTION; | |
423 | else | |
424 | { | |
425 | if (readbuf != NULL) | |
426 | ft32_extract_return_value (valtype, regcache, readbuf); | |
427 | if (writebuf != NULL) | |
428 | ft32_store_return_value (valtype, regcache, writebuf); | |
429 | return RETURN_VALUE_REGISTER_CONVENTION; | |
430 | } | |
431 | } | |
432 | ||
433 | /* Allocate and initialize a ft32_frame_cache object. */ | |
434 | ||
435 | static struct ft32_frame_cache * | |
436 | ft32_alloc_frame_cache (void) | |
437 | { | |
438 | struct ft32_frame_cache *cache; | |
439 | int i; | |
440 | ||
441 | cache = FRAME_OBSTACK_ZALLOC (struct ft32_frame_cache); | |
442 | ||
443 | for (i = 0; i < FT32_NUM_REGS; ++i) | |
444 | cache->saved_regs[i] = REG_UNAVAIL; | |
445 | ||
446 | return cache; | |
447 | } | |
448 | ||
449 | /* Populate a ft32_frame_cache object for this_frame. */ | |
450 | ||
451 | static struct ft32_frame_cache * | |
452 | ft32_frame_cache (struct frame_info *this_frame, void **this_cache) | |
453 | { | |
454 | struct ft32_frame_cache *cache; | |
455 | CORE_ADDR current_pc; | |
456 | int i; | |
457 | ||
458 | if (*this_cache) | |
9a3c8263 | 459 | return (struct ft32_frame_cache *) *this_cache; |
49d45b20 JB |
460 | |
461 | cache = ft32_alloc_frame_cache (); | |
462 | *this_cache = cache; | |
463 | ||
464 | cache->base = get_frame_register_unsigned (this_frame, FT32_FP_REGNUM); | |
465 | if (cache->base == 0) | |
466 | return cache; | |
467 | ||
468 | cache->pc = get_frame_func (this_frame); | |
469 | current_pc = get_frame_pc (this_frame); | |
470 | if (cache->pc) | |
471 | { | |
472 | struct gdbarch *gdbarch = get_frame_arch (this_frame); | |
473 | ||
474 | ft32_analyze_prologue (cache->pc, current_pc, cache, gdbarch); | |
475 | if (!cache->established) | |
476 | cache->base = get_frame_register_unsigned (this_frame, FT32_SP_REGNUM); | |
477 | } | |
478 | ||
479 | cache->saved_sp = cache->base - 4; | |
480 | ||
481 | for (i = 0; i < FT32_NUM_REGS; ++i) | |
482 | if (cache->saved_regs[i] != REG_UNAVAIL) | |
483 | cache->saved_regs[i] = cache->base + cache->saved_regs[i]; | |
484 | ||
485 | return cache; | |
486 | } | |
487 | ||
49d45b20 JB |
488 | /* Given a GDB frame, determine the address of the calling function's |
489 | frame. This will be used to create a new GDB frame struct. */ | |
490 | ||
491 | static void | |
492 | ft32_frame_this_id (struct frame_info *this_frame, | |
493 | void **this_prologue_cache, struct frame_id *this_id) | |
494 | { | |
495 | struct ft32_frame_cache *cache = ft32_frame_cache (this_frame, | |
496 | this_prologue_cache); | |
497 | ||
498 | /* This marks the outermost frame. */ | |
499 | if (cache->base == 0) | |
500 | return; | |
501 | ||
502 | *this_id = frame_id_build (cache->saved_sp, cache->pc); | |
503 | } | |
504 | ||
505 | /* Get the value of register regnum in the previous stack frame. */ | |
506 | ||
507 | static struct value * | |
508 | ft32_frame_prev_register (struct frame_info *this_frame, | |
509 | void **this_prologue_cache, int regnum) | |
510 | { | |
511 | struct ft32_frame_cache *cache = ft32_frame_cache (this_frame, | |
512 | this_prologue_cache); | |
513 | ||
514 | gdb_assert (regnum >= 0); | |
515 | ||
516 | if (regnum == FT32_SP_REGNUM && cache->saved_sp) | |
517 | return frame_unwind_got_constant (this_frame, regnum, cache->saved_sp); | |
518 | ||
519 | if (regnum < FT32_NUM_REGS && cache->saved_regs[regnum] != REG_UNAVAIL) | |
520 | return frame_unwind_got_memory (this_frame, regnum, | |
521 | RAM_BIAS | cache->saved_regs[regnum]); | |
522 | ||
523 | return frame_unwind_got_register (this_frame, regnum, regnum); | |
524 | } | |
525 | ||
526 | static const struct frame_unwind ft32_frame_unwind = | |
527 | { | |
528 | NORMAL_FRAME, | |
529 | default_frame_unwind_stop_reason, | |
530 | ft32_frame_this_id, | |
531 | ft32_frame_prev_register, | |
532 | NULL, | |
533 | default_frame_sniffer | |
534 | }; | |
535 | ||
536 | /* Return the base address of this_frame. */ | |
537 | ||
538 | static CORE_ADDR | |
539 | ft32_frame_base_address (struct frame_info *this_frame, void **this_cache) | |
540 | { | |
541 | struct ft32_frame_cache *cache = ft32_frame_cache (this_frame, | |
542 | this_cache); | |
543 | ||
544 | return cache->base; | |
545 | } | |
546 | ||
547 | static const struct frame_base ft32_frame_base = | |
548 | { | |
549 | &ft32_frame_unwind, | |
550 | ft32_frame_base_address, | |
551 | ft32_frame_base_address, | |
552 | ft32_frame_base_address | |
553 | }; | |
554 | ||
49d45b20 JB |
555 | /* Allocate and initialize the ft32 gdbarch object. */ |
556 | ||
557 | static struct gdbarch * | |
558 | ft32_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | |
559 | { | |
560 | struct gdbarch *gdbarch; | |
561 | struct gdbarch_tdep *tdep; | |
623fb775 | 562 | struct type *void_type; |
563 | struct type *func_void_type; | |
49d45b20 JB |
564 | |
565 | /* If there is already a candidate, use it. */ | |
566 | arches = gdbarch_list_lookup_by_info (arches, &info); | |
567 | if (arches != NULL) | |
568 | return arches->gdbarch; | |
569 | ||
570 | /* Allocate space for the new architecture. */ | |
cdd238da | 571 | tdep = XCNEW (struct gdbarch_tdep); |
49d45b20 JB |
572 | gdbarch = gdbarch_alloc (&info, tdep); |
573 | ||
623fb775 | 574 | /* Create a type for PC. We can't use builtin types here, as they may not |
575 | be defined. */ | |
77b7c781 | 576 | void_type = arch_type (gdbarch, TYPE_CODE_VOID, TARGET_CHAR_BIT, "void"); |
623fb775 | 577 | func_void_type = make_function_type (void_type, NULL); |
88dfca6c UW |
578 | tdep->pc_type = arch_pointer_type (gdbarch, 4 * TARGET_CHAR_BIT, NULL, |
579 | func_void_type); | |
314ad88d PA |
580 | tdep->pc_type->set_instance_flags (tdep->pc_type->instance_flags () |
581 | | TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1); | |
623fb775 | 582 | |
49d45b20 JB |
583 | set_gdbarch_num_regs (gdbarch, FT32_NUM_REGS); |
584 | set_gdbarch_sp_regnum (gdbarch, FT32_SP_REGNUM); | |
585 | set_gdbarch_pc_regnum (gdbarch, FT32_PC_REGNUM); | |
586 | set_gdbarch_register_name (gdbarch, ft32_register_name); | |
587 | set_gdbarch_register_type (gdbarch, ft32_register_type); | |
588 | ||
589 | set_gdbarch_return_value (gdbarch, ft32_return_value); | |
590 | ||
623fb775 | 591 | set_gdbarch_pointer_to_address (gdbarch, ft32_pointer_to_address); |
592 | ||
49d45b20 JB |
593 | set_gdbarch_skip_prologue (gdbarch, ft32_skip_prologue); |
594 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
04180708 YQ |
595 | set_gdbarch_breakpoint_kind_from_pc (gdbarch, ft32_breakpoint::kind_from_pc); |
596 | set_gdbarch_sw_breakpoint_from_kind (gdbarch, ft32_breakpoint::bp_from_kind); | |
49d45b20 JB |
597 | set_gdbarch_frame_align (gdbarch, ft32_frame_align); |
598 | ||
599 | frame_base_set_default (gdbarch, &ft32_frame_base); | |
600 | ||
49d45b20 JB |
601 | /* Hook in ABI-specific overrides, if they have been registered. */ |
602 | gdbarch_init_osabi (info, gdbarch); | |
603 | ||
604 | /* Hook in the default unwinders. */ | |
605 | frame_unwind_append_unwinder (gdbarch, &ft32_frame_unwind); | |
606 | ||
607 | /* Support simple overlay manager. */ | |
608 | set_gdbarch_overlay_update (gdbarch, simple_overlay_update); | |
609 | ||
623fb775 | 610 | set_gdbarch_address_class_type_flags (gdbarch, ft32_address_class_type_flags); |
611 | set_gdbarch_address_class_name_to_type_flags | |
612 | (gdbarch, ft32_address_class_name_to_type_flags); | |
613 | set_gdbarch_address_class_type_flags_to_name | |
614 | (gdbarch, ft32_address_class_type_flags_to_name); | |
615 | ||
49d45b20 JB |
616 | return gdbarch; |
617 | } | |
618 | ||
619 | /* Register this machine's init routine. */ | |
620 | ||
6c265988 | 621 | void _initialize_ft32_tdep (); |
49d45b20 | 622 | void |
6c265988 | 623 | _initialize_ft32_tdep () |
49d45b20 JB |
624 | { |
625 | register_gdbarch_init (bfd_arch_ft32, ft32_gdbarch_init); | |
626 | } |