Don't use arm_regmap and arm_num_regs in arm_fill_gregset and arm_store_gregset
[deliverable/binutils-gdb.git] / gdb / gdbserver / linux-arm-low.c
CommitLineData
0a30fbc4 1/* GNU/Linux/ARM specific low level interface, for the remote server for GDB.
32d0add0 2 Copyright (C) 1995-2015 Free Software Foundation, Inc.
0a30fbc4
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3
4 This file is part of GDB.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
a9762ec7 8 the Free Software Foundation; either version 3 of the License, or
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9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
a9762ec7 17 along with this program. If not, see <http://www.gnu.org/licenses/>. */
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18
19#include "server.h"
58caa3dc 20#include "linux-low.h"
deca266c 21#include "arch/arm.h"
0a30fbc4 22
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23/* Don't include elf.h if linux/elf.h got included by gdb_proc_service.h.
24 On Bionic elf.h and linux/elf.h have conflicting definitions. */
25#ifndef ELFMAG0
58d6951d 26#include <elf.h>
3743bb4f 27#endif
5826e159 28#include "nat/gdb_ptrace.h"
09b4ad9f 29#include <signal.h>
9308fc88 30
58d6951d 31/* Defined in auto-generated files. */
d05b4ac3 32void init_registers_arm (void);
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33extern const struct target_desc *tdesc_arm;
34
d05b4ac3 35void init_registers_arm_with_iwmmxt (void);
3aee8918
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36extern const struct target_desc *tdesc_arm_with_iwmmxt;
37
58d6951d 38void init_registers_arm_with_vfpv2 (void);
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39extern const struct target_desc *tdesc_arm_with_vfpv2;
40
58d6951d 41void init_registers_arm_with_vfpv3 (void);
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42extern const struct target_desc *tdesc_arm_with_vfpv3;
43
58d6951d 44void init_registers_arm_with_neon (void);
3aee8918 45extern const struct target_desc *tdesc_arm_with_neon;
d05b4ac3 46
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47#ifndef PTRACE_GET_THREAD_AREA
48#define PTRACE_GET_THREAD_AREA 22
49#endif
50
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51#ifndef PTRACE_GETWMMXREGS
52# define PTRACE_GETWMMXREGS 18
53# define PTRACE_SETWMMXREGS 19
54#endif
55
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56#ifndef PTRACE_GETVFPREGS
57# define PTRACE_GETVFPREGS 27
58# define PTRACE_SETVFPREGS 28
59#endif
60
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61#ifndef PTRACE_GETHBPREGS
62#define PTRACE_GETHBPREGS 29
63#define PTRACE_SETHBPREGS 30
64#endif
65
66/* Information describing the hardware breakpoint capabilities. */
71487fd7 67static struct
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68{
69 unsigned char arch;
70 unsigned char max_wp_length;
71 unsigned char wp_count;
72 unsigned char bp_count;
71487fd7 73} arm_linux_hwbp_cap;
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74
75/* Enum describing the different types of ARM hardware break-/watch-points. */
76typedef enum
77{
78 arm_hwbp_break = 0,
79 arm_hwbp_load = 1,
80 arm_hwbp_store = 2,
81 arm_hwbp_access = 3
82} arm_hwbp_type;
83
84/* Type describing an ARM Hardware Breakpoint Control register value. */
85typedef unsigned int arm_hwbp_control_t;
86
87/* Structure used to keep track of hardware break-/watch-points. */
88struct arm_linux_hw_breakpoint
89{
90 /* Address to break on, or being watched. */
91 unsigned int address;
92 /* Control register for break-/watch- point. */
93 arm_hwbp_control_t control;
94};
95
96/* Since we cannot dynamically allocate subfields of arch_process_info,
97 assume a maximum number of supported break-/watchpoints. */
98#define MAX_BPTS 32
99#define MAX_WPTS 32
100
101/* Per-process arch-specific data we want to keep. */
102struct arch_process_info
103{
104 /* Hardware breakpoints for this process. */
105 struct arm_linux_hw_breakpoint bpts[MAX_BPTS];
106 /* Hardware watchpoints for this process. */
107 struct arm_linux_hw_breakpoint wpts[MAX_WPTS];
108};
109
110/* Per-thread arch-specific data we want to keep. */
111struct arch_lwp_info
112{
113 /* Non-zero if our copy differs from what's recorded in the thread. */
114 char bpts_changed[MAX_BPTS];
115 char wpts_changed[MAX_WPTS];
116 /* Cached stopped data address. */
117 CORE_ADDR stopped_data_address;
118};
119
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120static unsigned long arm_hwcap;
121
122/* These are in <asm/elf.h> in current kernels. */
123#define HWCAP_VFP 64
124#define HWCAP_IWMMXT 512
125#define HWCAP_NEON 4096
126#define HWCAP_VFPv3 8192
127#define HWCAP_VFPv3D16 16384
128
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129#ifdef HAVE_SYS_REG_H
130#include <sys/reg.h>
131#endif
132
23ce3b1c 133#define arm_num_regs 26
0a30fbc4 134
2ec06d2e 135static int arm_regmap[] = {
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136 0, 4, 8, 12, 16, 20, 24, 28,
137 32, 36, 40, 44, 48, 52, 56, 60,
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138 -1, -1, -1, -1, -1, -1, -1, -1, -1,
139 64
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140};
141
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142static int
143arm_cannot_store_register (int regno)
0a30fbc4 144{
2ec06d2e 145 return (regno >= arm_num_regs);
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146}
147
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148static int
149arm_cannot_fetch_register (int regno)
0a30fbc4 150{
2ec06d2e 151 return (regno >= arm_num_regs);
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152}
153
fb1e4ffc 154static void
442ea881 155arm_fill_gregset (struct regcache *regcache, void *buf)
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156{
157 int i;
deca266c 158 uint32_t *regs = buf;
fb1e4ffc 159
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160 for (i = ARM_A1_REGNUM; i <= ARM_PC_REGNUM; i++)
161 collect_register (regcache, i, &regs[i]);
162
163 collect_register (regcache, ARM_PS_REGNUM, &regs[16]);
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164}
165
166static void
442ea881 167arm_store_gregset (struct regcache *regcache, const void *buf)
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168{
169 int i;
170 char zerobuf[8];
deca266c 171 const uint32_t *regs = buf;
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172
173 memset (zerobuf, 0, 8);
deca266c
YQ
174 for (i = ARM_A1_REGNUM; i <= ARM_PC_REGNUM; i++)
175 supply_register (regcache, i, &regs[i]);
176
177 for (; i < ARM_PS_REGNUM; i++)
178 supply_register (regcache, i, zerobuf);
179
180 supply_register (regcache, ARM_PS_REGNUM, &regs[16]);
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181}
182
fb1e4ffc 183static void
442ea881 184arm_fill_wmmxregset (struct regcache *regcache, void *buf)
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185{
186 int i;
187
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188 if (!(arm_hwcap & HWCAP_IWMMXT))
189 return;
190
fb1e4ffc 191 for (i = 0; i < 16; i++)
442ea881 192 collect_register (regcache, arm_num_regs + i, (char *) buf + i * 8);
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193
194 /* We only have access to wcssf, wcasf, and wcgr0-wcgr3. */
195 for (i = 0; i < 6; i++)
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196 collect_register (regcache, arm_num_regs + i + 16,
197 (char *) buf + 16 * 8 + i * 4);
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198}
199
200static void
442ea881 201arm_store_wmmxregset (struct regcache *regcache, const void *buf)
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202{
203 int i;
204
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205 if (!(arm_hwcap & HWCAP_IWMMXT))
206 return;
207
fb1e4ffc 208 for (i = 0; i < 16; i++)
442ea881 209 supply_register (regcache, arm_num_regs + i, (char *) buf + i * 8);
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210
211 /* We only have access to wcssf, wcasf, and wcgr0-wcgr3. */
212 for (i = 0; i < 6; i++)
442ea881
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213 supply_register (regcache, arm_num_regs + i + 16,
214 (char *) buf + 16 * 8 + i * 4);
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215}
216
58d6951d 217static void
442ea881 218arm_fill_vfpregset (struct regcache *regcache, void *buf)
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219{
220 int i, num, base;
221
222 if (!(arm_hwcap & HWCAP_VFP))
223 return;
224
225 if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
226 num = 32;
227 else
228 num = 16;
229
3aee8918 230 base = find_regno (regcache->tdesc, "d0");
58d6951d 231 for (i = 0; i < num; i++)
442ea881 232 collect_register (regcache, base + i, (char *) buf + i * 8);
58d6951d 233
442ea881 234 collect_register_by_name (regcache, "fpscr", (char *) buf + 32 * 8);
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235}
236
237static void
442ea881 238arm_store_vfpregset (struct regcache *regcache, const void *buf)
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239{
240 int i, num, base;
241
242 if (!(arm_hwcap & HWCAP_VFP))
243 return;
244
245 if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
246 num = 32;
247 else
248 num = 16;
249
3aee8918 250 base = find_regno (regcache->tdesc, "d0");
58d6951d 251 for (i = 0; i < num; i++)
442ea881 252 supply_register (regcache, base + i, (char *) buf + i * 8);
58d6951d 253
442ea881 254 supply_register_by_name (regcache, "fpscr", (char *) buf + 32 * 8);
58d6951d 255}
fb1e4ffc 256
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257extern int debug_threads;
258
0d62e5e8 259static CORE_ADDR
442ea881 260arm_get_pc (struct regcache *regcache)
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261{
262 unsigned long pc;
442ea881 263 collect_register_by_name (regcache, "pc", &pc);
d677d77d 264 if (debug_threads)
87ce2a04 265 debug_printf ("stop pc is %08lx\n", pc);
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266 return pc;
267}
268
269static void
442ea881 270arm_set_pc (struct regcache *regcache, CORE_ADDR pc)
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271{
272 unsigned long newpc = pc;
442ea881 273 supply_register_by_name (regcache, "pc", &newpc);
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274}
275
aeb75bf5 276/* Correct in either endianness. */
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277static const unsigned long arm_breakpoint = 0xef9f0001;
278#define arm_breakpoint_len 4
aeb75bf5 279static const unsigned short thumb_breakpoint = 0xde01;
177321bd 280static const unsigned short thumb2_breakpoint[] = { 0xf7f0, 0xa000 };
0d62e5e8 281
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282/* For new EABI binaries. We recognize it regardless of which ABI
283 is used for gdbserver, so single threaded debugging should work
284 OK, but for multi-threaded debugging we only insert the current
285 ABI's breakpoint instruction. For now at least. */
286static const unsigned long arm_eabi_breakpoint = 0xe7f001f0;
287
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288static int
289arm_breakpoint_at (CORE_ADDR where)
290{
0bfdf32f 291 struct regcache *regcache = get_thread_regcache (current_thread, 1);
aeb75bf5 292 unsigned long cpsr;
0d62e5e8 293
442ea881 294 collect_register_by_name (regcache, "cpsr", &cpsr);
0d62e5e8 295
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296 if (cpsr & 0x20)
297 {
298 /* Thumb mode. */
299 unsigned short insn;
9d1fb177 300
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301 (*the_target->read_memory) (where, (unsigned char *) &insn, 2);
302 if (insn == thumb_breakpoint)
303 return 1;
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304
305 if (insn == thumb2_breakpoint[0])
306 {
307 (*the_target->read_memory) (where + 2, (unsigned char *) &insn, 2);
308 if (insn == thumb2_breakpoint[1])
309 return 1;
310 }
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311 }
312 else
313 {
314 /* ARM mode. */
315 unsigned long insn;
316
317 (*the_target->read_memory) (where, (unsigned char *) &insn, 4);
318 if (insn == arm_breakpoint)
319 return 1;
320
321 if (insn == arm_eabi_breakpoint)
322 return 1;
323 }
9d1fb177 324
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325 return 0;
326}
327
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328/* We only place breakpoints in empty marker functions, and thread locking
329 is outside of the function. So rather than importing software single-step,
330 we can just run until exit. */
331static CORE_ADDR
442ea881 332arm_reinsert_addr (void)
3b2fc2ea 333{
0bfdf32f 334 struct regcache *regcache = get_thread_regcache (current_thread, 1);
3b2fc2ea 335 unsigned long pc;
442ea881 336 collect_register_by_name (regcache, "lr", &pc);
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337 return pc;
338}
339
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340/* Fetch the thread-local storage pointer for libthread_db. */
341
342ps_err_e
343ps_get_thread_area (const struct ps_prochandle *ph,
1b3f6016 344 lwpid_t lwpid, int idx, void **base)
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345{
346 if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
347 return PS_ERR;
348
349 /* IDX is the bias from the thread pointer to the beginning of the
350 thread descriptor. It has to be subtracted due to implementation
351 quirks in libthread_db. */
352 *base = (void *) ((char *)*base - idx);
353
354 return PS_OK;
355}
356
09b4ad9f 357
71487fd7
UW
358/* Query Hardware Breakpoint information for the target we are attached to
359 (using PID as ptrace argument) and set up arm_linux_hwbp_cap. */
360static void
361arm_linux_init_hwbp_cap (int pid)
09b4ad9f 362{
71487fd7 363 unsigned int val;
09b4ad9f 364
71487fd7
UW
365 if (ptrace (PTRACE_GETHBPREGS, pid, 0, &val) < 0)
366 return;
09b4ad9f 367
71487fd7
UW
368 arm_linux_hwbp_cap.arch = (unsigned char)((val >> 24) & 0xff);
369 if (arm_linux_hwbp_cap.arch == 0)
370 return;
09b4ad9f 371
71487fd7
UW
372 arm_linux_hwbp_cap.max_wp_length = (unsigned char)((val >> 16) & 0xff);
373 arm_linux_hwbp_cap.wp_count = (unsigned char)((val >> 8) & 0xff);
374 arm_linux_hwbp_cap.bp_count = (unsigned char)(val & 0xff);
09b4ad9f 375
71487fd7
UW
376 if (arm_linux_hwbp_cap.wp_count > MAX_WPTS)
377 internal_error (__FILE__, __LINE__, "Unsupported number of watchpoints");
378 if (arm_linux_hwbp_cap.bp_count > MAX_BPTS)
379 internal_error (__FILE__, __LINE__, "Unsupported number of breakpoints");
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UW
380}
381
382/* How many hardware breakpoints are available? */
383static int
384arm_linux_get_hw_breakpoint_count (void)
385{
71487fd7 386 return arm_linux_hwbp_cap.bp_count;
09b4ad9f
UW
387}
388
389/* How many hardware watchpoints are available? */
390static int
391arm_linux_get_hw_watchpoint_count (void)
392{
71487fd7 393 return arm_linux_hwbp_cap.wp_count;
09b4ad9f
UW
394}
395
396/* Maximum length of area watched by hardware watchpoint. */
397static int
398arm_linux_get_hw_watchpoint_max_length (void)
399{
71487fd7 400 return arm_linux_hwbp_cap.max_wp_length;
09b4ad9f
UW
401}
402
403/* Initialize an ARM hardware break-/watch-point control register value.
404 BYTE_ADDRESS_SELECT is the mask of bytes to trigger on; HWBP_TYPE is the
405 type of break-/watch-point; ENABLE indicates whether the point is enabled.
406 */
407static arm_hwbp_control_t
408arm_hwbp_control_initialize (unsigned byte_address_select,
409 arm_hwbp_type hwbp_type,
410 int enable)
411{
412 gdb_assert ((byte_address_select & ~0xffU) == 0);
413 gdb_assert (hwbp_type != arm_hwbp_break
414 || ((byte_address_select & 0xfU) != 0));
415
416 return (byte_address_select << 5) | (hwbp_type << 3) | (3 << 1) | enable;
417}
418
419/* Does the breakpoint control value CONTROL have the enable bit set? */
420static int
421arm_hwbp_control_is_enabled (arm_hwbp_control_t control)
422{
423 return control & 0x1;
424}
425
426/* Is the breakpoint control value CONTROL initialized? */
427static int
428arm_hwbp_control_is_initialized (arm_hwbp_control_t control)
429{
430 return control != 0;
431}
432
433/* Change a breakpoint control word so that it is in the disabled state. */
434static arm_hwbp_control_t
435arm_hwbp_control_disable (arm_hwbp_control_t control)
436{
437 return control & ~0x1;
438}
439
440/* Are two break-/watch-points equal? */
441static int
442arm_linux_hw_breakpoint_equal (const struct arm_linux_hw_breakpoint *p1,
443 const struct arm_linux_hw_breakpoint *p2)
444{
445 return p1->address == p2->address && p1->control == p2->control;
446}
447
802e8e6d
PA
448/* Convert a raw breakpoint type to an enum arm_hwbp_type. */
449
450static int
451raw_bkpt_type_to_arm_hwbp_type (enum raw_bkpt_type raw_type)
452{
453 switch (raw_type)
454 {
455 case raw_bkpt_type_hw:
456 return arm_hwbp_break;
457 case raw_bkpt_type_write_wp:
458 return arm_hwbp_store;
459 case raw_bkpt_type_read_wp:
460 return arm_hwbp_load;
461 case raw_bkpt_type_access_wp:
462 return arm_hwbp_access;
463 default:
464 gdb_assert_not_reached ("unhandled raw type");
465 }
466}
467
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468/* Initialize the hardware breakpoint structure P for a breakpoint or
469 watchpoint at ADDR to LEN. The type of watchpoint is given in TYPE.
b62e2b27
UW
470 Returns -1 if TYPE is unsupported, or -2 if the particular combination
471 of ADDR and LEN cannot be implemented. Otherwise, returns 0 if TYPE
472 represents a breakpoint and 1 if type represents a watchpoint. */
09b4ad9f 473static int
802e8e6d
PA
474arm_linux_hw_point_initialize (enum raw_bkpt_type raw_type, CORE_ADDR addr,
475 int len, struct arm_linux_hw_breakpoint *p)
09b4ad9f
UW
476{
477 arm_hwbp_type hwbp_type;
478 unsigned mask;
479
802e8e6d 480 hwbp_type = raw_bkpt_type_to_arm_hwbp_type (raw_type);
09b4ad9f
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481
482 if (hwbp_type == arm_hwbp_break)
483 {
484 /* For breakpoints, the length field encodes the mode. */
485 switch (len)
486 {
487 case 2: /* 16-bit Thumb mode breakpoint */
488 case 3: /* 32-bit Thumb mode breakpoint */
fcf303ab
UW
489 mask = 0x3;
490 addr &= ~1;
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491 break;
492 case 4: /* 32-bit ARM mode breakpoint */
493 mask = 0xf;
fcf303ab 494 addr &= ~3;
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495 break;
496 default:
497 /* Unsupported. */
b62e2b27 498 return -2;
09b4ad9f 499 }
09b4ad9f
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500 }
501 else
502 {
503 CORE_ADDR max_wp_length = arm_linux_get_hw_watchpoint_max_length ();
504 CORE_ADDR aligned_addr;
505
506 /* Can not set watchpoints for zero or negative lengths. */
507 if (len <= 0)
b62e2b27 508 return -2;
09b4ad9f
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509 /* The current ptrace interface can only handle watchpoints that are a
510 power of 2. */
511 if ((len & (len - 1)) != 0)
b62e2b27 512 return -2;
09b4ad9f
UW
513
514 /* Test that the range [ADDR, ADDR + LEN) fits into the largest address
515 range covered by a watchpoint. */
516 aligned_addr = addr & ~(max_wp_length - 1);
517 if (aligned_addr + max_wp_length < addr + len)
b62e2b27 518 return -2;
09b4ad9f
UW
519
520 mask = (1 << len) - 1;
521 }
522
523 p->address = (unsigned int) addr;
524 p->control = arm_hwbp_control_initialize (mask, hwbp_type, 1);
525
526 return hwbp_type != arm_hwbp_break;
527}
528
529/* Callback to mark a watch-/breakpoint to be updated in all threads of
530 the current process. */
531
532struct update_registers_data
533{
534 int watch;
535 int i;
536};
537
538static int
539update_registers_callback (struct inferior_list_entry *entry, void *arg)
540{
d86d4aaf
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541 struct thread_info *thread = (struct thread_info *) entry;
542 struct lwp_info *lwp = get_thread_lwp (thread);
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543 struct update_registers_data *data = (struct update_registers_data *) arg;
544
545 /* Only update the threads of the current process. */
0bfdf32f 546 if (pid_of (thread) == pid_of (current_thread))
09b4ad9f
UW
547 {
548 /* The actual update is done later just before resuming the lwp,
549 we just mark that the registers need updating. */
550 if (data->watch)
551 lwp->arch_private->wpts_changed[data->i] = 1;
552 else
553 lwp->arch_private->bpts_changed[data->i] = 1;
554
555 /* If the lwp isn't stopped, force it to momentarily pause, so
556 we can update its breakpoint registers. */
557 if (!lwp->stopped)
558 linux_stop_lwp (lwp);
559 }
560
561 return 0;
562}
563
802e8e6d
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564static int
565arm_supports_z_point_type (char z_type)
566{
567 switch (z_type)
568 {
569 case Z_PACKET_HW_BP:
570 case Z_PACKET_WRITE_WP:
571 case Z_PACKET_READ_WP:
572 case Z_PACKET_ACCESS_WP:
573 return 1;
574 default:
575 /* Leave the handling of sw breakpoints with the gdb client. */
576 return 0;
577 }
578}
579
09b4ad9f
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580/* Insert hardware break-/watchpoint. */
581static int
802e8e6d
PA
582arm_insert_point (enum raw_bkpt_type type, CORE_ADDR addr,
583 int len, struct raw_breakpoint *bp)
09b4ad9f
UW
584{
585 struct process_info *proc = current_process ();
586 struct arm_linux_hw_breakpoint p, *pts;
587 int watch, i, count;
588
589 watch = arm_linux_hw_point_initialize (type, addr, len, &p);
590 if (watch < 0)
591 {
592 /* Unsupported. */
b62e2b27 593 return watch == -1 ? 1 : -1;
09b4ad9f
UW
594 }
595
596 if (watch)
597 {
598 count = arm_linux_get_hw_watchpoint_count ();
fe978cb0 599 pts = proc->priv->arch_private->wpts;
09b4ad9f
UW
600 }
601 else
602 {
603 count = arm_linux_get_hw_breakpoint_count ();
fe978cb0 604 pts = proc->priv->arch_private->bpts;
09b4ad9f
UW
605 }
606
607 for (i = 0; i < count; i++)
608 if (!arm_hwbp_control_is_enabled (pts[i].control))
609 {
610 struct update_registers_data data = { watch, i };
611 pts[i] = p;
d86d4aaf 612 find_inferior (&all_threads, update_registers_callback, &data);
09b4ad9f
UW
613 return 0;
614 }
615
616 /* We're out of watchpoints. */
617 return -1;
618}
619
620/* Remove hardware break-/watchpoint. */
621static int
802e8e6d
PA
622arm_remove_point (enum raw_bkpt_type type, CORE_ADDR addr,
623 int len, struct raw_breakpoint *bp)
09b4ad9f
UW
624{
625 struct process_info *proc = current_process ();
626 struct arm_linux_hw_breakpoint p, *pts;
627 int watch, i, count;
628
629 watch = arm_linux_hw_point_initialize (type, addr, len, &p);
630 if (watch < 0)
631 {
632 /* Unsupported. */
633 return -1;
634 }
635
636 if (watch)
637 {
638 count = arm_linux_get_hw_watchpoint_count ();
fe978cb0 639 pts = proc->priv->arch_private->wpts;
09b4ad9f
UW
640 }
641 else
642 {
643 count = arm_linux_get_hw_breakpoint_count ();
fe978cb0 644 pts = proc->priv->arch_private->bpts;
09b4ad9f
UW
645 }
646
647 for (i = 0; i < count; i++)
648 if (arm_linux_hw_breakpoint_equal (&p, pts + i))
649 {
650 struct update_registers_data data = { watch, i };
651 pts[i].control = arm_hwbp_control_disable (pts[i].control);
d86d4aaf 652 find_inferior (&all_threads, update_registers_callback, &data);
09b4ad9f
UW
653 return 0;
654 }
655
656 /* No watchpoint matched. */
657 return -1;
658}
659
660/* Return whether current thread is stopped due to a watchpoint. */
661static int
662arm_stopped_by_watchpoint (void)
663{
0bfdf32f 664 struct lwp_info *lwp = get_thread_lwp (current_thread);
a5362b9a 665 siginfo_t siginfo;
09b4ad9f
UW
666
667 /* We must be able to set hardware watchpoints. */
668 if (arm_linux_get_hw_watchpoint_count () == 0)
669 return 0;
670
671 /* Retrieve siginfo. */
672 errno = 0;
0bfdf32f 673 ptrace (PTRACE_GETSIGINFO, lwpid_of (current_thread), 0, &siginfo);
09b4ad9f
UW
674 if (errno != 0)
675 return 0;
676
677 /* This must be a hardware breakpoint. */
678 if (siginfo.si_signo != SIGTRAP
679 || (siginfo.si_code & 0xffff) != 0x0004 /* TRAP_HWBKPT */)
680 return 0;
681
682 /* If we are in a positive slot then we're looking at a breakpoint and not
683 a watchpoint. */
684 if (siginfo.si_errno >= 0)
685 return 0;
686
687 /* Cache stopped data address for use by arm_stopped_data_address. */
688 lwp->arch_private->stopped_data_address
689 = (CORE_ADDR) (uintptr_t) siginfo.si_addr;
690
691 return 1;
692}
693
694/* Return data address that triggered watchpoint. Called only if
695 arm_stopped_by_watchpoint returned true. */
696static CORE_ADDR
697arm_stopped_data_address (void)
698{
0bfdf32f 699 struct lwp_info *lwp = get_thread_lwp (current_thread);
09b4ad9f
UW
700 return lwp->arch_private->stopped_data_address;
701}
702
703/* Called when a new process is created. */
704static struct arch_process_info *
705arm_new_process (void)
706{
707 struct arch_process_info *info = xcalloc (1, sizeof (*info));
708 return info;
709}
710
711/* Called when a new thread is detected. */
34c703da
GB
712static void
713arm_new_thread (struct lwp_info *lwp)
09b4ad9f
UW
714{
715 struct arch_lwp_info *info = xcalloc (1, sizeof (*info));
716 int i;
717
718 for (i = 0; i < MAX_BPTS; i++)
719 info->bpts_changed[i] = 1;
720 for (i = 0; i < MAX_WPTS; i++)
721 info->wpts_changed[i] = 1;
722
34c703da 723 lwp->arch_private = info;
09b4ad9f
UW
724}
725
3a8a0396
DB
726static void
727arm_new_fork (struct process_info *parent, struct process_info *child)
728{
61a7418c
DB
729 struct arch_process_info *parent_proc_info = parent->priv->arch_private;
730 struct arch_process_info *child_proc_info = child->priv->arch_private;
3a8a0396
DB
731 struct lwp_info *child_lwp;
732 struct arch_lwp_info *child_lwp_info;
733 int i;
734
735 /* These are allocated by linux_add_process. */
61a7418c
DB
736 gdb_assert (parent->priv != NULL
737 && parent->priv->arch_private != NULL);
738 gdb_assert (child->priv != NULL
739 && child->priv->arch_private != NULL);
3a8a0396
DB
740
741 /* Linux kernel before 2.6.33 commit
742 72f674d203cd230426437cdcf7dd6f681dad8b0d
743 will inherit hardware debug registers from parent
744 on fork/vfork/clone. Newer Linux kernels create such tasks with
745 zeroed debug registers.
746
747 GDB core assumes the child inherits the watchpoints/hw
748 breakpoints of the parent, and will remove them all from the
749 forked off process. Copy the debug registers mirrors into the
750 new process so that all breakpoints and watchpoints can be
751 removed together. The debug registers mirror will become zeroed
752 in the end before detaching the forked off process, thus making
753 this compatible with older Linux kernels too. */
754
755 *child_proc_info = *parent_proc_info;
756
757 /* Mark all the hardware breakpoints and watchpoints as changed to
758 make sure that the registers will be updated. */
759 child_lwp = find_lwp_pid (ptid_of (child));
760 child_lwp_info = child_lwp->arch_private;
761 for (i = 0; i < MAX_BPTS; i++)
762 child_lwp_info->bpts_changed[i] = 1;
763 for (i = 0; i < MAX_WPTS; i++)
764 child_lwp_info->wpts_changed[i] = 1;
765}
766
09b4ad9f
UW
767/* Called when resuming a thread.
768 If the debug regs have changed, update the thread's copies. */
769static void
770arm_prepare_to_resume (struct lwp_info *lwp)
771{
d86d4aaf
DE
772 struct thread_info *thread = get_lwp_thread (lwp);
773 int pid = lwpid_of (thread);
774 struct process_info *proc = find_process_pid (pid_of (thread));
fe978cb0 775 struct arch_process_info *proc_info = proc->priv->arch_private;
09b4ad9f
UW
776 struct arch_lwp_info *lwp_info = lwp->arch_private;
777 int i;
778
779 for (i = 0; i < arm_linux_get_hw_breakpoint_count (); i++)
780 if (lwp_info->bpts_changed[i])
781 {
782 errno = 0;
783
784 if (arm_hwbp_control_is_enabled (proc_info->bpts[i].control))
f15f9948 785 if (ptrace (PTRACE_SETHBPREGS, pid,
b8e1b30e 786 (PTRACE_TYPE_ARG3) ((i << 1) + 1),
f15f9948 787 &proc_info->bpts[i].address) < 0)
71487fd7 788 perror_with_name ("Unexpected error setting breakpoint address");
09b4ad9f
UW
789
790 if (arm_hwbp_control_is_initialized (proc_info->bpts[i].control))
f15f9948 791 if (ptrace (PTRACE_SETHBPREGS, pid,
b8e1b30e 792 (PTRACE_TYPE_ARG3) ((i << 1) + 2),
f15f9948 793 &proc_info->bpts[i].control) < 0)
71487fd7 794 perror_with_name ("Unexpected error setting breakpoint");
09b4ad9f
UW
795
796 lwp_info->bpts_changed[i] = 0;
797 }
798
799 for (i = 0; i < arm_linux_get_hw_watchpoint_count (); i++)
800 if (lwp_info->wpts_changed[i])
801 {
802 errno = 0;
803
804 if (arm_hwbp_control_is_enabled (proc_info->wpts[i].control))
f15f9948 805 if (ptrace (PTRACE_SETHBPREGS, pid,
b8e1b30e 806 (PTRACE_TYPE_ARG3) -((i << 1) + 1),
f15f9948 807 &proc_info->wpts[i].address) < 0)
71487fd7 808 perror_with_name ("Unexpected error setting watchpoint address");
09b4ad9f
UW
809
810 if (arm_hwbp_control_is_initialized (proc_info->wpts[i].control))
f15f9948 811 if (ptrace (PTRACE_SETHBPREGS, pid,
b8e1b30e 812 (PTRACE_TYPE_ARG3) -((i << 1) + 2),
f15f9948 813 &proc_info->wpts[i].control) < 0)
71487fd7 814 perror_with_name ("Unexpected error setting watchpoint");
09b4ad9f
UW
815
816 lwp_info->wpts_changed[i] = 0;
817 }
818}
819
820
58d6951d
DJ
821static int
822arm_get_hwcap (unsigned long *valp)
823{
824 unsigned char *data = alloca (8);
825 int offset = 0;
826
827 while ((*the_target->read_auxv) (offset, data, 8) == 8)
828 {
829 unsigned int *data_p = (unsigned int *)data;
830 if (data_p[0] == AT_HWCAP)
831 {
832 *valp = data_p[1];
833 return 1;
834 }
835
836 offset += 8;
837 }
838
839 *valp = 0;
840 return 0;
841}
842
3aee8918
PA
843static const struct target_desc *
844arm_read_description (void)
58d6951d 845{
0bfdf32f 846 int pid = lwpid_of (current_thread);
71487fd7
UW
847
848 /* Query hardware watchpoint/breakpoint capabilities. */
849 arm_linux_init_hwbp_cap (pid);
850
58d6951d
DJ
851 arm_hwcap = 0;
852 if (arm_get_hwcap (&arm_hwcap) == 0)
3aee8918 853 return tdesc_arm;
58d6951d
DJ
854
855 if (arm_hwcap & HWCAP_IWMMXT)
3aee8918 856 return tdesc_arm_with_iwmmxt;
58d6951d
DJ
857
858 if (arm_hwcap & HWCAP_VFP)
859 {
3aee8918 860 const struct target_desc *result;
58d6951d
DJ
861 char *buf;
862
863 /* NEON implies either no VFP, or VFPv3-D32. We only support
864 it with VFP. */
865 if (arm_hwcap & HWCAP_NEON)
3aee8918 866 result = tdesc_arm_with_neon;
58d6951d 867 else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
3aee8918 868 result = tdesc_arm_with_vfpv3;
58d6951d 869 else
3aee8918 870 result = tdesc_arm_with_vfpv2;
58d6951d
DJ
871
872 /* Now make sure that the kernel supports reading these
873 registers. Support was added in 2.6.30. */
58d6951d 874 errno = 0;
c3e8aadd 875 buf = xmalloc (32 * 8 + 4);
58d6951d
DJ
876 if (ptrace (PTRACE_GETVFPREGS, pid, 0, buf) < 0
877 && errno == EIO)
878 {
879 arm_hwcap = 0;
3aee8918 880 result = tdesc_arm;
58d6951d
DJ
881 }
882 free (buf);
883
3aee8918 884 return result;
58d6951d
DJ
885 }
886
887 /* The default configuration uses legacy FPA registers, probably
888 simulated. */
3aee8918 889 return tdesc_arm;
58d6951d
DJ
890}
891
3aee8918
PA
892static void
893arm_arch_setup (void)
894{
895 current_process ()->tdesc = arm_read_description ();
896}
897
898static struct regset_info arm_regsets[] = {
1570b33e 899 { PTRACE_GETREGS, PTRACE_SETREGS, 0, 18 * 4,
fb1e4ffc
DJ
900 GENERAL_REGS,
901 arm_fill_gregset, arm_store_gregset },
1570b33e 902 { PTRACE_GETWMMXREGS, PTRACE_SETWMMXREGS, 0, 16 * 8 + 6 * 4,
fb1e4ffc
DJ
903 EXTENDED_REGS,
904 arm_fill_wmmxregset, arm_store_wmmxregset },
1570b33e 905 { PTRACE_GETVFPREGS, PTRACE_SETVFPREGS, 0, 32 * 8 + 4,
58d6951d
DJ
906 EXTENDED_REGS,
907 arm_fill_vfpregset, arm_store_vfpregset },
1570b33e 908 { 0, 0, 0, -1, -1, NULL, NULL }
fb1e4ffc
DJ
909};
910
3aee8918
PA
911static struct regsets_info arm_regsets_info =
912 {
913 arm_regsets, /* regsets */
914 0, /* num_regsets */
915 NULL, /* disabled_regsets */
916 };
917
918static struct usrregs_info arm_usrregs_info =
919 {
920 arm_num_regs,
921 arm_regmap,
922 };
923
924static struct regs_info regs_info =
925 {
926 NULL, /* regset_bitmap */
927 &arm_usrregs_info,
928 &arm_regsets_info
929 };
930
931static const struct regs_info *
932arm_regs_info (void)
933{
934 return &regs_info;
935}
936
2ec06d2e 937struct linux_target_ops the_low_target = {
58d6951d 938 arm_arch_setup,
3aee8918 939 arm_regs_info,
2ec06d2e
DJ
940 arm_cannot_fetch_register,
941 arm_cannot_store_register,
c14dfd32 942 NULL, /* fetch_register */
0d62e5e8
DJ
943 arm_get_pc,
944 arm_set_pc,
aeb75bf5
DJ
945
946 /* Define an ARM-mode breakpoint; we only set breakpoints in the C
947 library, which is most likely to be ARM. If the kernel supports
948 clone events, we will never insert a breakpoint, so even a Thumb
949 C library will work; so will mixing EABI/non-EABI gdbserver and
950 application. */
9d1fb177 951#ifndef __ARM_EABI__
f450004a 952 (const unsigned char *) &arm_breakpoint,
9d1fb177
DJ
953#else
954 (const unsigned char *) &arm_eabi_breakpoint,
955#endif
0d62e5e8 956 arm_breakpoint_len,
3b2fc2ea 957 arm_reinsert_addr,
0d62e5e8
DJ
958 0,
959 arm_breakpoint_at,
802e8e6d 960 arm_supports_z_point_type,
09b4ad9f
UW
961 arm_insert_point,
962 arm_remove_point,
963 arm_stopped_by_watchpoint,
964 arm_stopped_data_address,
965 NULL, /* collect_ptrace_register */
966 NULL, /* supply_ptrace_register */
967 NULL, /* siginfo_fixup */
968 arm_new_process,
969 arm_new_thread,
3a8a0396 970 arm_new_fork,
09b4ad9f 971 arm_prepare_to_resume,
2ec06d2e 972};
3aee8918
PA
973
974void
975initialize_low_arch (void)
976{
977 /* Initialize the Linux target descriptions. */
978 init_registers_arm ();
979 init_registers_arm_with_iwmmxt ();
980 init_registers_arm_with_vfpv2 ();
981 init_registers_arm_with_vfpv3 ();
982 init_registers_arm_with_neon ();
983
984 initialize_regsets_info (&arm_regsets_info);
985}
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