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d0722149 DE |
1 | /* GNU/Linux/x86-64 specific low level interface, for the remote server |
2 | for GDB. | |
0b302171 | 3 | Copyright (C) 2002, 2004-2012 Free Software Foundation, Inc. |
d0722149 DE |
4 | |
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 3 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ | |
19 | ||
aa5ca48f | 20 | #include <stddef.h> |
d0722149 | 21 | #include <signal.h> |
6a271cae | 22 | #include <limits.h> |
f4647387 | 23 | #include <inttypes.h> |
d0722149 DE |
24 | #include "server.h" |
25 | #include "linux-low.h" | |
26 | #include "i387-fp.h" | |
aa5ca48f | 27 | #include "i386-low.h" |
1570b33e L |
28 | #include "i386-xstate.h" |
29 | #include "elf/common.h" | |
d0722149 DE |
30 | |
31 | #include "gdb_proc_service.h" | |
58b4daa5 | 32 | #include "agent.h" |
d0722149 | 33 | |
90884b2b | 34 | /* Defined in auto-generated file i386-linux.c. */ |
d0722149 | 35 | void init_registers_i386_linux (void); |
90884b2b L |
36 | /* Defined in auto-generated file amd64-linux.c. */ |
37 | void init_registers_amd64_linux (void); | |
1570b33e L |
38 | /* Defined in auto-generated file i386-avx-linux.c. */ |
39 | void init_registers_i386_avx_linux (void); | |
40 | /* Defined in auto-generated file amd64-avx-linux.c. */ | |
41 | void init_registers_amd64_avx_linux (void); | |
3a13a53b L |
42 | /* Defined in auto-generated file i386-mmx-linux.c. */ |
43 | void init_registers_i386_mmx_linux (void); | |
4d47af5c L |
44 | /* Defined in auto-generated file x32-linux.c. */ |
45 | void init_registers_x32_linux (void); | |
46 | /* Defined in auto-generated file x32-avx-linux.c. */ | |
47 | void init_registers_x32_avx_linux (void); | |
1570b33e | 48 | |
fa593d66 | 49 | static unsigned char jump_insn[] = { 0xe9, 0, 0, 0, 0 }; |
405f8e94 | 50 | static unsigned char small_jump_insn[] = { 0x66, 0xe9, 0, 0 }; |
fa593d66 | 51 | |
1570b33e L |
52 | /* Backward compatibility for gdb without XML support. */ |
53 | ||
54 | static const char *xmltarget_i386_linux_no_xml = "@<target>\ | |
55 | <architecture>i386</architecture>\ | |
56 | <osabi>GNU/Linux</osabi>\ | |
57 | </target>"; | |
f6d1620c L |
58 | |
59 | #ifdef __x86_64__ | |
1570b33e L |
60 | static const char *xmltarget_amd64_linux_no_xml = "@<target>\ |
61 | <architecture>i386:x86-64</architecture>\ | |
62 | <osabi>GNU/Linux</osabi>\ | |
63 | </target>"; | |
f6d1620c | 64 | #endif |
d0722149 DE |
65 | |
66 | #include <sys/reg.h> | |
67 | #include <sys/procfs.h> | |
68 | #include <sys/ptrace.h> | |
1570b33e L |
69 | #include <sys/uio.h> |
70 | ||
71 | #ifndef PTRACE_GETREGSET | |
72 | #define PTRACE_GETREGSET 0x4204 | |
73 | #endif | |
74 | ||
75 | #ifndef PTRACE_SETREGSET | |
76 | #define PTRACE_SETREGSET 0x4205 | |
77 | #endif | |
78 | ||
d0722149 DE |
79 | |
80 | #ifndef PTRACE_GET_THREAD_AREA | |
81 | #define PTRACE_GET_THREAD_AREA 25 | |
82 | #endif | |
83 | ||
84 | /* This definition comes from prctl.h, but some kernels may not have it. */ | |
85 | #ifndef PTRACE_ARCH_PRCTL | |
86 | #define PTRACE_ARCH_PRCTL 30 | |
87 | #endif | |
88 | ||
89 | /* The following definitions come from prctl.h, but may be absent | |
90 | for certain configurations. */ | |
91 | #ifndef ARCH_GET_FS | |
92 | #define ARCH_SET_GS 0x1001 | |
93 | #define ARCH_SET_FS 0x1002 | |
94 | #define ARCH_GET_FS 0x1003 | |
95 | #define ARCH_GET_GS 0x1004 | |
96 | #endif | |
97 | ||
aa5ca48f DE |
98 | /* Per-process arch-specific data we want to keep. */ |
99 | ||
100 | struct arch_process_info | |
101 | { | |
102 | struct i386_debug_reg_state debug_reg_state; | |
103 | }; | |
104 | ||
105 | /* Per-thread arch-specific data we want to keep. */ | |
106 | ||
107 | struct arch_lwp_info | |
108 | { | |
109 | /* Non-zero if our copy differs from what's recorded in the thread. */ | |
110 | int debug_registers_changed; | |
111 | }; | |
112 | ||
d0722149 DE |
113 | #ifdef __x86_64__ |
114 | ||
115 | /* Mapping between the general-purpose registers in `struct user' | |
116 | format and GDB's register array layout. | |
117 | Note that the transfer layout uses 64-bit regs. */ | |
118 | static /*const*/ int i386_regmap[] = | |
119 | { | |
120 | RAX * 8, RCX * 8, RDX * 8, RBX * 8, | |
121 | RSP * 8, RBP * 8, RSI * 8, RDI * 8, | |
122 | RIP * 8, EFLAGS * 8, CS * 8, SS * 8, | |
123 | DS * 8, ES * 8, FS * 8, GS * 8 | |
124 | }; | |
125 | ||
126 | #define I386_NUM_REGS (sizeof (i386_regmap) / sizeof (i386_regmap[0])) | |
127 | ||
128 | /* So code below doesn't have to care, i386 or amd64. */ | |
129 | #define ORIG_EAX ORIG_RAX | |
130 | ||
131 | static const int x86_64_regmap[] = | |
132 | { | |
133 | RAX * 8, RBX * 8, RCX * 8, RDX * 8, | |
134 | RSI * 8, RDI * 8, RBP * 8, RSP * 8, | |
135 | R8 * 8, R9 * 8, R10 * 8, R11 * 8, | |
136 | R12 * 8, R13 * 8, R14 * 8, R15 * 8, | |
137 | RIP * 8, EFLAGS * 8, CS * 8, SS * 8, | |
138 | DS * 8, ES * 8, FS * 8, GS * 8, | |
139 | -1, -1, -1, -1, -1, -1, -1, -1, | |
140 | -1, -1, -1, -1, -1, -1, -1, -1, | |
141 | -1, -1, -1, -1, -1, -1, -1, -1, | |
142 | -1, -1, -1, -1, -1, -1, -1, -1, -1, | |
143 | ORIG_RAX * 8 | |
144 | }; | |
145 | ||
146 | #define X86_64_NUM_REGS (sizeof (x86_64_regmap) / sizeof (x86_64_regmap[0])) | |
147 | ||
148 | #else /* ! __x86_64__ */ | |
149 | ||
150 | /* Mapping between the general-purpose registers in `struct user' | |
151 | format and GDB's register array layout. */ | |
152 | static /*const*/ int i386_regmap[] = | |
153 | { | |
154 | EAX * 4, ECX * 4, EDX * 4, EBX * 4, | |
155 | UESP * 4, EBP * 4, ESI * 4, EDI * 4, | |
156 | EIP * 4, EFL * 4, CS * 4, SS * 4, | |
157 | DS * 4, ES * 4, FS * 4, GS * 4 | |
158 | }; | |
159 | ||
160 | #define I386_NUM_REGS (sizeof (i386_regmap) / sizeof (i386_regmap[0])) | |
161 | ||
162 | #endif | |
163 | \f | |
164 | /* Called by libthread_db. */ | |
165 | ||
166 | ps_err_e | |
167 | ps_get_thread_area (const struct ps_prochandle *ph, | |
168 | lwpid_t lwpid, int idx, void **base) | |
169 | { | |
170 | #ifdef __x86_64__ | |
171 | int use_64bit = register_size (0) == 8; | |
172 | ||
173 | if (use_64bit) | |
174 | { | |
175 | switch (idx) | |
176 | { | |
177 | case FS: | |
178 | if (ptrace (PTRACE_ARCH_PRCTL, lwpid, base, ARCH_GET_FS) == 0) | |
179 | return PS_OK; | |
180 | break; | |
181 | case GS: | |
182 | if (ptrace (PTRACE_ARCH_PRCTL, lwpid, base, ARCH_GET_GS) == 0) | |
183 | return PS_OK; | |
184 | break; | |
185 | default: | |
186 | return PS_BADADDR; | |
187 | } | |
188 | return PS_ERR; | |
189 | } | |
190 | #endif | |
191 | ||
192 | { | |
193 | unsigned int desc[4]; | |
194 | ||
195 | if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, | |
196 | (void *) (intptr_t) idx, (unsigned long) &desc) < 0) | |
197 | return PS_ERR; | |
198 | ||
199 | *(int *)base = desc[1]; | |
200 | return PS_OK; | |
201 | } | |
202 | } | |
fa593d66 PA |
203 | |
204 | /* Get the thread area address. This is used to recognize which | |
205 | thread is which when tracing with the in-process agent library. We | |
206 | don't read anything from the address, and treat it as opaque; it's | |
207 | the address itself that we assume is unique per-thread. */ | |
208 | ||
209 | static int | |
210 | x86_get_thread_area (int lwpid, CORE_ADDR *addr) | |
211 | { | |
212 | #ifdef __x86_64__ | |
213 | int use_64bit = register_size (0) == 8; | |
214 | ||
215 | if (use_64bit) | |
216 | { | |
217 | void *base; | |
218 | if (ptrace (PTRACE_ARCH_PRCTL, lwpid, &base, ARCH_GET_FS) == 0) | |
219 | { | |
220 | *addr = (CORE_ADDR) (uintptr_t) base; | |
221 | return 0; | |
222 | } | |
223 | ||
224 | return -1; | |
225 | } | |
226 | #endif | |
227 | ||
228 | { | |
229 | struct lwp_info *lwp = find_lwp_pid (pid_to_ptid (lwpid)); | |
230 | struct regcache *regcache = get_thread_regcache (get_lwp_thread (lwp), 1); | |
231 | unsigned int desc[4]; | |
232 | ULONGEST gs = 0; | |
233 | const int reg_thread_area = 3; /* bits to scale down register value. */ | |
234 | int idx; | |
235 | ||
236 | collect_register_by_name (regcache, "gs", &gs); | |
237 | ||
238 | idx = gs >> reg_thread_area; | |
239 | ||
240 | if (ptrace (PTRACE_GET_THREAD_AREA, | |
493e2a69 MS |
241 | lwpid_of (lwp), |
242 | (void *) (long) idx, (unsigned long) &desc) < 0) | |
fa593d66 PA |
243 | return -1; |
244 | ||
245 | *addr = desc[1]; | |
246 | return 0; | |
247 | } | |
248 | } | |
249 | ||
250 | ||
d0722149 DE |
251 | \f |
252 | static int | |
253 | i386_cannot_store_register (int regno) | |
254 | { | |
255 | return regno >= I386_NUM_REGS; | |
256 | } | |
257 | ||
258 | static int | |
259 | i386_cannot_fetch_register (int regno) | |
260 | { | |
261 | return regno >= I386_NUM_REGS; | |
262 | } | |
263 | ||
264 | static void | |
442ea881 | 265 | x86_fill_gregset (struct regcache *regcache, void *buf) |
d0722149 DE |
266 | { |
267 | int i; | |
268 | ||
269 | #ifdef __x86_64__ | |
270 | if (register_size (0) == 8) | |
271 | { | |
272 | for (i = 0; i < X86_64_NUM_REGS; i++) | |
273 | if (x86_64_regmap[i] != -1) | |
442ea881 | 274 | collect_register (regcache, i, ((char *) buf) + x86_64_regmap[i]); |
d0722149 DE |
275 | return; |
276 | } | |
277 | #endif | |
278 | ||
279 | for (i = 0; i < I386_NUM_REGS; i++) | |
442ea881 | 280 | collect_register (regcache, i, ((char *) buf) + i386_regmap[i]); |
d0722149 | 281 | |
442ea881 PA |
282 | collect_register_by_name (regcache, "orig_eax", |
283 | ((char *) buf) + ORIG_EAX * 4); | |
d0722149 DE |
284 | } |
285 | ||
286 | static void | |
442ea881 | 287 | x86_store_gregset (struct regcache *regcache, const void *buf) |
d0722149 DE |
288 | { |
289 | int i; | |
290 | ||
291 | #ifdef __x86_64__ | |
292 | if (register_size (0) == 8) | |
293 | { | |
294 | for (i = 0; i < X86_64_NUM_REGS; i++) | |
295 | if (x86_64_regmap[i] != -1) | |
442ea881 | 296 | supply_register (regcache, i, ((char *) buf) + x86_64_regmap[i]); |
d0722149 DE |
297 | return; |
298 | } | |
299 | #endif | |
300 | ||
301 | for (i = 0; i < I386_NUM_REGS; i++) | |
442ea881 | 302 | supply_register (regcache, i, ((char *) buf) + i386_regmap[i]); |
d0722149 | 303 | |
442ea881 PA |
304 | supply_register_by_name (regcache, "orig_eax", |
305 | ((char *) buf) + ORIG_EAX * 4); | |
d0722149 DE |
306 | } |
307 | ||
308 | static void | |
442ea881 | 309 | x86_fill_fpregset (struct regcache *regcache, void *buf) |
d0722149 DE |
310 | { |
311 | #ifdef __x86_64__ | |
442ea881 | 312 | i387_cache_to_fxsave (regcache, buf); |
d0722149 | 313 | #else |
442ea881 | 314 | i387_cache_to_fsave (regcache, buf); |
d0722149 DE |
315 | #endif |
316 | } | |
317 | ||
318 | static void | |
442ea881 | 319 | x86_store_fpregset (struct regcache *regcache, const void *buf) |
d0722149 DE |
320 | { |
321 | #ifdef __x86_64__ | |
442ea881 | 322 | i387_fxsave_to_cache (regcache, buf); |
d0722149 | 323 | #else |
442ea881 | 324 | i387_fsave_to_cache (regcache, buf); |
d0722149 DE |
325 | #endif |
326 | } | |
327 | ||
328 | #ifndef __x86_64__ | |
329 | ||
330 | static void | |
442ea881 | 331 | x86_fill_fpxregset (struct regcache *regcache, void *buf) |
d0722149 | 332 | { |
442ea881 | 333 | i387_cache_to_fxsave (regcache, buf); |
d0722149 DE |
334 | } |
335 | ||
336 | static void | |
442ea881 | 337 | x86_store_fpxregset (struct regcache *regcache, const void *buf) |
d0722149 | 338 | { |
442ea881 | 339 | i387_fxsave_to_cache (regcache, buf); |
d0722149 DE |
340 | } |
341 | ||
342 | #endif | |
343 | ||
1570b33e L |
344 | static void |
345 | x86_fill_xstateregset (struct regcache *regcache, void *buf) | |
346 | { | |
347 | i387_cache_to_xsave (regcache, buf); | |
348 | } | |
349 | ||
350 | static void | |
351 | x86_store_xstateregset (struct regcache *regcache, const void *buf) | |
352 | { | |
353 | i387_xsave_to_cache (regcache, buf); | |
354 | } | |
355 | ||
d0722149 DE |
356 | /* ??? The non-biarch i386 case stores all the i387 regs twice. |
357 | Once in i387_.*fsave.* and once in i387_.*fxsave.*. | |
358 | This is, presumably, to handle the case where PTRACE_[GS]ETFPXREGS | |
359 | doesn't work. IWBN to avoid the duplication in the case where it | |
360 | does work. Maybe the arch_setup routine could check whether it works | |
361 | and update target_regsets accordingly, maybe by moving target_regsets | |
362 | to linux_target_ops and set the right one there, rather than having to | |
363 | modify the target_regsets global. */ | |
364 | ||
365 | struct regset_info target_regsets[] = | |
366 | { | |
367 | #ifdef HAVE_PTRACE_GETREGS | |
1570b33e | 368 | { PTRACE_GETREGS, PTRACE_SETREGS, 0, sizeof (elf_gregset_t), |
d0722149 DE |
369 | GENERAL_REGS, |
370 | x86_fill_gregset, x86_store_gregset }, | |
1570b33e L |
371 | { PTRACE_GETREGSET, PTRACE_SETREGSET, NT_X86_XSTATE, 0, |
372 | EXTENDED_REGS, x86_fill_xstateregset, x86_store_xstateregset }, | |
d0722149 DE |
373 | # ifndef __x86_64__ |
374 | # ifdef HAVE_PTRACE_GETFPXREGS | |
1570b33e | 375 | { PTRACE_GETFPXREGS, PTRACE_SETFPXREGS, 0, sizeof (elf_fpxregset_t), |
d0722149 DE |
376 | EXTENDED_REGS, |
377 | x86_fill_fpxregset, x86_store_fpxregset }, | |
378 | # endif | |
379 | # endif | |
1570b33e | 380 | { PTRACE_GETFPREGS, PTRACE_SETFPREGS, 0, sizeof (elf_fpregset_t), |
d0722149 DE |
381 | FP_REGS, |
382 | x86_fill_fpregset, x86_store_fpregset }, | |
383 | #endif /* HAVE_PTRACE_GETREGS */ | |
1570b33e | 384 | { 0, 0, 0, -1, -1, NULL, NULL } |
d0722149 DE |
385 | }; |
386 | ||
387 | static CORE_ADDR | |
442ea881 | 388 | x86_get_pc (struct regcache *regcache) |
d0722149 DE |
389 | { |
390 | int use_64bit = register_size (0) == 8; | |
391 | ||
392 | if (use_64bit) | |
393 | { | |
394 | unsigned long pc; | |
442ea881 | 395 | collect_register_by_name (regcache, "rip", &pc); |
d0722149 DE |
396 | return (CORE_ADDR) pc; |
397 | } | |
398 | else | |
399 | { | |
400 | unsigned int pc; | |
442ea881 | 401 | collect_register_by_name (regcache, "eip", &pc); |
d0722149 DE |
402 | return (CORE_ADDR) pc; |
403 | } | |
404 | } | |
405 | ||
406 | static void | |
442ea881 | 407 | x86_set_pc (struct regcache *regcache, CORE_ADDR pc) |
d0722149 DE |
408 | { |
409 | int use_64bit = register_size (0) == 8; | |
410 | ||
411 | if (use_64bit) | |
412 | { | |
413 | unsigned long newpc = pc; | |
442ea881 | 414 | supply_register_by_name (regcache, "rip", &newpc); |
d0722149 DE |
415 | } |
416 | else | |
417 | { | |
418 | unsigned int newpc = pc; | |
442ea881 | 419 | supply_register_by_name (regcache, "eip", &newpc); |
d0722149 DE |
420 | } |
421 | } | |
422 | \f | |
423 | static const unsigned char x86_breakpoint[] = { 0xCC }; | |
424 | #define x86_breakpoint_len 1 | |
425 | ||
426 | static int | |
427 | x86_breakpoint_at (CORE_ADDR pc) | |
428 | { | |
429 | unsigned char c; | |
430 | ||
fc7238bb | 431 | (*the_target->read_memory) (pc, &c, 1); |
d0722149 DE |
432 | if (c == 0xCC) |
433 | return 1; | |
434 | ||
435 | return 0; | |
436 | } | |
437 | \f | |
aa5ca48f DE |
438 | /* Support for debug registers. */ |
439 | ||
440 | static unsigned long | |
441 | x86_linux_dr_get (ptid_t ptid, int regnum) | |
442 | { | |
443 | int tid; | |
444 | unsigned long value; | |
445 | ||
446 | tid = ptid_get_lwp (ptid); | |
447 | ||
448 | errno = 0; | |
449 | value = ptrace (PTRACE_PEEKUSER, tid, | |
450 | offsetof (struct user, u_debugreg[regnum]), 0); | |
451 | if (errno != 0) | |
452 | error ("Couldn't read debug register"); | |
453 | ||
454 | return value; | |
455 | } | |
456 | ||
457 | static void | |
458 | x86_linux_dr_set (ptid_t ptid, int regnum, unsigned long value) | |
459 | { | |
460 | int tid; | |
461 | ||
462 | tid = ptid_get_lwp (ptid); | |
463 | ||
464 | errno = 0; | |
465 | ptrace (PTRACE_POKEUSER, tid, | |
466 | offsetof (struct user, u_debugreg[regnum]), value); | |
467 | if (errno != 0) | |
468 | error ("Couldn't write debug register"); | |
469 | } | |
470 | ||
964e4306 PA |
471 | static int |
472 | update_debug_registers_callback (struct inferior_list_entry *entry, | |
473 | void *pid_p) | |
474 | { | |
475 | struct lwp_info *lwp = (struct lwp_info *) entry; | |
476 | int pid = *(int *) pid_p; | |
477 | ||
478 | /* Only update the threads of this process. */ | |
479 | if (pid_of (lwp) == pid) | |
480 | { | |
481 | /* The actual update is done later just before resuming the lwp, | |
482 | we just mark that the registers need updating. */ | |
483 | lwp->arch_private->debug_registers_changed = 1; | |
484 | ||
485 | /* If the lwp isn't stopped, force it to momentarily pause, so | |
486 | we can update its debug registers. */ | |
487 | if (!lwp->stopped) | |
488 | linux_stop_lwp (lwp); | |
489 | } | |
490 | ||
491 | return 0; | |
492 | } | |
493 | ||
aa5ca48f DE |
494 | /* Update the inferior's debug register REGNUM from STATE. */ |
495 | ||
496 | void | |
497 | i386_dr_low_set_addr (const struct i386_debug_reg_state *state, int regnum) | |
498 | { | |
964e4306 | 499 | /* Only update the threads of this process. */ |
aa5ca48f DE |
500 | int pid = pid_of (get_thread_lwp (current_inferior)); |
501 | ||
502 | if (! (regnum >= 0 && regnum <= DR_LASTADDR - DR_FIRSTADDR)) | |
503 | fatal ("Invalid debug register %d", regnum); | |
504 | ||
964e4306 PA |
505 | find_inferior (&all_lwps, update_debug_registers_callback, &pid); |
506 | } | |
aa5ca48f | 507 | |
964e4306 | 508 | /* Return the inferior's debug register REGNUM. */ |
aa5ca48f | 509 | |
964e4306 PA |
510 | CORE_ADDR |
511 | i386_dr_low_get_addr (int regnum) | |
512 | { | |
513 | struct lwp_info *lwp = get_thread_lwp (current_inferior); | |
514 | ptid_t ptid = ptid_of (lwp); | |
515 | ||
516 | /* DR6 and DR7 are retrieved with some other way. */ | |
0a5b1e09 | 517 | gdb_assert (DR_FIRSTADDR <= regnum && regnum <= DR_LASTADDR); |
964e4306 PA |
518 | |
519 | return x86_linux_dr_get (ptid, regnum); | |
aa5ca48f DE |
520 | } |
521 | ||
522 | /* Update the inferior's DR7 debug control register from STATE. */ | |
523 | ||
524 | void | |
525 | i386_dr_low_set_control (const struct i386_debug_reg_state *state) | |
526 | { | |
964e4306 | 527 | /* Only update the threads of this process. */ |
aa5ca48f DE |
528 | int pid = pid_of (get_thread_lwp (current_inferior)); |
529 | ||
964e4306 PA |
530 | find_inferior (&all_lwps, update_debug_registers_callback, &pid); |
531 | } | |
aa5ca48f | 532 | |
964e4306 PA |
533 | /* Return the inferior's DR7 debug control register. */ |
534 | ||
535 | unsigned | |
536 | i386_dr_low_get_control (void) | |
537 | { | |
538 | struct lwp_info *lwp = get_thread_lwp (current_inferior); | |
539 | ptid_t ptid = ptid_of (lwp); | |
540 | ||
541 | return x86_linux_dr_get (ptid, DR_CONTROL); | |
aa5ca48f DE |
542 | } |
543 | ||
544 | /* Get the value of the DR6 debug status register from the inferior | |
545 | and record it in STATE. */ | |
546 | ||
964e4306 PA |
547 | unsigned |
548 | i386_dr_low_get_status (void) | |
aa5ca48f DE |
549 | { |
550 | struct lwp_info *lwp = get_thread_lwp (current_inferior); | |
551 | ptid_t ptid = ptid_of (lwp); | |
552 | ||
964e4306 | 553 | return x86_linux_dr_get (ptid, DR_STATUS); |
aa5ca48f DE |
554 | } |
555 | \f | |
90d74c30 | 556 | /* Breakpoint/Watchpoint support. */ |
aa5ca48f DE |
557 | |
558 | static int | |
559 | x86_insert_point (char type, CORE_ADDR addr, int len) | |
560 | { | |
561 | struct process_info *proc = current_process (); | |
562 | switch (type) | |
563 | { | |
8b07ae33 | 564 | case '0': |
90d74c30 PA |
565 | { |
566 | int ret; | |
567 | ||
568 | ret = prepare_to_access_memory (); | |
569 | if (ret) | |
570 | return -1; | |
571 | ret = set_gdb_breakpoint_at (addr); | |
0146f85b | 572 | done_accessing_memory (); |
90d74c30 PA |
573 | return ret; |
574 | } | |
aa5ca48f DE |
575 | case '2': |
576 | case '3': | |
577 | case '4': | |
578 | return i386_low_insert_watchpoint (&proc->private->arch_private->debug_reg_state, | |
579 | type, addr, len); | |
580 | default: | |
581 | /* Unsupported. */ | |
582 | return 1; | |
583 | } | |
584 | } | |
585 | ||
586 | static int | |
587 | x86_remove_point (char type, CORE_ADDR addr, int len) | |
588 | { | |
589 | struct process_info *proc = current_process (); | |
590 | switch (type) | |
591 | { | |
8b07ae33 | 592 | case '0': |
90d74c30 PA |
593 | { |
594 | int ret; | |
595 | ||
596 | ret = prepare_to_access_memory (); | |
597 | if (ret) | |
598 | return -1; | |
599 | ret = delete_gdb_breakpoint_at (addr); | |
0146f85b | 600 | done_accessing_memory (); |
90d74c30 PA |
601 | return ret; |
602 | } | |
aa5ca48f DE |
603 | case '2': |
604 | case '3': | |
605 | case '4': | |
606 | return i386_low_remove_watchpoint (&proc->private->arch_private->debug_reg_state, | |
607 | type, addr, len); | |
608 | default: | |
609 | /* Unsupported. */ | |
610 | return 1; | |
611 | } | |
612 | } | |
613 | ||
614 | static int | |
615 | x86_stopped_by_watchpoint (void) | |
616 | { | |
617 | struct process_info *proc = current_process (); | |
618 | return i386_low_stopped_by_watchpoint (&proc->private->arch_private->debug_reg_state); | |
619 | } | |
620 | ||
621 | static CORE_ADDR | |
622 | x86_stopped_data_address (void) | |
623 | { | |
624 | struct process_info *proc = current_process (); | |
625 | CORE_ADDR addr; | |
626 | if (i386_low_stopped_data_address (&proc->private->arch_private->debug_reg_state, | |
627 | &addr)) | |
628 | return addr; | |
629 | return 0; | |
630 | } | |
631 | \f | |
632 | /* Called when a new process is created. */ | |
633 | ||
634 | static struct arch_process_info * | |
635 | x86_linux_new_process (void) | |
636 | { | |
637 | struct arch_process_info *info = xcalloc (1, sizeof (*info)); | |
638 | ||
639 | i386_low_init_dregs (&info->debug_reg_state); | |
640 | ||
641 | return info; | |
642 | } | |
643 | ||
644 | /* Called when a new thread is detected. */ | |
645 | ||
646 | static struct arch_lwp_info * | |
647 | x86_linux_new_thread (void) | |
648 | { | |
649 | struct arch_lwp_info *info = xcalloc (1, sizeof (*info)); | |
650 | ||
651 | info->debug_registers_changed = 1; | |
652 | ||
653 | return info; | |
654 | } | |
655 | ||
656 | /* Called when resuming a thread. | |
657 | If the debug regs have changed, update the thread's copies. */ | |
658 | ||
659 | static void | |
660 | x86_linux_prepare_to_resume (struct lwp_info *lwp) | |
661 | { | |
b9a881c2 | 662 | ptid_t ptid = ptid_of (lwp); |
6210a125 | 663 | int clear_status = 0; |
b9a881c2 | 664 | |
aa5ca48f DE |
665 | if (lwp->arch_private->debug_registers_changed) |
666 | { | |
667 | int i; | |
aa5ca48f DE |
668 | int pid = ptid_get_pid (ptid); |
669 | struct process_info *proc = find_process_pid (pid); | |
493e2a69 MS |
670 | struct i386_debug_reg_state *state |
671 | = &proc->private->arch_private->debug_reg_state; | |
aa5ca48f DE |
672 | |
673 | for (i = DR_FIRSTADDR; i <= DR_LASTADDR; i++) | |
6210a125 PA |
674 | if (state->dr_ref_count[i] > 0) |
675 | { | |
676 | x86_linux_dr_set (ptid, i, state->dr_mirror[i]); | |
677 | ||
678 | /* If we're setting a watchpoint, any change the inferior | |
679 | had done itself to the debug registers needs to be | |
680 | discarded, otherwise, i386_low_stopped_data_address can | |
681 | get confused. */ | |
682 | clear_status = 1; | |
683 | } | |
aa5ca48f DE |
684 | |
685 | x86_linux_dr_set (ptid, DR_CONTROL, state->dr_control_mirror); | |
686 | ||
687 | lwp->arch_private->debug_registers_changed = 0; | |
688 | } | |
b9a881c2 | 689 | |
6210a125 | 690 | if (clear_status || lwp->stopped_by_watchpoint) |
b9a881c2 | 691 | x86_linux_dr_set (ptid, DR_STATUS, 0); |
aa5ca48f DE |
692 | } |
693 | \f | |
d0722149 DE |
694 | /* When GDBSERVER is built as a 64-bit application on linux, the |
695 | PTRACE_GETSIGINFO data is always presented in 64-bit layout. Since | |
696 | debugging a 32-bit inferior with a 64-bit GDBSERVER should look the same | |
697 | as debugging it with a 32-bit GDBSERVER, we do the 32-bit <-> 64-bit | |
698 | conversion in-place ourselves. */ | |
699 | ||
700 | /* These types below (compat_*) define a siginfo type that is layout | |
701 | compatible with the siginfo type exported by the 32-bit userspace | |
702 | support. */ | |
703 | ||
704 | #ifdef __x86_64__ | |
705 | ||
706 | typedef int compat_int_t; | |
707 | typedef unsigned int compat_uptr_t; | |
708 | ||
709 | typedef int compat_time_t; | |
710 | typedef int compat_timer_t; | |
711 | typedef int compat_clock_t; | |
712 | ||
713 | struct compat_timeval | |
714 | { | |
715 | compat_time_t tv_sec; | |
716 | int tv_usec; | |
717 | }; | |
718 | ||
719 | typedef union compat_sigval | |
720 | { | |
721 | compat_int_t sival_int; | |
722 | compat_uptr_t sival_ptr; | |
723 | } compat_sigval_t; | |
724 | ||
725 | typedef struct compat_siginfo | |
726 | { | |
727 | int si_signo; | |
728 | int si_errno; | |
729 | int si_code; | |
730 | ||
731 | union | |
732 | { | |
733 | int _pad[((128 / sizeof (int)) - 3)]; | |
734 | ||
735 | /* kill() */ | |
736 | struct | |
737 | { | |
738 | unsigned int _pid; | |
739 | unsigned int _uid; | |
740 | } _kill; | |
741 | ||
742 | /* POSIX.1b timers */ | |
743 | struct | |
744 | { | |
745 | compat_timer_t _tid; | |
746 | int _overrun; | |
747 | compat_sigval_t _sigval; | |
748 | } _timer; | |
749 | ||
750 | /* POSIX.1b signals */ | |
751 | struct | |
752 | { | |
753 | unsigned int _pid; | |
754 | unsigned int _uid; | |
755 | compat_sigval_t _sigval; | |
756 | } _rt; | |
757 | ||
758 | /* SIGCHLD */ | |
759 | struct | |
760 | { | |
761 | unsigned int _pid; | |
762 | unsigned int _uid; | |
763 | int _status; | |
764 | compat_clock_t _utime; | |
765 | compat_clock_t _stime; | |
766 | } _sigchld; | |
767 | ||
768 | /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */ | |
769 | struct | |
770 | { | |
771 | unsigned int _addr; | |
772 | } _sigfault; | |
773 | ||
774 | /* SIGPOLL */ | |
775 | struct | |
776 | { | |
777 | int _band; | |
778 | int _fd; | |
779 | } _sigpoll; | |
780 | } _sifields; | |
781 | } compat_siginfo_t; | |
782 | ||
c92b5177 L |
783 | /* For x32, clock_t in _sigchld is 64bit aligned at 4 bytes. */ |
784 | typedef long __attribute__ ((__aligned__ (4))) compat_x32_clock_t; | |
785 | ||
786 | typedef struct compat_x32_siginfo | |
787 | { | |
788 | int si_signo; | |
789 | int si_errno; | |
790 | int si_code; | |
791 | ||
792 | union | |
793 | { | |
794 | int _pad[((128 / sizeof (int)) - 3)]; | |
795 | ||
796 | /* kill() */ | |
797 | struct | |
798 | { | |
799 | unsigned int _pid; | |
800 | unsigned int _uid; | |
801 | } _kill; | |
802 | ||
803 | /* POSIX.1b timers */ | |
804 | struct | |
805 | { | |
806 | compat_timer_t _tid; | |
807 | int _overrun; | |
808 | compat_sigval_t _sigval; | |
809 | } _timer; | |
810 | ||
811 | /* POSIX.1b signals */ | |
812 | struct | |
813 | { | |
814 | unsigned int _pid; | |
815 | unsigned int _uid; | |
816 | compat_sigval_t _sigval; | |
817 | } _rt; | |
818 | ||
819 | /* SIGCHLD */ | |
820 | struct | |
821 | { | |
822 | unsigned int _pid; | |
823 | unsigned int _uid; | |
824 | int _status; | |
825 | compat_x32_clock_t _utime; | |
826 | compat_x32_clock_t _stime; | |
827 | } _sigchld; | |
828 | ||
829 | /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */ | |
830 | struct | |
831 | { | |
832 | unsigned int _addr; | |
833 | } _sigfault; | |
834 | ||
835 | /* SIGPOLL */ | |
836 | struct | |
837 | { | |
838 | int _band; | |
839 | int _fd; | |
840 | } _sigpoll; | |
841 | } _sifields; | |
842 | } compat_x32_siginfo_t __attribute__ ((__aligned__ (8))); | |
843 | ||
d0722149 DE |
844 | #define cpt_si_pid _sifields._kill._pid |
845 | #define cpt_si_uid _sifields._kill._uid | |
846 | #define cpt_si_timerid _sifields._timer._tid | |
847 | #define cpt_si_overrun _sifields._timer._overrun | |
848 | #define cpt_si_status _sifields._sigchld._status | |
849 | #define cpt_si_utime _sifields._sigchld._utime | |
850 | #define cpt_si_stime _sifields._sigchld._stime | |
851 | #define cpt_si_ptr _sifields._rt._sigval.sival_ptr | |
852 | #define cpt_si_addr _sifields._sigfault._addr | |
853 | #define cpt_si_band _sifields._sigpoll._band | |
854 | #define cpt_si_fd _sifields._sigpoll._fd | |
855 | ||
856 | /* glibc at least up to 2.3.2 doesn't have si_timerid, si_overrun. | |
857 | In their place is si_timer1,si_timer2. */ | |
858 | #ifndef si_timerid | |
859 | #define si_timerid si_timer1 | |
860 | #endif | |
861 | #ifndef si_overrun | |
862 | #define si_overrun si_timer2 | |
863 | #endif | |
864 | ||
865 | static void | |
866 | compat_siginfo_from_siginfo (compat_siginfo_t *to, siginfo_t *from) | |
867 | { | |
868 | memset (to, 0, sizeof (*to)); | |
869 | ||
870 | to->si_signo = from->si_signo; | |
871 | to->si_errno = from->si_errno; | |
872 | to->si_code = from->si_code; | |
873 | ||
b53a1623 | 874 | if (to->si_code == SI_TIMER) |
d0722149 | 875 | { |
b53a1623 PA |
876 | to->cpt_si_timerid = from->si_timerid; |
877 | to->cpt_si_overrun = from->si_overrun; | |
d0722149 DE |
878 | to->cpt_si_ptr = (intptr_t) from->si_ptr; |
879 | } | |
880 | else if (to->si_code == SI_USER) | |
881 | { | |
882 | to->cpt_si_pid = from->si_pid; | |
883 | to->cpt_si_uid = from->si_uid; | |
884 | } | |
b53a1623 | 885 | else if (to->si_code < 0) |
d0722149 | 886 | { |
b53a1623 PA |
887 | to->cpt_si_pid = from->si_pid; |
888 | to->cpt_si_uid = from->si_uid; | |
d0722149 DE |
889 | to->cpt_si_ptr = (intptr_t) from->si_ptr; |
890 | } | |
891 | else | |
892 | { | |
893 | switch (to->si_signo) | |
894 | { | |
895 | case SIGCHLD: | |
896 | to->cpt_si_pid = from->si_pid; | |
897 | to->cpt_si_uid = from->si_uid; | |
898 | to->cpt_si_status = from->si_status; | |
899 | to->cpt_si_utime = from->si_utime; | |
900 | to->cpt_si_stime = from->si_stime; | |
901 | break; | |
902 | case SIGILL: | |
903 | case SIGFPE: | |
904 | case SIGSEGV: | |
905 | case SIGBUS: | |
906 | to->cpt_si_addr = (intptr_t) from->si_addr; | |
907 | break; | |
908 | case SIGPOLL: | |
909 | to->cpt_si_band = from->si_band; | |
910 | to->cpt_si_fd = from->si_fd; | |
911 | break; | |
912 | default: | |
913 | to->cpt_si_pid = from->si_pid; | |
914 | to->cpt_si_uid = from->si_uid; | |
915 | to->cpt_si_ptr = (intptr_t) from->si_ptr; | |
916 | break; | |
917 | } | |
918 | } | |
919 | } | |
920 | ||
921 | static void | |
922 | siginfo_from_compat_siginfo (siginfo_t *to, compat_siginfo_t *from) | |
923 | { | |
924 | memset (to, 0, sizeof (*to)); | |
925 | ||
926 | to->si_signo = from->si_signo; | |
927 | to->si_errno = from->si_errno; | |
928 | to->si_code = from->si_code; | |
929 | ||
b53a1623 | 930 | if (to->si_code == SI_TIMER) |
d0722149 | 931 | { |
b53a1623 PA |
932 | to->si_timerid = from->cpt_si_timerid; |
933 | to->si_overrun = from->cpt_si_overrun; | |
d0722149 DE |
934 | to->si_ptr = (void *) (intptr_t) from->cpt_si_ptr; |
935 | } | |
936 | else if (to->si_code == SI_USER) | |
937 | { | |
938 | to->si_pid = from->cpt_si_pid; | |
939 | to->si_uid = from->cpt_si_uid; | |
940 | } | |
b53a1623 | 941 | else if (to->si_code < 0) |
d0722149 | 942 | { |
b53a1623 PA |
943 | to->si_pid = from->cpt_si_pid; |
944 | to->si_uid = from->cpt_si_uid; | |
d0722149 DE |
945 | to->si_ptr = (void *) (intptr_t) from->cpt_si_ptr; |
946 | } | |
947 | else | |
948 | { | |
949 | switch (to->si_signo) | |
950 | { | |
951 | case SIGCHLD: | |
952 | to->si_pid = from->cpt_si_pid; | |
953 | to->si_uid = from->cpt_si_uid; | |
954 | to->si_status = from->cpt_si_status; | |
955 | to->si_utime = from->cpt_si_utime; | |
956 | to->si_stime = from->cpt_si_stime; | |
957 | break; | |
958 | case SIGILL: | |
959 | case SIGFPE: | |
960 | case SIGSEGV: | |
961 | case SIGBUS: | |
962 | to->si_addr = (void *) (intptr_t) from->cpt_si_addr; | |
963 | break; | |
964 | case SIGPOLL: | |
965 | to->si_band = from->cpt_si_band; | |
966 | to->si_fd = from->cpt_si_fd; | |
967 | break; | |
968 | default: | |
969 | to->si_pid = from->cpt_si_pid; | |
970 | to->si_uid = from->cpt_si_uid; | |
971 | to->si_ptr = (void* ) (intptr_t) from->cpt_si_ptr; | |
972 | break; | |
973 | } | |
974 | } | |
975 | } | |
976 | ||
c92b5177 L |
977 | static void |
978 | compat_x32_siginfo_from_siginfo (compat_x32_siginfo_t *to, | |
979 | siginfo_t *from) | |
980 | { | |
981 | memset (to, 0, sizeof (*to)); | |
982 | ||
983 | to->si_signo = from->si_signo; | |
984 | to->si_errno = from->si_errno; | |
985 | to->si_code = from->si_code; | |
986 | ||
987 | if (to->si_code == SI_TIMER) | |
988 | { | |
989 | to->cpt_si_timerid = from->si_timerid; | |
990 | to->cpt_si_overrun = from->si_overrun; | |
991 | to->cpt_si_ptr = (intptr_t) from->si_ptr; | |
992 | } | |
993 | else if (to->si_code == SI_USER) | |
994 | { | |
995 | to->cpt_si_pid = from->si_pid; | |
996 | to->cpt_si_uid = from->si_uid; | |
997 | } | |
998 | else if (to->si_code < 0) | |
999 | { | |
1000 | to->cpt_si_pid = from->si_pid; | |
1001 | to->cpt_si_uid = from->si_uid; | |
1002 | to->cpt_si_ptr = (intptr_t) from->si_ptr; | |
1003 | } | |
1004 | else | |
1005 | { | |
1006 | switch (to->si_signo) | |
1007 | { | |
1008 | case SIGCHLD: | |
1009 | to->cpt_si_pid = from->si_pid; | |
1010 | to->cpt_si_uid = from->si_uid; | |
1011 | to->cpt_si_status = from->si_status; | |
1012 | to->cpt_si_utime = from->si_utime; | |
1013 | to->cpt_si_stime = from->si_stime; | |
1014 | break; | |
1015 | case SIGILL: | |
1016 | case SIGFPE: | |
1017 | case SIGSEGV: | |
1018 | case SIGBUS: | |
1019 | to->cpt_si_addr = (intptr_t) from->si_addr; | |
1020 | break; | |
1021 | case SIGPOLL: | |
1022 | to->cpt_si_band = from->si_band; | |
1023 | to->cpt_si_fd = from->si_fd; | |
1024 | break; | |
1025 | default: | |
1026 | to->cpt_si_pid = from->si_pid; | |
1027 | to->cpt_si_uid = from->si_uid; | |
1028 | to->cpt_si_ptr = (intptr_t) from->si_ptr; | |
1029 | break; | |
1030 | } | |
1031 | } | |
1032 | } | |
1033 | ||
1034 | static void | |
1035 | siginfo_from_compat_x32_siginfo (siginfo_t *to, | |
1036 | compat_x32_siginfo_t *from) | |
1037 | { | |
1038 | memset (to, 0, sizeof (*to)); | |
1039 | ||
1040 | to->si_signo = from->si_signo; | |
1041 | to->si_errno = from->si_errno; | |
1042 | to->si_code = from->si_code; | |
1043 | ||
1044 | if (to->si_code == SI_TIMER) | |
1045 | { | |
1046 | to->si_timerid = from->cpt_si_timerid; | |
1047 | to->si_overrun = from->cpt_si_overrun; | |
1048 | to->si_ptr = (void *) (intptr_t) from->cpt_si_ptr; | |
1049 | } | |
1050 | else if (to->si_code == SI_USER) | |
1051 | { | |
1052 | to->si_pid = from->cpt_si_pid; | |
1053 | to->si_uid = from->cpt_si_uid; | |
1054 | } | |
1055 | else if (to->si_code < 0) | |
1056 | { | |
1057 | to->si_pid = from->cpt_si_pid; | |
1058 | to->si_uid = from->cpt_si_uid; | |
1059 | to->si_ptr = (void *) (intptr_t) from->cpt_si_ptr; | |
1060 | } | |
1061 | else | |
1062 | { | |
1063 | switch (to->si_signo) | |
1064 | { | |
1065 | case SIGCHLD: | |
1066 | to->si_pid = from->cpt_si_pid; | |
1067 | to->si_uid = from->cpt_si_uid; | |
1068 | to->si_status = from->cpt_si_status; | |
1069 | to->si_utime = from->cpt_si_utime; | |
1070 | to->si_stime = from->cpt_si_stime; | |
1071 | break; | |
1072 | case SIGILL: | |
1073 | case SIGFPE: | |
1074 | case SIGSEGV: | |
1075 | case SIGBUS: | |
1076 | to->si_addr = (void *) (intptr_t) from->cpt_si_addr; | |
1077 | break; | |
1078 | case SIGPOLL: | |
1079 | to->si_band = from->cpt_si_band; | |
1080 | to->si_fd = from->cpt_si_fd; | |
1081 | break; | |
1082 | default: | |
1083 | to->si_pid = from->cpt_si_pid; | |
1084 | to->si_uid = from->cpt_si_uid; | |
1085 | to->si_ptr = (void* ) (intptr_t) from->cpt_si_ptr; | |
1086 | break; | |
1087 | } | |
1088 | } | |
1089 | } | |
1090 | ||
1091 | /* Is this process 64-bit? */ | |
1092 | static int linux_is_elf64; | |
d0722149 DE |
1093 | #endif /* __x86_64__ */ |
1094 | ||
1095 | /* Convert a native/host siginfo object, into/from the siginfo in the | |
1096 | layout of the inferiors' architecture. Returns true if any | |
1097 | conversion was done; false otherwise. If DIRECTION is 1, then copy | |
1098 | from INF to NATIVE. If DIRECTION is 0, copy from NATIVE to | |
1099 | INF. */ | |
1100 | ||
1101 | static int | |
a5362b9a | 1102 | x86_siginfo_fixup (siginfo_t *native, void *inf, int direction) |
d0722149 DE |
1103 | { |
1104 | #ifdef __x86_64__ | |
1105 | /* Is the inferior 32-bit? If so, then fixup the siginfo object. */ | |
1106 | if (register_size (0) == 4) | |
1107 | { | |
a5362b9a | 1108 | if (sizeof (siginfo_t) != sizeof (compat_siginfo_t)) |
9f1036c1 | 1109 | fatal ("unexpected difference in siginfo"); |
d0722149 DE |
1110 | |
1111 | if (direction == 0) | |
1112 | compat_siginfo_from_siginfo ((struct compat_siginfo *) inf, native); | |
1113 | else | |
1114 | siginfo_from_compat_siginfo (native, (struct compat_siginfo *) inf); | |
1115 | ||
c92b5177 L |
1116 | return 1; |
1117 | } | |
1118 | /* No fixup for native x32 GDB. */ | |
1119 | else if (!linux_is_elf64 && sizeof (void *) == 8) | |
1120 | { | |
1121 | if (sizeof (siginfo_t) != sizeof (compat_x32_siginfo_t)) | |
1122 | fatal ("unexpected difference in siginfo"); | |
1123 | ||
1124 | if (direction == 0) | |
1125 | compat_x32_siginfo_from_siginfo ((struct compat_x32_siginfo *) inf, | |
1126 | native); | |
1127 | else | |
1128 | siginfo_from_compat_x32_siginfo (native, | |
1129 | (struct compat_x32_siginfo *) inf); | |
1130 | ||
d0722149 DE |
1131 | return 1; |
1132 | } | |
1133 | #endif | |
1134 | ||
1135 | return 0; | |
1136 | } | |
1137 | \f | |
1570b33e L |
1138 | static int use_xml; |
1139 | ||
1140 | /* Update gdbserver_xmltarget. */ | |
1141 | ||
1142 | static void | |
1143 | x86_linux_update_xmltarget (void) | |
1144 | { | |
3a13a53b L |
1145 | int pid; |
1146 | struct regset_info *regset; | |
1570b33e L |
1147 | static unsigned long long xcr0; |
1148 | static int have_ptrace_getregset = -1; | |
59e04013 | 1149 | #if !defined(__x86_64__) && defined(HAVE_PTRACE_GETFPXREGS) |
3a13a53b L |
1150 | static int have_ptrace_getfpxregs = -1; |
1151 | #endif | |
1570b33e L |
1152 | |
1153 | if (!current_inferior) | |
1154 | return; | |
1155 | ||
45ba0d02 PA |
1156 | /* Before changing the register cache internal layout or the target |
1157 | regsets, flush the contents of the current valid caches back to | |
1158 | the threads. */ | |
1159 | regcache_invalidate (); | |
1160 | ||
3a13a53b | 1161 | pid = pid_of (get_thread_lwp (current_inferior)); |
1570b33e L |
1162 | #ifdef __x86_64__ |
1163 | if (num_xmm_registers == 8) | |
1164 | init_registers_i386_linux (); | |
4d47af5c | 1165 | else if (linux_is_elf64) |
1570b33e | 1166 | init_registers_amd64_linux (); |
4d47af5c L |
1167 | else |
1168 | init_registers_x32_linux (); | |
1570b33e | 1169 | #else |
3a13a53b L |
1170 | { |
1171 | # ifdef HAVE_PTRACE_GETFPXREGS | |
1172 | if (have_ptrace_getfpxregs == -1) | |
1173 | { | |
1174 | elf_fpxregset_t fpxregs; | |
1175 | ||
1176 | if (ptrace (PTRACE_GETFPXREGS, pid, 0, (int) &fpxregs) < 0) | |
1177 | { | |
1178 | have_ptrace_getfpxregs = 0; | |
1179 | x86_xcr0 = I386_XSTATE_X87_MASK; | |
1180 | ||
1181 | /* Disable PTRACE_GETFPXREGS. */ | |
1182 | for (regset = target_regsets; | |
1183 | regset->fill_function != NULL; regset++) | |
1184 | if (regset->get_request == PTRACE_GETFPXREGS) | |
1185 | { | |
1186 | regset->size = 0; | |
1187 | break; | |
1188 | } | |
1189 | } | |
1190 | else | |
1191 | have_ptrace_getfpxregs = 1; | |
1192 | } | |
1193 | ||
1194 | if (!have_ptrace_getfpxregs) | |
1195 | { | |
1196 | init_registers_i386_mmx_linux (); | |
1197 | return; | |
1198 | } | |
1199 | # endif | |
1200 | init_registers_i386_linux (); | |
1201 | } | |
1570b33e L |
1202 | #endif |
1203 | ||
1204 | if (!use_xml) | |
1205 | { | |
1206 | /* Don't use XML. */ | |
1207 | #ifdef __x86_64__ | |
1208 | if (num_xmm_registers == 8) | |
1209 | gdbserver_xmltarget = xmltarget_i386_linux_no_xml; | |
1210 | else | |
1211 | gdbserver_xmltarget = xmltarget_amd64_linux_no_xml; | |
1212 | #else | |
1213 | gdbserver_xmltarget = xmltarget_i386_linux_no_xml; | |
1214 | #endif | |
1215 | ||
1216 | x86_xcr0 = I386_XSTATE_SSE_MASK; | |
1217 | ||
1218 | return; | |
1219 | } | |
1220 | ||
1221 | /* Check if XSAVE extended state is supported. */ | |
1222 | if (have_ptrace_getregset == -1) | |
1223 | { | |
1570b33e L |
1224 | unsigned long long xstateregs[I386_XSTATE_SSE_SIZE / sizeof (long long)]; |
1225 | struct iovec iov; | |
1570b33e L |
1226 | |
1227 | iov.iov_base = xstateregs; | |
1228 | iov.iov_len = sizeof (xstateregs); | |
1229 | ||
1230 | /* Check if PTRACE_GETREGSET works. */ | |
1231 | if (ptrace (PTRACE_GETREGSET, pid, (unsigned int) NT_X86_XSTATE, | |
1232 | &iov) < 0) | |
1233 | { | |
1234 | have_ptrace_getregset = 0; | |
1235 | return; | |
1236 | } | |
1237 | else | |
1238 | have_ptrace_getregset = 1; | |
1239 | ||
1240 | /* Get XCR0 from XSAVE extended state at byte 464. */ | |
1241 | xcr0 = xstateregs[464 / sizeof (long long)]; | |
1242 | ||
1243 | /* Use PTRACE_GETREGSET if it is available. */ | |
1244 | for (regset = target_regsets; | |
1245 | regset->fill_function != NULL; regset++) | |
1246 | if (regset->get_request == PTRACE_GETREGSET) | |
1247 | regset->size = I386_XSTATE_SIZE (xcr0); | |
1248 | else if (regset->type != GENERAL_REGS) | |
1249 | regset->size = 0; | |
1250 | } | |
1251 | ||
1252 | if (have_ptrace_getregset) | |
1253 | { | |
1254 | /* AVX is the highest feature we support. */ | |
1255 | if ((xcr0 & I386_XSTATE_AVX_MASK) == I386_XSTATE_AVX_MASK) | |
1256 | { | |
1257 | x86_xcr0 = xcr0; | |
1258 | ||
1259 | #ifdef __x86_64__ | |
1260 | /* I386 has 8 xmm regs. */ | |
1261 | if (num_xmm_registers == 8) | |
1262 | init_registers_i386_avx_linux (); | |
4d47af5c | 1263 | else if (linux_is_elf64) |
1570b33e | 1264 | init_registers_amd64_avx_linux (); |
4d47af5c L |
1265 | else |
1266 | init_registers_x32_avx_linux (); | |
1570b33e L |
1267 | #else |
1268 | init_registers_i386_avx_linux (); | |
1269 | #endif | |
1270 | } | |
1271 | } | |
1272 | } | |
1273 | ||
1274 | /* Process qSupported query, "xmlRegisters=". Update the buffer size for | |
1275 | PTRACE_GETREGSET. */ | |
1276 | ||
1277 | static void | |
1278 | x86_linux_process_qsupported (const char *query) | |
1279 | { | |
1280 | /* Return if gdb doesn't support XML. If gdb sends "xmlRegisters=" | |
1281 | with "i386" in qSupported query, it supports x86 XML target | |
1282 | descriptions. */ | |
1283 | use_xml = 0; | |
1284 | if (query != NULL && strncmp (query, "xmlRegisters=", 13) == 0) | |
1285 | { | |
1286 | char *copy = xstrdup (query + 13); | |
1287 | char *p; | |
1288 | ||
1289 | for (p = strtok (copy, ","); p != NULL; p = strtok (NULL, ",")) | |
1290 | { | |
1291 | if (strcmp (p, "i386") == 0) | |
1292 | { | |
1293 | use_xml = 1; | |
1294 | break; | |
1295 | } | |
1296 | } | |
1297 | ||
1298 | free (copy); | |
1299 | } | |
1300 | ||
1301 | x86_linux_update_xmltarget (); | |
1302 | } | |
1303 | ||
9f1036c1 | 1304 | /* Initialize gdbserver for the architecture of the inferior. */ |
d0722149 DE |
1305 | |
1306 | static void | |
1307 | x86_arch_setup (void) | |
1308 | { | |
d0722149 | 1309 | int pid = pid_of (get_thread_lwp (current_inferior)); |
214d508e L |
1310 | unsigned int machine; |
1311 | int is_elf64 = linux_pid_exe_is_elf_64_file (pid, &machine); | |
d0722149 | 1312 | |
214d508e L |
1313 | if (sizeof (void *) == 4) |
1314 | { | |
1315 | if (is_elf64 > 0) | |
1316 | error (_("Can't debug 64-bit process with 32-bit GDBserver")); | |
1317 | #ifndef __x86_64__ | |
1318 | else if (machine == EM_X86_64) | |
1319 | error (_("Can't debug x86-64 process with 32-bit GDBserver")); | |
1320 | #endif | |
1321 | } | |
1322 | ||
1323 | #ifdef __x86_64__ | |
1324 | if (is_elf64 < 0) | |
d0722149 DE |
1325 | { |
1326 | /* This can only happen if /proc/<pid>/exe is unreadable, | |
1327 | but "that can't happen" if we've gotten this far. | |
1328 | Fall through and assume this is a 32-bit program. */ | |
1329 | } | |
214d508e | 1330 | else if (machine == EM_X86_64) |
d0722149 | 1331 | { |
d0722149 DE |
1332 | /* Amd64 doesn't have HAVE_LINUX_USRREGS. */ |
1333 | the_low_target.num_regs = -1; | |
1334 | the_low_target.regmap = NULL; | |
1335 | the_low_target.cannot_fetch_register = NULL; | |
1336 | the_low_target.cannot_store_register = NULL; | |
1337 | ||
1338 | /* Amd64 has 16 xmm regs. */ | |
1339 | num_xmm_registers = 16; | |
1340 | ||
c92b5177 | 1341 | linux_is_elf64 = is_elf64; |
1570b33e | 1342 | x86_linux_update_xmltarget (); |
d0722149 DE |
1343 | return; |
1344 | } | |
c92b5177 L |
1345 | |
1346 | linux_is_elf64 = 0; | |
d0722149 DE |
1347 | #endif |
1348 | ||
1349 | /* Ok we have a 32-bit inferior. */ | |
1350 | ||
d0722149 DE |
1351 | the_low_target.num_regs = I386_NUM_REGS; |
1352 | the_low_target.regmap = i386_regmap; | |
1353 | the_low_target.cannot_fetch_register = i386_cannot_fetch_register; | |
1354 | the_low_target.cannot_store_register = i386_cannot_store_register; | |
1355 | ||
1356 | /* I386 has 8 xmm regs. */ | |
1357 | num_xmm_registers = 8; | |
1570b33e L |
1358 | |
1359 | x86_linux_update_xmltarget (); | |
d0722149 DE |
1360 | } |
1361 | ||
219f2f23 PA |
1362 | static int |
1363 | x86_supports_tracepoints (void) | |
1364 | { | |
1365 | return 1; | |
1366 | } | |
1367 | ||
fa593d66 PA |
1368 | static void |
1369 | append_insns (CORE_ADDR *to, size_t len, const unsigned char *buf) | |
1370 | { | |
1371 | write_inferior_memory (*to, buf, len); | |
1372 | *to += len; | |
1373 | } | |
1374 | ||
1375 | static int | |
1376 | push_opcode (unsigned char *buf, char *op) | |
1377 | { | |
1378 | unsigned char *buf_org = buf; | |
1379 | ||
1380 | while (1) | |
1381 | { | |
1382 | char *endptr; | |
1383 | unsigned long ul = strtoul (op, &endptr, 16); | |
1384 | ||
1385 | if (endptr == op) | |
1386 | break; | |
1387 | ||
1388 | *buf++ = ul; | |
1389 | op = endptr; | |
1390 | } | |
1391 | ||
1392 | return buf - buf_org; | |
1393 | } | |
1394 | ||
1395 | #ifdef __x86_64__ | |
1396 | ||
1397 | /* Build a jump pad that saves registers and calls a collection | |
1398 | function. Writes a jump instruction to the jump pad to | |
1399 | JJUMPAD_INSN. The caller is responsible to write it in at the | |
1400 | tracepoint address. */ | |
1401 | ||
1402 | static int | |
1403 | amd64_install_fast_tracepoint_jump_pad (CORE_ADDR tpoint, CORE_ADDR tpaddr, | |
1404 | CORE_ADDR collector, | |
1405 | CORE_ADDR lockaddr, | |
1406 | ULONGEST orig_size, | |
1407 | CORE_ADDR *jump_entry, | |
405f8e94 SS |
1408 | CORE_ADDR *trampoline, |
1409 | ULONGEST *trampoline_size, | |
fa593d66 PA |
1410 | unsigned char *jjump_pad_insn, |
1411 | ULONGEST *jjump_pad_insn_size, | |
1412 | CORE_ADDR *adjusted_insn_addr, | |
405f8e94 SS |
1413 | CORE_ADDR *adjusted_insn_addr_end, |
1414 | char *err) | |
fa593d66 PA |
1415 | { |
1416 | unsigned char buf[40]; | |
1417 | int i, offset; | |
f4647387 YQ |
1418 | int64_t loffset; |
1419 | ||
fa593d66 PA |
1420 | CORE_ADDR buildaddr = *jump_entry; |
1421 | ||
1422 | /* Build the jump pad. */ | |
1423 | ||
1424 | /* First, do tracepoint data collection. Save registers. */ | |
1425 | i = 0; | |
1426 | /* Need to ensure stack pointer saved first. */ | |
1427 | buf[i++] = 0x54; /* push %rsp */ | |
1428 | buf[i++] = 0x55; /* push %rbp */ | |
1429 | buf[i++] = 0x57; /* push %rdi */ | |
1430 | buf[i++] = 0x56; /* push %rsi */ | |
1431 | buf[i++] = 0x52; /* push %rdx */ | |
1432 | buf[i++] = 0x51; /* push %rcx */ | |
1433 | buf[i++] = 0x53; /* push %rbx */ | |
1434 | buf[i++] = 0x50; /* push %rax */ | |
1435 | buf[i++] = 0x41; buf[i++] = 0x57; /* push %r15 */ | |
1436 | buf[i++] = 0x41; buf[i++] = 0x56; /* push %r14 */ | |
1437 | buf[i++] = 0x41; buf[i++] = 0x55; /* push %r13 */ | |
1438 | buf[i++] = 0x41; buf[i++] = 0x54; /* push %r12 */ | |
1439 | buf[i++] = 0x41; buf[i++] = 0x53; /* push %r11 */ | |
1440 | buf[i++] = 0x41; buf[i++] = 0x52; /* push %r10 */ | |
1441 | buf[i++] = 0x41; buf[i++] = 0x51; /* push %r9 */ | |
1442 | buf[i++] = 0x41; buf[i++] = 0x50; /* push %r8 */ | |
1443 | buf[i++] = 0x9c; /* pushfq */ | |
1444 | buf[i++] = 0x48; /* movl <addr>,%rdi */ | |
1445 | buf[i++] = 0xbf; | |
1446 | *((unsigned long *)(buf + i)) = (unsigned long) tpaddr; | |
1447 | i += sizeof (unsigned long); | |
1448 | buf[i++] = 0x57; /* push %rdi */ | |
1449 | append_insns (&buildaddr, i, buf); | |
1450 | ||
1451 | /* Stack space for the collecting_t object. */ | |
1452 | i = 0; | |
1453 | i += push_opcode (&buf[i], "48 83 ec 18"); /* sub $0x18,%rsp */ | |
1454 | i += push_opcode (&buf[i], "48 b8"); /* mov <tpoint>,%rax */ | |
1455 | memcpy (buf + i, &tpoint, 8); | |
1456 | i += 8; | |
1457 | i += push_opcode (&buf[i], "48 89 04 24"); /* mov %rax,(%rsp) */ | |
1458 | i += push_opcode (&buf[i], | |
1459 | "64 48 8b 04 25 00 00 00 00"); /* mov %fs:0x0,%rax */ | |
1460 | i += push_opcode (&buf[i], "48 89 44 24 08"); /* mov %rax,0x8(%rsp) */ | |
1461 | append_insns (&buildaddr, i, buf); | |
1462 | ||
1463 | /* spin-lock. */ | |
1464 | i = 0; | |
1465 | i += push_opcode (&buf[i], "48 be"); /* movl <lockaddr>,%rsi */ | |
1466 | memcpy (&buf[i], (void *) &lockaddr, 8); | |
1467 | i += 8; | |
1468 | i += push_opcode (&buf[i], "48 89 e1"); /* mov %rsp,%rcx */ | |
1469 | i += push_opcode (&buf[i], "31 c0"); /* xor %eax,%eax */ | |
1470 | i += push_opcode (&buf[i], "f0 48 0f b1 0e"); /* lock cmpxchg %rcx,(%rsi) */ | |
1471 | i += push_opcode (&buf[i], "48 85 c0"); /* test %rax,%rax */ | |
1472 | i += push_opcode (&buf[i], "75 f4"); /* jne <again> */ | |
1473 | append_insns (&buildaddr, i, buf); | |
1474 | ||
1475 | /* Set up the gdb_collect call. */ | |
1476 | /* At this point, (stack pointer + 0x18) is the base of our saved | |
1477 | register block. */ | |
1478 | ||
1479 | i = 0; | |
1480 | i += push_opcode (&buf[i], "48 89 e6"); /* mov %rsp,%rsi */ | |
1481 | i += push_opcode (&buf[i], "48 83 c6 18"); /* add $0x18,%rsi */ | |
1482 | ||
1483 | /* tpoint address may be 64-bit wide. */ | |
1484 | i += push_opcode (&buf[i], "48 bf"); /* movl <addr>,%rdi */ | |
1485 | memcpy (buf + i, &tpoint, 8); | |
1486 | i += 8; | |
1487 | append_insns (&buildaddr, i, buf); | |
1488 | ||
1489 | /* The collector function being in the shared library, may be | |
1490 | >31-bits away off the jump pad. */ | |
1491 | i = 0; | |
1492 | i += push_opcode (&buf[i], "48 b8"); /* mov $collector,%rax */ | |
1493 | memcpy (buf + i, &collector, 8); | |
1494 | i += 8; | |
1495 | i += push_opcode (&buf[i], "ff d0"); /* callq *%rax */ | |
1496 | append_insns (&buildaddr, i, buf); | |
1497 | ||
1498 | /* Clear the spin-lock. */ | |
1499 | i = 0; | |
1500 | i += push_opcode (&buf[i], "31 c0"); /* xor %eax,%eax */ | |
1501 | i += push_opcode (&buf[i], "48 a3"); /* mov %rax, lockaddr */ | |
1502 | memcpy (buf + i, &lockaddr, 8); | |
1503 | i += 8; | |
1504 | append_insns (&buildaddr, i, buf); | |
1505 | ||
1506 | /* Remove stack that had been used for the collect_t object. */ | |
1507 | i = 0; | |
1508 | i += push_opcode (&buf[i], "48 83 c4 18"); /* add $0x18,%rsp */ | |
1509 | append_insns (&buildaddr, i, buf); | |
1510 | ||
1511 | /* Restore register state. */ | |
1512 | i = 0; | |
1513 | buf[i++] = 0x48; /* add $0x8,%rsp */ | |
1514 | buf[i++] = 0x83; | |
1515 | buf[i++] = 0xc4; | |
1516 | buf[i++] = 0x08; | |
1517 | buf[i++] = 0x9d; /* popfq */ | |
1518 | buf[i++] = 0x41; buf[i++] = 0x58; /* pop %r8 */ | |
1519 | buf[i++] = 0x41; buf[i++] = 0x59; /* pop %r9 */ | |
1520 | buf[i++] = 0x41; buf[i++] = 0x5a; /* pop %r10 */ | |
1521 | buf[i++] = 0x41; buf[i++] = 0x5b; /* pop %r11 */ | |
1522 | buf[i++] = 0x41; buf[i++] = 0x5c; /* pop %r12 */ | |
1523 | buf[i++] = 0x41; buf[i++] = 0x5d; /* pop %r13 */ | |
1524 | buf[i++] = 0x41; buf[i++] = 0x5e; /* pop %r14 */ | |
1525 | buf[i++] = 0x41; buf[i++] = 0x5f; /* pop %r15 */ | |
1526 | buf[i++] = 0x58; /* pop %rax */ | |
1527 | buf[i++] = 0x5b; /* pop %rbx */ | |
1528 | buf[i++] = 0x59; /* pop %rcx */ | |
1529 | buf[i++] = 0x5a; /* pop %rdx */ | |
1530 | buf[i++] = 0x5e; /* pop %rsi */ | |
1531 | buf[i++] = 0x5f; /* pop %rdi */ | |
1532 | buf[i++] = 0x5d; /* pop %rbp */ | |
1533 | buf[i++] = 0x5c; /* pop %rsp */ | |
1534 | append_insns (&buildaddr, i, buf); | |
1535 | ||
1536 | /* Now, adjust the original instruction to execute in the jump | |
1537 | pad. */ | |
1538 | *adjusted_insn_addr = buildaddr; | |
1539 | relocate_instruction (&buildaddr, tpaddr); | |
1540 | *adjusted_insn_addr_end = buildaddr; | |
1541 | ||
1542 | /* Finally, write a jump back to the program. */ | |
f4647387 YQ |
1543 | |
1544 | loffset = (tpaddr + orig_size) - (buildaddr + sizeof (jump_insn)); | |
1545 | if (loffset > INT_MAX || loffset < INT_MIN) | |
1546 | { | |
1547 | sprintf (err, | |
1548 | "E.Jump back from jump pad too far from tracepoint " | |
1549 | "(offset 0x%" PRIx64 " > int32).", loffset); | |
1550 | return 1; | |
1551 | } | |
1552 | ||
1553 | offset = (int) loffset; | |
fa593d66 PA |
1554 | memcpy (buf, jump_insn, sizeof (jump_insn)); |
1555 | memcpy (buf + 1, &offset, 4); | |
1556 | append_insns (&buildaddr, sizeof (jump_insn), buf); | |
1557 | ||
1558 | /* The jump pad is now built. Wire in a jump to our jump pad. This | |
1559 | is always done last (by our caller actually), so that we can | |
1560 | install fast tracepoints with threads running. This relies on | |
1561 | the agent's atomic write support. */ | |
f4647387 YQ |
1562 | loffset = *jump_entry - (tpaddr + sizeof (jump_insn)); |
1563 | if (loffset > INT_MAX || loffset < INT_MIN) | |
1564 | { | |
1565 | sprintf (err, | |
1566 | "E.Jump pad too far from tracepoint " | |
1567 | "(offset 0x%" PRIx64 " > int32).", loffset); | |
1568 | return 1; | |
1569 | } | |
1570 | ||
1571 | offset = (int) loffset; | |
1572 | ||
fa593d66 PA |
1573 | memcpy (buf, jump_insn, sizeof (jump_insn)); |
1574 | memcpy (buf + 1, &offset, 4); | |
1575 | memcpy (jjump_pad_insn, buf, sizeof (jump_insn)); | |
1576 | *jjump_pad_insn_size = sizeof (jump_insn); | |
1577 | ||
1578 | /* Return the end address of our pad. */ | |
1579 | *jump_entry = buildaddr; | |
1580 | ||
1581 | return 0; | |
1582 | } | |
1583 | ||
1584 | #endif /* __x86_64__ */ | |
1585 | ||
1586 | /* Build a jump pad that saves registers and calls a collection | |
1587 | function. Writes a jump instruction to the jump pad to | |
1588 | JJUMPAD_INSN. The caller is responsible to write it in at the | |
1589 | tracepoint address. */ | |
1590 | ||
1591 | static int | |
1592 | i386_install_fast_tracepoint_jump_pad (CORE_ADDR tpoint, CORE_ADDR tpaddr, | |
1593 | CORE_ADDR collector, | |
1594 | CORE_ADDR lockaddr, | |
1595 | ULONGEST orig_size, | |
1596 | CORE_ADDR *jump_entry, | |
405f8e94 SS |
1597 | CORE_ADDR *trampoline, |
1598 | ULONGEST *trampoline_size, | |
fa593d66 PA |
1599 | unsigned char *jjump_pad_insn, |
1600 | ULONGEST *jjump_pad_insn_size, | |
1601 | CORE_ADDR *adjusted_insn_addr, | |
405f8e94 SS |
1602 | CORE_ADDR *adjusted_insn_addr_end, |
1603 | char *err) | |
fa593d66 PA |
1604 | { |
1605 | unsigned char buf[0x100]; | |
1606 | int i, offset; | |
1607 | CORE_ADDR buildaddr = *jump_entry; | |
1608 | ||
1609 | /* Build the jump pad. */ | |
1610 | ||
1611 | /* First, do tracepoint data collection. Save registers. */ | |
1612 | i = 0; | |
1613 | buf[i++] = 0x60; /* pushad */ | |
1614 | buf[i++] = 0x68; /* push tpaddr aka $pc */ | |
1615 | *((int *)(buf + i)) = (int) tpaddr; | |
1616 | i += 4; | |
1617 | buf[i++] = 0x9c; /* pushf */ | |
1618 | buf[i++] = 0x1e; /* push %ds */ | |
1619 | buf[i++] = 0x06; /* push %es */ | |
1620 | buf[i++] = 0x0f; /* push %fs */ | |
1621 | buf[i++] = 0xa0; | |
1622 | buf[i++] = 0x0f; /* push %gs */ | |
1623 | buf[i++] = 0xa8; | |
1624 | buf[i++] = 0x16; /* push %ss */ | |
1625 | buf[i++] = 0x0e; /* push %cs */ | |
1626 | append_insns (&buildaddr, i, buf); | |
1627 | ||
1628 | /* Stack space for the collecting_t object. */ | |
1629 | i = 0; | |
1630 | i += push_opcode (&buf[i], "83 ec 08"); /* sub $0x8,%esp */ | |
1631 | ||
1632 | /* Build the object. */ | |
1633 | i += push_opcode (&buf[i], "b8"); /* mov <tpoint>,%eax */ | |
1634 | memcpy (buf + i, &tpoint, 4); | |
1635 | i += 4; | |
1636 | i += push_opcode (&buf[i], "89 04 24"); /* mov %eax,(%esp) */ | |
1637 | ||
1638 | i += push_opcode (&buf[i], "65 a1 00 00 00 00"); /* mov %gs:0x0,%eax */ | |
1639 | i += push_opcode (&buf[i], "89 44 24 04"); /* mov %eax,0x4(%esp) */ | |
1640 | append_insns (&buildaddr, i, buf); | |
1641 | ||
1642 | /* spin-lock. Note this is using cmpxchg, which leaves i386 behind. | |
1643 | If we cared for it, this could be using xchg alternatively. */ | |
1644 | ||
1645 | i = 0; | |
1646 | i += push_opcode (&buf[i], "31 c0"); /* xor %eax,%eax */ | |
1647 | i += push_opcode (&buf[i], "f0 0f b1 25"); /* lock cmpxchg | |
1648 | %esp,<lockaddr> */ | |
1649 | memcpy (&buf[i], (void *) &lockaddr, 4); | |
1650 | i += 4; | |
1651 | i += push_opcode (&buf[i], "85 c0"); /* test %eax,%eax */ | |
1652 | i += push_opcode (&buf[i], "75 f2"); /* jne <again> */ | |
1653 | append_insns (&buildaddr, i, buf); | |
1654 | ||
1655 | ||
1656 | /* Set up arguments to the gdb_collect call. */ | |
1657 | i = 0; | |
1658 | i += push_opcode (&buf[i], "89 e0"); /* mov %esp,%eax */ | |
1659 | i += push_opcode (&buf[i], "83 c0 08"); /* add $0x08,%eax */ | |
1660 | i += push_opcode (&buf[i], "89 44 24 fc"); /* mov %eax,-0x4(%esp) */ | |
1661 | append_insns (&buildaddr, i, buf); | |
1662 | ||
1663 | i = 0; | |
1664 | i += push_opcode (&buf[i], "83 ec 08"); /* sub $0x8,%esp */ | |
1665 | append_insns (&buildaddr, i, buf); | |
1666 | ||
1667 | i = 0; | |
1668 | i += push_opcode (&buf[i], "c7 04 24"); /* movl <addr>,(%esp) */ | |
1669 | memcpy (&buf[i], (void *) &tpoint, 4); | |
1670 | i += 4; | |
1671 | append_insns (&buildaddr, i, buf); | |
1672 | ||
1673 | buf[0] = 0xe8; /* call <reladdr> */ | |
1674 | offset = collector - (buildaddr + sizeof (jump_insn)); | |
1675 | memcpy (buf + 1, &offset, 4); | |
1676 | append_insns (&buildaddr, 5, buf); | |
1677 | /* Clean up after the call. */ | |
1678 | buf[0] = 0x83; /* add $0x8,%esp */ | |
1679 | buf[1] = 0xc4; | |
1680 | buf[2] = 0x08; | |
1681 | append_insns (&buildaddr, 3, buf); | |
1682 | ||
1683 | ||
1684 | /* Clear the spin-lock. This would need the LOCK prefix on older | |
1685 | broken archs. */ | |
1686 | i = 0; | |
1687 | i += push_opcode (&buf[i], "31 c0"); /* xor %eax,%eax */ | |
1688 | i += push_opcode (&buf[i], "a3"); /* mov %eax, lockaddr */ | |
1689 | memcpy (buf + i, &lockaddr, 4); | |
1690 | i += 4; | |
1691 | append_insns (&buildaddr, i, buf); | |
1692 | ||
1693 | ||
1694 | /* Remove stack that had been used for the collect_t object. */ | |
1695 | i = 0; | |
1696 | i += push_opcode (&buf[i], "83 c4 08"); /* add $0x08,%esp */ | |
1697 | append_insns (&buildaddr, i, buf); | |
1698 | ||
1699 | i = 0; | |
1700 | buf[i++] = 0x83; /* add $0x4,%esp (no pop of %cs, assume unchanged) */ | |
1701 | buf[i++] = 0xc4; | |
1702 | buf[i++] = 0x04; | |
1703 | buf[i++] = 0x17; /* pop %ss */ | |
1704 | buf[i++] = 0x0f; /* pop %gs */ | |
1705 | buf[i++] = 0xa9; | |
1706 | buf[i++] = 0x0f; /* pop %fs */ | |
1707 | buf[i++] = 0xa1; | |
1708 | buf[i++] = 0x07; /* pop %es */ | |
405f8e94 | 1709 | buf[i++] = 0x1f; /* pop %ds */ |
fa593d66 PA |
1710 | buf[i++] = 0x9d; /* popf */ |
1711 | buf[i++] = 0x83; /* add $0x4,%esp (pop of tpaddr aka $pc) */ | |
1712 | buf[i++] = 0xc4; | |
1713 | buf[i++] = 0x04; | |
1714 | buf[i++] = 0x61; /* popad */ | |
1715 | append_insns (&buildaddr, i, buf); | |
1716 | ||
1717 | /* Now, adjust the original instruction to execute in the jump | |
1718 | pad. */ | |
1719 | *adjusted_insn_addr = buildaddr; | |
1720 | relocate_instruction (&buildaddr, tpaddr); | |
1721 | *adjusted_insn_addr_end = buildaddr; | |
1722 | ||
1723 | /* Write the jump back to the program. */ | |
1724 | offset = (tpaddr + orig_size) - (buildaddr + sizeof (jump_insn)); | |
1725 | memcpy (buf, jump_insn, sizeof (jump_insn)); | |
1726 | memcpy (buf + 1, &offset, 4); | |
1727 | append_insns (&buildaddr, sizeof (jump_insn), buf); | |
1728 | ||
1729 | /* The jump pad is now built. Wire in a jump to our jump pad. This | |
1730 | is always done last (by our caller actually), so that we can | |
1731 | install fast tracepoints with threads running. This relies on | |
1732 | the agent's atomic write support. */ | |
405f8e94 SS |
1733 | if (orig_size == 4) |
1734 | { | |
1735 | /* Create a trampoline. */ | |
1736 | *trampoline_size = sizeof (jump_insn); | |
1737 | if (!claim_trampoline_space (*trampoline_size, trampoline)) | |
1738 | { | |
1739 | /* No trampoline space available. */ | |
1740 | strcpy (err, | |
1741 | "E.Cannot allocate trampoline space needed for fast " | |
1742 | "tracepoints on 4-byte instructions."); | |
1743 | return 1; | |
1744 | } | |
1745 | ||
1746 | offset = *jump_entry - (*trampoline + sizeof (jump_insn)); | |
1747 | memcpy (buf, jump_insn, sizeof (jump_insn)); | |
1748 | memcpy (buf + 1, &offset, 4); | |
1749 | write_inferior_memory (*trampoline, buf, sizeof (jump_insn)); | |
1750 | ||
1751 | /* Use a 16-bit relative jump instruction to jump to the trampoline. */ | |
1752 | offset = (*trampoline - (tpaddr + sizeof (small_jump_insn))) & 0xffff; | |
1753 | memcpy (buf, small_jump_insn, sizeof (small_jump_insn)); | |
1754 | memcpy (buf + 2, &offset, 2); | |
1755 | memcpy (jjump_pad_insn, buf, sizeof (small_jump_insn)); | |
1756 | *jjump_pad_insn_size = sizeof (small_jump_insn); | |
1757 | } | |
1758 | else | |
1759 | { | |
1760 | /* Else use a 32-bit relative jump instruction. */ | |
1761 | offset = *jump_entry - (tpaddr + sizeof (jump_insn)); | |
1762 | memcpy (buf, jump_insn, sizeof (jump_insn)); | |
1763 | memcpy (buf + 1, &offset, 4); | |
1764 | memcpy (jjump_pad_insn, buf, sizeof (jump_insn)); | |
1765 | *jjump_pad_insn_size = sizeof (jump_insn); | |
1766 | } | |
fa593d66 PA |
1767 | |
1768 | /* Return the end address of our pad. */ | |
1769 | *jump_entry = buildaddr; | |
1770 | ||
1771 | return 0; | |
1772 | } | |
1773 | ||
1774 | static int | |
1775 | x86_install_fast_tracepoint_jump_pad (CORE_ADDR tpoint, CORE_ADDR tpaddr, | |
1776 | CORE_ADDR collector, | |
1777 | CORE_ADDR lockaddr, | |
1778 | ULONGEST orig_size, | |
1779 | CORE_ADDR *jump_entry, | |
405f8e94 SS |
1780 | CORE_ADDR *trampoline, |
1781 | ULONGEST *trampoline_size, | |
fa593d66 PA |
1782 | unsigned char *jjump_pad_insn, |
1783 | ULONGEST *jjump_pad_insn_size, | |
1784 | CORE_ADDR *adjusted_insn_addr, | |
405f8e94 SS |
1785 | CORE_ADDR *adjusted_insn_addr_end, |
1786 | char *err) | |
fa593d66 PA |
1787 | { |
1788 | #ifdef __x86_64__ | |
1789 | if (register_size (0) == 8) | |
1790 | return amd64_install_fast_tracepoint_jump_pad (tpoint, tpaddr, | |
1791 | collector, lockaddr, | |
1792 | orig_size, jump_entry, | |
405f8e94 | 1793 | trampoline, trampoline_size, |
fa593d66 PA |
1794 | jjump_pad_insn, |
1795 | jjump_pad_insn_size, | |
1796 | adjusted_insn_addr, | |
405f8e94 SS |
1797 | adjusted_insn_addr_end, |
1798 | err); | |
fa593d66 PA |
1799 | #endif |
1800 | ||
1801 | return i386_install_fast_tracepoint_jump_pad (tpoint, tpaddr, | |
1802 | collector, lockaddr, | |
1803 | orig_size, jump_entry, | |
405f8e94 | 1804 | trampoline, trampoline_size, |
fa593d66 PA |
1805 | jjump_pad_insn, |
1806 | jjump_pad_insn_size, | |
1807 | adjusted_insn_addr, | |
405f8e94 SS |
1808 | adjusted_insn_addr_end, |
1809 | err); | |
1810 | } | |
1811 | ||
1812 | /* Return the minimum instruction length for fast tracepoints on x86/x86-64 | |
1813 | architectures. */ | |
1814 | ||
1815 | static int | |
1816 | x86_get_min_fast_tracepoint_insn_len (void) | |
1817 | { | |
1818 | static int warned_about_fast_tracepoints = 0; | |
1819 | ||
1820 | #ifdef __x86_64__ | |
1821 | /* On x86-64, 5-byte jump instructions with a 4-byte offset are always | |
1822 | used for fast tracepoints. */ | |
1823 | if (register_size (0) == 8) | |
1824 | return 5; | |
1825 | #endif | |
1826 | ||
58b4daa5 | 1827 | if (agent_loaded_p ()) |
405f8e94 SS |
1828 | { |
1829 | char errbuf[IPA_BUFSIZ]; | |
1830 | ||
1831 | errbuf[0] = '\0'; | |
1832 | ||
1833 | /* On x86, if trampolines are available, then 4-byte jump instructions | |
1834 | with a 2-byte offset may be used, otherwise 5-byte jump instructions | |
1835 | with a 4-byte offset are used instead. */ | |
1836 | if (have_fast_tracepoint_trampoline_buffer (errbuf)) | |
1837 | return 4; | |
1838 | else | |
1839 | { | |
1840 | /* GDB has no channel to explain to user why a shorter fast | |
1841 | tracepoint is not possible, but at least make GDBserver | |
1842 | mention that something has gone awry. */ | |
1843 | if (!warned_about_fast_tracepoints) | |
1844 | { | |
1845 | warning ("4-byte fast tracepoints not available; %s\n", errbuf); | |
1846 | warned_about_fast_tracepoints = 1; | |
1847 | } | |
1848 | return 5; | |
1849 | } | |
1850 | } | |
1851 | else | |
1852 | { | |
1853 | /* Indicate that the minimum length is currently unknown since the IPA | |
1854 | has not loaded yet. */ | |
1855 | return 0; | |
1856 | } | |
fa593d66 PA |
1857 | } |
1858 | ||
6a271cae PA |
1859 | static void |
1860 | add_insns (unsigned char *start, int len) | |
1861 | { | |
1862 | CORE_ADDR buildaddr = current_insn_ptr; | |
1863 | ||
1864 | if (debug_threads) | |
1865 | fprintf (stderr, "Adding %d bytes of insn at %s\n", | |
1866 | len, paddress (buildaddr)); | |
1867 | ||
1868 | append_insns (&buildaddr, len, start); | |
1869 | current_insn_ptr = buildaddr; | |
1870 | } | |
1871 | ||
6a271cae PA |
1872 | /* Our general strategy for emitting code is to avoid specifying raw |
1873 | bytes whenever possible, and instead copy a block of inline asm | |
1874 | that is embedded in the function. This is a little messy, because | |
1875 | we need to keep the compiler from discarding what looks like dead | |
1876 | code, plus suppress various warnings. */ | |
1877 | ||
9e4344e5 PA |
1878 | #define EMIT_ASM(NAME, INSNS) \ |
1879 | do \ | |
1880 | { \ | |
1881 | extern unsigned char start_ ## NAME, end_ ## NAME; \ | |
1882 | add_insns (&start_ ## NAME, &end_ ## NAME - &start_ ## NAME); \ | |
493e2a69 | 1883 | __asm__ ("jmp end_" #NAME "\n" \ |
9e4344e5 PA |
1884 | "\t" "start_" #NAME ":" \ |
1885 | "\t" INSNS "\n" \ | |
1886 | "\t" "end_" #NAME ":"); \ | |
1887 | } while (0) | |
6a271cae PA |
1888 | |
1889 | #ifdef __x86_64__ | |
1890 | ||
1891 | #define EMIT_ASM32(NAME,INSNS) \ | |
9e4344e5 PA |
1892 | do \ |
1893 | { \ | |
1894 | extern unsigned char start_ ## NAME, end_ ## NAME; \ | |
1895 | add_insns (&start_ ## NAME, &end_ ## NAME - &start_ ## NAME); \ | |
1896 | __asm__ (".code32\n" \ | |
1897 | "\t" "jmp end_" #NAME "\n" \ | |
1898 | "\t" "start_" #NAME ":\n" \ | |
1899 | "\t" INSNS "\n" \ | |
1900 | "\t" "end_" #NAME ":\n" \ | |
1901 | ".code64\n"); \ | |
1902 | } while (0) | |
6a271cae PA |
1903 | |
1904 | #else | |
1905 | ||
1906 | #define EMIT_ASM32(NAME,INSNS) EMIT_ASM(NAME,INSNS) | |
1907 | ||
1908 | #endif | |
1909 | ||
1910 | #ifdef __x86_64__ | |
1911 | ||
1912 | static void | |
1913 | amd64_emit_prologue (void) | |
1914 | { | |
1915 | EMIT_ASM (amd64_prologue, | |
1916 | "pushq %rbp\n\t" | |
1917 | "movq %rsp,%rbp\n\t" | |
1918 | "sub $0x20,%rsp\n\t" | |
1919 | "movq %rdi,-8(%rbp)\n\t" | |
1920 | "movq %rsi,-16(%rbp)"); | |
1921 | } | |
1922 | ||
1923 | ||
1924 | static void | |
1925 | amd64_emit_epilogue (void) | |
1926 | { | |
1927 | EMIT_ASM (amd64_epilogue, | |
1928 | "movq -16(%rbp),%rdi\n\t" | |
1929 | "movq %rax,(%rdi)\n\t" | |
1930 | "xor %rax,%rax\n\t" | |
1931 | "leave\n\t" | |
1932 | "ret"); | |
1933 | } | |
1934 | ||
1935 | static void | |
1936 | amd64_emit_add (void) | |
1937 | { | |
1938 | EMIT_ASM (amd64_add, | |
1939 | "add (%rsp),%rax\n\t" | |
1940 | "lea 0x8(%rsp),%rsp"); | |
1941 | } | |
1942 | ||
1943 | static void | |
1944 | amd64_emit_sub (void) | |
1945 | { | |
1946 | EMIT_ASM (amd64_sub, | |
1947 | "sub %rax,(%rsp)\n\t" | |
1948 | "pop %rax"); | |
1949 | } | |
1950 | ||
1951 | static void | |
1952 | amd64_emit_mul (void) | |
1953 | { | |
1954 | emit_error = 1; | |
1955 | } | |
1956 | ||
1957 | static void | |
1958 | amd64_emit_lsh (void) | |
1959 | { | |
1960 | emit_error = 1; | |
1961 | } | |
1962 | ||
1963 | static void | |
1964 | amd64_emit_rsh_signed (void) | |
1965 | { | |
1966 | emit_error = 1; | |
1967 | } | |
1968 | ||
1969 | static void | |
1970 | amd64_emit_rsh_unsigned (void) | |
1971 | { | |
1972 | emit_error = 1; | |
1973 | } | |
1974 | ||
1975 | static void | |
1976 | amd64_emit_ext (int arg) | |
1977 | { | |
1978 | switch (arg) | |
1979 | { | |
1980 | case 8: | |
1981 | EMIT_ASM (amd64_ext_8, | |
1982 | "cbtw\n\t" | |
1983 | "cwtl\n\t" | |
1984 | "cltq"); | |
1985 | break; | |
1986 | case 16: | |
1987 | EMIT_ASM (amd64_ext_16, | |
1988 | "cwtl\n\t" | |
1989 | "cltq"); | |
1990 | break; | |
1991 | case 32: | |
1992 | EMIT_ASM (amd64_ext_32, | |
1993 | "cltq"); | |
1994 | break; | |
1995 | default: | |
1996 | emit_error = 1; | |
1997 | } | |
1998 | } | |
1999 | ||
2000 | static void | |
2001 | amd64_emit_log_not (void) | |
2002 | { | |
2003 | EMIT_ASM (amd64_log_not, | |
2004 | "test %rax,%rax\n\t" | |
2005 | "sete %cl\n\t" | |
2006 | "movzbq %cl,%rax"); | |
2007 | } | |
2008 | ||
2009 | static void | |
2010 | amd64_emit_bit_and (void) | |
2011 | { | |
2012 | EMIT_ASM (amd64_and, | |
2013 | "and (%rsp),%rax\n\t" | |
2014 | "lea 0x8(%rsp),%rsp"); | |
2015 | } | |
2016 | ||
2017 | static void | |
2018 | amd64_emit_bit_or (void) | |
2019 | { | |
2020 | EMIT_ASM (amd64_or, | |
2021 | "or (%rsp),%rax\n\t" | |
2022 | "lea 0x8(%rsp),%rsp"); | |
2023 | } | |
2024 | ||
2025 | static void | |
2026 | amd64_emit_bit_xor (void) | |
2027 | { | |
2028 | EMIT_ASM (amd64_xor, | |
2029 | "xor (%rsp),%rax\n\t" | |
2030 | "lea 0x8(%rsp),%rsp"); | |
2031 | } | |
2032 | ||
2033 | static void | |
2034 | amd64_emit_bit_not (void) | |
2035 | { | |
2036 | EMIT_ASM (amd64_bit_not, | |
2037 | "xorq $0xffffffffffffffff,%rax"); | |
2038 | } | |
2039 | ||
2040 | static void | |
2041 | amd64_emit_equal (void) | |
2042 | { | |
2043 | EMIT_ASM (amd64_equal, | |
2044 | "cmp %rax,(%rsp)\n\t" | |
2045 | "je .Lamd64_equal_true\n\t" | |
2046 | "xor %rax,%rax\n\t" | |
2047 | "jmp .Lamd64_equal_end\n\t" | |
2048 | ".Lamd64_equal_true:\n\t" | |
2049 | "mov $0x1,%rax\n\t" | |
2050 | ".Lamd64_equal_end:\n\t" | |
2051 | "lea 0x8(%rsp),%rsp"); | |
2052 | } | |
2053 | ||
2054 | static void | |
2055 | amd64_emit_less_signed (void) | |
2056 | { | |
2057 | EMIT_ASM (amd64_less_signed, | |
2058 | "cmp %rax,(%rsp)\n\t" | |
2059 | "jl .Lamd64_less_signed_true\n\t" | |
2060 | "xor %rax,%rax\n\t" | |
2061 | "jmp .Lamd64_less_signed_end\n\t" | |
2062 | ".Lamd64_less_signed_true:\n\t" | |
2063 | "mov $1,%rax\n\t" | |
2064 | ".Lamd64_less_signed_end:\n\t" | |
2065 | "lea 0x8(%rsp),%rsp"); | |
2066 | } | |
2067 | ||
2068 | static void | |
2069 | amd64_emit_less_unsigned (void) | |
2070 | { | |
2071 | EMIT_ASM (amd64_less_unsigned, | |
2072 | "cmp %rax,(%rsp)\n\t" | |
2073 | "jb .Lamd64_less_unsigned_true\n\t" | |
2074 | "xor %rax,%rax\n\t" | |
2075 | "jmp .Lamd64_less_unsigned_end\n\t" | |
2076 | ".Lamd64_less_unsigned_true:\n\t" | |
2077 | "mov $1,%rax\n\t" | |
2078 | ".Lamd64_less_unsigned_end:\n\t" | |
2079 | "lea 0x8(%rsp),%rsp"); | |
2080 | } | |
2081 | ||
2082 | static void | |
2083 | amd64_emit_ref (int size) | |
2084 | { | |
2085 | switch (size) | |
2086 | { | |
2087 | case 1: | |
2088 | EMIT_ASM (amd64_ref1, | |
2089 | "movb (%rax),%al"); | |
2090 | break; | |
2091 | case 2: | |
2092 | EMIT_ASM (amd64_ref2, | |
2093 | "movw (%rax),%ax"); | |
2094 | break; | |
2095 | case 4: | |
2096 | EMIT_ASM (amd64_ref4, | |
2097 | "movl (%rax),%eax"); | |
2098 | break; | |
2099 | case 8: | |
2100 | EMIT_ASM (amd64_ref8, | |
2101 | "movq (%rax),%rax"); | |
2102 | break; | |
2103 | } | |
2104 | } | |
2105 | ||
2106 | static void | |
2107 | amd64_emit_if_goto (int *offset_p, int *size_p) | |
2108 | { | |
2109 | EMIT_ASM (amd64_if_goto, | |
2110 | "mov %rax,%rcx\n\t" | |
2111 | "pop %rax\n\t" | |
2112 | "cmp $0,%rcx\n\t" | |
2113 | ".byte 0x0f, 0x85, 0x0, 0x0, 0x0, 0x0"); | |
2114 | if (offset_p) | |
2115 | *offset_p = 10; | |
2116 | if (size_p) | |
2117 | *size_p = 4; | |
2118 | } | |
2119 | ||
2120 | static void | |
2121 | amd64_emit_goto (int *offset_p, int *size_p) | |
2122 | { | |
2123 | EMIT_ASM (amd64_goto, | |
2124 | ".byte 0xe9, 0x0, 0x0, 0x0, 0x0"); | |
2125 | if (offset_p) | |
2126 | *offset_p = 1; | |
2127 | if (size_p) | |
2128 | *size_p = 4; | |
2129 | } | |
2130 | ||
2131 | static void | |
2132 | amd64_write_goto_address (CORE_ADDR from, CORE_ADDR to, int size) | |
2133 | { | |
2134 | int diff = (to - (from + size)); | |
2135 | unsigned char buf[sizeof (int)]; | |
2136 | ||
2137 | if (size != 4) | |
2138 | { | |
2139 | emit_error = 1; | |
2140 | return; | |
2141 | } | |
2142 | ||
2143 | memcpy (buf, &diff, sizeof (int)); | |
2144 | write_inferior_memory (from, buf, sizeof (int)); | |
2145 | } | |
2146 | ||
2147 | static void | |
4e29fb54 | 2148 | amd64_emit_const (LONGEST num) |
6a271cae PA |
2149 | { |
2150 | unsigned char buf[16]; | |
2151 | int i; | |
2152 | CORE_ADDR buildaddr = current_insn_ptr; | |
2153 | ||
2154 | i = 0; | |
2155 | buf[i++] = 0x48; buf[i++] = 0xb8; /* mov $<n>,%rax */ | |
b00ad6ff | 2156 | memcpy (&buf[i], &num, sizeof (num)); |
6a271cae PA |
2157 | i += 8; |
2158 | append_insns (&buildaddr, i, buf); | |
2159 | current_insn_ptr = buildaddr; | |
2160 | } | |
2161 | ||
2162 | static void | |
2163 | amd64_emit_call (CORE_ADDR fn) | |
2164 | { | |
2165 | unsigned char buf[16]; | |
2166 | int i; | |
2167 | CORE_ADDR buildaddr; | |
4e29fb54 | 2168 | LONGEST offset64; |
6a271cae PA |
2169 | |
2170 | /* The destination function being in the shared library, may be | |
2171 | >31-bits away off the compiled code pad. */ | |
2172 | ||
2173 | buildaddr = current_insn_ptr; | |
2174 | ||
2175 | offset64 = fn - (buildaddr + 1 /* call op */ + 4 /* 32-bit offset */); | |
2176 | ||
2177 | i = 0; | |
2178 | ||
2179 | if (offset64 > INT_MAX || offset64 < INT_MIN) | |
2180 | { | |
2181 | /* Offset is too large for a call. Use callq, but that requires | |
2182 | a register, so avoid it if possible. Use r10, since it is | |
2183 | call-clobbered, we don't have to push/pop it. */ | |
2184 | buf[i++] = 0x48; /* mov $fn,%r10 */ | |
2185 | buf[i++] = 0xba; | |
2186 | memcpy (buf + i, &fn, 8); | |
2187 | i += 8; | |
2188 | buf[i++] = 0xff; /* callq *%r10 */ | |
2189 | buf[i++] = 0xd2; | |
2190 | } | |
2191 | else | |
2192 | { | |
2193 | int offset32 = offset64; /* we know we can't overflow here. */ | |
2194 | memcpy (buf + i, &offset32, 4); | |
2195 | i += 4; | |
2196 | } | |
2197 | ||
2198 | append_insns (&buildaddr, i, buf); | |
2199 | current_insn_ptr = buildaddr; | |
2200 | } | |
2201 | ||
2202 | static void | |
2203 | amd64_emit_reg (int reg) | |
2204 | { | |
2205 | unsigned char buf[16]; | |
2206 | int i; | |
2207 | CORE_ADDR buildaddr; | |
2208 | ||
2209 | /* Assume raw_regs is still in %rdi. */ | |
2210 | buildaddr = current_insn_ptr; | |
2211 | i = 0; | |
2212 | buf[i++] = 0xbe; /* mov $<n>,%esi */ | |
b00ad6ff | 2213 | memcpy (&buf[i], ®, sizeof (reg)); |
6a271cae PA |
2214 | i += 4; |
2215 | append_insns (&buildaddr, i, buf); | |
2216 | current_insn_ptr = buildaddr; | |
2217 | amd64_emit_call (get_raw_reg_func_addr ()); | |
2218 | } | |
2219 | ||
2220 | static void | |
2221 | amd64_emit_pop (void) | |
2222 | { | |
2223 | EMIT_ASM (amd64_pop, | |
2224 | "pop %rax"); | |
2225 | } | |
2226 | ||
2227 | static void | |
2228 | amd64_emit_stack_flush (void) | |
2229 | { | |
2230 | EMIT_ASM (amd64_stack_flush, | |
2231 | "push %rax"); | |
2232 | } | |
2233 | ||
2234 | static void | |
2235 | amd64_emit_zero_ext (int arg) | |
2236 | { | |
2237 | switch (arg) | |
2238 | { | |
2239 | case 8: | |
2240 | EMIT_ASM (amd64_zero_ext_8, | |
2241 | "and $0xff,%rax"); | |
2242 | break; | |
2243 | case 16: | |
2244 | EMIT_ASM (amd64_zero_ext_16, | |
2245 | "and $0xffff,%rax"); | |
2246 | break; | |
2247 | case 32: | |
2248 | EMIT_ASM (amd64_zero_ext_32, | |
2249 | "mov $0xffffffff,%rcx\n\t" | |
2250 | "and %rcx,%rax"); | |
2251 | break; | |
2252 | default: | |
2253 | emit_error = 1; | |
2254 | } | |
2255 | } | |
2256 | ||
2257 | static void | |
2258 | amd64_emit_swap (void) | |
2259 | { | |
2260 | EMIT_ASM (amd64_swap, | |
2261 | "mov %rax,%rcx\n\t" | |
2262 | "pop %rax\n\t" | |
2263 | "push %rcx"); | |
2264 | } | |
2265 | ||
2266 | static void | |
2267 | amd64_emit_stack_adjust (int n) | |
2268 | { | |
2269 | unsigned char buf[16]; | |
2270 | int i; | |
2271 | CORE_ADDR buildaddr = current_insn_ptr; | |
2272 | ||
2273 | i = 0; | |
2274 | buf[i++] = 0x48; /* lea $<n>(%rsp),%rsp */ | |
2275 | buf[i++] = 0x8d; | |
2276 | buf[i++] = 0x64; | |
2277 | buf[i++] = 0x24; | |
2278 | /* This only handles adjustments up to 16, but we don't expect any more. */ | |
2279 | buf[i++] = n * 8; | |
2280 | append_insns (&buildaddr, i, buf); | |
2281 | current_insn_ptr = buildaddr; | |
2282 | } | |
2283 | ||
2284 | /* FN's prototype is `LONGEST(*fn)(int)'. */ | |
2285 | ||
2286 | static void | |
2287 | amd64_emit_int_call_1 (CORE_ADDR fn, int arg1) | |
2288 | { | |
2289 | unsigned char buf[16]; | |
2290 | int i; | |
2291 | CORE_ADDR buildaddr; | |
2292 | ||
2293 | buildaddr = current_insn_ptr; | |
2294 | i = 0; | |
2295 | buf[i++] = 0xbf; /* movl $<n>,%edi */ | |
b00ad6ff | 2296 | memcpy (&buf[i], &arg1, sizeof (arg1)); |
6a271cae PA |
2297 | i += 4; |
2298 | append_insns (&buildaddr, i, buf); | |
2299 | current_insn_ptr = buildaddr; | |
2300 | amd64_emit_call (fn); | |
2301 | } | |
2302 | ||
4e29fb54 | 2303 | /* FN's prototype is `void(*fn)(int,LONGEST)'. */ |
6a271cae PA |
2304 | |
2305 | static void | |
2306 | amd64_emit_void_call_2 (CORE_ADDR fn, int arg1) | |
2307 | { | |
2308 | unsigned char buf[16]; | |
2309 | int i; | |
2310 | CORE_ADDR buildaddr; | |
2311 | ||
2312 | buildaddr = current_insn_ptr; | |
2313 | i = 0; | |
2314 | buf[i++] = 0xbf; /* movl $<n>,%edi */ | |
b00ad6ff | 2315 | memcpy (&buf[i], &arg1, sizeof (arg1)); |
6a271cae PA |
2316 | i += 4; |
2317 | append_insns (&buildaddr, i, buf); | |
2318 | current_insn_ptr = buildaddr; | |
2319 | EMIT_ASM (amd64_void_call_2_a, | |
2320 | /* Save away a copy of the stack top. */ | |
2321 | "push %rax\n\t" | |
2322 | /* Also pass top as the second argument. */ | |
2323 | "mov %rax,%rsi"); | |
2324 | amd64_emit_call (fn); | |
2325 | EMIT_ASM (amd64_void_call_2_b, | |
2326 | /* Restore the stack top, %rax may have been trashed. */ | |
2327 | "pop %rax"); | |
2328 | } | |
2329 | ||
6b9801d4 SS |
2330 | void |
2331 | amd64_emit_eq_goto (int *offset_p, int *size_p) | |
2332 | { | |
2333 | EMIT_ASM (amd64_eq, | |
2334 | "cmp %rax,(%rsp)\n\t" | |
2335 | "jne .Lamd64_eq_fallthru\n\t" | |
2336 | "lea 0x8(%rsp),%rsp\n\t" | |
2337 | "pop %rax\n\t" | |
2338 | /* jmp, but don't trust the assembler to choose the right jump */ | |
2339 | ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t" | |
2340 | ".Lamd64_eq_fallthru:\n\t" | |
2341 | "lea 0x8(%rsp),%rsp\n\t" | |
2342 | "pop %rax"); | |
2343 | ||
2344 | if (offset_p) | |
2345 | *offset_p = 13; | |
2346 | if (size_p) | |
2347 | *size_p = 4; | |
2348 | } | |
2349 | ||
2350 | void | |
2351 | amd64_emit_ne_goto (int *offset_p, int *size_p) | |
2352 | { | |
2353 | EMIT_ASM (amd64_ne, | |
2354 | "cmp %rax,(%rsp)\n\t" | |
2355 | "je .Lamd64_ne_fallthru\n\t" | |
2356 | "lea 0x8(%rsp),%rsp\n\t" | |
2357 | "pop %rax\n\t" | |
2358 | /* jmp, but don't trust the assembler to choose the right jump */ | |
2359 | ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t" | |
2360 | ".Lamd64_ne_fallthru:\n\t" | |
2361 | "lea 0x8(%rsp),%rsp\n\t" | |
2362 | "pop %rax"); | |
2363 | ||
2364 | if (offset_p) | |
2365 | *offset_p = 13; | |
2366 | if (size_p) | |
2367 | *size_p = 4; | |
2368 | } | |
2369 | ||
2370 | void | |
2371 | amd64_emit_lt_goto (int *offset_p, int *size_p) | |
2372 | { | |
2373 | EMIT_ASM (amd64_lt, | |
2374 | "cmp %rax,(%rsp)\n\t" | |
2375 | "jnl .Lamd64_lt_fallthru\n\t" | |
2376 | "lea 0x8(%rsp),%rsp\n\t" | |
2377 | "pop %rax\n\t" | |
2378 | /* jmp, but don't trust the assembler to choose the right jump */ | |
2379 | ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t" | |
2380 | ".Lamd64_lt_fallthru:\n\t" | |
2381 | "lea 0x8(%rsp),%rsp\n\t" | |
2382 | "pop %rax"); | |
2383 | ||
2384 | if (offset_p) | |
2385 | *offset_p = 13; | |
2386 | if (size_p) | |
2387 | *size_p = 4; | |
2388 | } | |
2389 | ||
2390 | void | |
2391 | amd64_emit_le_goto (int *offset_p, int *size_p) | |
2392 | { | |
2393 | EMIT_ASM (amd64_le, | |
2394 | "cmp %rax,(%rsp)\n\t" | |
2395 | "jnle .Lamd64_le_fallthru\n\t" | |
2396 | "lea 0x8(%rsp),%rsp\n\t" | |
2397 | "pop %rax\n\t" | |
2398 | /* jmp, but don't trust the assembler to choose the right jump */ | |
2399 | ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t" | |
2400 | ".Lamd64_le_fallthru:\n\t" | |
2401 | "lea 0x8(%rsp),%rsp\n\t" | |
2402 | "pop %rax"); | |
2403 | ||
2404 | if (offset_p) | |
2405 | *offset_p = 13; | |
2406 | if (size_p) | |
2407 | *size_p = 4; | |
2408 | } | |
2409 | ||
2410 | void | |
2411 | amd64_emit_gt_goto (int *offset_p, int *size_p) | |
2412 | { | |
2413 | EMIT_ASM (amd64_gt, | |
2414 | "cmp %rax,(%rsp)\n\t" | |
2415 | "jng .Lamd64_gt_fallthru\n\t" | |
2416 | "lea 0x8(%rsp),%rsp\n\t" | |
2417 | "pop %rax\n\t" | |
2418 | /* jmp, but don't trust the assembler to choose the right jump */ | |
2419 | ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t" | |
2420 | ".Lamd64_gt_fallthru:\n\t" | |
2421 | "lea 0x8(%rsp),%rsp\n\t" | |
2422 | "pop %rax"); | |
2423 | ||
2424 | if (offset_p) | |
2425 | *offset_p = 13; | |
2426 | if (size_p) | |
2427 | *size_p = 4; | |
2428 | } | |
2429 | ||
2430 | void | |
2431 | amd64_emit_ge_goto (int *offset_p, int *size_p) | |
2432 | { | |
2433 | EMIT_ASM (amd64_ge, | |
2434 | "cmp %rax,(%rsp)\n\t" | |
2435 | "jnge .Lamd64_ge_fallthru\n\t" | |
2436 | ".Lamd64_ge_jump:\n\t" | |
2437 | "lea 0x8(%rsp),%rsp\n\t" | |
2438 | "pop %rax\n\t" | |
2439 | /* jmp, but don't trust the assembler to choose the right jump */ | |
2440 | ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t" | |
2441 | ".Lamd64_ge_fallthru:\n\t" | |
2442 | "lea 0x8(%rsp),%rsp\n\t" | |
2443 | "pop %rax"); | |
2444 | ||
2445 | if (offset_p) | |
2446 | *offset_p = 13; | |
2447 | if (size_p) | |
2448 | *size_p = 4; | |
2449 | } | |
2450 | ||
6a271cae PA |
2451 | struct emit_ops amd64_emit_ops = |
2452 | { | |
2453 | amd64_emit_prologue, | |
2454 | amd64_emit_epilogue, | |
2455 | amd64_emit_add, | |
2456 | amd64_emit_sub, | |
2457 | amd64_emit_mul, | |
2458 | amd64_emit_lsh, | |
2459 | amd64_emit_rsh_signed, | |
2460 | amd64_emit_rsh_unsigned, | |
2461 | amd64_emit_ext, | |
2462 | amd64_emit_log_not, | |
2463 | amd64_emit_bit_and, | |
2464 | amd64_emit_bit_or, | |
2465 | amd64_emit_bit_xor, | |
2466 | amd64_emit_bit_not, | |
2467 | amd64_emit_equal, | |
2468 | amd64_emit_less_signed, | |
2469 | amd64_emit_less_unsigned, | |
2470 | amd64_emit_ref, | |
2471 | amd64_emit_if_goto, | |
2472 | amd64_emit_goto, | |
2473 | amd64_write_goto_address, | |
2474 | amd64_emit_const, | |
2475 | amd64_emit_call, | |
2476 | amd64_emit_reg, | |
2477 | amd64_emit_pop, | |
2478 | amd64_emit_stack_flush, | |
2479 | amd64_emit_zero_ext, | |
2480 | amd64_emit_swap, | |
2481 | amd64_emit_stack_adjust, | |
2482 | amd64_emit_int_call_1, | |
6b9801d4 SS |
2483 | amd64_emit_void_call_2, |
2484 | amd64_emit_eq_goto, | |
2485 | amd64_emit_ne_goto, | |
2486 | amd64_emit_lt_goto, | |
2487 | amd64_emit_le_goto, | |
2488 | amd64_emit_gt_goto, | |
2489 | amd64_emit_ge_goto | |
6a271cae PA |
2490 | }; |
2491 | ||
2492 | #endif /* __x86_64__ */ | |
2493 | ||
2494 | static void | |
2495 | i386_emit_prologue (void) | |
2496 | { | |
2497 | EMIT_ASM32 (i386_prologue, | |
2498 | "push %ebp\n\t" | |
bf15cbda SS |
2499 | "mov %esp,%ebp\n\t" |
2500 | "push %ebx"); | |
6a271cae PA |
2501 | /* At this point, the raw regs base address is at 8(%ebp), and the |
2502 | value pointer is at 12(%ebp). */ | |
2503 | } | |
2504 | ||
2505 | static void | |
2506 | i386_emit_epilogue (void) | |
2507 | { | |
2508 | EMIT_ASM32 (i386_epilogue, | |
2509 | "mov 12(%ebp),%ecx\n\t" | |
2510 | "mov %eax,(%ecx)\n\t" | |
2511 | "mov %ebx,0x4(%ecx)\n\t" | |
2512 | "xor %eax,%eax\n\t" | |
bf15cbda | 2513 | "pop %ebx\n\t" |
6a271cae PA |
2514 | "pop %ebp\n\t" |
2515 | "ret"); | |
2516 | } | |
2517 | ||
2518 | static void | |
2519 | i386_emit_add (void) | |
2520 | { | |
2521 | EMIT_ASM32 (i386_add, | |
2522 | "add (%esp),%eax\n\t" | |
2523 | "adc 0x4(%esp),%ebx\n\t" | |
2524 | "lea 0x8(%esp),%esp"); | |
2525 | } | |
2526 | ||
2527 | static void | |
2528 | i386_emit_sub (void) | |
2529 | { | |
2530 | EMIT_ASM32 (i386_sub, | |
2531 | "subl %eax,(%esp)\n\t" | |
2532 | "sbbl %ebx,4(%esp)\n\t" | |
2533 | "pop %eax\n\t" | |
2534 | "pop %ebx\n\t"); | |
2535 | } | |
2536 | ||
2537 | static void | |
2538 | i386_emit_mul (void) | |
2539 | { | |
2540 | emit_error = 1; | |
2541 | } | |
2542 | ||
2543 | static void | |
2544 | i386_emit_lsh (void) | |
2545 | { | |
2546 | emit_error = 1; | |
2547 | } | |
2548 | ||
2549 | static void | |
2550 | i386_emit_rsh_signed (void) | |
2551 | { | |
2552 | emit_error = 1; | |
2553 | } | |
2554 | ||
2555 | static void | |
2556 | i386_emit_rsh_unsigned (void) | |
2557 | { | |
2558 | emit_error = 1; | |
2559 | } | |
2560 | ||
2561 | static void | |
2562 | i386_emit_ext (int arg) | |
2563 | { | |
2564 | switch (arg) | |
2565 | { | |
2566 | case 8: | |
2567 | EMIT_ASM32 (i386_ext_8, | |
2568 | "cbtw\n\t" | |
2569 | "cwtl\n\t" | |
2570 | "movl %eax,%ebx\n\t" | |
2571 | "sarl $31,%ebx"); | |
2572 | break; | |
2573 | case 16: | |
2574 | EMIT_ASM32 (i386_ext_16, | |
2575 | "cwtl\n\t" | |
2576 | "movl %eax,%ebx\n\t" | |
2577 | "sarl $31,%ebx"); | |
2578 | break; | |
2579 | case 32: | |
2580 | EMIT_ASM32 (i386_ext_32, | |
2581 | "movl %eax,%ebx\n\t" | |
2582 | "sarl $31,%ebx"); | |
2583 | break; | |
2584 | default: | |
2585 | emit_error = 1; | |
2586 | } | |
2587 | } | |
2588 | ||
2589 | static void | |
2590 | i386_emit_log_not (void) | |
2591 | { | |
2592 | EMIT_ASM32 (i386_log_not, | |
2593 | "or %ebx,%eax\n\t" | |
2594 | "test %eax,%eax\n\t" | |
2595 | "sete %cl\n\t" | |
2596 | "xor %ebx,%ebx\n\t" | |
2597 | "movzbl %cl,%eax"); | |
2598 | } | |
2599 | ||
2600 | static void | |
2601 | i386_emit_bit_and (void) | |
2602 | { | |
2603 | EMIT_ASM32 (i386_and, | |
2604 | "and (%esp),%eax\n\t" | |
2605 | "and 0x4(%esp),%ebx\n\t" | |
2606 | "lea 0x8(%esp),%esp"); | |
2607 | } | |
2608 | ||
2609 | static void | |
2610 | i386_emit_bit_or (void) | |
2611 | { | |
2612 | EMIT_ASM32 (i386_or, | |
2613 | "or (%esp),%eax\n\t" | |
2614 | "or 0x4(%esp),%ebx\n\t" | |
2615 | "lea 0x8(%esp),%esp"); | |
2616 | } | |
2617 | ||
2618 | static void | |
2619 | i386_emit_bit_xor (void) | |
2620 | { | |
2621 | EMIT_ASM32 (i386_xor, | |
2622 | "xor (%esp),%eax\n\t" | |
2623 | "xor 0x4(%esp),%ebx\n\t" | |
2624 | "lea 0x8(%esp),%esp"); | |
2625 | } | |
2626 | ||
2627 | static void | |
2628 | i386_emit_bit_not (void) | |
2629 | { | |
2630 | EMIT_ASM32 (i386_bit_not, | |
2631 | "xor $0xffffffff,%eax\n\t" | |
2632 | "xor $0xffffffff,%ebx\n\t"); | |
2633 | } | |
2634 | ||
2635 | static void | |
2636 | i386_emit_equal (void) | |
2637 | { | |
2638 | EMIT_ASM32 (i386_equal, | |
2639 | "cmpl %ebx,4(%esp)\n\t" | |
2640 | "jne .Li386_equal_false\n\t" | |
2641 | "cmpl %eax,(%esp)\n\t" | |
2642 | "je .Li386_equal_true\n\t" | |
2643 | ".Li386_equal_false:\n\t" | |
2644 | "xor %eax,%eax\n\t" | |
2645 | "jmp .Li386_equal_end\n\t" | |
2646 | ".Li386_equal_true:\n\t" | |
2647 | "mov $1,%eax\n\t" | |
2648 | ".Li386_equal_end:\n\t" | |
2649 | "xor %ebx,%ebx\n\t" | |
2650 | "lea 0x8(%esp),%esp"); | |
2651 | } | |
2652 | ||
2653 | static void | |
2654 | i386_emit_less_signed (void) | |
2655 | { | |
2656 | EMIT_ASM32 (i386_less_signed, | |
2657 | "cmpl %ebx,4(%esp)\n\t" | |
2658 | "jl .Li386_less_signed_true\n\t" | |
2659 | "jne .Li386_less_signed_false\n\t" | |
2660 | "cmpl %eax,(%esp)\n\t" | |
2661 | "jl .Li386_less_signed_true\n\t" | |
2662 | ".Li386_less_signed_false:\n\t" | |
2663 | "xor %eax,%eax\n\t" | |
2664 | "jmp .Li386_less_signed_end\n\t" | |
2665 | ".Li386_less_signed_true:\n\t" | |
2666 | "mov $1,%eax\n\t" | |
2667 | ".Li386_less_signed_end:\n\t" | |
2668 | "xor %ebx,%ebx\n\t" | |
2669 | "lea 0x8(%esp),%esp"); | |
2670 | } | |
2671 | ||
2672 | static void | |
2673 | i386_emit_less_unsigned (void) | |
2674 | { | |
2675 | EMIT_ASM32 (i386_less_unsigned, | |
2676 | "cmpl %ebx,4(%esp)\n\t" | |
2677 | "jb .Li386_less_unsigned_true\n\t" | |
2678 | "jne .Li386_less_unsigned_false\n\t" | |
2679 | "cmpl %eax,(%esp)\n\t" | |
2680 | "jb .Li386_less_unsigned_true\n\t" | |
2681 | ".Li386_less_unsigned_false:\n\t" | |
2682 | "xor %eax,%eax\n\t" | |
2683 | "jmp .Li386_less_unsigned_end\n\t" | |
2684 | ".Li386_less_unsigned_true:\n\t" | |
2685 | "mov $1,%eax\n\t" | |
2686 | ".Li386_less_unsigned_end:\n\t" | |
2687 | "xor %ebx,%ebx\n\t" | |
2688 | "lea 0x8(%esp),%esp"); | |
2689 | } | |
2690 | ||
2691 | static void | |
2692 | i386_emit_ref (int size) | |
2693 | { | |
2694 | switch (size) | |
2695 | { | |
2696 | case 1: | |
2697 | EMIT_ASM32 (i386_ref1, | |
2698 | "movb (%eax),%al"); | |
2699 | break; | |
2700 | case 2: | |
2701 | EMIT_ASM32 (i386_ref2, | |
2702 | "movw (%eax),%ax"); | |
2703 | break; | |
2704 | case 4: | |
2705 | EMIT_ASM32 (i386_ref4, | |
2706 | "movl (%eax),%eax"); | |
2707 | break; | |
2708 | case 8: | |
2709 | EMIT_ASM32 (i386_ref8, | |
2710 | "movl 4(%eax),%ebx\n\t" | |
2711 | "movl (%eax),%eax"); | |
2712 | break; | |
2713 | } | |
2714 | } | |
2715 | ||
2716 | static void | |
2717 | i386_emit_if_goto (int *offset_p, int *size_p) | |
2718 | { | |
2719 | EMIT_ASM32 (i386_if_goto, | |
2720 | "mov %eax,%ecx\n\t" | |
2721 | "or %ebx,%ecx\n\t" | |
2722 | "pop %eax\n\t" | |
2723 | "pop %ebx\n\t" | |
2724 | "cmpl $0,%ecx\n\t" | |
2725 | /* Don't trust the assembler to choose the right jump */ | |
2726 | ".byte 0x0f, 0x85, 0x0, 0x0, 0x0, 0x0"); | |
2727 | ||
2728 | if (offset_p) | |
2729 | *offset_p = 11; /* be sure that this matches the sequence above */ | |
2730 | if (size_p) | |
2731 | *size_p = 4; | |
2732 | } | |
2733 | ||
2734 | static void | |
2735 | i386_emit_goto (int *offset_p, int *size_p) | |
2736 | { | |
2737 | EMIT_ASM32 (i386_goto, | |
2738 | /* Don't trust the assembler to choose the right jump */ | |
2739 | ".byte 0xe9, 0x0, 0x0, 0x0, 0x0"); | |
2740 | if (offset_p) | |
2741 | *offset_p = 1; | |
2742 | if (size_p) | |
2743 | *size_p = 4; | |
2744 | } | |
2745 | ||
2746 | static void | |
2747 | i386_write_goto_address (CORE_ADDR from, CORE_ADDR to, int size) | |
2748 | { | |
2749 | int diff = (to - (from + size)); | |
2750 | unsigned char buf[sizeof (int)]; | |
2751 | ||
2752 | /* We're only doing 4-byte sizes at the moment. */ | |
2753 | if (size != 4) | |
2754 | { | |
2755 | emit_error = 1; | |
2756 | return; | |
2757 | } | |
2758 | ||
2759 | memcpy (buf, &diff, sizeof (int)); | |
2760 | write_inferior_memory (from, buf, sizeof (int)); | |
2761 | } | |
2762 | ||
2763 | static void | |
4e29fb54 | 2764 | i386_emit_const (LONGEST num) |
6a271cae PA |
2765 | { |
2766 | unsigned char buf[16]; | |
b00ad6ff | 2767 | int i, hi, lo; |
6a271cae PA |
2768 | CORE_ADDR buildaddr = current_insn_ptr; |
2769 | ||
2770 | i = 0; | |
2771 | buf[i++] = 0xb8; /* mov $<n>,%eax */ | |
b00ad6ff NF |
2772 | lo = num & 0xffffffff; |
2773 | memcpy (&buf[i], &lo, sizeof (lo)); | |
6a271cae PA |
2774 | i += 4; |
2775 | hi = ((num >> 32) & 0xffffffff); | |
2776 | if (hi) | |
2777 | { | |
2778 | buf[i++] = 0xbb; /* mov $<n>,%ebx */ | |
b00ad6ff | 2779 | memcpy (&buf[i], &hi, sizeof (hi)); |
6a271cae PA |
2780 | i += 4; |
2781 | } | |
2782 | else | |
2783 | { | |
2784 | buf[i++] = 0x31; buf[i++] = 0xdb; /* xor %ebx,%ebx */ | |
2785 | } | |
2786 | append_insns (&buildaddr, i, buf); | |
2787 | current_insn_ptr = buildaddr; | |
2788 | } | |
2789 | ||
2790 | static void | |
2791 | i386_emit_call (CORE_ADDR fn) | |
2792 | { | |
2793 | unsigned char buf[16]; | |
2794 | int i, offset; | |
2795 | CORE_ADDR buildaddr; | |
2796 | ||
2797 | buildaddr = current_insn_ptr; | |
2798 | i = 0; | |
2799 | buf[i++] = 0xe8; /* call <reladdr> */ | |
2800 | offset = ((int) fn) - (buildaddr + 5); | |
2801 | memcpy (buf + 1, &offset, 4); | |
2802 | append_insns (&buildaddr, 5, buf); | |
2803 | current_insn_ptr = buildaddr; | |
2804 | } | |
2805 | ||
2806 | static void | |
2807 | i386_emit_reg (int reg) | |
2808 | { | |
2809 | unsigned char buf[16]; | |
2810 | int i; | |
2811 | CORE_ADDR buildaddr; | |
2812 | ||
2813 | EMIT_ASM32 (i386_reg_a, | |
2814 | "sub $0x8,%esp"); | |
2815 | buildaddr = current_insn_ptr; | |
2816 | i = 0; | |
2817 | buf[i++] = 0xb8; /* mov $<n>,%eax */ | |
b00ad6ff | 2818 | memcpy (&buf[i], ®, sizeof (reg)); |
6a271cae PA |
2819 | i += 4; |
2820 | append_insns (&buildaddr, i, buf); | |
2821 | current_insn_ptr = buildaddr; | |
2822 | EMIT_ASM32 (i386_reg_b, | |
2823 | "mov %eax,4(%esp)\n\t" | |
2824 | "mov 8(%ebp),%eax\n\t" | |
2825 | "mov %eax,(%esp)"); | |
2826 | i386_emit_call (get_raw_reg_func_addr ()); | |
2827 | EMIT_ASM32 (i386_reg_c, | |
2828 | "xor %ebx,%ebx\n\t" | |
2829 | "lea 0x8(%esp),%esp"); | |
2830 | } | |
2831 | ||
2832 | static void | |
2833 | i386_emit_pop (void) | |
2834 | { | |
2835 | EMIT_ASM32 (i386_pop, | |
2836 | "pop %eax\n\t" | |
2837 | "pop %ebx"); | |
2838 | } | |
2839 | ||
2840 | static void | |
2841 | i386_emit_stack_flush (void) | |
2842 | { | |
2843 | EMIT_ASM32 (i386_stack_flush, | |
2844 | "push %ebx\n\t" | |
2845 | "push %eax"); | |
2846 | } | |
2847 | ||
2848 | static void | |
2849 | i386_emit_zero_ext (int arg) | |
2850 | { | |
2851 | switch (arg) | |
2852 | { | |
2853 | case 8: | |
2854 | EMIT_ASM32 (i386_zero_ext_8, | |
2855 | "and $0xff,%eax\n\t" | |
2856 | "xor %ebx,%ebx"); | |
2857 | break; | |
2858 | case 16: | |
2859 | EMIT_ASM32 (i386_zero_ext_16, | |
2860 | "and $0xffff,%eax\n\t" | |
2861 | "xor %ebx,%ebx"); | |
2862 | break; | |
2863 | case 32: | |
2864 | EMIT_ASM32 (i386_zero_ext_32, | |
2865 | "xor %ebx,%ebx"); | |
2866 | break; | |
2867 | default: | |
2868 | emit_error = 1; | |
2869 | } | |
2870 | } | |
2871 | ||
2872 | static void | |
2873 | i386_emit_swap (void) | |
2874 | { | |
2875 | EMIT_ASM32 (i386_swap, | |
2876 | "mov %eax,%ecx\n\t" | |
2877 | "mov %ebx,%edx\n\t" | |
2878 | "pop %eax\n\t" | |
2879 | "pop %ebx\n\t" | |
2880 | "push %edx\n\t" | |
2881 | "push %ecx"); | |
2882 | } | |
2883 | ||
2884 | static void | |
2885 | i386_emit_stack_adjust (int n) | |
2886 | { | |
2887 | unsigned char buf[16]; | |
2888 | int i; | |
2889 | CORE_ADDR buildaddr = current_insn_ptr; | |
2890 | ||
2891 | i = 0; | |
2892 | buf[i++] = 0x8d; /* lea $<n>(%esp),%esp */ | |
2893 | buf[i++] = 0x64; | |
2894 | buf[i++] = 0x24; | |
2895 | buf[i++] = n * 8; | |
2896 | append_insns (&buildaddr, i, buf); | |
2897 | current_insn_ptr = buildaddr; | |
2898 | } | |
2899 | ||
2900 | /* FN's prototype is `LONGEST(*fn)(int)'. */ | |
2901 | ||
2902 | static void | |
2903 | i386_emit_int_call_1 (CORE_ADDR fn, int arg1) | |
2904 | { | |
2905 | unsigned char buf[16]; | |
2906 | int i; | |
2907 | CORE_ADDR buildaddr; | |
2908 | ||
2909 | EMIT_ASM32 (i386_int_call_1_a, | |
2910 | /* Reserve a bit of stack space. */ | |
2911 | "sub $0x8,%esp"); | |
2912 | /* Put the one argument on the stack. */ | |
2913 | buildaddr = current_insn_ptr; | |
2914 | i = 0; | |
2915 | buf[i++] = 0xc7; /* movl $<arg1>,(%esp) */ | |
2916 | buf[i++] = 0x04; | |
2917 | buf[i++] = 0x24; | |
b00ad6ff | 2918 | memcpy (&buf[i], &arg1, sizeof (arg1)); |
6a271cae PA |
2919 | i += 4; |
2920 | append_insns (&buildaddr, i, buf); | |
2921 | current_insn_ptr = buildaddr; | |
2922 | i386_emit_call (fn); | |
2923 | EMIT_ASM32 (i386_int_call_1_c, | |
2924 | "mov %edx,%ebx\n\t" | |
2925 | "lea 0x8(%esp),%esp"); | |
2926 | } | |
2927 | ||
4e29fb54 | 2928 | /* FN's prototype is `void(*fn)(int,LONGEST)'. */ |
6a271cae PA |
2929 | |
2930 | static void | |
2931 | i386_emit_void_call_2 (CORE_ADDR fn, int arg1) | |
2932 | { | |
2933 | unsigned char buf[16]; | |
2934 | int i; | |
2935 | CORE_ADDR buildaddr; | |
2936 | ||
2937 | EMIT_ASM32 (i386_void_call_2_a, | |
2938 | /* Preserve %eax only; we don't have to worry about %ebx. */ | |
2939 | "push %eax\n\t" | |
2940 | /* Reserve a bit of stack space for arguments. */ | |
2941 | "sub $0x10,%esp\n\t" | |
2942 | /* Copy "top" to the second argument position. (Note that | |
2943 | we can't assume function won't scribble on its | |
2944 | arguments, so don't try to restore from this.) */ | |
2945 | "mov %eax,4(%esp)\n\t" | |
2946 | "mov %ebx,8(%esp)"); | |
2947 | /* Put the first argument on the stack. */ | |
2948 | buildaddr = current_insn_ptr; | |
2949 | i = 0; | |
2950 | buf[i++] = 0xc7; /* movl $<arg1>,(%esp) */ | |
2951 | buf[i++] = 0x04; | |
2952 | buf[i++] = 0x24; | |
b00ad6ff | 2953 | memcpy (&buf[i], &arg1, sizeof (arg1)); |
6a271cae PA |
2954 | i += 4; |
2955 | append_insns (&buildaddr, i, buf); | |
2956 | current_insn_ptr = buildaddr; | |
2957 | i386_emit_call (fn); | |
2958 | EMIT_ASM32 (i386_void_call_2_b, | |
2959 | "lea 0x10(%esp),%esp\n\t" | |
2960 | /* Restore original stack top. */ | |
2961 | "pop %eax"); | |
2962 | } | |
2963 | ||
6b9801d4 SS |
2964 | |
2965 | void | |
2966 | i386_emit_eq_goto (int *offset_p, int *size_p) | |
2967 | { | |
2968 | EMIT_ASM32 (eq, | |
2969 | /* Check low half first, more likely to be decider */ | |
2970 | "cmpl %eax,(%esp)\n\t" | |
2971 | "jne .Leq_fallthru\n\t" | |
2972 | "cmpl %ebx,4(%esp)\n\t" | |
2973 | "jne .Leq_fallthru\n\t" | |
2974 | "lea 0x8(%esp),%esp\n\t" | |
2975 | "pop %eax\n\t" | |
2976 | "pop %ebx\n\t" | |
2977 | /* jmp, but don't trust the assembler to choose the right jump */ | |
2978 | ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t" | |
2979 | ".Leq_fallthru:\n\t" | |
2980 | "lea 0x8(%esp),%esp\n\t" | |
2981 | "pop %eax\n\t" | |
2982 | "pop %ebx"); | |
2983 | ||
2984 | if (offset_p) | |
2985 | *offset_p = 18; | |
2986 | if (size_p) | |
2987 | *size_p = 4; | |
2988 | } | |
2989 | ||
2990 | void | |
2991 | i386_emit_ne_goto (int *offset_p, int *size_p) | |
2992 | { | |
2993 | EMIT_ASM32 (ne, | |
2994 | /* Check low half first, more likely to be decider */ | |
2995 | "cmpl %eax,(%esp)\n\t" | |
2996 | "jne .Lne_jump\n\t" | |
2997 | "cmpl %ebx,4(%esp)\n\t" | |
2998 | "je .Lne_fallthru\n\t" | |
2999 | ".Lne_jump:\n\t" | |
3000 | "lea 0x8(%esp),%esp\n\t" | |
3001 | "pop %eax\n\t" | |
3002 | "pop %ebx\n\t" | |
3003 | /* jmp, but don't trust the assembler to choose the right jump */ | |
3004 | ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t" | |
3005 | ".Lne_fallthru:\n\t" | |
3006 | "lea 0x8(%esp),%esp\n\t" | |
3007 | "pop %eax\n\t" | |
3008 | "pop %ebx"); | |
3009 | ||
3010 | if (offset_p) | |
3011 | *offset_p = 18; | |
3012 | if (size_p) | |
3013 | *size_p = 4; | |
3014 | } | |
3015 | ||
3016 | void | |
3017 | i386_emit_lt_goto (int *offset_p, int *size_p) | |
3018 | { | |
3019 | EMIT_ASM32 (lt, | |
3020 | "cmpl %ebx,4(%esp)\n\t" | |
3021 | "jl .Llt_jump\n\t" | |
3022 | "jne .Llt_fallthru\n\t" | |
3023 | "cmpl %eax,(%esp)\n\t" | |
3024 | "jnl .Llt_fallthru\n\t" | |
3025 | ".Llt_jump:\n\t" | |
3026 | "lea 0x8(%esp),%esp\n\t" | |
3027 | "pop %eax\n\t" | |
3028 | "pop %ebx\n\t" | |
3029 | /* jmp, but don't trust the assembler to choose the right jump */ | |
3030 | ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t" | |
3031 | ".Llt_fallthru:\n\t" | |
3032 | "lea 0x8(%esp),%esp\n\t" | |
3033 | "pop %eax\n\t" | |
3034 | "pop %ebx"); | |
3035 | ||
3036 | if (offset_p) | |
3037 | *offset_p = 20; | |
3038 | if (size_p) | |
3039 | *size_p = 4; | |
3040 | } | |
3041 | ||
3042 | void | |
3043 | i386_emit_le_goto (int *offset_p, int *size_p) | |
3044 | { | |
3045 | EMIT_ASM32 (le, | |
3046 | "cmpl %ebx,4(%esp)\n\t" | |
3047 | "jle .Lle_jump\n\t" | |
3048 | "jne .Lle_fallthru\n\t" | |
3049 | "cmpl %eax,(%esp)\n\t" | |
3050 | "jnle .Lle_fallthru\n\t" | |
3051 | ".Lle_jump:\n\t" | |
3052 | "lea 0x8(%esp),%esp\n\t" | |
3053 | "pop %eax\n\t" | |
3054 | "pop %ebx\n\t" | |
3055 | /* jmp, but don't trust the assembler to choose the right jump */ | |
3056 | ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t" | |
3057 | ".Lle_fallthru:\n\t" | |
3058 | "lea 0x8(%esp),%esp\n\t" | |
3059 | "pop %eax\n\t" | |
3060 | "pop %ebx"); | |
3061 | ||
3062 | if (offset_p) | |
3063 | *offset_p = 20; | |
3064 | if (size_p) | |
3065 | *size_p = 4; | |
3066 | } | |
3067 | ||
3068 | void | |
3069 | i386_emit_gt_goto (int *offset_p, int *size_p) | |
3070 | { | |
3071 | EMIT_ASM32 (gt, | |
3072 | "cmpl %ebx,4(%esp)\n\t" | |
3073 | "jg .Lgt_jump\n\t" | |
3074 | "jne .Lgt_fallthru\n\t" | |
3075 | "cmpl %eax,(%esp)\n\t" | |
3076 | "jng .Lgt_fallthru\n\t" | |
3077 | ".Lgt_jump:\n\t" | |
3078 | "lea 0x8(%esp),%esp\n\t" | |
3079 | "pop %eax\n\t" | |
3080 | "pop %ebx\n\t" | |
3081 | /* jmp, but don't trust the assembler to choose the right jump */ | |
3082 | ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t" | |
3083 | ".Lgt_fallthru:\n\t" | |
3084 | "lea 0x8(%esp),%esp\n\t" | |
3085 | "pop %eax\n\t" | |
3086 | "pop %ebx"); | |
3087 | ||
3088 | if (offset_p) | |
3089 | *offset_p = 20; | |
3090 | if (size_p) | |
3091 | *size_p = 4; | |
3092 | } | |
3093 | ||
3094 | void | |
3095 | i386_emit_ge_goto (int *offset_p, int *size_p) | |
3096 | { | |
3097 | EMIT_ASM32 (ge, | |
3098 | "cmpl %ebx,4(%esp)\n\t" | |
3099 | "jge .Lge_jump\n\t" | |
3100 | "jne .Lge_fallthru\n\t" | |
3101 | "cmpl %eax,(%esp)\n\t" | |
3102 | "jnge .Lge_fallthru\n\t" | |
3103 | ".Lge_jump:\n\t" | |
3104 | "lea 0x8(%esp),%esp\n\t" | |
3105 | "pop %eax\n\t" | |
3106 | "pop %ebx\n\t" | |
3107 | /* jmp, but don't trust the assembler to choose the right jump */ | |
3108 | ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t" | |
3109 | ".Lge_fallthru:\n\t" | |
3110 | "lea 0x8(%esp),%esp\n\t" | |
3111 | "pop %eax\n\t" | |
3112 | "pop %ebx"); | |
3113 | ||
3114 | if (offset_p) | |
3115 | *offset_p = 20; | |
3116 | if (size_p) | |
3117 | *size_p = 4; | |
3118 | } | |
3119 | ||
6a271cae PA |
3120 | struct emit_ops i386_emit_ops = |
3121 | { | |
3122 | i386_emit_prologue, | |
3123 | i386_emit_epilogue, | |
3124 | i386_emit_add, | |
3125 | i386_emit_sub, | |
3126 | i386_emit_mul, | |
3127 | i386_emit_lsh, | |
3128 | i386_emit_rsh_signed, | |
3129 | i386_emit_rsh_unsigned, | |
3130 | i386_emit_ext, | |
3131 | i386_emit_log_not, | |
3132 | i386_emit_bit_and, | |
3133 | i386_emit_bit_or, | |
3134 | i386_emit_bit_xor, | |
3135 | i386_emit_bit_not, | |
3136 | i386_emit_equal, | |
3137 | i386_emit_less_signed, | |
3138 | i386_emit_less_unsigned, | |
3139 | i386_emit_ref, | |
3140 | i386_emit_if_goto, | |
3141 | i386_emit_goto, | |
3142 | i386_write_goto_address, | |
3143 | i386_emit_const, | |
3144 | i386_emit_call, | |
3145 | i386_emit_reg, | |
3146 | i386_emit_pop, | |
3147 | i386_emit_stack_flush, | |
3148 | i386_emit_zero_ext, | |
3149 | i386_emit_swap, | |
3150 | i386_emit_stack_adjust, | |
3151 | i386_emit_int_call_1, | |
6b9801d4 SS |
3152 | i386_emit_void_call_2, |
3153 | i386_emit_eq_goto, | |
3154 | i386_emit_ne_goto, | |
3155 | i386_emit_lt_goto, | |
3156 | i386_emit_le_goto, | |
3157 | i386_emit_gt_goto, | |
3158 | i386_emit_ge_goto | |
6a271cae PA |
3159 | }; |
3160 | ||
3161 | ||
3162 | static struct emit_ops * | |
3163 | x86_emit_ops (void) | |
3164 | { | |
3165 | #ifdef __x86_64__ | |
3166 | int use_64bit = register_size (0) == 8; | |
3167 | ||
3168 | if (use_64bit) | |
3169 | return &amd64_emit_ops; | |
3170 | else | |
3171 | #endif | |
3172 | return &i386_emit_ops; | |
3173 | } | |
3174 | ||
d0722149 DE |
3175 | /* This is initialized assuming an amd64 target. |
3176 | x86_arch_setup will correct it for i386 or amd64 targets. */ | |
3177 | ||
3178 | struct linux_target_ops the_low_target = | |
3179 | { | |
3180 | x86_arch_setup, | |
3181 | -1, | |
3182 | NULL, | |
3183 | NULL, | |
3184 | NULL, | |
1faeff08 | 3185 | NULL, |
c14dfd32 | 3186 | NULL, /* fetch_register */ |
d0722149 DE |
3187 | x86_get_pc, |
3188 | x86_set_pc, | |
3189 | x86_breakpoint, | |
3190 | x86_breakpoint_len, | |
3191 | NULL, | |
3192 | 1, | |
3193 | x86_breakpoint_at, | |
aa5ca48f DE |
3194 | x86_insert_point, |
3195 | x86_remove_point, | |
3196 | x86_stopped_by_watchpoint, | |
3197 | x86_stopped_data_address, | |
d0722149 DE |
3198 | /* collect_ptrace_register/supply_ptrace_register are not needed in the |
3199 | native i386 case (no registers smaller than an xfer unit), and are not | |
3200 | used in the biarch case (HAVE_LINUX_USRREGS is not defined). */ | |
3201 | NULL, | |
3202 | NULL, | |
3203 | /* need to fix up i386 siginfo if host is amd64 */ | |
3204 | x86_siginfo_fixup, | |
aa5ca48f DE |
3205 | x86_linux_new_process, |
3206 | x86_linux_new_thread, | |
1570b33e | 3207 | x86_linux_prepare_to_resume, |
219f2f23 | 3208 | x86_linux_process_qsupported, |
fa593d66 PA |
3209 | x86_supports_tracepoints, |
3210 | x86_get_thread_area, | |
6a271cae | 3211 | x86_install_fast_tracepoint_jump_pad, |
405f8e94 SS |
3212 | x86_emit_ops, |
3213 | x86_get_min_fast_tracepoint_insn_len, | |
d0722149 | 3214 | }; |