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1525d545 | 1 | /* GNU/Linux/Xtensa specific low level interface, for the remote server for GDB. |
61baf725 | 2 | Copyright (C) 2007-2017 Free Software Foundation, Inc. |
1525d545 MG |
3 | |
4 | This file is part of GDB. | |
5 | ||
6 | This program is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 3 of the License, or | |
9 | (at your option) any later version. | |
10 | ||
11 | This program is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ | |
18 | ||
19 | ||
20 | #include "server.h" | |
21 | #include "linux-low.h" | |
22 | ||
d05b4ac3 UW |
23 | /* Defined in auto-generated file reg-xtensa.c. */ |
24 | void init_registers_xtensa (void); | |
3aee8918 | 25 | extern const struct target_desc *tdesc_xtensa; |
d05b4ac3 | 26 | |
e671835b | 27 | #include <asm/ptrace.h> |
1525d545 | 28 | #include <xtensa-config.h> |
40045d91 MF |
29 | #include "arch/xtensa.h" |
30 | #include "gdb_proc_service.h" | |
1525d545 MG |
31 | |
32 | #include "xtensa-xtregs.c" | |
33 | ||
34 | enum regnum { | |
35 | R_PC=0, R_PS, | |
36 | R_LBEG, R_LEND, R_LCOUNT, | |
37 | R_SAR, | |
38 | R_WS, R_WB, | |
a12e714b | 39 | R_THREADPTR, |
1b3f6016 | 40 | R_A0 = 64 |
1525d545 MG |
41 | }; |
42 | ||
43 | static void | |
442ea881 | 44 | xtensa_fill_gregset (struct regcache *regcache, void *buf) |
1525d545 MG |
45 | { |
46 | elf_greg_t* rset = (elf_greg_t*)buf; | |
3aee8918 | 47 | const struct target_desc *tdesc = regcache->tdesc; |
1525d545 MG |
48 | int ar0_regnum; |
49 | char *ptr; | |
50 | int i; | |
51 | ||
52 | /* Take care of AR registers. */ | |
53 | ||
3aee8918 | 54 | ar0_regnum = find_regno (tdesc, "ar0"); |
1525d545 MG |
55 | ptr = (char*)&rset[R_A0]; |
56 | ||
57 | for (i = ar0_regnum; i < ar0_regnum + XCHAL_NUM_AREGS; i++) | |
58 | { | |
442ea881 | 59 | collect_register (regcache, i, ptr); |
3aee8918 | 60 | ptr += register_size (tdesc, i); |
1525d545 MG |
61 | } |
62 | ||
1a09b50a MF |
63 | if (XSHAL_ABI == XTHAL_ABI_CALL0) |
64 | { | |
65 | int a0_regnum = find_regno (tdesc, "a0"); | |
66 | ptr = (char *) &rset[R_A0 + 4 * rset[R_WB]]; | |
67 | ||
68 | for (i = a0_regnum; i < a0_regnum + C0_NREGS; i++) | |
69 | { | |
70 | if ((4 * rset[R_WB] + i - a0_regnum) == XCHAL_NUM_AREGS) | |
71 | ptr = (char *) &rset[R_A0]; | |
72 | collect_register (regcache, i, ptr); | |
73 | ptr += register_size (tdesc, i); | |
74 | } | |
75 | } | |
76 | ||
1525d545 MG |
77 | /* Loop registers, if hardware has it. */ |
78 | ||
a2d5a9d7 | 79 | #if XCHAL_HAVE_LOOPS |
442ea881 PA |
80 | collect_register_by_name (regcache, "lbeg", (char*)&rset[R_LBEG]); |
81 | collect_register_by_name (regcache, "lend", (char*)&rset[R_LEND]); | |
82 | collect_register_by_name (regcache, "lcount", (char*)&rset[R_LCOUNT]); | |
1525d545 MG |
83 | #endif |
84 | ||
442ea881 PA |
85 | collect_register_by_name (regcache, "sar", (char*)&rset[R_SAR]); |
86 | collect_register_by_name (regcache, "pc", (char*)&rset[R_PC]); | |
87 | collect_register_by_name (regcache, "ps", (char*)&rset[R_PS]); | |
88 | collect_register_by_name (regcache, "windowbase", (char*)&rset[R_WB]); | |
89 | collect_register_by_name (regcache, "windowstart", (char*)&rset[R_WS]); | |
a12e714b MF |
90 | |
91 | #if XCHAL_HAVE_THREADPTR | |
92 | collect_register_by_name (regcache, "threadptr", | |
93 | (char *) &rset[R_THREADPTR]); | |
94 | #endif | |
1525d545 MG |
95 | } |
96 | ||
97 | static void | |
442ea881 | 98 | xtensa_store_gregset (struct regcache *regcache, const void *buf) |
1525d545 MG |
99 | { |
100 | const elf_greg_t* rset = (const elf_greg_t*)buf; | |
3aee8918 | 101 | const struct target_desc *tdesc = regcache->tdesc; |
1525d545 MG |
102 | int ar0_regnum; |
103 | char *ptr; | |
104 | int i; | |
105 | ||
106 | /* Take care of AR registers. */ | |
107 | ||
3aee8918 | 108 | ar0_regnum = find_regno (tdesc, "ar0"); |
1525d545 MG |
109 | ptr = (char *)&rset[R_A0]; |
110 | ||
111 | for (i = ar0_regnum; i < ar0_regnum + XCHAL_NUM_AREGS; i++) | |
112 | { | |
442ea881 | 113 | supply_register (regcache, i, ptr); |
3aee8918 | 114 | ptr += register_size (tdesc, i); |
1525d545 MG |
115 | } |
116 | ||
1a09b50a MF |
117 | if (XSHAL_ABI == XTHAL_ABI_CALL0) |
118 | { | |
119 | int a0_regnum = find_regno (tdesc, "a0"); | |
120 | ptr = (char *) &rset[R_A0 + (4 * rset[R_WB]) % XCHAL_NUM_AREGS]; | |
121 | ||
122 | for (i = a0_regnum; i < a0_regnum + C0_NREGS; i++) | |
123 | { | |
124 | if ((4 * rset[R_WB] + i - a0_regnum) == XCHAL_NUM_AREGS) | |
125 | ptr = (char *) &rset[R_A0]; | |
126 | supply_register (regcache, i, ptr); | |
127 | ptr += register_size (tdesc, i); | |
128 | } | |
129 | } | |
130 | ||
1525d545 MG |
131 | /* Loop registers, if hardware has it. */ |
132 | ||
a2d5a9d7 | 133 | #if XCHAL_HAVE_LOOPS |
442ea881 PA |
134 | supply_register_by_name (regcache, "lbeg", (char*)&rset[R_LBEG]); |
135 | supply_register_by_name (regcache, "lend", (char*)&rset[R_LEND]); | |
136 | supply_register_by_name (regcache, "lcount", (char*)&rset[R_LCOUNT]); | |
1525d545 MG |
137 | #endif |
138 | ||
442ea881 PA |
139 | supply_register_by_name (regcache, "sar", (char*)&rset[R_SAR]); |
140 | supply_register_by_name (regcache, "pc", (char*)&rset[R_PC]); | |
141 | supply_register_by_name (regcache, "ps", (char*)&rset[R_PS]); | |
142 | supply_register_by_name (regcache, "windowbase", (char*)&rset[R_WB]); | |
143 | supply_register_by_name (regcache, "windowstart", (char*)&rset[R_WS]); | |
a12e714b MF |
144 | |
145 | #if XCHAL_HAVE_THREADPTR | |
146 | supply_register_by_name (regcache, "threadptr", | |
147 | (char *) &rset[R_THREADPTR]); | |
148 | #endif | |
1525d545 MG |
149 | } |
150 | ||
151 | /* Xtensa GNU/Linux PTRACE interface includes extended register set. */ | |
152 | ||
153 | static void | |
442ea881 | 154 | xtensa_fill_xtregset (struct regcache *regcache, void *buf) |
1525d545 MG |
155 | { |
156 | const xtensa_regtable_t *ptr; | |
157 | ||
158 | for (ptr = xtensa_regmap_table; ptr->name; ptr++) | |
159 | { | |
442ea881 | 160 | collect_register_by_name (regcache, ptr->name, |
1525d545 MG |
161 | (char*)buf + ptr->ptrace_offset); |
162 | } | |
163 | } | |
164 | ||
165 | static void | |
442ea881 | 166 | xtensa_store_xtregset (struct regcache *regcache, const void *buf) |
1525d545 MG |
167 | { |
168 | const xtensa_regtable_t *ptr; | |
169 | ||
170 | for (ptr = xtensa_regmap_table; ptr->name; ptr++) | |
171 | { | |
442ea881 | 172 | supply_register_by_name (regcache, ptr->name, |
1525d545 MG |
173 | (char*)buf + ptr->ptrace_offset); |
174 | } | |
175 | } | |
176 | ||
3aee8918 | 177 | static struct regset_info xtensa_regsets[] = { |
1570b33e | 178 | { PTRACE_GETREGS, PTRACE_SETREGS, 0, sizeof (elf_gregset_t), |
1525d545 MG |
179 | GENERAL_REGS, |
180 | xtensa_fill_gregset, xtensa_store_gregset }, | |
1570b33e | 181 | { PTRACE_GETXTREGS, PTRACE_SETXTREGS, 0, XTENSA_ELF_XTREG_SIZE, |
1525d545 MG |
182 | EXTENDED_REGS, |
183 | xtensa_fill_xtregset, xtensa_store_xtregset }, | |
50bc912a | 184 | NULL_REGSET |
1525d545 MG |
185 | }; |
186 | ||
187 | #if XCHAL_HAVE_BE | |
188 | #define XTENSA_BREAKPOINT {0xd2,0x0f} | |
189 | #else | |
190 | #define XTENSA_BREAKPOINT {0x2d,0xf0} | |
191 | #endif | |
192 | ||
dd373349 | 193 | static const gdb_byte xtensa_breakpoint[] = XTENSA_BREAKPOINT; |
1525d545 MG |
194 | #define xtensa_breakpoint_len 2 |
195 | ||
dd373349 AT |
196 | /* Implementation of linux_target_ops method "sw_breakpoint_from_kind". */ |
197 | ||
198 | static const gdb_byte * | |
199 | xtensa_sw_breakpoint_from_kind (int kind, int *size) | |
200 | { | |
201 | *size = xtensa_breakpoint_len; | |
202 | return xtensa_breakpoint; | |
203 | } | |
204 | ||
1525d545 MG |
205 | static int |
206 | xtensa_breakpoint_at (CORE_ADDR where) | |
207 | { | |
208 | unsigned long insn; | |
209 | ||
210 | (*the_target->read_memory) (where, (unsigned char *) &insn, | |
211 | xtensa_breakpoint_len); | |
493e2a69 MS |
212 | return memcmp((char *) &insn, |
213 | xtensa_breakpoint, xtensa_breakpoint_len) == 0; | |
1525d545 MG |
214 | } |
215 | ||
40045d91 MF |
216 | /* Called by libthread_db. */ |
217 | ||
218 | ps_err_e | |
754653a7 | 219 | ps_get_thread_area (struct ps_prochandle *ph, |
40045d91 MF |
220 | lwpid_t lwpid, int idx, void **base) |
221 | { | |
222 | xtensa_elf_gregset_t regs; | |
223 | ||
224 | if (ptrace (PTRACE_GETREGS, lwpid, NULL, ®s) != 0) | |
225 | return PS_ERR; | |
226 | ||
227 | /* IDX is the bias from the thread pointer to the beginning of the | |
228 | thread descriptor. It has to be subtracted due to implementation | |
229 | quirks in libthread_db. */ | |
230 | *base = (void *) ((char *) regs.threadptr - idx); | |
231 | ||
232 | return PS_OK; | |
233 | } | |
234 | ||
3aee8918 PA |
235 | static struct regsets_info xtensa_regsets_info = |
236 | { | |
237 | xtensa_regsets, /* regsets */ | |
238 | 0, /* num_regsets */ | |
239 | NULL, /* disabled_regsets */ | |
240 | }; | |
241 | ||
3aee8918 PA |
242 | static struct regs_info regs_info = |
243 | { | |
244 | NULL, /* regset_bitmap */ | |
deb44829 | 245 | NULL, /* usrregs */ |
3aee8918 PA |
246 | &xtensa_regsets_info |
247 | }; | |
248 | ||
249 | static void | |
250 | xtensa_arch_setup (void) | |
251 | { | |
252 | current_process ()->tdesc = tdesc_xtensa; | |
253 | } | |
254 | ||
7d00775e AT |
255 | /* Support for hardware single step. */ |
256 | ||
257 | static int | |
258 | xtensa_supports_hardware_single_step (void) | |
259 | { | |
260 | return 1; | |
261 | } | |
262 | ||
3aee8918 PA |
263 | static const struct regs_info * |
264 | xtensa_regs_info (void) | |
265 | { | |
266 | return ®s_info; | |
267 | } | |
268 | ||
1525d545 | 269 | struct linux_target_ops the_low_target = { |
3aee8918 PA |
270 | xtensa_arch_setup, |
271 | xtensa_regs_info, | |
1525d545 MG |
272 | 0, |
273 | 0, | |
c14dfd32 | 274 | NULL, /* fetch_register */ |
276d4552 YQ |
275 | linux_get_pc_32bit, |
276 | linux_set_pc_32bit, | |
dd373349 AT |
277 | NULL, /* breakpoint_kind_from_pc */ |
278 | xtensa_sw_breakpoint_from_kind, | |
1525d545 MG |
279 | NULL, |
280 | 0, | |
281 | xtensa_breakpoint_at, | |
7d00775e AT |
282 | NULL, /* supports_z_point_type */ |
283 | NULL, /* insert_point */ | |
284 | NULL, /* remove_point */ | |
285 | NULL, /* stopped_by_watchpoint */ | |
286 | NULL, /* stopped_data_address */ | |
287 | NULL, /* collect_ptrace_register */ | |
288 | NULL, /* supply_ptrace_register */ | |
289 | NULL, /* siginfo_fixup */ | |
290 | NULL, /* new_process */ | |
04ec7890 | 291 | NULL, /* delete_process */ |
7d00775e | 292 | NULL, /* new_thread */ |
466eecee | 293 | NULL, /* delete_thread */ |
7d00775e AT |
294 | NULL, /* new_fork */ |
295 | NULL, /* prepare_to_resume */ | |
296 | NULL, /* process_qsupported */ | |
297 | NULL, /* supports_tracepoints */ | |
298 | NULL, /* get_thread_area */ | |
299 | NULL, /* install_fast_tracepoint_jump_pad */ | |
300 | NULL, /* emit_ops */ | |
301 | NULL, /* get_min_fast_tracepoint_insn_len */ | |
302 | NULL, /* supports_range_stepping */ | |
303 | NULL, /* breakpoint_kind_from_current_state */ | |
304 | xtensa_supports_hardware_single_step, | |
1525d545 | 305 | }; |
3aee8918 PA |
306 | |
307 | ||
308 | void | |
309 | initialize_low_arch (void) | |
310 | { | |
311 | /* Initialize the Linux target descriptions. */ | |
312 | init_registers_xtensa (); | |
313 | ||
314 | initialize_regsets_info (&xtensa_regsets_info); | |
315 | } |