[deliverable/binutils-gdb.git] / gdb / gdbserver / linux-xtensa-low.c

/* GNU/Linux/Xtensa specific low level interface, for the remote server for GDB.
   Copyright (C) 2007-2017 Free Software Foundation, Inc.

   This file is part of GDB.

   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 3 of the License, or
   (at your option) any later version.

   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */


#include "server.h"
#include "linux-low.h"

/* Defined in auto-generated file reg-xtensa.c.  */
void init_registers_xtensa (void);
extern const struct target_desc *tdesc_xtensa;

#include <asm/ptrace.h>
#include <xtensa-config.h>
#include "arch/xtensa.h"
#include "gdb_proc_service.h"

#include "xtensa-xtregs.c"

enum regnum {
	R_PC=0,	R_PS,
	R_LBEG,	R_LEND,	R_LCOUNT,
	R_SAR,
	R_WS, R_WB,
	R_A0 = 64
};

static void
xtensa_fill_gregset (struct regcache *regcache, void *buf)
{
  elf_greg_t* rset = (elf_greg_t*)buf;
  const struct target_desc *tdesc = regcache->tdesc;
  int ar0_regnum;
  char *ptr;
  int i;

  /* Take care of AR registers.  */

  ar0_regnum = find_regno (tdesc, "ar0");
  ptr = (char*)&rset[R_A0];

  for (i = ar0_regnum; i < ar0_regnum + XCHAL_NUM_AREGS; i++)
    {
      collect_register (regcache, i, ptr);
      ptr += register_size (tdesc, i);
    }

  if (XSHAL_ABI == XTHAL_ABI_CALL0)
    {
      int a0_regnum = find_regno (tdesc, "a0");
      ptr = (char *) &rset[R_A0 + 4 * rset[R_WB]];

      for (i = a0_regnum; i < a0_regnum + C0_NREGS; i++)
	{
	  if ((4 * rset[R_WB] + i - a0_regnum) == XCHAL_NUM_AREGS)
	    ptr = (char *) &rset[R_A0];
	  collect_register (regcache, i, ptr);
	  ptr += register_size (tdesc, i);
	}
    }

  /* Loop registers, if hardware has it.  */

#if XCHAL_HAVE_LOOPS
  collect_register_by_name (regcache, "lbeg", (char*)&rset[R_LBEG]);
  collect_register_by_name (regcache, "lend", (char*)&rset[R_LEND]);
  collect_register_by_name (regcache, "lcount", (char*)&rset[R_LCOUNT]);
#endif

  collect_register_by_name (regcache, "sar", (char*)&rset[R_SAR]);
  collect_register_by_name (regcache, "pc", (char*)&rset[R_PC]);
  collect_register_by_name (regcache, "ps", (char*)&rset[R_PS]);
  collect_register_by_name (regcache, "windowbase", (char*)&rset[R_WB]);
  collect_register_by_name (regcache, "windowstart", (char*)&rset[R_WS]);
}

static void
xtensa_store_gregset (struct regcache *regcache, const void *buf)
{
  const elf_greg_t* rset = (const elf_greg_t*)buf;
  const struct target_desc *tdesc = regcache->tdesc;
  int ar0_regnum;
  char *ptr;
  int i;

  /* Take care of AR registers.  */

  ar0_regnum = find_regno (tdesc, "ar0");
  ptr = (char *)&rset[R_A0];

  for (i = ar0_regnum; i < ar0_regnum + XCHAL_NUM_AREGS; i++)
    {
      supply_register (regcache, i, ptr);
      ptr += register_size (tdesc, i);
    }

  if (XSHAL_ABI == XTHAL_ABI_CALL0)
    {
      int a0_regnum = find_regno (tdesc, "a0");
      ptr = (char *) &rset[R_A0 + (4 * rset[R_WB]) % XCHAL_NUM_AREGS];

      for (i = a0_regnum; i < a0_regnum + C0_NREGS; i++)
	{
	  if ((4 * rset[R_WB] + i - a0_regnum) == XCHAL_NUM_AREGS)
	    ptr = (char *) &rset[R_A0];
	  supply_register (regcache, i, ptr);
	  ptr += register_size (tdesc, i);
	}
    }

  /* Loop registers, if hardware has it.  */

#if XCHAL_HAVE_LOOPS
  supply_register_by_name (regcache, "lbeg", (char*)&rset[R_LBEG]);
  supply_register_by_name (regcache, "lend", (char*)&rset[R_LEND]);
  supply_register_by_name (regcache, "lcount", (char*)&rset[R_LCOUNT]);
#endif

  supply_register_by_name (regcache, "sar", (char*)&rset[R_SAR]);
  supply_register_by_name (regcache, "pc", (char*)&rset[R_PC]);
  supply_register_by_name (regcache, "ps", (char*)&rset[R_PS]);
  supply_register_by_name (regcache, "windowbase", (char*)&rset[R_WB]);
  supply_register_by_name (regcache, "windowstart", (char*)&rset[R_WS]);
}

/* Xtensa GNU/Linux PTRACE interface includes extended register set.  */

static void
xtensa_fill_xtregset (struct regcache *regcache, void *buf)
{
  const xtensa_regtable_t *ptr;

  for (ptr = xtensa_regmap_table; ptr->name; ptr++)
    {
      collect_register_by_name (regcache, ptr->name,
				(char*)buf + ptr->ptrace_offset);
    }
}

static void
xtensa_store_xtregset (struct regcache *regcache, const void *buf)
{
  const xtensa_regtable_t *ptr;

  for (ptr = xtensa_regmap_table; ptr->name; ptr++)
    {
      supply_register_by_name (regcache, ptr->name,
				(char*)buf + ptr->ptrace_offset);
    }
}

static struct regset_info xtensa_regsets[] = {
  { PTRACE_GETREGS, PTRACE_SETREGS, 0, sizeof (elf_gregset_t),
    GENERAL_REGS,
    xtensa_fill_gregset, xtensa_store_gregset },
  { PTRACE_GETXTREGS, PTRACE_SETXTREGS, 0, XTENSA_ELF_XTREG_SIZE,
    EXTENDED_REGS,
    xtensa_fill_xtregset, xtensa_store_xtregset },
  NULL_REGSET
};

#if XCHAL_HAVE_BE
#define XTENSA_BREAKPOINT {0xd2,0x0f}
#else
#define XTENSA_BREAKPOINT {0x2d,0xf0}
#endif

static const gdb_byte xtensa_breakpoint[] = XTENSA_BREAKPOINT;
#define xtensa_breakpoint_len 2

/* Implementation of linux_target_ops method "sw_breakpoint_from_kind".  */

static const gdb_byte *
xtensa_sw_breakpoint_from_kind (int kind, int *size)
{
  *size = xtensa_breakpoint_len;
  return xtensa_breakpoint;
}

static int
xtensa_breakpoint_at (CORE_ADDR where)
{
    unsigned long insn;

    (*the_target->read_memory) (where, (unsigned char *) &insn,
				xtensa_breakpoint_len);
    return memcmp((char *) &insn,
		  xtensa_breakpoint, xtensa_breakpoint_len) == 0;
}

/* Called by libthread_db.  */

ps_err_e
ps_get_thread_area (struct ps_prochandle *ph,
                    lwpid_t lwpid, int idx, void **base)
{
  xtensa_elf_gregset_t regs;

  if (ptrace (PTRACE_GETREGS, lwpid, NULL, &regs) != 0)
    return PS_ERR;

  /* IDX is the bias from the thread pointer to the beginning of the
     thread descriptor.  It has to be subtracted due to implementation
     quirks in libthread_db.  */
  *base = (void *) ((char *) regs.threadptr - idx);

  return PS_OK;
}

static struct regsets_info xtensa_regsets_info =
  {
    xtensa_regsets, /* regsets */
    0, /* num_regsets */
    NULL, /* disabled_regsets */
  };

static struct regs_info regs_info =
  {
    NULL, /* regset_bitmap */
    NULL, /* usrregs */
    &xtensa_regsets_info
  };

static void
xtensa_arch_setup (void)
{
  current_process ()->tdesc = tdesc_xtensa;
}

/* Support for hardware single step.  */

static int
xtensa_supports_hardware_single_step (void)
{
  return 1;
}

static const struct regs_info *
xtensa_regs_info (void)
{
  return &regs_info;
}

struct linux_target_ops the_low_target = {
  xtensa_arch_setup,
  xtensa_regs_info,
  0,
  0,
  NULL, /* fetch_register */
  linux_get_pc_32bit,
  linux_set_pc_32bit,
  NULL, /* breakpoint_kind_from_pc */
  xtensa_sw_breakpoint_from_kind,
  NULL,
  0,
  xtensa_breakpoint_at,
  NULL, /* supports_z_point_type */
  NULL, /* insert_point */
  NULL, /* remove_point */
  NULL, /* stopped_by_watchpoint */
  NULL, /* stopped_data_address */
  NULL, /* collect_ptrace_register */
  NULL, /* supply_ptrace_register */
  NULL, /* siginfo_fixup */
  NULL, /* new_process */
  NULL, /* new_thread */
  NULL, /* new_fork */
  NULL, /* prepare_to_resume */
  NULL, /* process_qsupported */
  NULL, /* supports_tracepoints */
  NULL, /* get_thread_area */
  NULL, /* install_fast_tracepoint_jump_pad */
  NULL, /* emit_ops */
  NULL, /* get_min_fast_tracepoint_insn_len */
  NULL, /* supports_range_stepping */
  NULL, /* breakpoint_kind_from_current_state */
  xtensa_supports_hardware_single_step,
};


void
initialize_low_arch (void)
{
  /* Initialize the Linux target descriptions.  */
  init_registers_xtensa ();

  initialize_regsets_info (&xtensa_regsets_info);
}
Commit	Line	Data
1525d545	1	/* GNU/Linux/Xtensa specific low level interface, for the remote server for GDB.
61baf725	2	Copyright (C) 2007-2017 Free Software Foundation, Inc.
1525d545 MG	3
	4	This file is part of GDB.
	5
	6	This program is free software; you can redistribute it and/or modify
	7	it under the terms of the GNU General Public License as published by
	8	the Free Software Foundation; either version 3 of the License, or
	9	(at your option) any later version.
	10
	11	This program is distributed in the hope that it will be useful,
	12	but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	GNU General Public License for more details.
	15
	16	You should have received a copy of the GNU General Public License
	17	along with this program. If not, see <http://www.gnu.org/licenses/>. */
	18
	19
	20	#include "server.h"
	21	#include "linux-low.h"
	22
d05b4ac3 UW	23	/* Defined in auto-generated file reg-xtensa.c. */
d05b4ac3 UW	24	void init_registers_xtensa (void);
3aee8918	25	extern const struct target_desc *tdesc_xtensa;
d05b4ac3	26
e671835b	27	#include <asm/ptrace.h>
1525d545	28	#include <xtensa-config.h>
40045d91 MF	29	#include "arch/xtensa.h"
40045d91 MF	30	#include "gdb_proc_service.h"
1525d545 MG	31
	32	#include "xtensa-xtregs.c"
	33
	34	enum regnum {
	35	R_PC=0, R_PS,
	36	R_LBEG, R_LEND, R_LCOUNT,
	37	R_SAR,
	38	R_WS, R_WB,
1b3f6016	39	R_A0 = 64
1525d545 MG	40	};
	41
	42	static void
442ea881	43	xtensa_fill_gregset (struct regcache regcache, void buf)
1525d545 MG	44	{
1525d545 MG	45	elf_greg_t* rset = (elf_greg_t*)buf;
3aee8918	46	const struct target_desc *tdesc = regcache->tdesc;
1525d545 MG	47	int ar0_regnum;
	48	char *ptr;
	49	int i;
	50
	51	/* Take care of AR registers. */
	52
3aee8918	53	ar0_regnum = find_regno (tdesc, "ar0");
1525d545 MG	54	ptr = (char*)&rset[R_A0];
	55
	56	for (i = ar0_regnum; i < ar0_regnum + XCHAL_NUM_AREGS; i++)
	57	{
442ea881	58	collect_register (regcache, i, ptr);
3aee8918	59	ptr += register_size (tdesc, i);
1525d545 MG	60	}
1525d545 MG	61
1a09b50a MF	62	if (XSHAL_ABI == XTHAL_ABI_CALL0)
	63	{
	64	int a0_regnum = find_regno (tdesc, "a0");
	65	ptr = (char ) &rset[R_A0 + 4 rset[R_WB]];
	66
	67	for (i = a0_regnum; i < a0_regnum + C0_NREGS; i++)
	68	{
	69	if ((4 * rset[R_WB] + i - a0_regnum) == XCHAL_NUM_AREGS)
	70	ptr = (char *) &rset[R_A0];
	71	collect_register (regcache, i, ptr);
	72	ptr += register_size (tdesc, i);
	73	}
	74	}
	75
1525d545 MG	76	/* Loop registers, if hardware has it. */
1525d545 MG	77
a2d5a9d7	78	#if XCHAL_HAVE_LOOPS
442ea881 PA	79	collect_register_by_name (regcache, "lbeg", (char*)&rset[R_LBEG]);
	80	collect_register_by_name (regcache, "lend", (char*)&rset[R_LEND]);
	81	collect_register_by_name (regcache, "lcount", (char*)&rset[R_LCOUNT]);
1525d545 MG	82	#endif
1525d545 MG	83
442ea881 PA	84	collect_register_by_name (regcache, "sar", (char*)&rset[R_SAR]);
	85	collect_register_by_name (regcache, "pc", (char*)&rset[R_PC]);
	86	collect_register_by_name (regcache, "ps", (char*)&rset[R_PS]);
	87	collect_register_by_name (regcache, "windowbase", (char*)&rset[R_WB]);
	88	collect_register_by_name (regcache, "windowstart", (char*)&rset[R_WS]);
1525d545 MG	89	}
	90
	91	static void
442ea881	92	xtensa_store_gregset (struct regcache regcache, const void buf)
1525d545 MG	93	{
1525d545 MG	94	const elf_greg_t* rset = (const elf_greg_t*)buf;
3aee8918	95	const struct target_desc *tdesc = regcache->tdesc;
1525d545 MG	96	int ar0_regnum;
	97	char *ptr;
	98	int i;
	99
	100	/* Take care of AR registers. */
	101
3aee8918	102	ar0_regnum = find_regno (tdesc, "ar0");
1525d545 MG	103	ptr = (char *)&rset[R_A0];
	104
	105	for (i = ar0_regnum; i < ar0_regnum + XCHAL_NUM_AREGS; i++)
	106	{
442ea881	107	supply_register (regcache, i, ptr);
3aee8918	108	ptr += register_size (tdesc, i);
1525d545 MG	109	}
1525d545 MG	110
1a09b50a MF	111	if (XSHAL_ABI == XTHAL_ABI_CALL0)
	112	{
	113	int a0_regnum = find_regno (tdesc, "a0");
	114	ptr = (char ) &rset[R_A0 + (4 rset[R_WB]) % XCHAL_NUM_AREGS];
	115
	116	for (i = a0_regnum; i < a0_regnum + C0_NREGS; i++)
	117	{
	118	if ((4 * rset[R_WB] + i - a0_regnum) == XCHAL_NUM_AREGS)
	119	ptr = (char *) &rset[R_A0];
	120	supply_register (regcache, i, ptr);
	121	ptr += register_size (tdesc, i);
	122	}
	123	}
	124
1525d545 MG	125	/* Loop registers, if hardware has it. */
1525d545 MG	126
a2d5a9d7	127	#if XCHAL_HAVE_LOOPS
442ea881 PA	128	supply_register_by_name (regcache, "lbeg", (char*)&rset[R_LBEG]);
	129	supply_register_by_name (regcache, "lend", (char*)&rset[R_LEND]);
	130	supply_register_by_name (regcache, "lcount", (char*)&rset[R_LCOUNT]);
1525d545 MG	131	#endif
1525d545 MG	132
442ea881 PA	133	supply_register_by_name (regcache, "sar", (char*)&rset[R_SAR]);
	134	supply_register_by_name (regcache, "pc", (char*)&rset[R_PC]);
	135	supply_register_by_name (regcache, "ps", (char*)&rset[R_PS]);
	136	supply_register_by_name (regcache, "windowbase", (char*)&rset[R_WB]);
	137	supply_register_by_name (regcache, "windowstart", (char*)&rset[R_WS]);
1525d545 MG	138	}
	139
	140	/* Xtensa GNU/Linux PTRACE interface includes extended register set. */
	141
	142	static void
442ea881	143	xtensa_fill_xtregset (struct regcache regcache, void buf)
1525d545 MG	144	{
	145	const xtensa_regtable_t *ptr;
	146
	147	for (ptr = xtensa_regmap_table; ptr->name; ptr++)
	148	{
442ea881	149	collect_register_by_name (regcache, ptr->name,
1525d545 MG	150	(char*)buf + ptr->ptrace_offset);
	151	}
	152	}
	153
	154	static void
442ea881	155	xtensa_store_xtregset (struct regcache regcache, const void buf)
1525d545 MG	156	{
	157	const xtensa_regtable_t *ptr;
	158
	159	for (ptr = xtensa_regmap_table; ptr->name; ptr++)
	160	{
442ea881	161	supply_register_by_name (regcache, ptr->name,
1525d545 MG	162	(char*)buf + ptr->ptrace_offset);
	163	}
	164	}
	165
3aee8918	166	static struct regset_info xtensa_regsets[] = {
1570b33e	167	{ PTRACE_GETREGS, PTRACE_SETREGS, 0, sizeof (elf_gregset_t),
1525d545 MG	168	GENERAL_REGS,
1525d545 MG	169	xtensa_fill_gregset, xtensa_store_gregset },
1570b33e	170	{ PTRACE_GETXTREGS, PTRACE_SETXTREGS, 0, XTENSA_ELF_XTREG_SIZE,
1525d545 MG	171	EXTENDED_REGS,
1525d545 MG	172	xtensa_fill_xtregset, xtensa_store_xtregset },
50bc912a	173	NULL_REGSET
1525d545 MG	174	};
	175
	176	#if XCHAL_HAVE_BE
	177	#define XTENSA_BREAKPOINT {0xd2,0x0f}
	178	#else
	179	#define XTENSA_BREAKPOINT {0x2d,0xf0}
	180	#endif
	181
dd373349	182	static const gdb_byte xtensa_breakpoint[] = XTENSA_BREAKPOINT;
1525d545 MG	183	#define xtensa_breakpoint_len 2
1525d545 MG	184
dd373349 AT	185	/* Implementation of linux_target_ops method "sw_breakpoint_from_kind". */
	186
	187	static const gdb_byte *
	188	xtensa_sw_breakpoint_from_kind (int kind, int *size)
	189	{
	190	*size = xtensa_breakpoint_len;
	191	return xtensa_breakpoint;
	192	}
	193
1525d545 MG	194	static int
	195	xtensa_breakpoint_at (CORE_ADDR where)
	196	{
	197	unsigned long insn;
	198
	199	(the_target->read_memory) (where, (unsigned char ) &insn,
	200	xtensa_breakpoint_len);
493e2a69 MS	201	return memcmp((char *) &insn,
493e2a69 MS	202	xtensa_breakpoint, xtensa_breakpoint_len) == 0;
1525d545 MG	203	}
1525d545 MG	204
40045d91 MF	205	/* Called by libthread_db. */
	206
	207	ps_err_e
754653a7	208	ps_get_thread_area (struct ps_prochandle *ph,
40045d91 MF	209	lwpid_t lwpid, int idx, void **base)
	210	{
	211	xtensa_elf_gregset_t regs;
	212
	213	if (ptrace (PTRACE_GETREGS, lwpid, NULL, &regs) != 0)
	214	return PS_ERR;
	215
	216	/* IDX is the bias from the thread pointer to the beginning of the
	217	thread descriptor. It has to be subtracted due to implementation
	218	quirks in libthread_db. */
	219	base = (void ) ((char *) regs.threadptr - idx);
	220
	221	return PS_OK;
	222	}
	223
3aee8918 PA	224	static struct regsets_info xtensa_regsets_info =
	225	{
	226	xtensa_regsets, /* regsets */
	227	0, /* num_regsets */
	228	NULL, /* disabled_regsets */
	229	};
	230
3aee8918 PA	231	static struct regs_info regs_info =
	232	{
	233	NULL, /* regset_bitmap */
deb44829	234	NULL, /* usrregs */
3aee8918 PA	235	&xtensa_regsets_info
	236	};
	237
	238	static void
	239	xtensa_arch_setup (void)
	240	{
	241	current_process ()->tdesc = tdesc_xtensa;
	242	}
	243
7d00775e AT	244	/* Support for hardware single step. */
	245
	246	static int
	247	xtensa_supports_hardware_single_step (void)
	248	{
	249	return 1;
	250	}
	251
3aee8918 PA	252	static const struct regs_info *
	253	xtensa_regs_info (void)
	254	{
	255	return &regs_info;
	256	}
	257
1525d545	258	struct linux_target_ops the_low_target = {
3aee8918 PA	259	xtensa_arch_setup,
3aee8918 PA	260	xtensa_regs_info,
1525d545 MG	261	0,
1525d545 MG	262	0,
c14dfd32	263	NULL, /* fetch_register */
276d4552 YQ	264	linux_get_pc_32bit,
276d4552 YQ	265	linux_set_pc_32bit,
dd373349 AT	266	NULL, /* breakpoint_kind_from_pc */
dd373349 AT	267	xtensa_sw_breakpoint_from_kind,
1525d545 MG	268	NULL,
	269	0,
	270	xtensa_breakpoint_at,
7d00775e AT	271	NULL, /* supports_z_point_type */
	272	NULL, /* insert_point */
	273	NULL, /* remove_point */
	274	NULL, /* stopped_by_watchpoint */
	275	NULL, /* stopped_data_address */
	276	NULL, /* collect_ptrace_register */
	277	NULL, /* supply_ptrace_register */
	278	NULL, /* siginfo_fixup */
	279	NULL, /* new_process */
	280	NULL, /* new_thread */
	281	NULL, /* new_fork */
	282	NULL, /* prepare_to_resume */
	283	NULL, /* process_qsupported */
	284	NULL, /* supports_tracepoints */
	285	NULL, /* get_thread_area */
	286	NULL, /* install_fast_tracepoint_jump_pad */
	287	NULL, /* emit_ops */
	288	NULL, /* get_min_fast_tracepoint_insn_len */
	289	NULL, /* supports_range_stepping */
	290	NULL, /* breakpoint_kind_from_current_state */
	291	xtensa_supports_hardware_single_step,
1525d545	292	};
3aee8918 PA	293
	294
	295	void
	296	initialize_low_arch (void)
	297	{
	298	/* Initialize the Linux target descriptions. */
	299	init_registers_xtensa ();
	300
	301	initialize_regsets_info (&xtensa_regsets_info);
	302	}