Commit | Line | Data |
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32d0add0 | 1 | /* Copyright (C) 2007-2015 Free Software Foundation, Inc. |
68070c10 PA |
2 | |
3 | This file is part of GDB. | |
4 | ||
5 | This program is free software; you can redistribute it and/or modify | |
6 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 7 | the Free Software Foundation; either version 3 of the License, or |
68070c10 PA |
8 | (at your option) any later version. |
9 | ||
10 | This program is distributed in the hope that it will be useful, | |
11 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | GNU General Public License for more details. | |
14 | ||
15 | You should have received a copy of the GNU General Public License | |
a9762ec7 | 16 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
68070c10 PA |
17 | |
18 | #include "server.h" | |
19 | #include "win32-low.h" | |
df7e5265 | 20 | #include "x86-low.h" |
68070c10 | 21 | |
54709339 PM |
22 | #ifndef CONTEXT_EXTENDED_REGISTERS |
23 | #define CONTEXT_EXTENDED_REGISTERS 0 | |
24 | #endif | |
25 | ||
68070c10 PA |
26 | #define FCS_REGNUM 27 |
27 | #define FOP_REGNUM 31 | |
28 | ||
29 | #define FLAG_TRACE_BIT 0x100 | |
30 | ||
1c07cc19 PM |
31 | #ifdef __x86_64__ |
32 | /* Defined in auto-generated file reg-amd64.c. */ | |
54709339 | 33 | void init_registers_amd64 (void); |
3aee8918 | 34 | extern const struct target_desc *tdesc_amd64; |
54709339 | 35 | #else |
d05b4ac3 UW |
36 | /* Defined in auto-generated file reg-i386.c. */ |
37 | void init_registers_i386 (void); | |
3aee8918 | 38 | extern const struct target_desc *tdesc_i386; |
54709339 | 39 | #endif |
d05b4ac3 | 40 | |
df7e5265 | 41 | static struct x86_debug_reg_state debug_reg_state; |
68070c10 | 42 | |
a2abc7de PA |
43 | static int |
44 | update_debug_registers_callback (struct inferior_list_entry *entry, | |
45 | void *pid_p) | |
46 | { | |
47 | struct thread_info *thr = (struct thread_info *) entry; | |
c3de4d92 | 48 | win32_thread_info *th = (win32_thread_info *) inferior_target_data (thr); |
a2abc7de PA |
49 | int pid = *(int *) pid_p; |
50 | ||
51 | /* Only update the threads of this process. */ | |
52 | if (pid_of (thr) == pid) | |
53 | { | |
54 | /* The actual update is done later just before resuming the lwp, | |
55 | we just mark that the registers need updating. */ | |
56 | th->debug_registers_changed = 1; | |
57 | } | |
58 | ||
59 | return 0; | |
60 | } | |
34b34921 | 61 | |
aa5ca48f DE |
62 | /* Update the inferior's debug register REGNUM from STATE. */ |
63 | ||
42995dbd | 64 | static void |
df7e5265 | 65 | x86_dr_low_set_addr (int regnum, CORE_ADDR addr) |
aa5ca48f | 66 | { |
a2abc7de PA |
67 | /* Only update the threads of this process. */ |
68 | int pid = pid_of (current_thread); | |
aa5ca48f | 69 | |
0a5b1e09 | 70 | gdb_assert (DR_FIRSTADDR <= regnum && regnum <= DR_LASTADDR); |
964e4306 | 71 | |
a2abc7de | 72 | find_inferior (&all_threads, update_debug_registers_callback, &pid); |
964e4306 PA |
73 | } |
74 | ||
aa5ca48f DE |
75 | /* Update the inferior's DR7 debug control register from STATE. */ |
76 | ||
42995dbd | 77 | static void |
df7e5265 | 78 | x86_dr_low_set_control (unsigned long control) |
aa5ca48f | 79 | { |
a2abc7de PA |
80 | /* Only update the threads of this process. */ |
81 | int pid = pid_of (current_thread); | |
82 | ||
83 | find_inferior (&all_threads, update_debug_registers_callback, &pid); | |
84 | } | |
85 | ||
86 | /* Return the current value of a DR register of the current thread's | |
87 | context. */ | |
88 | ||
89 | static DWORD64 | |
90 | win32_get_current_dr (int dr) | |
91 | { | |
c3de4d92 PA |
92 | win32_thread_info *th |
93 | = (win32_thread_info *) inferior_target_data (current_thread); | |
a2abc7de PA |
94 | |
95 | win32_require_context (th); | |
96 | ||
97 | #define RET_DR(DR) \ | |
98 | case DR: \ | |
99 | return th->context.Dr ## DR | |
100 | ||
101 | switch (dr) | |
102 | { | |
103 | RET_DR (0); | |
104 | RET_DR (1); | |
105 | RET_DR (2); | |
106 | RET_DR (3); | |
107 | RET_DR (6); | |
108 | RET_DR (7); | |
109 | } | |
110 | ||
111 | #undef RET_DR | |
112 | ||
113 | gdb_assert_not_reached ("unhandled dr"); | |
114 | } | |
115 | ||
116 | static CORE_ADDR | |
117 | x86_dr_low_get_addr (int regnum) | |
118 | { | |
119 | gdb_assert (DR_FIRSTADDR <= regnum && regnum <= DR_LASTADDR); | |
120 | ||
121 | return win32_get_current_dr (regnum - DR_FIRSTADDR); | |
aa5ca48f DE |
122 | } |
123 | ||
42995dbd | 124 | static unsigned long |
df7e5265 | 125 | x86_dr_low_get_control (void) |
964e4306 | 126 | { |
a2abc7de | 127 | return win32_get_current_dr (7); |
964e4306 PA |
128 | } |
129 | ||
aa5ca48f DE |
130 | /* Get the value of the DR6 debug status register from the inferior |
131 | and record it in STATE. */ | |
132 | ||
42995dbd | 133 | static unsigned long |
df7e5265 | 134 | x86_dr_low_get_status (void) |
aa5ca48f | 135 | { |
a2abc7de | 136 | return win32_get_current_dr (6); |
aa5ca48f DE |
137 | } |
138 | ||
42995dbd | 139 | /* Low-level function vector. */ |
df7e5265 | 140 | struct x86_dr_low_type x86_dr_low = |
42995dbd | 141 | { |
df7e5265 GB |
142 | x86_dr_low_set_control, |
143 | x86_dr_low_set_addr, | |
144 | x86_dr_low_get_addr, | |
145 | x86_dr_low_get_status, | |
146 | x86_dr_low_get_control, | |
42995dbd GB |
147 | sizeof (void *), |
148 | }; | |
149 | ||
802e8e6d | 150 | /* Breakpoint/watchpoint support. */ |
aa5ca48f DE |
151 | |
152 | static int | |
802e8e6d PA |
153 | i386_supports_z_point_type (char z_type) |
154 | { | |
155 | switch (z_type) | |
156 | { | |
157 | case Z_PACKET_WRITE_WP: | |
158 | case Z_PACKET_ACCESS_WP: | |
159 | return 1; | |
160 | default: | |
161 | return 0; | |
162 | } | |
163 | } | |
164 | ||
165 | static int | |
166 | i386_insert_point (enum raw_bkpt_type type, CORE_ADDR addr, | |
167 | int size, struct raw_breakpoint *bp) | |
aa5ca48f DE |
168 | { |
169 | switch (type) | |
170 | { | |
802e8e6d PA |
171 | case raw_bkpt_type_write_wp: |
172 | case raw_bkpt_type_access_wp: | |
a4165e94 | 173 | { |
802e8e6d PA |
174 | enum target_hw_bp_type hw_type |
175 | = raw_bkpt_type_to_target_hw_bp_type (type); | |
a4165e94 | 176 | |
df7e5265 GB |
177 | return x86_dr_insert_watchpoint (&debug_reg_state, |
178 | hw_type, addr, size); | |
a4165e94 | 179 | } |
aa5ca48f DE |
180 | default: |
181 | /* Unsupported. */ | |
182 | return 1; | |
183 | } | |
184 | } | |
185 | ||
186 | static int | |
802e8e6d PA |
187 | i386_remove_point (enum raw_bkpt_type type, CORE_ADDR addr, |
188 | int size, struct raw_breakpoint *bp) | |
aa5ca48f DE |
189 | { |
190 | switch (type) | |
191 | { | |
802e8e6d PA |
192 | case raw_bkpt_type_write_wp: |
193 | case raw_bkpt_type_access_wp: | |
a4165e94 | 194 | { |
802e8e6d PA |
195 | enum target_hw_bp_type hw_type |
196 | = raw_bkpt_type_to_target_hw_bp_type (type); | |
a4165e94 | 197 | |
df7e5265 GB |
198 | return x86_dr_remove_watchpoint (&debug_reg_state, |
199 | hw_type, addr, size); | |
a4165e94 | 200 | } |
aa5ca48f DE |
201 | default: |
202 | /* Unsupported. */ | |
203 | return 1; | |
204 | } | |
205 | } | |
206 | ||
207 | static int | |
df7e5265 | 208 | x86_stopped_by_watchpoint (void) |
aa5ca48f | 209 | { |
df7e5265 | 210 | return x86_dr_stopped_by_watchpoint (&debug_reg_state); |
aa5ca48f DE |
211 | } |
212 | ||
213 | static CORE_ADDR | |
df7e5265 | 214 | x86_stopped_data_address (void) |
aa5ca48f DE |
215 | { |
216 | CORE_ADDR addr; | |
df7e5265 | 217 | if (x86_dr_stopped_data_address (&debug_reg_state, &addr)) |
aa5ca48f DE |
218 | return addr; |
219 | return 0; | |
220 | } | |
221 | ||
68070c10 | 222 | static void |
34b34921 | 223 | i386_initial_stuff (void) |
68070c10 | 224 | { |
df7e5265 | 225 | x86_low_init_dregs (&debug_reg_state); |
68070c10 PA |
226 | } |
227 | ||
228 | static void | |
a2abc7de | 229 | i386_get_thread_context (win32_thread_info *th) |
68070c10 | 230 | { |
912cf4ba PA |
231 | /* Requesting the CONTEXT_EXTENDED_REGISTERS register set fails if |
232 | the system doesn't support extended registers. */ | |
233 | static DWORD extended_registers = CONTEXT_EXTENDED_REGISTERS; | |
34b34921 | 234 | |
912cf4ba PA |
235 | again: |
236 | th->context.ContextFlags = (CONTEXT_FULL | |
237 | | CONTEXT_FLOATING_POINT | |
238 | | CONTEXT_DEBUG_REGISTERS | |
239 | | extended_registers); | |
240 | ||
241 | if (!GetThreadContext (th->h, &th->context)) | |
242 | { | |
243 | DWORD e = GetLastError (); | |
244 | ||
245 | if (extended_registers && e == ERROR_INVALID_PARAMETER) | |
246 | { | |
247 | extended_registers = 0; | |
248 | goto again; | |
249 | } | |
250 | ||
251 | error ("GetThreadContext failure %ld\n", (long) e); | |
252 | } | |
68070c10 PA |
253 | } |
254 | ||
255 | static void | |
a2abc7de | 256 | i386_prepare_to_resume (win32_thread_info *th) |
68070c10 | 257 | { |
a2abc7de | 258 | if (th->debug_registers_changed) |
34b34921 | 259 | { |
df7e5265 | 260 | struct x86_debug_reg_state *dr = &debug_reg_state; |
a2abc7de PA |
261 | |
262 | win32_require_context (th); | |
263 | ||
aa5ca48f DE |
264 | th->context.Dr0 = dr->dr_mirror[0]; |
265 | th->context.Dr1 = dr->dr_mirror[1]; | |
266 | th->context.Dr2 = dr->dr_mirror[2]; | |
267 | th->context.Dr3 = dr->dr_mirror[3]; | |
8d26e50c | 268 | /* th->context.Dr6 = dr->dr_status_mirror; |
34b34921 | 269 | FIXME: should we set dr6 also ?? */ |
8d26e50c | 270 | th->context.Dr7 = dr->dr_control_mirror; |
34b34921 | 271 | |
a2abc7de PA |
272 | th->debug_registers_changed = 0; |
273 | } | |
68070c10 PA |
274 | } |
275 | ||
68070c10 | 276 | static void |
34b34921 | 277 | i386_thread_added (win32_thread_info *th) |
68070c10 | 278 | { |
a2abc7de | 279 | th->debug_registers_changed = 1; |
68070c10 PA |
280 | } |
281 | ||
282 | static void | |
34b34921 | 283 | i386_single_step (win32_thread_info *th) |
68070c10 PA |
284 | { |
285 | th->context.EFlags |= FLAG_TRACE_BIT; | |
286 | } | |
287 | ||
1c07cc19 | 288 | #ifndef __x86_64__ |
54709339 | 289 | |
68070c10 PA |
290 | /* An array of offset mappings into a Win32 Context structure. |
291 | This is a one-to-one mapping which is indexed by gdb's register | |
292 | numbers. It retrieves an offset into the context structure where | |
293 | the 4 byte register is located. | |
294 | An offset value of -1 indicates that Win32 does not provide this | |
295 | register in it's CONTEXT structure. In this case regptr will return | |
296 | a pointer into a dummy register. */ | |
297 | #define context_offset(x) ((int)&(((CONTEXT *)NULL)->x)) | |
298 | static const int mappings[] = { | |
299 | context_offset (Eax), | |
300 | context_offset (Ecx), | |
301 | context_offset (Edx), | |
302 | context_offset (Ebx), | |
303 | context_offset (Esp), | |
304 | context_offset (Ebp), | |
305 | context_offset (Esi), | |
306 | context_offset (Edi), | |
307 | context_offset (Eip), | |
308 | context_offset (EFlags), | |
309 | context_offset (SegCs), | |
310 | context_offset (SegSs), | |
311 | context_offset (SegDs), | |
312 | context_offset (SegEs), | |
313 | context_offset (SegFs), | |
314 | context_offset (SegGs), | |
315 | context_offset (FloatSave.RegisterArea[0 * 10]), | |
316 | context_offset (FloatSave.RegisterArea[1 * 10]), | |
317 | context_offset (FloatSave.RegisterArea[2 * 10]), | |
318 | context_offset (FloatSave.RegisterArea[3 * 10]), | |
319 | context_offset (FloatSave.RegisterArea[4 * 10]), | |
320 | context_offset (FloatSave.RegisterArea[5 * 10]), | |
321 | context_offset (FloatSave.RegisterArea[6 * 10]), | |
322 | context_offset (FloatSave.RegisterArea[7 * 10]), | |
323 | context_offset (FloatSave.ControlWord), | |
324 | context_offset (FloatSave.StatusWord), | |
325 | context_offset (FloatSave.TagWord), | |
326 | context_offset (FloatSave.ErrorSelector), | |
327 | context_offset (FloatSave.ErrorOffset), | |
328 | context_offset (FloatSave.DataSelector), | |
329 | context_offset (FloatSave.DataOffset), | |
330 | context_offset (FloatSave.ErrorSelector), | |
331 | /* XMM0-7 */ | |
332 | context_offset (ExtendedRegisters[10 * 16]), | |
333 | context_offset (ExtendedRegisters[11 * 16]), | |
334 | context_offset (ExtendedRegisters[12 * 16]), | |
335 | context_offset (ExtendedRegisters[13 * 16]), | |
336 | context_offset (ExtendedRegisters[14 * 16]), | |
337 | context_offset (ExtendedRegisters[15 * 16]), | |
338 | context_offset (ExtendedRegisters[16 * 16]), | |
339 | context_offset (ExtendedRegisters[17 * 16]), | |
340 | /* MXCSR */ | |
341 | context_offset (ExtendedRegisters[24]) | |
342 | }; | |
343 | #undef context_offset | |
344 | ||
1c07cc19 | 345 | #else /* __x86_64__ */ |
54709339 PM |
346 | |
347 | #define context_offset(x) (offsetof (CONTEXT, x)) | |
348 | static const int mappings[] = | |
349 | { | |
350 | context_offset (Rax), | |
351 | context_offset (Rbx), | |
352 | context_offset (Rcx), | |
353 | context_offset (Rdx), | |
354 | context_offset (Rsi), | |
355 | context_offset (Rdi), | |
356 | context_offset (Rbp), | |
357 | context_offset (Rsp), | |
358 | context_offset (R8), | |
359 | context_offset (R9), | |
360 | context_offset (R10), | |
361 | context_offset (R11), | |
362 | context_offset (R12), | |
363 | context_offset (R13), | |
364 | context_offset (R14), | |
365 | context_offset (R15), | |
366 | context_offset (Rip), | |
367 | context_offset (EFlags), | |
368 | context_offset (SegCs), | |
369 | context_offset (SegSs), | |
370 | context_offset (SegDs), | |
371 | context_offset (SegEs), | |
372 | context_offset (SegFs), | |
373 | context_offset (SegGs), | |
374 | context_offset (FloatSave.FloatRegisters[0]), | |
375 | context_offset (FloatSave.FloatRegisters[1]), | |
376 | context_offset (FloatSave.FloatRegisters[2]), | |
377 | context_offset (FloatSave.FloatRegisters[3]), | |
378 | context_offset (FloatSave.FloatRegisters[4]), | |
379 | context_offset (FloatSave.FloatRegisters[5]), | |
380 | context_offset (FloatSave.FloatRegisters[6]), | |
381 | context_offset (FloatSave.FloatRegisters[7]), | |
382 | context_offset (FloatSave.ControlWord), | |
383 | context_offset (FloatSave.StatusWord), | |
384 | context_offset (FloatSave.TagWord), | |
385 | context_offset (FloatSave.ErrorSelector), | |
386 | context_offset (FloatSave.ErrorOffset), | |
387 | context_offset (FloatSave.DataSelector), | |
388 | context_offset (FloatSave.DataOffset), | |
389 | context_offset (FloatSave.ErrorSelector) | |
390 | /* XMM0-7 */ , | |
391 | context_offset (Xmm0), | |
392 | context_offset (Xmm1), | |
393 | context_offset (Xmm2), | |
394 | context_offset (Xmm3), | |
395 | context_offset (Xmm4), | |
396 | context_offset (Xmm5), | |
397 | context_offset (Xmm6), | |
398 | context_offset (Xmm7), | |
399 | context_offset (Xmm8), | |
400 | context_offset (Xmm9), | |
401 | context_offset (Xmm10), | |
402 | context_offset (Xmm11), | |
403 | context_offset (Xmm12), | |
404 | context_offset (Xmm13), | |
405 | context_offset (Xmm14), | |
406 | context_offset (Xmm15), | |
407 | /* MXCSR */ | |
408 | context_offset (FloatSave.MxCsr) | |
409 | }; | |
410 | #undef context_offset | |
411 | ||
1c07cc19 | 412 | #endif /* __x86_64__ */ |
54709339 | 413 | |
34b34921 PA |
414 | /* Fetch register from gdbserver regcache data. */ |
415 | static void | |
442ea881 PA |
416 | i386_fetch_inferior_register (struct regcache *regcache, |
417 | win32_thread_info *th, int r) | |
34b34921 PA |
418 | { |
419 | char *context_offset = (char *) &th->context + mappings[r]; | |
420 | ||
421 | long l; | |
422 | if (r == FCS_REGNUM) | |
423 | { | |
424 | l = *((long *) context_offset) & 0xffff; | |
442ea881 | 425 | supply_register (regcache, r, (char *) &l); |
34b34921 PA |
426 | } |
427 | else if (r == FOP_REGNUM) | |
428 | { | |
429 | l = (*((long *) context_offset) >> 16) & ((1 << 11) - 1); | |
442ea881 | 430 | supply_register (regcache, r, (char *) &l); |
34b34921 PA |
431 | } |
432 | else | |
442ea881 | 433 | supply_register (regcache, r, context_offset); |
34b34921 PA |
434 | } |
435 | ||
436 | /* Store a new register value into the thread context of TH. */ | |
437 | static void | |
442ea881 PA |
438 | i386_store_inferior_register (struct regcache *regcache, |
439 | win32_thread_info *th, int r) | |
34b34921 PA |
440 | { |
441 | char *context_offset = (char *) &th->context + mappings[r]; | |
442ea881 | 442 | collect_register (regcache, r, context_offset); |
34b34921 PA |
443 | } |
444 | ||
912cf4ba PA |
445 | static const unsigned char i386_win32_breakpoint = 0xcc; |
446 | #define i386_win32_breakpoint_len 1 | |
447 | ||
54709339 | 448 | static void |
3aee8918 | 449 | i386_arch_setup (void) |
54709339 | 450 | { |
1c07cc19 | 451 | #ifdef __x86_64__ |
54709339 | 452 | init_registers_amd64 (); |
3aee8918 | 453 | win32_tdesc = tdesc_amd64; |
54709339 PM |
454 | #else |
455 | init_registers_i386 (); | |
3aee8918 | 456 | win32_tdesc = tdesc_i386; |
54709339 PM |
457 | #endif |
458 | } | |
459 | ||
68070c10 | 460 | struct win32_target_ops the_low_target = { |
3aee8918 | 461 | i386_arch_setup, |
68070c10 | 462 | sizeof (mappings) / sizeof (mappings[0]), |
34b34921 PA |
463 | i386_initial_stuff, |
464 | i386_get_thread_context, | |
a2abc7de | 465 | i386_prepare_to_resume, |
34b34921 PA |
466 | i386_thread_added, |
467 | i386_fetch_inferior_register, | |
468 | i386_store_inferior_register, | |
469 | i386_single_step, | |
912cf4ba PA |
470 | &i386_win32_breakpoint, |
471 | i386_win32_breakpoint_len, | |
802e8e6d | 472 | i386_supports_z_point_type, |
aa5ca48f DE |
473 | i386_insert_point, |
474 | i386_remove_point, | |
df7e5265 GB |
475 | x86_stopped_by_watchpoint, |
476 | x86_stopped_data_address | |
68070c10 | 477 | }; |