Commit | Line | Data |
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42a4f53d | 1 | /* Copyright (C) 2007-2019 Free Software Foundation, Inc. |
68070c10 PA |
2 | |
3 | This file is part of GDB. | |
4 | ||
5 | This program is free software; you can redistribute it and/or modify | |
6 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 7 | the Free Software Foundation; either version 3 of the License, or |
68070c10 PA |
8 | (at your option) any later version. |
9 | ||
10 | This program is distributed in the hope that it will be useful, | |
11 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | GNU General Public License for more details. | |
14 | ||
15 | You should have received a copy of the GNU General Public License | |
a9762ec7 | 16 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
68070c10 PA |
17 | |
18 | #include "server.h" | |
19 | #include "win32-low.h" | |
df7e5265 | 20 | #include "x86-low.h" |
268a13a5 | 21 | #include "gdbsupport/x86-xstate.h" |
22916b07 YQ |
22 | #ifdef __x86_64__ |
23 | #include "arch/amd64.h" | |
24 | #endif | |
25 | #include "arch/i386.h" | |
cc4d742f | 26 | #include "tdesc.h" |
190852c8 | 27 | #include "x86-tdesc.h" |
68070c10 | 28 | |
54709339 PM |
29 | #ifndef CONTEXT_EXTENDED_REGISTERS |
30 | #define CONTEXT_EXTENDED_REGISTERS 0 | |
31 | #endif | |
32 | ||
68070c10 PA |
33 | #define FCS_REGNUM 27 |
34 | #define FOP_REGNUM 31 | |
35 | ||
36 | #define FLAG_TRACE_BIT 0x100 | |
37 | ||
df7e5265 | 38 | static struct x86_debug_reg_state debug_reg_state; |
68070c10 | 39 | |
0b360f19 SM |
40 | static void |
41 | update_debug_registers (thread_info *thread) | |
a2abc7de | 42 | { |
0b360f19 | 43 | win32_thread_info *th = (win32_thread_info *) thread_target_data (thread); |
a2abc7de | 44 | |
0b360f19 SM |
45 | /* The actual update is done later just before resuming the lwp, |
46 | we just mark that the registers need updating. */ | |
47 | th->debug_registers_changed = 1; | |
a2abc7de | 48 | } |
34b34921 | 49 | |
aa5ca48f DE |
50 | /* Update the inferior's debug register REGNUM from STATE. */ |
51 | ||
42995dbd | 52 | static void |
df7e5265 | 53 | x86_dr_low_set_addr (int regnum, CORE_ADDR addr) |
aa5ca48f | 54 | { |
0a5b1e09 | 55 | gdb_assert (DR_FIRSTADDR <= regnum && regnum <= DR_LASTADDR); |
964e4306 | 56 | |
0b360f19 SM |
57 | /* Only update the threads of this process. */ |
58 | for_each_thread (current_thread->id.pid (), update_debug_registers); | |
964e4306 PA |
59 | } |
60 | ||
aa5ca48f DE |
61 | /* Update the inferior's DR7 debug control register from STATE. */ |
62 | ||
42995dbd | 63 | static void |
df7e5265 | 64 | x86_dr_low_set_control (unsigned long control) |
aa5ca48f | 65 | { |
a2abc7de | 66 | /* Only update the threads of this process. */ |
0b360f19 | 67 | for_each_thread (current_thread->id.pid (), update_debug_registers); |
a2abc7de PA |
68 | } |
69 | ||
70 | /* Return the current value of a DR register of the current thread's | |
71 | context. */ | |
72 | ||
73 | static DWORD64 | |
74 | win32_get_current_dr (int dr) | |
75 | { | |
c3de4d92 | 76 | win32_thread_info *th |
6afd337d | 77 | = (win32_thread_info *) thread_target_data (current_thread); |
a2abc7de PA |
78 | |
79 | win32_require_context (th); | |
80 | ||
81 | #define RET_DR(DR) \ | |
82 | case DR: \ | |
83 | return th->context.Dr ## DR | |
84 | ||
85 | switch (dr) | |
86 | { | |
87 | RET_DR (0); | |
88 | RET_DR (1); | |
89 | RET_DR (2); | |
90 | RET_DR (3); | |
91 | RET_DR (6); | |
92 | RET_DR (7); | |
93 | } | |
94 | ||
95 | #undef RET_DR | |
96 | ||
97 | gdb_assert_not_reached ("unhandled dr"); | |
98 | } | |
99 | ||
100 | static CORE_ADDR | |
101 | x86_dr_low_get_addr (int regnum) | |
102 | { | |
103 | gdb_assert (DR_FIRSTADDR <= regnum && regnum <= DR_LASTADDR); | |
104 | ||
105 | return win32_get_current_dr (regnum - DR_FIRSTADDR); | |
aa5ca48f DE |
106 | } |
107 | ||
42995dbd | 108 | static unsigned long |
df7e5265 | 109 | x86_dr_low_get_control (void) |
964e4306 | 110 | { |
a2abc7de | 111 | return win32_get_current_dr (7); |
964e4306 PA |
112 | } |
113 | ||
aa5ca48f DE |
114 | /* Get the value of the DR6 debug status register from the inferior |
115 | and record it in STATE. */ | |
116 | ||
42995dbd | 117 | static unsigned long |
df7e5265 | 118 | x86_dr_low_get_status (void) |
aa5ca48f | 119 | { |
a2abc7de | 120 | return win32_get_current_dr (6); |
aa5ca48f DE |
121 | } |
122 | ||
42995dbd | 123 | /* Low-level function vector. */ |
df7e5265 | 124 | struct x86_dr_low_type x86_dr_low = |
42995dbd | 125 | { |
df7e5265 GB |
126 | x86_dr_low_set_control, |
127 | x86_dr_low_set_addr, | |
128 | x86_dr_low_get_addr, | |
129 | x86_dr_low_get_status, | |
130 | x86_dr_low_get_control, | |
42995dbd GB |
131 | sizeof (void *), |
132 | }; | |
133 | ||
802e8e6d | 134 | /* Breakpoint/watchpoint support. */ |
aa5ca48f DE |
135 | |
136 | static int | |
802e8e6d PA |
137 | i386_supports_z_point_type (char z_type) |
138 | { | |
139 | switch (z_type) | |
140 | { | |
141 | case Z_PACKET_WRITE_WP: | |
142 | case Z_PACKET_ACCESS_WP: | |
143 | return 1; | |
144 | default: | |
145 | return 0; | |
146 | } | |
147 | } | |
148 | ||
149 | static int | |
150 | i386_insert_point (enum raw_bkpt_type type, CORE_ADDR addr, | |
151 | int size, struct raw_breakpoint *bp) | |
aa5ca48f DE |
152 | { |
153 | switch (type) | |
154 | { | |
802e8e6d PA |
155 | case raw_bkpt_type_write_wp: |
156 | case raw_bkpt_type_access_wp: | |
a4165e94 | 157 | { |
802e8e6d PA |
158 | enum target_hw_bp_type hw_type |
159 | = raw_bkpt_type_to_target_hw_bp_type (type); | |
a4165e94 | 160 | |
df7e5265 GB |
161 | return x86_dr_insert_watchpoint (&debug_reg_state, |
162 | hw_type, addr, size); | |
a4165e94 | 163 | } |
aa5ca48f DE |
164 | default: |
165 | /* Unsupported. */ | |
166 | return 1; | |
167 | } | |
168 | } | |
169 | ||
170 | static int | |
802e8e6d PA |
171 | i386_remove_point (enum raw_bkpt_type type, CORE_ADDR addr, |
172 | int size, struct raw_breakpoint *bp) | |
aa5ca48f DE |
173 | { |
174 | switch (type) | |
175 | { | |
802e8e6d PA |
176 | case raw_bkpt_type_write_wp: |
177 | case raw_bkpt_type_access_wp: | |
a4165e94 | 178 | { |
802e8e6d PA |
179 | enum target_hw_bp_type hw_type |
180 | = raw_bkpt_type_to_target_hw_bp_type (type); | |
a4165e94 | 181 | |
df7e5265 GB |
182 | return x86_dr_remove_watchpoint (&debug_reg_state, |
183 | hw_type, addr, size); | |
a4165e94 | 184 | } |
aa5ca48f DE |
185 | default: |
186 | /* Unsupported. */ | |
187 | return 1; | |
188 | } | |
189 | } | |
190 | ||
191 | static int | |
df7e5265 | 192 | x86_stopped_by_watchpoint (void) |
aa5ca48f | 193 | { |
df7e5265 | 194 | return x86_dr_stopped_by_watchpoint (&debug_reg_state); |
aa5ca48f DE |
195 | } |
196 | ||
197 | static CORE_ADDR | |
df7e5265 | 198 | x86_stopped_data_address (void) |
aa5ca48f DE |
199 | { |
200 | CORE_ADDR addr; | |
df7e5265 | 201 | if (x86_dr_stopped_data_address (&debug_reg_state, &addr)) |
aa5ca48f DE |
202 | return addr; |
203 | return 0; | |
204 | } | |
205 | ||
68070c10 | 206 | static void |
34b34921 | 207 | i386_initial_stuff (void) |
68070c10 | 208 | { |
df7e5265 | 209 | x86_low_init_dregs (&debug_reg_state); |
68070c10 PA |
210 | } |
211 | ||
212 | static void | |
a2abc7de | 213 | i386_get_thread_context (win32_thread_info *th) |
68070c10 | 214 | { |
912cf4ba PA |
215 | /* Requesting the CONTEXT_EXTENDED_REGISTERS register set fails if |
216 | the system doesn't support extended registers. */ | |
217 | static DWORD extended_registers = CONTEXT_EXTENDED_REGISTERS; | |
34b34921 | 218 | |
912cf4ba PA |
219 | again: |
220 | th->context.ContextFlags = (CONTEXT_FULL | |
221 | | CONTEXT_FLOATING_POINT | |
222 | | CONTEXT_DEBUG_REGISTERS | |
223 | | extended_registers); | |
224 | ||
225 | if (!GetThreadContext (th->h, &th->context)) | |
226 | { | |
227 | DWORD e = GetLastError (); | |
228 | ||
229 | if (extended_registers && e == ERROR_INVALID_PARAMETER) | |
230 | { | |
231 | extended_registers = 0; | |
232 | goto again; | |
233 | } | |
234 | ||
235 | error ("GetThreadContext failure %ld\n", (long) e); | |
236 | } | |
68070c10 PA |
237 | } |
238 | ||
239 | static void | |
a2abc7de | 240 | i386_prepare_to_resume (win32_thread_info *th) |
68070c10 | 241 | { |
a2abc7de | 242 | if (th->debug_registers_changed) |
34b34921 | 243 | { |
df7e5265 | 244 | struct x86_debug_reg_state *dr = &debug_reg_state; |
a2abc7de PA |
245 | |
246 | win32_require_context (th); | |
247 | ||
aa5ca48f DE |
248 | th->context.Dr0 = dr->dr_mirror[0]; |
249 | th->context.Dr1 = dr->dr_mirror[1]; | |
250 | th->context.Dr2 = dr->dr_mirror[2]; | |
251 | th->context.Dr3 = dr->dr_mirror[3]; | |
8d26e50c | 252 | /* th->context.Dr6 = dr->dr_status_mirror; |
34b34921 | 253 | FIXME: should we set dr6 also ?? */ |
8d26e50c | 254 | th->context.Dr7 = dr->dr_control_mirror; |
34b34921 | 255 | |
a2abc7de PA |
256 | th->debug_registers_changed = 0; |
257 | } | |
68070c10 PA |
258 | } |
259 | ||
68070c10 | 260 | static void |
34b34921 | 261 | i386_thread_added (win32_thread_info *th) |
68070c10 | 262 | { |
a2abc7de | 263 | th->debug_registers_changed = 1; |
68070c10 PA |
264 | } |
265 | ||
266 | static void | |
34b34921 | 267 | i386_single_step (win32_thread_info *th) |
68070c10 PA |
268 | { |
269 | th->context.EFlags |= FLAG_TRACE_BIT; | |
270 | } | |
271 | ||
1c07cc19 | 272 | #ifndef __x86_64__ |
54709339 | 273 | |
68070c10 PA |
274 | /* An array of offset mappings into a Win32 Context structure. |
275 | This is a one-to-one mapping which is indexed by gdb's register | |
276 | numbers. It retrieves an offset into the context structure where | |
277 | the 4 byte register is located. | |
278 | An offset value of -1 indicates that Win32 does not provide this | |
279 | register in it's CONTEXT structure. In this case regptr will return | |
280 | a pointer into a dummy register. */ | |
281 | #define context_offset(x) ((int)&(((CONTEXT *)NULL)->x)) | |
282 | static const int mappings[] = { | |
283 | context_offset (Eax), | |
284 | context_offset (Ecx), | |
285 | context_offset (Edx), | |
286 | context_offset (Ebx), | |
287 | context_offset (Esp), | |
288 | context_offset (Ebp), | |
289 | context_offset (Esi), | |
290 | context_offset (Edi), | |
291 | context_offset (Eip), | |
292 | context_offset (EFlags), | |
293 | context_offset (SegCs), | |
294 | context_offset (SegSs), | |
295 | context_offset (SegDs), | |
296 | context_offset (SegEs), | |
297 | context_offset (SegFs), | |
298 | context_offset (SegGs), | |
299 | context_offset (FloatSave.RegisterArea[0 * 10]), | |
300 | context_offset (FloatSave.RegisterArea[1 * 10]), | |
301 | context_offset (FloatSave.RegisterArea[2 * 10]), | |
302 | context_offset (FloatSave.RegisterArea[3 * 10]), | |
303 | context_offset (FloatSave.RegisterArea[4 * 10]), | |
304 | context_offset (FloatSave.RegisterArea[5 * 10]), | |
305 | context_offset (FloatSave.RegisterArea[6 * 10]), | |
306 | context_offset (FloatSave.RegisterArea[7 * 10]), | |
307 | context_offset (FloatSave.ControlWord), | |
308 | context_offset (FloatSave.StatusWord), | |
309 | context_offset (FloatSave.TagWord), | |
310 | context_offset (FloatSave.ErrorSelector), | |
311 | context_offset (FloatSave.ErrorOffset), | |
312 | context_offset (FloatSave.DataSelector), | |
313 | context_offset (FloatSave.DataOffset), | |
314 | context_offset (FloatSave.ErrorSelector), | |
315 | /* XMM0-7 */ | |
316 | context_offset (ExtendedRegisters[10 * 16]), | |
317 | context_offset (ExtendedRegisters[11 * 16]), | |
318 | context_offset (ExtendedRegisters[12 * 16]), | |
319 | context_offset (ExtendedRegisters[13 * 16]), | |
320 | context_offset (ExtendedRegisters[14 * 16]), | |
321 | context_offset (ExtendedRegisters[15 * 16]), | |
322 | context_offset (ExtendedRegisters[16 * 16]), | |
323 | context_offset (ExtendedRegisters[17 * 16]), | |
324 | /* MXCSR */ | |
325 | context_offset (ExtendedRegisters[24]) | |
326 | }; | |
327 | #undef context_offset | |
328 | ||
1c07cc19 | 329 | #else /* __x86_64__ */ |
54709339 PM |
330 | |
331 | #define context_offset(x) (offsetof (CONTEXT, x)) | |
332 | static const int mappings[] = | |
333 | { | |
334 | context_offset (Rax), | |
335 | context_offset (Rbx), | |
336 | context_offset (Rcx), | |
337 | context_offset (Rdx), | |
338 | context_offset (Rsi), | |
339 | context_offset (Rdi), | |
340 | context_offset (Rbp), | |
341 | context_offset (Rsp), | |
342 | context_offset (R8), | |
343 | context_offset (R9), | |
344 | context_offset (R10), | |
345 | context_offset (R11), | |
346 | context_offset (R12), | |
347 | context_offset (R13), | |
348 | context_offset (R14), | |
349 | context_offset (R15), | |
350 | context_offset (Rip), | |
351 | context_offset (EFlags), | |
352 | context_offset (SegCs), | |
353 | context_offset (SegSs), | |
354 | context_offset (SegDs), | |
355 | context_offset (SegEs), | |
356 | context_offset (SegFs), | |
357 | context_offset (SegGs), | |
358 | context_offset (FloatSave.FloatRegisters[0]), | |
359 | context_offset (FloatSave.FloatRegisters[1]), | |
360 | context_offset (FloatSave.FloatRegisters[2]), | |
361 | context_offset (FloatSave.FloatRegisters[3]), | |
362 | context_offset (FloatSave.FloatRegisters[4]), | |
363 | context_offset (FloatSave.FloatRegisters[5]), | |
364 | context_offset (FloatSave.FloatRegisters[6]), | |
365 | context_offset (FloatSave.FloatRegisters[7]), | |
366 | context_offset (FloatSave.ControlWord), | |
367 | context_offset (FloatSave.StatusWord), | |
368 | context_offset (FloatSave.TagWord), | |
369 | context_offset (FloatSave.ErrorSelector), | |
370 | context_offset (FloatSave.ErrorOffset), | |
371 | context_offset (FloatSave.DataSelector), | |
372 | context_offset (FloatSave.DataOffset), | |
373 | context_offset (FloatSave.ErrorSelector) | |
374 | /* XMM0-7 */ , | |
375 | context_offset (Xmm0), | |
376 | context_offset (Xmm1), | |
377 | context_offset (Xmm2), | |
378 | context_offset (Xmm3), | |
379 | context_offset (Xmm4), | |
380 | context_offset (Xmm5), | |
381 | context_offset (Xmm6), | |
382 | context_offset (Xmm7), | |
383 | context_offset (Xmm8), | |
384 | context_offset (Xmm9), | |
385 | context_offset (Xmm10), | |
386 | context_offset (Xmm11), | |
387 | context_offset (Xmm12), | |
388 | context_offset (Xmm13), | |
389 | context_offset (Xmm14), | |
390 | context_offset (Xmm15), | |
391 | /* MXCSR */ | |
392 | context_offset (FloatSave.MxCsr) | |
393 | }; | |
394 | #undef context_offset | |
395 | ||
1c07cc19 | 396 | #endif /* __x86_64__ */ |
54709339 | 397 | |
34b34921 PA |
398 | /* Fetch register from gdbserver regcache data. */ |
399 | static void | |
442ea881 PA |
400 | i386_fetch_inferior_register (struct regcache *regcache, |
401 | win32_thread_info *th, int r) | |
34b34921 PA |
402 | { |
403 | char *context_offset = (char *) &th->context + mappings[r]; | |
404 | ||
405 | long l; | |
406 | if (r == FCS_REGNUM) | |
407 | { | |
408 | l = *((long *) context_offset) & 0xffff; | |
442ea881 | 409 | supply_register (regcache, r, (char *) &l); |
34b34921 PA |
410 | } |
411 | else if (r == FOP_REGNUM) | |
412 | { | |
413 | l = (*((long *) context_offset) >> 16) & ((1 << 11) - 1); | |
442ea881 | 414 | supply_register (regcache, r, (char *) &l); |
34b34921 PA |
415 | } |
416 | else | |
442ea881 | 417 | supply_register (regcache, r, context_offset); |
34b34921 PA |
418 | } |
419 | ||
420 | /* Store a new register value into the thread context of TH. */ | |
421 | static void | |
442ea881 PA |
422 | i386_store_inferior_register (struct regcache *regcache, |
423 | win32_thread_info *th, int r) | |
34b34921 PA |
424 | { |
425 | char *context_offset = (char *) &th->context + mappings[r]; | |
442ea881 | 426 | collect_register (regcache, r, context_offset); |
34b34921 PA |
427 | } |
428 | ||
912cf4ba PA |
429 | static const unsigned char i386_win32_breakpoint = 0xcc; |
430 | #define i386_win32_breakpoint_len 1 | |
431 | ||
54709339 | 432 | static void |
3aee8918 | 433 | i386_arch_setup (void) |
54709339 | 434 | { |
cc4d742f SM |
435 | struct target_desc *tdesc; |
436 | ||
1c07cc19 | 437 | #ifdef __x86_64__ |
cc4d742f | 438 | tdesc = amd64_create_target_description (X86_XSTATE_SSE_MASK, false, |
de52b960 | 439 | false, false); |
190852c8 | 440 | const char **expedite_regs = amd64_expedite_regs; |
54709339 | 441 | #else |
1163a4b7 | 442 | tdesc = i386_create_target_description (X86_XSTATE_SSE_MASK, false, false); |
190852c8 | 443 | const char **expedite_regs = i386_expedite_regs; |
54709339 | 444 | #endif |
cc4d742f | 445 | |
190852c8 | 446 | init_target_desc (tdesc, expedite_regs); |
cc4d742f SM |
447 | |
448 | win32_tdesc = tdesc; | |
54709339 PM |
449 | } |
450 | ||
68070c10 | 451 | struct win32_target_ops the_low_target = { |
3aee8918 | 452 | i386_arch_setup, |
68070c10 | 453 | sizeof (mappings) / sizeof (mappings[0]), |
34b34921 PA |
454 | i386_initial_stuff, |
455 | i386_get_thread_context, | |
a2abc7de | 456 | i386_prepare_to_resume, |
34b34921 PA |
457 | i386_thread_added, |
458 | i386_fetch_inferior_register, | |
459 | i386_store_inferior_register, | |
460 | i386_single_step, | |
912cf4ba PA |
461 | &i386_win32_breakpoint, |
462 | i386_win32_breakpoint_len, | |
802e8e6d | 463 | i386_supports_z_point_type, |
aa5ca48f DE |
464 | i386_insert_point, |
465 | i386_remove_point, | |
df7e5265 GB |
466 | x86_stopped_by_watchpoint, |
467 | x86_stopped_data_address | |
68070c10 | 468 | }; |