Commit | Line | Data |
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7b6bb8da | 1 | /* Copyright (C) 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. |
68070c10 PA |
2 | |
3 | This file is part of GDB. | |
4 | ||
5 | This program is free software; you can redistribute it and/or modify | |
6 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 7 | the Free Software Foundation; either version 3 of the License, or |
68070c10 PA |
8 | (at your option) any later version. |
9 | ||
10 | This program is distributed in the hope that it will be useful, | |
11 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | GNU General Public License for more details. | |
14 | ||
15 | You should have received a copy of the GNU General Public License | |
a9762ec7 | 16 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
68070c10 PA |
17 | |
18 | #include "server.h" | |
19 | #include "win32-low.h" | |
aa5ca48f | 20 | #include "i386-low.h" |
68070c10 | 21 | |
54709339 PM |
22 | #ifndef CONTEXT_EXTENDED_REGISTERS |
23 | #define CONTEXT_EXTENDED_REGISTERS 0 | |
24 | #endif | |
25 | ||
68070c10 PA |
26 | #define FCS_REGNUM 27 |
27 | #define FOP_REGNUM 31 | |
28 | ||
29 | #define FLAG_TRACE_BIT 0x100 | |
30 | ||
1c07cc19 PM |
31 | #ifdef __x86_64__ |
32 | /* Defined in auto-generated file reg-amd64.c. */ | |
54709339 PM |
33 | void init_registers_amd64 (void); |
34 | #else | |
d05b4ac3 UW |
35 | /* Defined in auto-generated file reg-i386.c. */ |
36 | void init_registers_i386 (void); | |
54709339 | 37 | #endif |
d05b4ac3 | 38 | |
aa5ca48f | 39 | static struct i386_debug_reg_state debug_reg_state; |
964e4306 PA |
40 | static unsigned dr_status_mirror; |
41 | static unsigned dr_control_mirror; | |
68070c10 | 42 | |
34b34921 PA |
43 | static int debug_registers_changed = 0; |
44 | static int debug_registers_used = 0; | |
45 | ||
aa5ca48f DE |
46 | /* Update the inferior's debug register REGNUM from STATE. */ |
47 | ||
48 | void | |
49 | i386_dr_low_set_addr (const struct i386_debug_reg_state *state, int regnum) | |
50 | { | |
51 | if (! (regnum >= 0 && regnum <= DR_LASTADDR - DR_FIRSTADDR)) | |
52 | fatal ("Invalid debug register %d", regnum); | |
53 | ||
54 | /* debug_reg_state.dr_mirror is already set. | |
55 | Just notify i386_set_thread_context, i386_thread_added | |
56 | that the registers need to be updated. */ | |
57 | debug_registers_changed = 1; | |
58 | debug_registers_used = 1; | |
59 | } | |
60 | ||
964e4306 PA |
61 | CORE_ADDR |
62 | i386_dr_low_get_addr (int regnum) | |
63 | { | |
0a5b1e09 | 64 | gdb_assert (DR_FIRSTADDR <= regnum && regnum <= DR_LASTADDR); |
964e4306 PA |
65 | |
66 | return debug_reg_state.dr_mirror[regnum]; | |
67 | } | |
68 | ||
aa5ca48f DE |
69 | /* Update the inferior's DR7 debug control register from STATE. */ |
70 | ||
71 | void | |
72 | i386_dr_low_set_control (const struct i386_debug_reg_state *state) | |
73 | { | |
74 | /* debug_reg_state.dr_control_mirror is already set. | |
75 | Just notify i386_set_thread_context, i386_thread_added | |
76 | that the registers need to be updated. */ | |
77 | debug_registers_changed = 1; | |
78 | debug_registers_used = 1; | |
79 | } | |
80 | ||
964e4306 PA |
81 | unsigned |
82 | i386_dr_low_get_control (void) | |
83 | { | |
84 | return dr_control_mirror; | |
85 | } | |
86 | ||
aa5ca48f DE |
87 | /* Get the value of the DR6 debug status register from the inferior |
88 | and record it in STATE. */ | |
89 | ||
964e4306 PA |
90 | unsigned |
91 | i386_dr_low_get_status (void) | |
aa5ca48f DE |
92 | { |
93 | /* We don't need to do anything here, the last call to thread_rec for | |
94 | current_event.dwThreadId id has already set it. */ | |
964e4306 | 95 | return dr_status_mirror; |
aa5ca48f DE |
96 | } |
97 | ||
98 | /* Watchpoint support. */ | |
99 | ||
100 | static int | |
101 | i386_insert_point (char type, CORE_ADDR addr, int len) | |
102 | { | |
103 | switch (type) | |
104 | { | |
105 | case '2': | |
106 | case '3': | |
107 | case '4': | |
108 | return i386_low_insert_watchpoint (&debug_reg_state, | |
109 | type, addr, len); | |
110 | default: | |
111 | /* Unsupported. */ | |
112 | return 1; | |
113 | } | |
114 | } | |
115 | ||
116 | static int | |
117 | i386_remove_point (char type, CORE_ADDR addr, int len) | |
118 | { | |
119 | switch (type) | |
120 | { | |
121 | case '2': | |
122 | case '3': | |
123 | case '4': | |
124 | return i386_low_remove_watchpoint (&debug_reg_state, | |
125 | type, addr, len); | |
126 | default: | |
127 | /* Unsupported. */ | |
128 | return 1; | |
129 | } | |
130 | } | |
131 | ||
132 | static int | |
133 | i386_stopped_by_watchpoint (void) | |
134 | { | |
135 | return i386_low_stopped_by_watchpoint (&debug_reg_state); | |
136 | } | |
137 | ||
138 | static CORE_ADDR | |
139 | i386_stopped_data_address (void) | |
140 | { | |
141 | CORE_ADDR addr; | |
142 | if (i386_low_stopped_data_address (&debug_reg_state, &addr)) | |
143 | return addr; | |
144 | return 0; | |
145 | } | |
146 | ||
68070c10 | 147 | static void |
34b34921 | 148 | i386_initial_stuff (void) |
68070c10 | 149 | { |
aa5ca48f | 150 | i386_low_init_dregs (&debug_reg_state); |
34b34921 PA |
151 | debug_registers_changed = 0; |
152 | debug_registers_used = 0; | |
964e4306 PA |
153 | dr_status_mirror = 0; |
154 | dr_control_mirror = 0; | |
68070c10 PA |
155 | } |
156 | ||
157 | static void | |
34b34921 | 158 | i386_get_thread_context (win32_thread_info *th, DEBUG_EVENT* current_event) |
68070c10 | 159 | { |
912cf4ba PA |
160 | /* Requesting the CONTEXT_EXTENDED_REGISTERS register set fails if |
161 | the system doesn't support extended registers. */ | |
162 | static DWORD extended_registers = CONTEXT_EXTENDED_REGISTERS; | |
34b34921 | 163 | |
912cf4ba PA |
164 | again: |
165 | th->context.ContextFlags = (CONTEXT_FULL | |
166 | | CONTEXT_FLOATING_POINT | |
167 | | CONTEXT_DEBUG_REGISTERS | |
168 | | extended_registers); | |
169 | ||
170 | if (!GetThreadContext (th->h, &th->context)) | |
171 | { | |
172 | DWORD e = GetLastError (); | |
173 | ||
174 | if (extended_registers && e == ERROR_INVALID_PARAMETER) | |
175 | { | |
176 | extended_registers = 0; | |
177 | goto again; | |
178 | } | |
179 | ||
180 | error ("GetThreadContext failure %ld\n", (long) e); | |
181 | } | |
34b34921 PA |
182 | |
183 | debug_registers_changed = 0; | |
184 | ||
185 | if (th->tid == current_event->dwThreadId) | |
186 | { | |
187 | /* Copy dr values from the current thread. */ | |
aa5ca48f DE |
188 | struct i386_debug_reg_state *dr = &debug_reg_state; |
189 | dr->dr_mirror[0] = th->context.Dr0; | |
190 | dr->dr_mirror[1] = th->context.Dr1; | |
191 | dr->dr_mirror[2] = th->context.Dr2; | |
192 | dr->dr_mirror[3] = th->context.Dr3; | |
964e4306 PA |
193 | dr_status_mirror = th->context.Dr6; |
194 | dr_control_mirror = th->context.Dr7; | |
34b34921 | 195 | } |
68070c10 PA |
196 | } |
197 | ||
198 | static void | |
34b34921 | 199 | i386_set_thread_context (win32_thread_info *th, DEBUG_EVENT* current_event) |
68070c10 | 200 | { |
34b34921 PA |
201 | if (debug_registers_changed) |
202 | { | |
aa5ca48f DE |
203 | struct i386_debug_reg_state *dr = &debug_reg_state; |
204 | th->context.Dr0 = dr->dr_mirror[0]; | |
205 | th->context.Dr1 = dr->dr_mirror[1]; | |
206 | th->context.Dr2 = dr->dr_mirror[2]; | |
207 | th->context.Dr3 = dr->dr_mirror[3]; | |
964e4306 | 208 | /* th->context.Dr6 = dr_status_mirror; |
34b34921 | 209 | FIXME: should we set dr6 also ?? */ |
964e4306 | 210 | th->context.Dr7 = dr_control_mirror; |
34b34921 PA |
211 | } |
212 | ||
213 | SetThreadContext (th->h, &th->context); | |
68070c10 PA |
214 | } |
215 | ||
68070c10 | 216 | static void |
34b34921 | 217 | i386_thread_added (win32_thread_info *th) |
68070c10 | 218 | { |
34b34921 PA |
219 | /* Set the debug registers for the new thread if they are used. */ |
220 | if (debug_registers_used) | |
68070c10 | 221 | { |
aa5ca48f | 222 | struct i386_debug_reg_state *dr = &debug_reg_state; |
34b34921 PA |
223 | th->context.ContextFlags = CONTEXT_DEBUG_REGISTERS; |
224 | GetThreadContext (th->h, &th->context); | |
225 | ||
aa5ca48f DE |
226 | th->context.Dr0 = dr->dr_mirror[0]; |
227 | th->context.Dr1 = dr->dr_mirror[1]; | |
228 | th->context.Dr2 = dr->dr_mirror[2]; | |
229 | th->context.Dr3 = dr->dr_mirror[3]; | |
964e4306 | 230 | /* th->context.Dr6 = dr_status_mirror; |
34b34921 | 231 | FIXME: should we set dr6 also ?? */ |
964e4306 | 232 | th->context.Dr7 = dr_control_mirror; |
34b34921 PA |
233 | |
234 | SetThreadContext (th->h, &th->context); | |
235 | th->context.ContextFlags = 0; | |
68070c10 | 236 | } |
68070c10 PA |
237 | } |
238 | ||
239 | static void | |
34b34921 | 240 | i386_single_step (win32_thread_info *th) |
68070c10 PA |
241 | { |
242 | th->context.EFlags |= FLAG_TRACE_BIT; | |
243 | } | |
244 | ||
1c07cc19 | 245 | #ifndef __x86_64__ |
54709339 | 246 | |
68070c10 PA |
247 | /* An array of offset mappings into a Win32 Context structure. |
248 | This is a one-to-one mapping which is indexed by gdb's register | |
249 | numbers. It retrieves an offset into the context structure where | |
250 | the 4 byte register is located. | |
251 | An offset value of -1 indicates that Win32 does not provide this | |
252 | register in it's CONTEXT structure. In this case regptr will return | |
253 | a pointer into a dummy register. */ | |
254 | #define context_offset(x) ((int)&(((CONTEXT *)NULL)->x)) | |
255 | static const int mappings[] = { | |
256 | context_offset (Eax), | |
257 | context_offset (Ecx), | |
258 | context_offset (Edx), | |
259 | context_offset (Ebx), | |
260 | context_offset (Esp), | |
261 | context_offset (Ebp), | |
262 | context_offset (Esi), | |
263 | context_offset (Edi), | |
264 | context_offset (Eip), | |
265 | context_offset (EFlags), | |
266 | context_offset (SegCs), | |
267 | context_offset (SegSs), | |
268 | context_offset (SegDs), | |
269 | context_offset (SegEs), | |
270 | context_offset (SegFs), | |
271 | context_offset (SegGs), | |
272 | context_offset (FloatSave.RegisterArea[0 * 10]), | |
273 | context_offset (FloatSave.RegisterArea[1 * 10]), | |
274 | context_offset (FloatSave.RegisterArea[2 * 10]), | |
275 | context_offset (FloatSave.RegisterArea[3 * 10]), | |
276 | context_offset (FloatSave.RegisterArea[4 * 10]), | |
277 | context_offset (FloatSave.RegisterArea[5 * 10]), | |
278 | context_offset (FloatSave.RegisterArea[6 * 10]), | |
279 | context_offset (FloatSave.RegisterArea[7 * 10]), | |
280 | context_offset (FloatSave.ControlWord), | |
281 | context_offset (FloatSave.StatusWord), | |
282 | context_offset (FloatSave.TagWord), | |
283 | context_offset (FloatSave.ErrorSelector), | |
284 | context_offset (FloatSave.ErrorOffset), | |
285 | context_offset (FloatSave.DataSelector), | |
286 | context_offset (FloatSave.DataOffset), | |
287 | context_offset (FloatSave.ErrorSelector), | |
288 | /* XMM0-7 */ | |
289 | context_offset (ExtendedRegisters[10 * 16]), | |
290 | context_offset (ExtendedRegisters[11 * 16]), | |
291 | context_offset (ExtendedRegisters[12 * 16]), | |
292 | context_offset (ExtendedRegisters[13 * 16]), | |
293 | context_offset (ExtendedRegisters[14 * 16]), | |
294 | context_offset (ExtendedRegisters[15 * 16]), | |
295 | context_offset (ExtendedRegisters[16 * 16]), | |
296 | context_offset (ExtendedRegisters[17 * 16]), | |
297 | /* MXCSR */ | |
298 | context_offset (ExtendedRegisters[24]) | |
299 | }; | |
300 | #undef context_offset | |
301 | ||
1c07cc19 | 302 | #else /* __x86_64__ */ |
54709339 PM |
303 | |
304 | #define context_offset(x) (offsetof (CONTEXT, x)) | |
305 | static const int mappings[] = | |
306 | { | |
307 | context_offset (Rax), | |
308 | context_offset (Rbx), | |
309 | context_offset (Rcx), | |
310 | context_offset (Rdx), | |
311 | context_offset (Rsi), | |
312 | context_offset (Rdi), | |
313 | context_offset (Rbp), | |
314 | context_offset (Rsp), | |
315 | context_offset (R8), | |
316 | context_offset (R9), | |
317 | context_offset (R10), | |
318 | context_offset (R11), | |
319 | context_offset (R12), | |
320 | context_offset (R13), | |
321 | context_offset (R14), | |
322 | context_offset (R15), | |
323 | context_offset (Rip), | |
324 | context_offset (EFlags), | |
325 | context_offset (SegCs), | |
326 | context_offset (SegSs), | |
327 | context_offset (SegDs), | |
328 | context_offset (SegEs), | |
329 | context_offset (SegFs), | |
330 | context_offset (SegGs), | |
331 | context_offset (FloatSave.FloatRegisters[0]), | |
332 | context_offset (FloatSave.FloatRegisters[1]), | |
333 | context_offset (FloatSave.FloatRegisters[2]), | |
334 | context_offset (FloatSave.FloatRegisters[3]), | |
335 | context_offset (FloatSave.FloatRegisters[4]), | |
336 | context_offset (FloatSave.FloatRegisters[5]), | |
337 | context_offset (FloatSave.FloatRegisters[6]), | |
338 | context_offset (FloatSave.FloatRegisters[7]), | |
339 | context_offset (FloatSave.ControlWord), | |
340 | context_offset (FloatSave.StatusWord), | |
341 | context_offset (FloatSave.TagWord), | |
342 | context_offset (FloatSave.ErrorSelector), | |
343 | context_offset (FloatSave.ErrorOffset), | |
344 | context_offset (FloatSave.DataSelector), | |
345 | context_offset (FloatSave.DataOffset), | |
346 | context_offset (FloatSave.ErrorSelector) | |
347 | /* XMM0-7 */ , | |
348 | context_offset (Xmm0), | |
349 | context_offset (Xmm1), | |
350 | context_offset (Xmm2), | |
351 | context_offset (Xmm3), | |
352 | context_offset (Xmm4), | |
353 | context_offset (Xmm5), | |
354 | context_offset (Xmm6), | |
355 | context_offset (Xmm7), | |
356 | context_offset (Xmm8), | |
357 | context_offset (Xmm9), | |
358 | context_offset (Xmm10), | |
359 | context_offset (Xmm11), | |
360 | context_offset (Xmm12), | |
361 | context_offset (Xmm13), | |
362 | context_offset (Xmm14), | |
363 | context_offset (Xmm15), | |
364 | /* MXCSR */ | |
365 | context_offset (FloatSave.MxCsr) | |
366 | }; | |
367 | #undef context_offset | |
368 | ||
1c07cc19 | 369 | #endif /* __x86_64__ */ |
54709339 | 370 | |
34b34921 PA |
371 | /* Fetch register from gdbserver regcache data. */ |
372 | static void | |
442ea881 PA |
373 | i386_fetch_inferior_register (struct regcache *regcache, |
374 | win32_thread_info *th, int r) | |
34b34921 PA |
375 | { |
376 | char *context_offset = (char *) &th->context + mappings[r]; | |
377 | ||
378 | long l; | |
379 | if (r == FCS_REGNUM) | |
380 | { | |
381 | l = *((long *) context_offset) & 0xffff; | |
442ea881 | 382 | supply_register (regcache, r, (char *) &l); |
34b34921 PA |
383 | } |
384 | else if (r == FOP_REGNUM) | |
385 | { | |
386 | l = (*((long *) context_offset) >> 16) & ((1 << 11) - 1); | |
442ea881 | 387 | supply_register (regcache, r, (char *) &l); |
34b34921 PA |
388 | } |
389 | else | |
442ea881 | 390 | supply_register (regcache, r, context_offset); |
34b34921 PA |
391 | } |
392 | ||
393 | /* Store a new register value into the thread context of TH. */ | |
394 | static void | |
442ea881 PA |
395 | i386_store_inferior_register (struct regcache *regcache, |
396 | win32_thread_info *th, int r) | |
34b34921 PA |
397 | { |
398 | char *context_offset = (char *) &th->context + mappings[r]; | |
442ea881 | 399 | collect_register (regcache, r, context_offset); |
34b34921 PA |
400 | } |
401 | ||
912cf4ba PA |
402 | static const unsigned char i386_win32_breakpoint = 0xcc; |
403 | #define i386_win32_breakpoint_len 1 | |
404 | ||
54709339 PM |
405 | static void |
406 | init_windows_x86 (void) | |
407 | { | |
1c07cc19 | 408 | #ifdef __x86_64__ |
54709339 PM |
409 | init_registers_amd64 (); |
410 | #else | |
411 | init_registers_i386 (); | |
412 | #endif | |
413 | } | |
414 | ||
68070c10 | 415 | struct win32_target_ops the_low_target = { |
54709339 | 416 | init_windows_x86, |
68070c10 | 417 | sizeof (mappings) / sizeof (mappings[0]), |
34b34921 PA |
418 | i386_initial_stuff, |
419 | i386_get_thread_context, | |
420 | i386_set_thread_context, | |
421 | i386_thread_added, | |
422 | i386_fetch_inferior_register, | |
423 | i386_store_inferior_register, | |
424 | i386_single_step, | |
912cf4ba PA |
425 | &i386_win32_breakpoint, |
426 | i386_win32_breakpoint_len, | |
aa5ca48f DE |
427 | i386_insert_point, |
428 | i386_remove_point, | |
429 | i386_stopped_by_watchpoint, | |
430 | i386_stopped_data_address | |
68070c10 | 431 | }; |