Commit | Line | Data |
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ecd75fc8 | 1 | /* Copyright (C) 2007-2014 Free Software Foundation, Inc. |
68070c10 PA |
2 | |
3 | This file is part of GDB. | |
4 | ||
5 | This program is free software; you can redistribute it and/or modify | |
6 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 7 | the Free Software Foundation; either version 3 of the License, or |
68070c10 PA |
8 | (at your option) any later version. |
9 | ||
10 | This program is distributed in the hope that it will be useful, | |
11 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | GNU General Public License for more details. | |
14 | ||
15 | You should have received a copy of the GNU General Public License | |
a9762ec7 | 16 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
68070c10 PA |
17 | |
18 | #include "server.h" | |
19 | #include "win32-low.h" | |
aa5ca48f | 20 | #include "i386-low.h" |
68070c10 | 21 | |
54709339 PM |
22 | #ifndef CONTEXT_EXTENDED_REGISTERS |
23 | #define CONTEXT_EXTENDED_REGISTERS 0 | |
24 | #endif | |
25 | ||
68070c10 PA |
26 | #define FCS_REGNUM 27 |
27 | #define FOP_REGNUM 31 | |
28 | ||
29 | #define FLAG_TRACE_BIT 0x100 | |
30 | ||
1c07cc19 PM |
31 | #ifdef __x86_64__ |
32 | /* Defined in auto-generated file reg-amd64.c. */ | |
54709339 | 33 | void init_registers_amd64 (void); |
3aee8918 | 34 | extern const struct target_desc *tdesc_amd64; |
54709339 | 35 | #else |
d05b4ac3 UW |
36 | /* Defined in auto-generated file reg-i386.c. */ |
37 | void init_registers_i386 (void); | |
3aee8918 | 38 | extern const struct target_desc *tdesc_i386; |
54709339 | 39 | #endif |
d05b4ac3 | 40 | |
aa5ca48f | 41 | static struct i386_debug_reg_state debug_reg_state; |
68070c10 | 42 | |
34b34921 PA |
43 | static int debug_registers_changed = 0; |
44 | static int debug_registers_used = 0; | |
45 | ||
aa5ca48f DE |
46 | /* Update the inferior's debug register REGNUM from STATE. */ |
47 | ||
42995dbd GB |
48 | static void |
49 | i386_dr_low_set_addr (int regnum, CORE_ADDR addr) | |
aa5ca48f | 50 | { |
f7160e97 | 51 | gdb_assert (DR_FIRSTADDR <= regnum && regnum <= DR_LASTADDR); |
aa5ca48f DE |
52 | |
53 | /* debug_reg_state.dr_mirror is already set. | |
54 | Just notify i386_set_thread_context, i386_thread_added | |
55 | that the registers need to be updated. */ | |
56 | debug_registers_changed = 1; | |
57 | debug_registers_used = 1; | |
58 | } | |
59 | ||
42995dbd | 60 | static CORE_ADDR |
964e4306 PA |
61 | i386_dr_low_get_addr (int regnum) |
62 | { | |
0a5b1e09 | 63 | gdb_assert (DR_FIRSTADDR <= regnum && regnum <= DR_LASTADDR); |
964e4306 PA |
64 | |
65 | return debug_reg_state.dr_mirror[regnum]; | |
66 | } | |
67 | ||
aa5ca48f DE |
68 | /* Update the inferior's DR7 debug control register from STATE. */ |
69 | ||
42995dbd GB |
70 | static void |
71 | i386_dr_low_set_control (unsigned long control) | |
aa5ca48f DE |
72 | { |
73 | /* debug_reg_state.dr_control_mirror is already set. | |
74 | Just notify i386_set_thread_context, i386_thread_added | |
75 | that the registers need to be updated. */ | |
76 | debug_registers_changed = 1; | |
77 | debug_registers_used = 1; | |
78 | } | |
79 | ||
42995dbd | 80 | static unsigned long |
964e4306 PA |
81 | i386_dr_low_get_control (void) |
82 | { | |
8d26e50c | 83 | return debug_reg_state.dr_control_mirror; |
964e4306 PA |
84 | } |
85 | ||
aa5ca48f DE |
86 | /* Get the value of the DR6 debug status register from the inferior |
87 | and record it in STATE. */ | |
88 | ||
42995dbd | 89 | static unsigned long |
964e4306 | 90 | i386_dr_low_get_status (void) |
aa5ca48f DE |
91 | { |
92 | /* We don't need to do anything here, the last call to thread_rec for | |
93 | current_event.dwThreadId id has already set it. */ | |
8d26e50c | 94 | return debug_reg_state.dr_status_mirror; |
aa5ca48f DE |
95 | } |
96 | ||
42995dbd GB |
97 | /* Low-level function vector. */ |
98 | struct i386_dr_low_type i386_dr_low = | |
99 | { | |
100 | i386_dr_low_set_control, | |
101 | i386_dr_low_set_addr, | |
102 | i386_dr_low_get_addr, | |
103 | i386_dr_low_get_status, | |
104 | i386_dr_low_get_control, | |
105 | sizeof (void *), | |
106 | }; | |
107 | ||
802e8e6d | 108 | /* Breakpoint/watchpoint support. */ |
aa5ca48f DE |
109 | |
110 | static int | |
802e8e6d PA |
111 | i386_supports_z_point_type (char z_type) |
112 | { | |
113 | switch (z_type) | |
114 | { | |
115 | case Z_PACKET_WRITE_WP: | |
116 | case Z_PACKET_ACCESS_WP: | |
117 | return 1; | |
118 | default: | |
119 | return 0; | |
120 | } | |
121 | } | |
122 | ||
123 | static int | |
124 | i386_insert_point (enum raw_bkpt_type type, CORE_ADDR addr, | |
125 | int size, struct raw_breakpoint *bp) | |
aa5ca48f DE |
126 | { |
127 | switch (type) | |
128 | { | |
802e8e6d PA |
129 | case raw_bkpt_type_write_wp: |
130 | case raw_bkpt_type_access_wp: | |
a4165e94 | 131 | { |
802e8e6d PA |
132 | enum target_hw_bp_type hw_type |
133 | = raw_bkpt_type_to_target_hw_bp_type (type); | |
a4165e94 | 134 | |
4be83cc2 GB |
135 | return i386_dr_insert_watchpoint (&debug_reg_state, |
136 | hw_type, addr, size); | |
a4165e94 | 137 | } |
aa5ca48f DE |
138 | default: |
139 | /* Unsupported. */ | |
140 | return 1; | |
141 | } | |
142 | } | |
143 | ||
144 | static int | |
802e8e6d PA |
145 | i386_remove_point (enum raw_bkpt_type type, CORE_ADDR addr, |
146 | int size, struct raw_breakpoint *bp) | |
aa5ca48f DE |
147 | { |
148 | switch (type) | |
149 | { | |
802e8e6d PA |
150 | case raw_bkpt_type_write_wp: |
151 | case raw_bkpt_type_access_wp: | |
a4165e94 | 152 | { |
802e8e6d PA |
153 | enum target_hw_bp_type hw_type |
154 | = raw_bkpt_type_to_target_hw_bp_type (type); | |
a4165e94 | 155 | |
4be83cc2 GB |
156 | return i386_dr_remove_watchpoint (&debug_reg_state, |
157 | hw_type, addr, size); | |
a4165e94 | 158 | } |
aa5ca48f DE |
159 | default: |
160 | /* Unsupported. */ | |
161 | return 1; | |
162 | } | |
163 | } | |
164 | ||
165 | static int | |
166 | i386_stopped_by_watchpoint (void) | |
167 | { | |
4be83cc2 | 168 | return i386_dr_stopped_by_watchpoint (&debug_reg_state); |
aa5ca48f DE |
169 | } |
170 | ||
171 | static CORE_ADDR | |
172 | i386_stopped_data_address (void) | |
173 | { | |
174 | CORE_ADDR addr; | |
4be83cc2 | 175 | if (i386_dr_stopped_data_address (&debug_reg_state, &addr)) |
aa5ca48f DE |
176 | return addr; |
177 | return 0; | |
178 | } | |
179 | ||
68070c10 | 180 | static void |
34b34921 | 181 | i386_initial_stuff (void) |
68070c10 | 182 | { |
aa5ca48f | 183 | i386_low_init_dregs (&debug_reg_state); |
34b34921 PA |
184 | debug_registers_changed = 0; |
185 | debug_registers_used = 0; | |
68070c10 PA |
186 | } |
187 | ||
188 | static void | |
34b34921 | 189 | i386_get_thread_context (win32_thread_info *th, DEBUG_EVENT* current_event) |
68070c10 | 190 | { |
912cf4ba PA |
191 | /* Requesting the CONTEXT_EXTENDED_REGISTERS register set fails if |
192 | the system doesn't support extended registers. */ | |
193 | static DWORD extended_registers = CONTEXT_EXTENDED_REGISTERS; | |
34b34921 | 194 | |
912cf4ba PA |
195 | again: |
196 | th->context.ContextFlags = (CONTEXT_FULL | |
197 | | CONTEXT_FLOATING_POINT | |
198 | | CONTEXT_DEBUG_REGISTERS | |
199 | | extended_registers); | |
200 | ||
201 | if (!GetThreadContext (th->h, &th->context)) | |
202 | { | |
203 | DWORD e = GetLastError (); | |
204 | ||
205 | if (extended_registers && e == ERROR_INVALID_PARAMETER) | |
206 | { | |
207 | extended_registers = 0; | |
208 | goto again; | |
209 | } | |
210 | ||
211 | error ("GetThreadContext failure %ld\n", (long) e); | |
212 | } | |
34b34921 PA |
213 | |
214 | debug_registers_changed = 0; | |
215 | ||
216 | if (th->tid == current_event->dwThreadId) | |
217 | { | |
218 | /* Copy dr values from the current thread. */ | |
aa5ca48f DE |
219 | struct i386_debug_reg_state *dr = &debug_reg_state; |
220 | dr->dr_mirror[0] = th->context.Dr0; | |
221 | dr->dr_mirror[1] = th->context.Dr1; | |
222 | dr->dr_mirror[2] = th->context.Dr2; | |
223 | dr->dr_mirror[3] = th->context.Dr3; | |
8d26e50c JB |
224 | dr->dr_status_mirror = th->context.Dr6; |
225 | dr->dr_control_mirror = th->context.Dr7; | |
34b34921 | 226 | } |
68070c10 PA |
227 | } |
228 | ||
229 | static void | |
34b34921 | 230 | i386_set_thread_context (win32_thread_info *th, DEBUG_EVENT* current_event) |
68070c10 | 231 | { |
34b34921 PA |
232 | if (debug_registers_changed) |
233 | { | |
aa5ca48f DE |
234 | struct i386_debug_reg_state *dr = &debug_reg_state; |
235 | th->context.Dr0 = dr->dr_mirror[0]; | |
236 | th->context.Dr1 = dr->dr_mirror[1]; | |
237 | th->context.Dr2 = dr->dr_mirror[2]; | |
238 | th->context.Dr3 = dr->dr_mirror[3]; | |
8d26e50c | 239 | /* th->context.Dr6 = dr->dr_status_mirror; |
34b34921 | 240 | FIXME: should we set dr6 also ?? */ |
8d26e50c | 241 | th->context.Dr7 = dr->dr_control_mirror; |
34b34921 PA |
242 | } |
243 | ||
244 | SetThreadContext (th->h, &th->context); | |
68070c10 PA |
245 | } |
246 | ||
68070c10 | 247 | static void |
34b34921 | 248 | i386_thread_added (win32_thread_info *th) |
68070c10 | 249 | { |
34b34921 PA |
250 | /* Set the debug registers for the new thread if they are used. */ |
251 | if (debug_registers_used) | |
68070c10 | 252 | { |
aa5ca48f | 253 | struct i386_debug_reg_state *dr = &debug_reg_state; |
34b34921 PA |
254 | th->context.ContextFlags = CONTEXT_DEBUG_REGISTERS; |
255 | GetThreadContext (th->h, &th->context); | |
256 | ||
aa5ca48f DE |
257 | th->context.Dr0 = dr->dr_mirror[0]; |
258 | th->context.Dr1 = dr->dr_mirror[1]; | |
259 | th->context.Dr2 = dr->dr_mirror[2]; | |
260 | th->context.Dr3 = dr->dr_mirror[3]; | |
8d26e50c | 261 | /* th->context.Dr6 = dr->dr_status_mirror; |
34b34921 | 262 | FIXME: should we set dr6 also ?? */ |
8d26e50c | 263 | th->context.Dr7 = dr->dr_control_mirror; |
34b34921 PA |
264 | |
265 | SetThreadContext (th->h, &th->context); | |
266 | th->context.ContextFlags = 0; | |
68070c10 | 267 | } |
68070c10 PA |
268 | } |
269 | ||
270 | static void | |
34b34921 | 271 | i386_single_step (win32_thread_info *th) |
68070c10 PA |
272 | { |
273 | th->context.EFlags |= FLAG_TRACE_BIT; | |
274 | } | |
275 | ||
1c07cc19 | 276 | #ifndef __x86_64__ |
54709339 | 277 | |
68070c10 PA |
278 | /* An array of offset mappings into a Win32 Context structure. |
279 | This is a one-to-one mapping which is indexed by gdb's register | |
280 | numbers. It retrieves an offset into the context structure where | |
281 | the 4 byte register is located. | |
282 | An offset value of -1 indicates that Win32 does not provide this | |
283 | register in it's CONTEXT structure. In this case regptr will return | |
284 | a pointer into a dummy register. */ | |
285 | #define context_offset(x) ((int)&(((CONTEXT *)NULL)->x)) | |
286 | static const int mappings[] = { | |
287 | context_offset (Eax), | |
288 | context_offset (Ecx), | |
289 | context_offset (Edx), | |
290 | context_offset (Ebx), | |
291 | context_offset (Esp), | |
292 | context_offset (Ebp), | |
293 | context_offset (Esi), | |
294 | context_offset (Edi), | |
295 | context_offset (Eip), | |
296 | context_offset (EFlags), | |
297 | context_offset (SegCs), | |
298 | context_offset (SegSs), | |
299 | context_offset (SegDs), | |
300 | context_offset (SegEs), | |
301 | context_offset (SegFs), | |
302 | context_offset (SegGs), | |
303 | context_offset (FloatSave.RegisterArea[0 * 10]), | |
304 | context_offset (FloatSave.RegisterArea[1 * 10]), | |
305 | context_offset (FloatSave.RegisterArea[2 * 10]), | |
306 | context_offset (FloatSave.RegisterArea[3 * 10]), | |
307 | context_offset (FloatSave.RegisterArea[4 * 10]), | |
308 | context_offset (FloatSave.RegisterArea[5 * 10]), | |
309 | context_offset (FloatSave.RegisterArea[6 * 10]), | |
310 | context_offset (FloatSave.RegisterArea[7 * 10]), | |
311 | context_offset (FloatSave.ControlWord), | |
312 | context_offset (FloatSave.StatusWord), | |
313 | context_offset (FloatSave.TagWord), | |
314 | context_offset (FloatSave.ErrorSelector), | |
315 | context_offset (FloatSave.ErrorOffset), | |
316 | context_offset (FloatSave.DataSelector), | |
317 | context_offset (FloatSave.DataOffset), | |
318 | context_offset (FloatSave.ErrorSelector), | |
319 | /* XMM0-7 */ | |
320 | context_offset (ExtendedRegisters[10 * 16]), | |
321 | context_offset (ExtendedRegisters[11 * 16]), | |
322 | context_offset (ExtendedRegisters[12 * 16]), | |
323 | context_offset (ExtendedRegisters[13 * 16]), | |
324 | context_offset (ExtendedRegisters[14 * 16]), | |
325 | context_offset (ExtendedRegisters[15 * 16]), | |
326 | context_offset (ExtendedRegisters[16 * 16]), | |
327 | context_offset (ExtendedRegisters[17 * 16]), | |
328 | /* MXCSR */ | |
329 | context_offset (ExtendedRegisters[24]) | |
330 | }; | |
331 | #undef context_offset | |
332 | ||
1c07cc19 | 333 | #else /* __x86_64__ */ |
54709339 PM |
334 | |
335 | #define context_offset(x) (offsetof (CONTEXT, x)) | |
336 | static const int mappings[] = | |
337 | { | |
338 | context_offset (Rax), | |
339 | context_offset (Rbx), | |
340 | context_offset (Rcx), | |
341 | context_offset (Rdx), | |
342 | context_offset (Rsi), | |
343 | context_offset (Rdi), | |
344 | context_offset (Rbp), | |
345 | context_offset (Rsp), | |
346 | context_offset (R8), | |
347 | context_offset (R9), | |
348 | context_offset (R10), | |
349 | context_offset (R11), | |
350 | context_offset (R12), | |
351 | context_offset (R13), | |
352 | context_offset (R14), | |
353 | context_offset (R15), | |
354 | context_offset (Rip), | |
355 | context_offset (EFlags), | |
356 | context_offset (SegCs), | |
357 | context_offset (SegSs), | |
358 | context_offset (SegDs), | |
359 | context_offset (SegEs), | |
360 | context_offset (SegFs), | |
361 | context_offset (SegGs), | |
362 | context_offset (FloatSave.FloatRegisters[0]), | |
363 | context_offset (FloatSave.FloatRegisters[1]), | |
364 | context_offset (FloatSave.FloatRegisters[2]), | |
365 | context_offset (FloatSave.FloatRegisters[3]), | |
366 | context_offset (FloatSave.FloatRegisters[4]), | |
367 | context_offset (FloatSave.FloatRegisters[5]), | |
368 | context_offset (FloatSave.FloatRegisters[6]), | |
369 | context_offset (FloatSave.FloatRegisters[7]), | |
370 | context_offset (FloatSave.ControlWord), | |
371 | context_offset (FloatSave.StatusWord), | |
372 | context_offset (FloatSave.TagWord), | |
373 | context_offset (FloatSave.ErrorSelector), | |
374 | context_offset (FloatSave.ErrorOffset), | |
375 | context_offset (FloatSave.DataSelector), | |
376 | context_offset (FloatSave.DataOffset), | |
377 | context_offset (FloatSave.ErrorSelector) | |
378 | /* XMM0-7 */ , | |
379 | context_offset (Xmm0), | |
380 | context_offset (Xmm1), | |
381 | context_offset (Xmm2), | |
382 | context_offset (Xmm3), | |
383 | context_offset (Xmm4), | |
384 | context_offset (Xmm5), | |
385 | context_offset (Xmm6), | |
386 | context_offset (Xmm7), | |
387 | context_offset (Xmm8), | |
388 | context_offset (Xmm9), | |
389 | context_offset (Xmm10), | |
390 | context_offset (Xmm11), | |
391 | context_offset (Xmm12), | |
392 | context_offset (Xmm13), | |
393 | context_offset (Xmm14), | |
394 | context_offset (Xmm15), | |
395 | /* MXCSR */ | |
396 | context_offset (FloatSave.MxCsr) | |
397 | }; | |
398 | #undef context_offset | |
399 | ||
1c07cc19 | 400 | #endif /* __x86_64__ */ |
54709339 | 401 | |
34b34921 PA |
402 | /* Fetch register from gdbserver regcache data. */ |
403 | static void | |
442ea881 PA |
404 | i386_fetch_inferior_register (struct regcache *regcache, |
405 | win32_thread_info *th, int r) | |
34b34921 PA |
406 | { |
407 | char *context_offset = (char *) &th->context + mappings[r]; | |
408 | ||
409 | long l; | |
410 | if (r == FCS_REGNUM) | |
411 | { | |
412 | l = *((long *) context_offset) & 0xffff; | |
442ea881 | 413 | supply_register (regcache, r, (char *) &l); |
34b34921 PA |
414 | } |
415 | else if (r == FOP_REGNUM) | |
416 | { | |
417 | l = (*((long *) context_offset) >> 16) & ((1 << 11) - 1); | |
442ea881 | 418 | supply_register (regcache, r, (char *) &l); |
34b34921 PA |
419 | } |
420 | else | |
442ea881 | 421 | supply_register (regcache, r, context_offset); |
34b34921 PA |
422 | } |
423 | ||
424 | /* Store a new register value into the thread context of TH. */ | |
425 | static void | |
442ea881 PA |
426 | i386_store_inferior_register (struct regcache *regcache, |
427 | win32_thread_info *th, int r) | |
34b34921 PA |
428 | { |
429 | char *context_offset = (char *) &th->context + mappings[r]; | |
442ea881 | 430 | collect_register (regcache, r, context_offset); |
34b34921 PA |
431 | } |
432 | ||
912cf4ba PA |
433 | static const unsigned char i386_win32_breakpoint = 0xcc; |
434 | #define i386_win32_breakpoint_len 1 | |
435 | ||
54709339 | 436 | static void |
3aee8918 | 437 | i386_arch_setup (void) |
54709339 | 438 | { |
1c07cc19 | 439 | #ifdef __x86_64__ |
54709339 | 440 | init_registers_amd64 (); |
3aee8918 | 441 | win32_tdesc = tdesc_amd64; |
54709339 PM |
442 | #else |
443 | init_registers_i386 (); | |
3aee8918 | 444 | win32_tdesc = tdesc_i386; |
54709339 PM |
445 | #endif |
446 | } | |
447 | ||
68070c10 | 448 | struct win32_target_ops the_low_target = { |
3aee8918 | 449 | i386_arch_setup, |
68070c10 | 450 | sizeof (mappings) / sizeof (mappings[0]), |
34b34921 PA |
451 | i386_initial_stuff, |
452 | i386_get_thread_context, | |
453 | i386_set_thread_context, | |
454 | i386_thread_added, | |
455 | i386_fetch_inferior_register, | |
456 | i386_store_inferior_register, | |
457 | i386_single_step, | |
912cf4ba PA |
458 | &i386_win32_breakpoint, |
459 | i386_win32_breakpoint_len, | |
802e8e6d | 460 | i386_supports_z_point_type, |
aa5ca48f DE |
461 | i386_insert_point, |
462 | i386_remove_point, | |
463 | i386_stopped_by_watchpoint, | |
464 | i386_stopped_data_address | |
68070c10 | 465 | }; |