Commit | Line | Data |
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c906108c | 1 | /* Target-machine dependent code for Hitachi H8/300, for GDB. |
cda5a58a AC |
2 | |
3 | Copyright 1988, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1998, | |
1e698235 | 4 | 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. |
c906108c | 5 | |
c5aa993b | 6 | This file is part of GDB. |
c906108c | 7 | |
c5aa993b JM |
8 | This program is free software; you can redistribute it and/or modify |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2 of the License, or | |
11 | (at your option) any later version. | |
c906108c | 12 | |
c5aa993b JM |
13 | This program is distributed in the hope that it will be useful, |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
c906108c | 17 | |
c5aa993b JM |
18 | You should have received a copy of the GNU General Public License |
19 | along with this program; if not, write to the Free Software | |
20 | Foundation, Inc., 59 Temple Place - Suite 330, | |
21 | Boston, MA 02111-1307, USA. */ | |
c906108c SS |
22 | |
23 | /* | |
c5aa993b JM |
24 | Contributed by Steve Chamberlain |
25 | sac@cygnus.com | |
c906108c SS |
26 | */ |
27 | ||
28 | #include "defs.h" | |
c906108c | 29 | #include "value.h" |
928e48af CV |
30 | #include "inferior.h" |
31 | #include "symfile.h" | |
32 | #include "arch-utils.h" | |
4e052eda | 33 | #include "regcache.h" |
928e48af CV |
34 | #include "gdbcore.h" |
35 | #include "objfiles.h" | |
36 | #include "gdbcmd.h" | |
4904ba5b | 37 | #include "gdb_assert.h" |
c906108c | 38 | |
928e48af CV |
39 | /* Extra info which is saved in each frame_info. */ |
40 | struct frame_extra_info | |
41 | { | |
42 | CORE_ADDR from_pc; | |
928e48af | 43 | }; |
c906108c | 44 | |
928e48af CV |
45 | enum |
46 | { | |
47 | h8300_reg_size = 2, | |
48 | h8300h_reg_size = 4, | |
49 | h8300_max_reg_size = 4, | |
50 | }; | |
51 | #define BINWORD (h8300hmode ? h8300h_reg_size : h8300_reg_size) | |
52 | ||
53 | enum gdb_regnum | |
54 | { | |
55 | E_R0_REGNUM, E_ER0_REGNUM = E_R0_REGNUM, E_ARG0_REGNUM = E_R0_REGNUM, | |
0261a0d0 CV |
56 | E_RET0_REGNUM = E_R0_REGNUM, |
57 | E_R1_REGNUM, E_ER1_REGNUM = E_R1_REGNUM, E_RET1_REGNUM = E_R1_REGNUM, | |
928e48af CV |
58 | E_R2_REGNUM, E_ER2_REGNUM = E_R2_REGNUM, E_ARGLAST_REGNUM = E_R2_REGNUM, |
59 | E_R3_REGNUM, E_ER3_REGNUM = E_R3_REGNUM, | |
60 | E_R4_REGNUM, E_ER4_REGNUM = E_R4_REGNUM, | |
61 | E_R5_REGNUM, E_ER5_REGNUM = E_R5_REGNUM, | |
62 | E_R6_REGNUM, E_ER6_REGNUM = E_R6_REGNUM, E_FP_REGNUM = E_R6_REGNUM, | |
63 | E_SP_REGNUM, | |
64 | E_CCR_REGNUM, | |
65 | E_PC_REGNUM, | |
66 | E_CYCLES_REGNUM, | |
67 | E_TICK_REGNUM, E_EXR_REGNUM = E_TICK_REGNUM, | |
68 | E_INST_REGNUM, E_TICKS_REGNUM = E_INST_REGNUM, | |
084edea5 CV |
69 | E_INSTS_REGNUM, |
70 | E_MACH_REGNUM, | |
71 | E_MACL_REGNUM, | |
72 | E_SBR_REGNUM, | |
73 | E_VBR_REGNUM | |
928e48af | 74 | }; |
c906108c | 75 | |
4bb1dc5e CV |
76 | #define E_PSEUDO_CCR_REGNUM (NUM_REGS) |
77 | #define E_PSEUDO_EXR_REGNUM (NUM_REGS+1) | |
78 | ||
c906108c SS |
79 | #define UNSIGNED_SHORT(X) ((X) & 0xffff) |
80 | ||
81 | #define IS_PUSH(x) ((x & 0xfff0)==0x6df0) | |
82 | #define IS_PUSH_FP(x) (x == 0x6df6) | |
83 | #define IS_MOVE_FP(x) (x == 0x0d76 || x == 0x0ff6) | |
84 | #define IS_MOV_SP_FP(x) (x == 0x0d76 || x == 0x0ff6) | |
85 | #define IS_SUB2_SP(x) (x==0x1b87) | |
86 | #define IS_SUB4_SP(x) (x==0x1b97) | |
87 | #define IS_SUBL_SP(x) (x==0x7a37) | |
88 | #define IS_MOVK_R5(x) (x==0x7905) | |
89 | #define IS_SUB_R5SP(x) (x==0x1957) | |
90 | ||
928e48af CV |
91 | /* If the instruction at PC is an argument register spill, return its |
92 | length. Otherwise, return zero. | |
c906108c | 93 | |
928e48af CV |
94 | An argument register spill is an instruction that moves an argument |
95 | from the register in which it was passed to the stack slot in which | |
96 | it really lives. It is a byte, word, or longword move from an | |
4bb1dc5e CV |
97 | argument register to a negative offset from the frame pointer. |
98 | ||
99 | CV, 2003-06-16: Or, in optimized code or when the `register' qualifier | |
100 | is used, it could be a byte, word or long move to registers r3-r5. */ | |
c906108c | 101 | |
928e48af CV |
102 | static int |
103 | h8300_is_argument_spill (CORE_ADDR pc) | |
104 | { | |
105 | int w = read_memory_unsigned_integer (pc, 2); | |
106 | ||
4bb1dc5e CV |
107 | if (((w & 0xff88) == 0x0c88 /* mov.b Rsl, Rdl */ |
108 | || (w & 0xff88) == 0x0d00 /* mov.w Rs, Rd */ | |
109 | || (w & 0xff88) == 0x0f80) /* mov.l Rs, Rd */ | |
110 | && (w & 0x70) <= 0x20 /* Rs is R0, R1 or R2 */ | |
111 | && (w & 0x7) >= 0x3 && (w & 0x7) <= 0x5)/* Rd is R3, R4 or R5 */ | |
112 | return 2; | |
113 | ||
928e48af CV |
114 | if ((w & 0xfff0) == 0x6ee0 /* mov.b Rs,@(d:16,er6) */ |
115 | && 8 <= (w & 0xf) && (w & 0xf) <= 10) /* Rs is R0L, R1L, or R2L */ | |
116 | { | |
117 | int w2 = read_memory_integer (pc + 2, 2); | |
118 | ||
119 | /* ... and d:16 is negative. */ | |
120 | if (w2 < 0) | |
121 | return 4; | |
122 | } | |
123 | else if (w == 0x7860) | |
124 | { | |
125 | int w2 = read_memory_integer (pc + 2, 2); | |
c906108c | 126 | |
928e48af CV |
127 | if ((w2 & 0xfff0) == 0x6aa0) /* mov.b Rs, @(d:24,er6) */ |
128 | { | |
129 | LONGEST disp = read_memory_integer (pc + 4, 4); | |
c906108c | 130 | |
928e48af CV |
131 | /* ... and d:24 is negative. */ |
132 | if (disp < 0 && disp > 0xffffff) | |
133 | return 8; | |
134 | } | |
135 | } | |
136 | else if ((w & 0xfff0) == 0x6fe0 /* mov.w Rs,@(d:16,er6) */ | |
137 | && (w & 0xf) <= 2) /* Rs is R0, R1, or R2 */ | |
138 | { | |
139 | int w2 = read_memory_integer (pc + 2, 2); | |
c906108c | 140 | |
928e48af CV |
141 | /* ... and d:16 is negative. */ |
142 | if (w2 < 0) | |
143 | return 4; | |
144 | } | |
145 | else if (w == 0x78e0) | |
146 | { | |
147 | int w2 = read_memory_integer (pc + 2, 2); | |
c906108c | 148 | |
928e48af CV |
149 | if ((w2 & 0xfff0) == 0x6ba0) /* mov.b Rs, @(d:24,er6) */ |
150 | { | |
151 | LONGEST disp = read_memory_integer (pc + 4, 4); | |
152 | ||
153 | /* ... and d:24 is negative. */ | |
154 | if (disp < 0 && disp > 0xffffff) | |
155 | return 8; | |
156 | } | |
157 | } | |
158 | else if (w == 0x0100) | |
159 | { | |
160 | int w2 = read_memory_integer (pc + 2, 2); | |
161 | ||
162 | if ((w2 & 0xfff0) == 0x6fe0 /* mov.l Rs,@(d:16,er6) */ | |
163 | && (w2 & 0xf) <= 2) /* Rs is ER0, ER1, or ER2 */ | |
164 | { | |
165 | int w3 = read_memory_integer (pc + 4, 2); | |
166 | ||
167 | /* ... and d:16 is negative. */ | |
168 | if (w3 < 0) | |
169 | return 6; | |
170 | } | |
171 | else if (w2 == 0x78e0) | |
172 | { | |
173 | int w3 = read_memory_integer (pc + 4, 2); | |
174 | ||
175 | if ((w3 & 0xfff0) == 0x6ba0) /* mov.l Rs, @(d:24,er6) */ | |
176 | { | |
177 | LONGEST disp = read_memory_integer (pc + 6, 4); | |
178 | ||
179 | /* ... and d:24 is negative. */ | |
180 | if (disp < 0 && disp > 0xffffff) | |
181 | return 10; | |
182 | } | |
183 | } | |
184 | } | |
185 | ||
186 | return 0; | |
187 | } | |
188 | ||
189 | static CORE_ADDR | |
fba45db2 | 190 | h8300_skip_prologue (CORE_ADDR start_pc) |
c906108c SS |
191 | { |
192 | short int w; | |
193 | int adjust = 0; | |
194 | ||
195 | /* Skip past all push and stm insns. */ | |
196 | while (1) | |
197 | { | |
198 | w = read_memory_unsigned_integer (start_pc, 2); | |
199 | /* First look for push insns. */ | |
200 | if (w == 0x0100 || w == 0x0110 || w == 0x0120 || w == 0x0130) | |
201 | { | |
202 | w = read_memory_unsigned_integer (start_pc + 2, 2); | |
203 | adjust = 2; | |
204 | } | |
205 | ||
206 | if (IS_PUSH (w)) | |
207 | { | |
208 | start_pc += 2 + adjust; | |
209 | w = read_memory_unsigned_integer (start_pc, 2); | |
210 | continue; | |
211 | } | |
212 | adjust = 0; | |
213 | break; | |
214 | } | |
215 | ||
216 | /* Skip past a move to FP, either word or long sized */ | |
217 | w = read_memory_unsigned_integer (start_pc, 2); | |
218 | if (w == 0x0100) | |
219 | { | |
220 | w = read_memory_unsigned_integer (start_pc + 2, 2); | |
221 | adjust += 2; | |
222 | } | |
223 | ||
224 | if (IS_MOVE_FP (w)) | |
225 | { | |
226 | start_pc += 2 + adjust; | |
227 | w = read_memory_unsigned_integer (start_pc, 2); | |
228 | } | |
229 | ||
230 | /* Check for loading either a word constant into r5; | |
231 | long versions are handled by the SUBL_SP below. */ | |
232 | if (IS_MOVK_R5 (w)) | |
233 | { | |
234 | start_pc += 2; | |
235 | w = read_memory_unsigned_integer (start_pc, 2); | |
236 | } | |
237 | ||
238 | /* Now check for subtracting r5 from sp, word sized only. */ | |
239 | if (IS_SUB_R5SP (w)) | |
240 | { | |
241 | start_pc += 2 + adjust; | |
242 | w = read_memory_unsigned_integer (start_pc, 2); | |
243 | } | |
244 | ||
245 | /* Check for subs #2 and subs #4. */ | |
246 | while (IS_SUB2_SP (w) || IS_SUB4_SP (w)) | |
247 | { | |
248 | start_pc += 2 + adjust; | |
249 | w = read_memory_unsigned_integer (start_pc, 2); | |
250 | } | |
251 | ||
252 | /* Check for a 32bit subtract. */ | |
253 | if (IS_SUBL_SP (w)) | |
254 | start_pc += 6 + adjust; | |
255 | ||
4bb1dc5e CV |
256 | /* Skip past another possible stm insn for registers R3 to R5 (possibly used |
257 | for register qualified arguments. */ | |
258 | w = read_memory_unsigned_integer (start_pc, 2); | |
259 | /* First look for push insns. */ | |
260 | if (w == 0x0110 || w == 0x0120 || w == 0x0130) | |
261 | { | |
262 | w = read_memory_unsigned_integer (start_pc + 2, 2); | |
263 | if (IS_PUSH (w) && (w & 0xf) >= 0x3 && (w & 0xf) <= 0x5) | |
264 | start_pc += 4; | |
265 | } | |
266 | ||
928e48af CV |
267 | /* Check for spilling an argument register to the stack frame. |
268 | This could also be an initializing store from non-prologue code, | |
269 | but I don't think there's any harm in skipping that. */ | |
270 | for (;;) | |
271 | { | |
272 | int spill_size = h8300_is_argument_spill (start_pc); | |
273 | if (spill_size == 0) | |
274 | break; | |
275 | start_pc += spill_size; | |
276 | } | |
277 | ||
c906108c SS |
278 | return start_pc; |
279 | } | |
280 | ||
c906108c SS |
281 | /* Fetch the instruction at ADDR, returning 0 if ADDR is beyond LIM or |
282 | is not the address of a valid instruction, the address of the next | |
283 | instruction beyond ADDR otherwise. *PWORD1 receives the first word | |
c5aa993b | 284 | of the instruction. */ |
c906108c | 285 | |
928e48af | 286 | static CORE_ADDR |
884a26c8 MS |
287 | h8300_next_prologue_insn (CORE_ADDR addr, |
288 | CORE_ADDR lim, | |
289 | unsigned short* pword1) | |
c906108c SS |
290 | { |
291 | char buf[2]; | |
292 | if (addr < lim + 8) | |
293 | { | |
294 | read_memory (addr, buf, 2); | |
295 | *pword1 = extract_signed_integer (buf, 2); | |
296 | ||
297 | return addr + 2; | |
298 | } | |
299 | return 0; | |
300 | } | |
301 | ||
302 | /* Examine the prologue of a function. `ip' points to the first instruction. | |
303 | `limit' is the limit of the prologue (e.g. the addr of the first | |
304 | linenumber, or perhaps the program counter if we're stepping through). | |
305 | `frame_sp' is the stack pointer value in use in this frame. | |
306 | `fsr' is a pointer to a frame_saved_regs structure into which we put | |
307 | info about the registers saved by this frame. | |
308 | `fi' is a struct frame_info pointer; we fill in various fields in it | |
309 | to reflect the offsets of the arg pointer and the locals pointer. */ | |
310 | ||
928e48af CV |
311 | /* Any function with a frame looks like this |
312 | SECOND ARG | |
313 | FIRST ARG | |
314 | RET PC | |
315 | SAVED R2 | |
316 | SAVED R3 | |
317 | SAVED FP <-FP POINTS HERE | |
318 | LOCALS0 | |
319 | LOCALS1 <-SP POINTS HERE | |
320 | */ | |
321 | ||
c906108c | 322 | static CORE_ADDR |
928e48af CV |
323 | h8300_examine_prologue (register CORE_ADDR ip, register CORE_ADDR limit, |
324 | CORE_ADDR after_prolog_fp, CORE_ADDR *fsr, | |
325 | struct frame_info *fi) | |
c906108c SS |
326 | { |
327 | register CORE_ADDR next_ip; | |
328 | int r; | |
329 | int have_fp = 0; | |
928e48af | 330 | unsigned short insn_word; |
c906108c SS |
331 | /* Number of things pushed onto stack, starts at 2/4, 'cause the |
332 | PC is already there */ | |
928e48af | 333 | unsigned int reg_save_depth = BINWORD; |
c906108c SS |
334 | |
335 | unsigned int auto_depth = 0; /* Number of bytes of autos */ | |
336 | ||
337 | char in_frame[11]; /* One for each reg */ | |
338 | ||
339 | int adjust = 0; | |
340 | ||
341 | memset (in_frame, 1, 11); | |
342 | for (r = 0; r < 8; r++) | |
343 | { | |
928e48af | 344 | fsr[r] = 0; |
c906108c SS |
345 | } |
346 | if (after_prolog_fp == 0) | |
347 | { | |
928e48af | 348 | after_prolog_fp = read_register (E_SP_REGNUM); |
c906108c SS |
349 | } |
350 | ||
351 | /* If the PC isn't valid, quit now. */ | |
352 | if (ip == 0 || ip & (h8300hmode ? ~0xffffff : ~0xffff)) | |
353 | return 0; | |
354 | ||
d1a8e808 | 355 | next_ip = h8300_next_prologue_insn (ip, limit, &insn_word); |
c906108c | 356 | |
4bb1dc5e | 357 | if (insn_word == 0x0100) /* mov.l */ |
c906108c SS |
358 | { |
359 | insn_word = read_memory_unsigned_integer (ip + 2, 2); | |
360 | adjust = 2; | |
361 | } | |
362 | ||
363 | /* Skip over any fp push instructions */ | |
928e48af | 364 | fsr[E_FP_REGNUM] = after_prolog_fp; |
c906108c SS |
365 | while (next_ip && IS_PUSH_FP (insn_word)) |
366 | { | |
367 | ip = next_ip + adjust; | |
368 | ||
369 | in_frame[insn_word & 0x7] = reg_save_depth; | |
d1a8e808 | 370 | next_ip = h8300_next_prologue_insn (ip, limit, &insn_word); |
c906108c SS |
371 | reg_save_depth += 2 + adjust; |
372 | } | |
373 | ||
374 | /* Is this a move into the fp */ | |
375 | if (next_ip && IS_MOV_SP_FP (insn_word)) | |
376 | { | |
377 | ip = next_ip; | |
d1a8e808 | 378 | next_ip = h8300_next_prologue_insn (ip, limit, &insn_word); |
c906108c SS |
379 | have_fp = 1; |
380 | } | |
381 | ||
382 | /* Skip over any stack adjustment, happens either with a number of | |
383 | sub#2,sp or a mov #x,r5 sub r5,sp */ | |
384 | ||
385 | if (next_ip && (IS_SUB2_SP (insn_word) || IS_SUB4_SP (insn_word))) | |
386 | { | |
387 | while (next_ip && (IS_SUB2_SP (insn_word) || IS_SUB4_SP (insn_word))) | |
388 | { | |
389 | auto_depth += IS_SUB2_SP (insn_word) ? 2 : 4; | |
390 | ip = next_ip; | |
d1a8e808 | 391 | next_ip = h8300_next_prologue_insn (ip, limit, &insn_word); |
c906108c SS |
392 | } |
393 | } | |
394 | else | |
395 | { | |
396 | if (next_ip && IS_MOVK_R5 (insn_word)) | |
397 | { | |
398 | ip = next_ip; | |
d1a8e808 | 399 | next_ip = h8300_next_prologue_insn (ip, limit, &insn_word); |
c906108c SS |
400 | auto_depth += insn_word; |
401 | ||
d1a8e808 | 402 | next_ip = h8300_next_prologue_insn (next_ip, limit, &insn_word); |
c906108c SS |
403 | auto_depth += insn_word; |
404 | } | |
405 | if (next_ip && IS_SUBL_SP (insn_word)) | |
406 | { | |
407 | ip = next_ip; | |
408 | auto_depth += read_memory_unsigned_integer (ip, 4); | |
409 | ip += 4; | |
410 | ||
d1a8e808 | 411 | next_ip = h8300_next_prologue_insn (ip, limit, &insn_word); |
c906108c SS |
412 | } |
413 | } | |
414 | ||
415 | /* Now examine the push insns to determine where everything lives | |
416 | on the stack. */ | |
417 | while (1) | |
418 | { | |
419 | adjust = 0; | |
420 | if (!next_ip) | |
421 | break; | |
422 | ||
423 | if (insn_word == 0x0100) | |
424 | { | |
425 | ip = next_ip; | |
d1a8e808 | 426 | next_ip = h8300_next_prologue_insn (ip, limit, &insn_word); |
c906108c SS |
427 | adjust = 2; |
428 | } | |
429 | ||
430 | if (IS_PUSH (insn_word)) | |
431 | { | |
ddd216ea CV |
432 | auto_depth += 2 + adjust; |
433 | fsr[insn_word & 0x7] = after_prolog_fp - auto_depth; | |
c906108c | 434 | ip = next_ip; |
d1a8e808 | 435 | next_ip = h8300_next_prologue_insn (ip, limit, &insn_word); |
c906108c SS |
436 | continue; |
437 | } | |
438 | ||
439 | /* Now check for push multiple insns. */ | |
440 | if (insn_word == 0x0110 || insn_word == 0x0120 || insn_word == 0x0130) | |
441 | { | |
442 | int count = ((insn_word >> 4) & 0xf) + 1; | |
443 | int start, i; | |
444 | ||
445 | ip = next_ip; | |
d1a8e808 | 446 | next_ip = h8300_next_prologue_insn (ip, limit, &insn_word); |
c906108c SS |
447 | start = insn_word & 0x7; |
448 | ||
6d305052 | 449 | for (i = start; i < start + count; i++) |
c906108c | 450 | { |
c906108c | 451 | auto_depth += 4; |
ddd216ea | 452 | fsr[i] = after_prolog_fp - auto_depth; |
c906108c SS |
453 | } |
454 | } | |
455 | break; | |
456 | } | |
457 | ||
c906108c | 458 | /* The PC is at a known place */ |
da50a4b7 | 459 | get_frame_extra_info (fi)->from_pc = |
7e78f0ca | 460 | read_memory_unsigned_integer (after_prolog_fp + BINWORD, BINWORD); |
c906108c SS |
461 | |
462 | /* Rememeber any others too */ | |
928e48af | 463 | in_frame[E_PC_REGNUM] = 0; |
c5aa993b | 464 | |
c906108c SS |
465 | if (have_fp) |
466 | /* We keep the old FP in the SP spot */ | |
884a26c8 MS |
467 | fsr[E_SP_REGNUM] = read_memory_unsigned_integer (fsr[E_FP_REGNUM], |
468 | BINWORD); | |
c906108c | 469 | else |
928e48af | 470 | fsr[E_SP_REGNUM] = after_prolog_fp + auto_depth; |
c906108c SS |
471 | |
472 | return (ip); | |
473 | } | |
474 | ||
928e48af CV |
475 | static void |
476 | h8300_frame_init_saved_regs (struct frame_info *fi) | |
c906108c | 477 | { |
928e48af CV |
478 | CORE_ADDR func_addr, func_end; |
479 | ||
b2fb4676 | 480 | if (!get_frame_saved_regs (fi)) |
928e48af CV |
481 | { |
482 | frame_saved_regs_zalloc (fi); | |
483 | ||
484 | /* Find the beginning of this function, so we can analyze its | |
485 | prologue. */ | |
884a26c8 MS |
486 | if (find_pc_partial_function (get_frame_pc (fi), NULL, |
487 | &func_addr, &func_end)) | |
928e48af CV |
488 | { |
489 | struct symtab_and_line sal = find_pc_line (func_addr, 0); | |
884a26c8 MS |
490 | CORE_ADDR limit = (sal.end && sal.end < get_frame_pc (fi)) |
491 | ? sal.end : get_frame_pc (fi); | |
928e48af | 492 | /* This will fill in fields in fi. */ |
1e2330ba AC |
493 | h8300_examine_prologue (func_addr, limit, get_frame_base (fi), |
494 | get_frame_saved_regs (fi), fi); | |
928e48af CV |
495 | } |
496 | /* Else we're out of luck (can't debug completely stripped code). | |
497 | FIXME. */ | |
498 | } | |
499 | } | |
500 | ||
a5afb99f AC |
501 | /* Given a GDB frame, determine the address of the calling function's |
502 | frame. This will be used to create a new GDB frame struct, and | |
e9582e71 AC |
503 | then DEPRECATED_INIT_EXTRA_FRAME_INFO and DEPRECATED_INIT_FRAME_PC |
504 | will be called for the new frame. | |
928e48af CV |
505 | |
506 | For us, the frame address is its stack pointer value, so we look up | |
884a26c8 MS |
507 | the function prologue to determine the caller's sp value, and |
508 | return it. */ | |
928e48af CV |
509 | |
510 | static CORE_ADDR | |
511 | h8300_frame_chain (struct frame_info *thisframe) | |
512 | { | |
1e2330ba AC |
513 | if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (thisframe), |
514 | get_frame_base (thisframe), | |
515 | get_frame_base (thisframe))) | |
928e48af | 516 | { /* initialize the from_pc now */ |
da50a4b7 | 517 | get_frame_extra_info (thisframe)->from_pc = |
1e2330ba AC |
518 | deprecated_read_register_dummy (get_frame_pc (thisframe), |
519 | get_frame_base (thisframe), | |
135c175f | 520 | E_PC_REGNUM); |
1e2330ba | 521 | return get_frame_base (thisframe); |
c906108c | 522 | } |
b2fb4676 | 523 | return get_frame_saved_regs (thisframe)[E_SP_REGNUM]; |
c906108c SS |
524 | } |
525 | ||
526 | /* Return the saved PC from this frame. | |
527 | ||
528 | If the frame has a memory copy of SRP_REGNUM, use that. If not, | |
529 | just use the register SRP_REGNUM itself. */ | |
530 | ||
928e48af | 531 | static CORE_ADDR |
fba45db2 | 532 | h8300_frame_saved_pc (struct frame_info *frame) |
c906108c | 533 | { |
1e2330ba AC |
534 | if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame), |
535 | get_frame_base (frame), | |
536 | get_frame_base (frame))) | |
537 | return deprecated_read_register_dummy (get_frame_pc (frame), | |
538 | get_frame_base (frame), | |
135c175f | 539 | E_PC_REGNUM); |
c906108c | 540 | else |
da50a4b7 | 541 | return get_frame_extra_info (frame)->from_pc; |
c906108c SS |
542 | } |
543 | ||
928e48af CV |
544 | static void |
545 | h8300_init_extra_frame_info (int fromleaf, struct frame_info *fi) | |
546 | { | |
da50a4b7 | 547 | if (!get_frame_extra_info (fi)) |
928e48af | 548 | { |
a00a19e9 | 549 | frame_extra_info_zalloc (fi, sizeof (struct frame_extra_info)); |
da50a4b7 | 550 | get_frame_extra_info (fi)->from_pc = 0; |
928e48af | 551 | |
50abf9e5 | 552 | if (!get_frame_pc (fi)) |
928e48af | 553 | { |
11c02a10 AC |
554 | if (get_next_frame (fi)) |
555 | deprecated_update_frame_pc_hack (fi, h8300_frame_saved_pc (get_next_frame (fi))); | |
928e48af CV |
556 | } |
557 | h8300_frame_init_saved_regs (fi); | |
558 | } | |
559 | } | |
560 | ||
928e48af CV |
561 | /* Round N up or down to the nearest multiple of UNIT. |
562 | Evaluate N only once, UNIT several times. | |
563 | UNIT must be a power of two. */ | |
564 | #define round_up(n, unit) (((n) + (unit) - 1) & -(unit)) | |
565 | #define round_down(n, unit) ((n) & -(unit)) | |
566 | ||
63d47a7d | 567 | /* Function: push_dummy_call |
c906108c | 568 | Setup the function arguments for calling a function in the inferior. |
928e48af CV |
569 | In this discussion, a `word' is 16 bits on the H8/300s, and 32 bits |
570 | on the H8/300H. | |
571 | ||
572 | There are actually two ABI's here: -mquickcall (the default) and | |
573 | -mno-quickcall. With -mno-quickcall, all arguments are passed on | |
574 | the stack after the return address, word-aligned. With | |
575 | -mquickcall, GCC tries to use r0 -- r2 to pass registers. Since | |
576 | GCC doesn't indicate in the object file which ABI was used to | |
577 | compile it, GDB only supports the default --- -mquickcall. | |
578 | ||
579 | Here are the rules for -mquickcall, in detail: | |
580 | ||
581 | Each argument, whether scalar or aggregate, is padded to occupy a | |
582 | whole number of words. Arguments smaller than a word are padded at | |
583 | the most significant end; those larger than a word are padded at | |
584 | the least significant end. | |
585 | ||
586 | The initial arguments are passed in r0 -- r2. Earlier arguments go in | |
587 | lower-numbered registers. Multi-word arguments are passed in | |
588 | consecutive registers, with the most significant end in the | |
589 | lower-numbered register. | |
590 | ||
591 | If an argument doesn't fit entirely in the remaining registers, it | |
592 | is passed entirely on the stack. Stack arguments begin just after | |
593 | the return address. Once an argument has overflowed onto the stack | |
594 | this way, all subsequent arguments are passed on the stack. | |
595 | ||
596 | The above rule has odd consequences. For example, on the h8/300s, | |
597 | if a function takes two longs and an int as arguments: | |
598 | - the first long will be passed in r0/r1, | |
599 | - the second long will be passed entirely on the stack, since it | |
600 | doesn't fit in r2, | |
601 | - and the int will be passed on the stack, even though it could fit | |
602 | in r2. | |
603 | ||
604 | A weird exception: if an argument is larger than a word, but not a | |
605 | whole number of words in length (before padding), it is passed on | |
606 | the stack following the rules for stack arguments above, even if | |
607 | there are sufficient registers available to hold it. Stranger | |
608 | still, the argument registers are still `used up' --- even though | |
609 | there's nothing in them. | |
610 | ||
611 | So, for example, on the h8/300s, if a function expects a three-byte | |
612 | structure and an int, the structure will go on the stack, and the | |
613 | int will go in r2, not r0. | |
614 | ||
615 | If the function returns an aggregate type (struct, union, or class) | |
616 | by value, the caller must allocate space to hold the return value, | |
617 | and pass the callee a pointer to this space as an invisible first | |
618 | argument, in R0. | |
619 | ||
620 | For varargs functions, the last fixed argument and all the variable | |
621 | arguments are always passed on the stack. This means that calls to | |
622 | varargs functions don't work properly unless there is a prototype | |
623 | in scope. | |
624 | ||
625 | Basically, this ABI is not good, for the following reasons: | |
626 | - You can't call vararg functions properly unless a prototype is in scope. | |
627 | - Structure passing is inconsistent, to no purpose I can see. | |
628 | - It often wastes argument registers, of which there are only three | |
629 | to begin with. */ | |
c906108c | 630 | |
928e48af | 631 | static CORE_ADDR |
63d47a7d CV |
632 | h8300_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr, |
633 | struct regcache *regcache, CORE_ADDR bp_addr, int nargs, | |
634 | struct value **args, CORE_ADDR sp, int struct_return, | |
635 | CORE_ADDR struct_addr) | |
c906108c | 636 | { |
63d47a7d | 637 | int stack_alloc = 0, stack_offset = 0; |
928e48af | 638 | int wordsize = BINWORD; |
63d47a7d | 639 | int reg = E_ARG0_REGNUM; |
928e48af CV |
640 | int argument; |
641 | ||
642 | /* First, make sure the stack is properly aligned. */ | |
643 | sp = round_down (sp, wordsize); | |
644 | ||
645 | /* Now make sure there's space on the stack for the arguments. We | |
646 | may over-allocate a little here, but that won't hurt anything. */ | |
928e48af CV |
647 | for (argument = 0; argument < nargs; argument++) |
648 | stack_alloc += round_up (TYPE_LENGTH (VALUE_TYPE (args[argument])), | |
649 | wordsize); | |
650 | sp -= stack_alloc; | |
651 | ||
652 | /* Now load as many arguments as possible into registers, and push | |
63d47a7d CV |
653 | the rest onto the stack. |
654 | If we're returning a structure by value, then we must pass a | |
928e48af CV |
655 | pointer to the buffer for the return value as an invisible first |
656 | argument. */ | |
657 | if (struct_return) | |
63d47a7d | 658 | regcache_cooked_write_unsigned (regcache, reg++, struct_addr); |
928e48af CV |
659 | |
660 | for (argument = 0; argument < nargs; argument++) | |
c906108c | 661 | { |
928e48af CV |
662 | struct type *type = VALUE_TYPE (args[argument]); |
663 | int len = TYPE_LENGTH (type); | |
664 | char *contents = (char *) VALUE_CONTENTS (args[argument]); | |
665 | ||
666 | /* Pad the argument appropriately. */ | |
667 | int padded_len = round_up (len, wordsize); | |
668 | char *padded = alloca (padded_len); | |
669 | ||
670 | memset (padded, 0, padded_len); | |
671 | memcpy (len < wordsize ? padded + padded_len - len : padded, | |
672 | contents, len); | |
673 | ||
674 | /* Could the argument fit in the remaining registers? */ | |
675 | if (padded_len <= (E_ARGLAST_REGNUM - reg + 1) * wordsize) | |
676 | { | |
677 | /* Are we going to pass it on the stack anyway, for no good | |
678 | reason? */ | |
679 | if (len > wordsize && len % wordsize) | |
680 | { | |
681 | /* I feel so unclean. */ | |
682 | write_memory (sp + stack_offset, padded, padded_len); | |
683 | stack_offset += padded_len; | |
684 | ||
685 | /* That's right --- even though we passed the argument | |
686 | on the stack, we consume the registers anyway! Love | |
687 | me, love my dog. */ | |
688 | reg += padded_len / wordsize; | |
689 | } | |
690 | else | |
691 | { | |
692 | /* Heavens to Betsy --- it's really going in registers! | |
693 | It would be nice if we could use write_register_bytes | |
694 | here, but on the h8/300s, there are gaps between | |
695 | the registers in the register file. */ | |
696 | int offset; | |
697 | ||
698 | for (offset = 0; offset < padded_len; offset += wordsize) | |
699 | { | |
884a26c8 MS |
700 | ULONGEST word = extract_unsigned_integer (padded + offset, |
701 | wordsize); | |
63d47a7d | 702 | regcache_cooked_write_unsigned (regcache, reg++, word); |
928e48af CV |
703 | } |
704 | } | |
705 | } | |
c906108c | 706 | else |
928e48af CV |
707 | { |
708 | /* It doesn't fit in registers! Onto the stack it goes. */ | |
709 | write_memory (sp + stack_offset, padded, padded_len); | |
710 | stack_offset += padded_len; | |
711 | ||
712 | /* Once one argument has spilled onto the stack, all | |
713 | subsequent arguments go on the stack. */ | |
714 | reg = E_ARGLAST_REGNUM + 1; | |
715 | } | |
c906108c | 716 | } |
928e48af | 717 | |
63d47a7d CV |
718 | /* Store return address. */ |
719 | sp -= wordsize; | |
720 | write_memory_unsigned_integer (sp, wordsize, bp_addr); | |
c906108c | 721 | |
63d47a7d CV |
722 | /* Update stack pointer. */ |
723 | regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, sp); | |
c906108c | 724 | |
c906108c SS |
725 | return sp; |
726 | } | |
727 | ||
7256e1a5 | 728 | /* Function: h8300_pop_frame |
c906108c SS |
729 | Restore the machine to the state it had before the current frame |
730 | was created. Usually used either by the "RETURN" command, or by | |
731 | call_function_by_hand after the dummy_frame is finished. */ | |
732 | ||
928e48af | 733 | static void |
fba45db2 | 734 | h8300_pop_frame (void) |
c906108c | 735 | { |
928e48af | 736 | unsigned regno; |
c906108c SS |
737 | struct frame_info *frame = get_current_frame (); |
738 | ||
1e2330ba AC |
739 | if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame), |
740 | get_frame_base (frame), | |
741 | get_frame_base (frame))) | |
c906108c | 742 | { |
c5aa993b | 743 | generic_pop_dummy_frame (); |
c906108c SS |
744 | } |
745 | else | |
746 | { | |
928e48af | 747 | for (regno = 0; regno < 8; regno++) |
c906108c | 748 | { |
928e48af | 749 | /* Don't forget E_SP_REGNUM is a frame_saved_regs struct is the |
c906108c | 750 | actual value we want, not the address of the value we want. */ |
b2fb4676 | 751 | if (get_frame_saved_regs (frame)[regno] && regno != E_SP_REGNUM) |
928e48af | 752 | write_register (regno, |
884a26c8 MS |
753 | read_memory_integer |
754 | (get_frame_saved_regs (frame)[regno], BINWORD)); | |
b2fb4676 | 755 | else if (get_frame_saved_regs (frame)[regno] && regno == E_SP_REGNUM) |
1e2330ba | 756 | write_register (regno, get_frame_base (frame) + 2 * BINWORD); |
c906108c SS |
757 | } |
758 | ||
928e48af | 759 | /* Don't forget to update the PC too! */ |
da50a4b7 | 760 | write_register (E_PC_REGNUM, get_frame_extra_info (frame)->from_pc); |
c906108c SS |
761 | } |
762 | flush_cached_frames (); | |
763 | } | |
764 | ||
765 | /* Function: extract_return_value | |
766 | Figure out where in REGBUF the called function has left its return value. | |
767 | Copy that into VALBUF. Be sure to account for CPU type. */ | |
768 | ||
928e48af | 769 | static void |
0261a0d0 CV |
770 | h8300_extract_return_value (struct type *type, struct regcache *regcache, |
771 | void *valbuf) | |
c906108c | 772 | { |
928e48af | 773 | int len = TYPE_LENGTH (type); |
0261a0d0 | 774 | ULONGEST c; |
c5aa993b JM |
775 | |
776 | switch (len) | |
777 | { | |
0261a0d0 CV |
778 | case 1: |
779 | case 2: | |
780 | regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c); | |
781 | store_unsigned_integer (valbuf, len, c); | |
782 | break; | |
783 | case 4: /* Needs two registers on plain H8/300 */ | |
784 | regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c); | |
785 | store_unsigned_integer (valbuf, 2, c); | |
786 | regcache_cooked_read_unsigned (regcache, E_RET1_REGNUM, &c); | |
787 | store_unsigned_integer ((void*)((char *)valbuf + 2), 2, c); | |
788 | break; | |
789 | case 8: /* long long, double and long double are all defined | |
790 | as 4 byte types so far so this shouldn't happen. */ | |
791 | error ("I don't know how a 8 byte value is returned."); | |
792 | break; | |
793 | } | |
794 | } | |
795 | ||
796 | static void | |
797 | h8300h_extract_return_value (struct type *type, struct regcache *regcache, | |
798 | void *valbuf) | |
799 | { | |
800 | int len = TYPE_LENGTH (type); | |
801 | ULONGEST c; | |
802 | ||
803 | switch (len) | |
804 | { | |
805 | case 1: | |
806 | case 2: | |
807 | case 4: | |
808 | regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c); | |
809 | store_unsigned_integer (valbuf, len, c); | |
810 | break; | |
811 | case 8: /* long long, double and long double are all defined | |
812 | as 4 byte types so far so this shouldn't happen. */ | |
813 | error ("I don't know how a 8 byte value is returned."); | |
814 | break; | |
c5aa993b | 815 | } |
c906108c SS |
816 | } |
817 | ||
0261a0d0 | 818 | |
c906108c SS |
819 | /* Function: store_return_value |
820 | Place the appropriate value in the appropriate registers. | |
821 | Primarily used by the RETURN command. */ | |
822 | ||
928e48af | 823 | static void |
0261a0d0 CV |
824 | h8300_store_return_value (struct type *type, struct regcache *regcache, |
825 | const void *valbuf) | |
c906108c | 826 | { |
928e48af | 827 | int len = TYPE_LENGTH (type); |
0261a0d0 | 828 | ULONGEST val; |
c906108c | 829 | |
c5aa993b JM |
830 | switch (len) |
831 | { | |
0261a0d0 CV |
832 | case 1: |
833 | case 2: | |
834 | val = extract_unsigned_integer (valbuf, len); | |
835 | regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, val); | |
836 | break; | |
837 | case 4: /* long, float */ | |
838 | val = extract_unsigned_integer (valbuf, len); | |
839 | regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, | |
840 | (val >> 16) &0xffff); | |
841 | regcache_cooked_write_unsigned (regcache, E_RET1_REGNUM, val & 0xffff); | |
842 | break; | |
843 | case 8: /* long long, double and long double are all defined | |
844 | as 4 byte types so far so this shouldn't happen. */ | |
845 | error ("I don't know how to return a 8 byte value."); | |
846 | break; | |
847 | } | |
848 | } | |
849 | ||
850 | static void | |
851 | h8300h_store_return_value (struct type *type, struct regcache *regcache, | |
852 | const void *valbuf) | |
853 | { | |
854 | int len = TYPE_LENGTH (type); | |
855 | ULONGEST val; | |
856 | ||
857 | switch (len) | |
858 | { | |
859 | case 1: | |
860 | case 2: | |
861 | case 4: /* long, float */ | |
862 | val = extract_unsigned_integer (valbuf, len); | |
863 | regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, val); | |
864 | break; | |
865 | case 8: /* long long, double and long double are all defined | |
866 | as 4 byte types so far so this shouldn't happen. */ | |
867 | error ("I don't know how to return a 8 byte value."); | |
868 | break; | |
c5aa993b | 869 | } |
c906108c SS |
870 | } |
871 | ||
928e48af | 872 | static struct cmd_list_element *setmachinelist; |
c906108c | 873 | |
928e48af CV |
874 | static const char * |
875 | h8300_register_name (int regno) | |
c906108c | 876 | { |
084edea5 | 877 | /* The register names change depending on which h8300 processor |
928e48af | 878 | type is selected. */ |
084edea5 | 879 | static char *register_names[] = { |
928e48af | 880 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", |
4bb1dc5e CV |
881 | "sp", "","pc","cycles", "tick", "inst", |
882 | "ccr", /* pseudo register */ | |
928e48af | 883 | }; |
084edea5 CV |
884 | if (regno < 0 |
885 | || regno >= (sizeof (register_names) / sizeof (*register_names))) | |
886 | internal_error (__FILE__, __LINE__, | |
887 | "h8300_register_name: illegal register number %d", regno); | |
888 | else | |
889 | return register_names[regno]; | |
890 | } | |
891 | ||
892 | static const char * | |
893 | h8300s_register_name (int regno) | |
894 | { | |
895 | static char *register_names[] = { | |
928e48af | 896 | "er0", "er1", "er2", "er3", "er4", "er5", "er6", |
4bb1dc5e | 897 | "sp", "", "pc", "cycles", "", "tick", "inst", |
7be04a68 | 898 | "mach", "macl", |
4bb1dc5e | 899 | "ccr", "exr" /* pseudo registers */ |
928e48af | 900 | }; |
084edea5 CV |
901 | if (regno < 0 |
902 | || regno >= (sizeof (register_names) / sizeof (*register_names))) | |
903 | internal_error (__FILE__, __LINE__, | |
904 | "h8300s_register_name: illegal register number %d", regno); | |
905 | else | |
906 | return register_names[regno]; | |
907 | } | |
908 | ||
909 | static const char * | |
910 | h8300sx_register_name (int regno) | |
911 | { | |
912 | static char *register_names[] = { | |
913 | "er0", "er1", "er2", "er3", "er4", "er5", "er6", | |
4bb1dc5e CV |
914 | "sp", "", "pc", "cycles", "", "tick", "inst", |
915 | "mach", "macl", "sbr", "vbr", | |
916 | "ccr", "exr" /* pseudo registers */ | |
084edea5 CV |
917 | }; |
918 | if (regno < 0 | |
919 | || regno >= (sizeof (register_names) / sizeof (*register_names))) | |
928e48af | 920 | internal_error (__FILE__, __LINE__, |
084edea5 | 921 | "h8300sx_register_name: illegal register number %d", regno); |
c906108c | 922 | else |
928e48af | 923 | return register_names[regno]; |
c906108c SS |
924 | } |
925 | ||
926 | static void | |
4904ba5b AC |
927 | h8300_print_register (struct gdbarch *gdbarch, struct ui_file *file, |
928 | struct frame_info *frame, int regno) | |
c906108c | 929 | { |
084edea5 CV |
930 | LONGEST rval; |
931 | const char *name = gdbarch_register_name (gdbarch, regno); | |
c906108c | 932 | |
928e48af CV |
933 | if (!name || !*name) |
934 | return; | |
c906108c | 935 | |
084edea5 | 936 | frame_read_signed_register (frame, regno, &rval); |
4904ba5b AC |
937 | |
938 | fprintf_filtered (file, "%-14s ", name); | |
4bb1dc5e | 939 | if (regno == E_PSEUDO_CCR_REGNUM || (regno == E_PSEUDO_EXR_REGNUM && h8300smode)) |
c906108c | 940 | { |
084edea5 CV |
941 | fprintf_filtered (file, "0x%02x ", (unsigned char)rval); |
942 | print_longest (file, 'u', 1, rval); | |
c906108c SS |
943 | } |
944 | else | |
945 | { | |
084edea5 CV |
946 | fprintf_filtered (file, "0x%s ", phex ((ULONGEST)rval, BINWORD)); |
947 | print_longest (file, 'd', 1, rval); | |
c906108c | 948 | } |
4bb1dc5e | 949 | if (regno == E_PSEUDO_CCR_REGNUM) |
c906108c SS |
950 | { |
951 | /* CCR register */ | |
952 | int C, Z, N, V; | |
084edea5 | 953 | unsigned char l = rval & 0xff; |
4904ba5b AC |
954 | fprintf_filtered (file, "\t"); |
955 | fprintf_filtered (file, "I-%d ", (l & 0x80) != 0); | |
956 | fprintf_filtered (file, "UI-%d ", (l & 0x40) != 0); | |
957 | fprintf_filtered (file, "H-%d ", (l & 0x20) != 0); | |
958 | fprintf_filtered (file, "U-%d ", (l & 0x10) != 0); | |
c906108c SS |
959 | N = (l & 0x8) != 0; |
960 | Z = (l & 0x4) != 0; | |
961 | V = (l & 0x2) != 0; | |
962 | C = (l & 0x1) != 0; | |
4904ba5b AC |
963 | fprintf_filtered (file, "N-%d ", N); |
964 | fprintf_filtered (file, "Z-%d ", Z); | |
965 | fprintf_filtered (file, "V-%d ", V); | |
966 | fprintf_filtered (file, "C-%d ", C); | |
c906108c | 967 | if ((C | Z) == 0) |
4904ba5b | 968 | fprintf_filtered (file, "u> "); |
c906108c | 969 | if ((C | Z) == 1) |
4904ba5b | 970 | fprintf_filtered (file, "u<= "); |
c906108c | 971 | if ((C == 0)) |
4904ba5b | 972 | fprintf_filtered (file, "u>= "); |
c906108c | 973 | if (C == 1) |
4904ba5b | 974 | fprintf_filtered (file, "u< "); |
c906108c | 975 | if (Z == 0) |
4904ba5b | 976 | fprintf_filtered (file, "!= "); |
c906108c | 977 | if (Z == 1) |
4904ba5b | 978 | fprintf_filtered (file, "== "); |
c906108c | 979 | if ((N ^ V) == 0) |
4904ba5b | 980 | fprintf_filtered (file, ">= "); |
c906108c | 981 | if ((N ^ V) == 1) |
4904ba5b | 982 | fprintf_filtered (file, "< "); |
c906108c | 983 | if ((Z | (N ^ V)) == 0) |
4904ba5b | 984 | fprintf_filtered (file, "> "); |
c906108c | 985 | if ((Z | (N ^ V)) == 1) |
4904ba5b | 986 | fprintf_filtered (file, "<= "); |
c906108c | 987 | } |
4bb1dc5e | 988 | else if (regno == E_PSEUDO_EXR_REGNUM && h8300smode) |
fc974602 AV |
989 | { |
990 | /* EXR register */ | |
084edea5 | 991 | unsigned char l = rval & 0xff; |
4904ba5b AC |
992 | fprintf_filtered (file, "\t"); |
993 | fprintf_filtered (file, "T-%d - - - ", (l & 0x80) != 0); | |
994 | fprintf_filtered (file, "I2-%d ", (l & 4) != 0); | |
995 | fprintf_filtered (file, "I1-%d ", (l & 2) != 0); | |
996 | fprintf_filtered (file, "I0-%d", (l & 1) != 0); | |
d194345b | 997 | } |
4904ba5b | 998 | fprintf_filtered (file, "\n"); |
928e48af CV |
999 | } |
1000 | ||
1001 | static void | |
4904ba5b AC |
1002 | h8300_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file, |
1003 | struct frame_info *frame, int regno, int cpregs) | |
928e48af CV |
1004 | { |
1005 | if (regno < 0) | |
4bb1dc5e CV |
1006 | { |
1007 | for (regno = E_R0_REGNUM; regno <= E_SP_REGNUM; ++regno) | |
1008 | h8300_print_register (gdbarch, file, frame, regno); | |
1009 | h8300_print_register (gdbarch, file, frame, E_PSEUDO_CCR_REGNUM); | |
1010 | h8300_print_register (gdbarch, file, frame, E_PC_REGNUM); | |
1011 | if (h8300smode) | |
1012 | { | |
1013 | h8300_print_register (gdbarch, file, frame, E_PSEUDO_EXR_REGNUM); | |
1014 | if (h8300sxmode) | |
1015 | { | |
1016 | h8300_print_register (gdbarch, file, frame, E_SBR_REGNUM); | |
1017 | h8300_print_register (gdbarch, file, frame, E_VBR_REGNUM); | |
4bb1dc5e | 1018 | } |
7be04a68 MS |
1019 | h8300_print_register (gdbarch, file, frame, E_MACH_REGNUM); |
1020 | h8300_print_register (gdbarch, file, frame, E_MACL_REGNUM); | |
4bb1dc5e CV |
1021 | h8300_print_register (gdbarch, file, frame, E_CYCLES_REGNUM); |
1022 | h8300_print_register (gdbarch, file, frame, E_TICKS_REGNUM); | |
1023 | h8300_print_register (gdbarch, file, frame, E_INSTS_REGNUM); | |
1024 | } | |
1025 | else | |
1026 | { | |
1027 | h8300_print_register (gdbarch, file, frame, E_CYCLES_REGNUM); | |
1028 | h8300_print_register (gdbarch, file, frame, E_TICK_REGNUM); | |
1029 | h8300_print_register (gdbarch, file, frame, E_INST_REGNUM); | |
1030 | } | |
1031 | } | |
928e48af | 1032 | else |
4bb1dc5e CV |
1033 | { |
1034 | if (regno == E_CCR_REGNUM) | |
1035 | h8300_print_register (gdbarch, file, frame, E_PSEUDO_CCR_REGNUM); | |
1036 | else if (regno == E_PSEUDO_EXR_REGNUM && h8300smode) | |
1037 | h8300_print_register (gdbarch, file, frame, E_PSEUDO_EXR_REGNUM); | |
1038 | else | |
1039 | h8300_print_register (gdbarch, file, frame, regno); | |
1040 | } | |
928e48af CV |
1041 | } |
1042 | ||
1043 | static CORE_ADDR | |
1044 | h8300_saved_pc_after_call (struct frame_info *ignore) | |
1045 | { | |
1046 | return read_memory_unsigned_integer (read_register (E_SP_REGNUM), BINWORD); | |
1047 | } | |
1048 | ||
928e48af | 1049 | static struct type * |
055c394a | 1050 | h8300_register_type (struct gdbarch *gdbarch, int regno) |
928e48af | 1051 | { |
4bb1dc5e | 1052 | if (regno < 0 || regno >= NUM_REGS + NUM_PSEUDO_REGS) |
928e48af | 1053 | internal_error (__FILE__, __LINE__, |
055c394a | 1054 | "h8300_register_type: illegal register number %d", |
928e48af CV |
1055 | regno); |
1056 | else | |
084edea5 CV |
1057 | { |
1058 | switch (regno) | |
1059 | { | |
1060 | case E_PC_REGNUM: | |
1061 | return builtin_type_void_func_ptr; | |
1062 | case E_SP_REGNUM: | |
1063 | case E_FP_REGNUM: | |
1064 | return builtin_type_void_data_ptr; | |
084edea5 | 1065 | default: |
4bb1dc5e CV |
1066 | if (regno == E_PSEUDO_CCR_REGNUM) |
1067 | return builtin_type_uint8; | |
1068 | else if (regno == E_PSEUDO_EXR_REGNUM) | |
1069 | return builtin_type_uint8; | |
1070 | else if (h8300hmode) | |
1071 | return builtin_type_int32; | |
1072 | else | |
1073 | return builtin_type_int16; | |
084edea5 CV |
1074 | } |
1075 | } | |
928e48af CV |
1076 | } |
1077 | ||
4bb1dc5e CV |
1078 | static void |
1079 | h8300_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache, | |
1080 | int regno, void *buf) | |
1081 | { | |
1082 | if (regno == E_PSEUDO_CCR_REGNUM) | |
1083 | regcache_raw_read (regcache, E_CCR_REGNUM, buf); | |
1084 | else if (regno == E_PSEUDO_EXR_REGNUM) | |
1085 | regcache_raw_read (regcache, E_EXR_REGNUM, buf); | |
1086 | else | |
1087 | regcache_raw_read (regcache, regno, buf); | |
1088 | } | |
1089 | ||
1090 | static void | |
1091 | h8300_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache, | |
1092 | int regno, const void *buf) | |
1093 | { | |
1094 | if (regno == E_PSEUDO_CCR_REGNUM) | |
1095 | regcache_raw_write (regcache, E_CCR_REGNUM, buf); | |
1096 | else if (regno == E_PSEUDO_EXR_REGNUM) | |
1097 | regcache_raw_write (regcache, E_EXR_REGNUM, buf); | |
1098 | else | |
1099 | regcache_raw_write (regcache, regno, buf); | |
1100 | } | |
1101 | ||
1102 | static int | |
1103 | h8300_dbg_reg_to_regnum (int regno) | |
1104 | { | |
1105 | if (regno == E_CCR_REGNUM) | |
1106 | return E_PSEUDO_CCR_REGNUM; | |
1107 | return regno; | |
1108 | } | |
1109 | ||
1110 | static int | |
1111 | h8300s_dbg_reg_to_regnum (int regno) | |
1112 | { | |
1113 | if (regno == E_CCR_REGNUM) | |
1114 | return E_PSEUDO_CCR_REGNUM; | |
1115 | if (regno == E_EXR_REGNUM) | |
1116 | return E_PSEUDO_EXR_REGNUM; | |
1117 | return regno; | |
1118 | } | |
1119 | ||
928e48af | 1120 | static CORE_ADDR |
0261a0d0 | 1121 | h8300_extract_struct_value_address (struct regcache *regcache) |
928e48af | 1122 | { |
0261a0d0 CV |
1123 | ULONGEST addr; |
1124 | regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &addr); | |
1125 | return addr; | |
928e48af CV |
1126 | } |
1127 | ||
1128 | const static unsigned char * | |
1129 | h8300_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr) | |
1130 | { | |
1131 | /*static unsigned char breakpoint[] = { 0x7A, 0xFF };*/ /* ??? */ | |
1132 | static unsigned char breakpoint[] = { 0x01, 0x80 }; /* Sleep */ | |
1133 | ||
1134 | *lenptr = sizeof (breakpoint); | |
1135 | return breakpoint; | |
1136 | } | |
1137 | ||
0261a0d0 CV |
1138 | static CORE_ADDR |
1139 | h8300_push_dummy_code (struct gdbarch *gdbarch, | |
1140 | CORE_ADDR sp, CORE_ADDR funaddr, int using_gcc, | |
1141 | struct value **args, int nargs, | |
1142 | struct type *value_type, | |
1143 | CORE_ADDR *real_pc, CORE_ADDR *bp_addr) | |
1144 | { | |
1145 | /* Allocate space sufficient for a breakpoint. */ | |
1146 | sp = (sp - 2) & ~1; | |
1147 | /* Store the address of that breakpoint */ | |
1148 | *bp_addr = sp; | |
1149 | /* h8300 always starts the call at the callee's entry point. */ | |
1150 | *real_pc = funaddr; | |
1151 | return sp; | |
1152 | } | |
1153 | ||
928e48af CV |
1154 | static void |
1155 | h8300_print_float_info (struct gdbarch *gdbarch, struct ui_file *file, | |
1156 | struct frame_info *frame, const char *args) | |
1157 | { | |
1158 | fprintf_filtered (file, "\ | |
1159 | No floating-point info available for this processor.\n"); | |
1160 | } | |
1161 | ||
1162 | static struct gdbarch * | |
1163 | h8300_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | |
1164 | { | |
928e48af CV |
1165 | struct gdbarch_tdep *tdep = NULL; |
1166 | struct gdbarch *gdbarch; | |
1167 | ||
1168 | arches = gdbarch_list_lookup_by_info (arches, &info); | |
1169 | if (arches != NULL) | |
1170 | return arches->gdbarch; | |
1171 | ||
1172 | #if 0 | |
1173 | tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep)); | |
1174 | #endif | |
1175 | ||
1176 | if (info.bfd_arch_info->arch != bfd_arch_h8300) | |
1177 | return NULL; | |
1178 | ||
084edea5 CV |
1179 | gdbarch = gdbarch_alloc (&info, 0); |
1180 | ||
928e48af CV |
1181 | switch (info.bfd_arch_info->mach) |
1182 | { | |
0a48e7e8 MS |
1183 | case bfd_mach_h8300: |
1184 | h8300sxmode = 0; | |
1185 | h8300smode = 0; | |
1186 | h8300hmode = 0; | |
084edea5 | 1187 | set_gdbarch_num_regs (gdbarch, 13); |
4bb1dc5e CV |
1188 | set_gdbarch_num_pseudo_regs (gdbarch, 1); |
1189 | set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum); | |
1190 | set_gdbarch_dwarf_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum); | |
1191 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum); | |
1192 | set_gdbarch_stab_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum); | |
084edea5 | 1193 | set_gdbarch_register_name (gdbarch, h8300_register_name); |
084edea5 CV |
1194 | set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT); |
1195 | set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT); | |
0261a0d0 CV |
1196 | set_gdbarch_extract_return_value (gdbarch, h8300_extract_return_value); |
1197 | set_gdbarch_store_return_value (gdbarch, h8300_store_return_value); | |
4bb1dc5e | 1198 | set_gdbarch_print_insn (gdbarch, print_insn_h8300); |
0a48e7e8 MS |
1199 | break; |
1200 | case bfd_mach_h8300h: | |
8efca6ba | 1201 | case bfd_mach_h8300hn: |
0a48e7e8 MS |
1202 | h8300sxmode = 0; |
1203 | h8300smode = 0; | |
1204 | h8300hmode = 1; | |
084edea5 | 1205 | set_gdbarch_num_regs (gdbarch, 13); |
4bb1dc5e CV |
1206 | set_gdbarch_num_pseudo_regs (gdbarch, 1); |
1207 | set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum); | |
1208 | set_gdbarch_dwarf_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum); | |
1209 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum); | |
1210 | set_gdbarch_stab_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum); | |
084edea5 | 1211 | set_gdbarch_register_name (gdbarch, h8300_register_name); |
084edea5 CV |
1212 | set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT); |
1213 | set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
0261a0d0 CV |
1214 | set_gdbarch_extract_return_value (gdbarch, h8300h_extract_return_value); |
1215 | set_gdbarch_store_return_value (gdbarch, h8300h_store_return_value); | |
4bb1dc5e | 1216 | set_gdbarch_print_insn (gdbarch, print_insn_h8300h); |
0a48e7e8 MS |
1217 | break; |
1218 | case bfd_mach_h8300s: | |
8efca6ba | 1219 | case bfd_mach_h8300sn: |
0a48e7e8 MS |
1220 | h8300sxmode = 0; |
1221 | h8300smode = 1; | |
1222 | h8300hmode = 1; | |
7be04a68 | 1223 | set_gdbarch_num_regs (gdbarch, 16); |
4bb1dc5e CV |
1224 | set_gdbarch_num_pseudo_regs (gdbarch, 2); |
1225 | set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum); | |
1226 | set_gdbarch_dwarf_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum); | |
1227 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum); | |
1228 | set_gdbarch_stab_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum); | |
084edea5 | 1229 | set_gdbarch_register_name (gdbarch, h8300s_register_name); |
084edea5 CV |
1230 | set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT); |
1231 | set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
0261a0d0 CV |
1232 | set_gdbarch_extract_return_value (gdbarch, h8300h_extract_return_value); |
1233 | set_gdbarch_store_return_value (gdbarch, h8300h_store_return_value); | |
4bb1dc5e | 1234 | set_gdbarch_print_insn (gdbarch, print_insn_h8300s); |
0a48e7e8 MS |
1235 | break; |
1236 | case bfd_mach_h8300sx: | |
084edea5 | 1237 | case bfd_mach_h8300sxn: |
0a48e7e8 MS |
1238 | h8300sxmode = 1; |
1239 | h8300smode = 1; | |
1240 | h8300hmode = 1; | |
084edea5 | 1241 | set_gdbarch_num_regs (gdbarch, 18); |
4bb1dc5e CV |
1242 | set_gdbarch_num_pseudo_regs (gdbarch, 2); |
1243 | set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum); | |
1244 | set_gdbarch_dwarf_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum); | |
1245 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum); | |
1246 | set_gdbarch_stab_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum); | |
084edea5 | 1247 | set_gdbarch_register_name (gdbarch, h8300sx_register_name); |
084edea5 CV |
1248 | set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT); |
1249 | set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
0261a0d0 CV |
1250 | set_gdbarch_extract_return_value (gdbarch, h8300h_extract_return_value); |
1251 | set_gdbarch_store_return_value (gdbarch, h8300h_store_return_value); | |
4bb1dc5e | 1252 | set_gdbarch_print_insn (gdbarch, print_insn_h8300s); |
0a48e7e8 | 1253 | break; |
928e48af CV |
1254 | } |
1255 | ||
4bb1dc5e CV |
1256 | set_gdbarch_pseudo_register_read (gdbarch, h8300_pseudo_register_read); |
1257 | set_gdbarch_pseudo_register_write (gdbarch, h8300_pseudo_register_write); | |
1258 | ||
a5afb99f AC |
1259 | /* NOTE: cagney/2002-12-06: This can be deleted when this arch is |
1260 | ready to unwind the PC first (see frame.c:get_prev_frame()). */ | |
1261 | set_gdbarch_deprecated_init_frame_pc (gdbarch, init_frame_pc_default); | |
1262 | ||
928e48af CV |
1263 | /* |
1264 | * Basic register fields and methods. | |
1265 | */ | |
1266 | ||
928e48af | 1267 | set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM); |
0ba6dca9 | 1268 | set_gdbarch_deprecated_fp_regnum (gdbarch, E_FP_REGNUM); |
928e48af | 1269 | set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM); |
055c394a | 1270 | set_gdbarch_register_type (gdbarch, h8300_register_type); |
4904ba5b | 1271 | set_gdbarch_print_registers_info (gdbarch, h8300_print_registers_info); |
928e48af CV |
1272 | set_gdbarch_print_float_info (gdbarch, h8300_print_float_info); |
1273 | ||
1274 | /* | |
1275 | * Frame Info | |
1276 | */ | |
0261a0d0 CV |
1277 | set_gdbarch_skip_prologue (gdbarch, h8300_skip_prologue); |
1278 | ||
884a26c8 MS |
1279 | set_gdbarch_deprecated_frame_init_saved_regs (gdbarch, |
1280 | h8300_frame_init_saved_regs); | |
1281 | set_gdbarch_deprecated_init_extra_frame_info (gdbarch, | |
1282 | h8300_init_extra_frame_info); | |
618ce49f | 1283 | set_gdbarch_deprecated_frame_chain (gdbarch, h8300_frame_chain); |
884a26c8 MS |
1284 | set_gdbarch_deprecated_saved_pc_after_call (gdbarch, |
1285 | h8300_saved_pc_after_call); | |
8bedc050 | 1286 | set_gdbarch_deprecated_frame_saved_pc (gdbarch, h8300_frame_saved_pc); |
63d47a7d | 1287 | set_gdbarch_deprecated_pop_frame (gdbarch, h8300_pop_frame); |
928e48af CV |
1288 | |
1289 | /* | |
1290 | * Miscelany | |
1291 | */ | |
1292 | /* Stack grows up. */ | |
1293 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
1294 | /* PC stops zero byte after a trap instruction | |
1295 | (which means: exactly on trap instruction). */ | |
1296 | set_gdbarch_decr_pc_after_break (gdbarch, 0); | |
1297 | /* This value is almost never non-zero... */ | |
1298 | set_gdbarch_function_start_offset (gdbarch, 0); | |
1299 | /* This value is almost never non-zero... */ | |
1300 | set_gdbarch_frame_args_skip (gdbarch, 0); | |
928e48af CV |
1301 | set_gdbarch_frameless_function_invocation (gdbarch, |
1302 | frameless_look_for_prologue); | |
1303 | ||
0261a0d0 CV |
1304 | set_gdbarch_extract_struct_value_address (gdbarch, |
1305 | h8300_extract_struct_value_address); | |
1fd35568 | 1306 | set_gdbarch_use_struct_convention (gdbarch, always_use_struct_convention); |
928e48af | 1307 | set_gdbarch_breakpoint_from_pc (gdbarch, h8300_breakpoint_from_pc); |
0261a0d0 | 1308 | set_gdbarch_push_dummy_code (gdbarch, h8300_push_dummy_code); |
63d47a7d | 1309 | set_gdbarch_push_dummy_call (gdbarch, h8300_push_dummy_call); |
928e48af CV |
1310 | |
1311 | set_gdbarch_int_bit (gdbarch, 2 * TARGET_CHAR_BIT); | |
1312 | set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
084edea5 CV |
1313 | set_gdbarch_long_long_bit (gdbarch, 4 * TARGET_CHAR_BIT); |
1314 | set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
1315 | set_gdbarch_long_double_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
928e48af | 1316 | |
5247b418 | 1317 | /* set_gdbarch_stack_align (gdbarch, SOME_stack_align); */ |
928e48af CV |
1318 | set_gdbarch_believe_pcc_promotion (gdbarch, 1); |
1319 | ||
1320 | return gdbarch; | |
c906108c SS |
1321 | } |
1322 | ||
a78f21af AC |
1323 | extern initialize_file_ftype _initialize_h8300_tdep; /* -Wmissing-prototypes */ |
1324 | ||
c906108c | 1325 | void |
fba45db2 | 1326 | _initialize_h8300_tdep (void) |
c906108c | 1327 | { |
928e48af | 1328 | register_gdbarch_init (bfd_arch_h8300, h8300_gdbarch_init); |
c906108c | 1329 | } |