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f0bdd87d YS |
1 | /* Target-machine dependent code for Renesas H8/300, for GDB. |
2 | ||
6aba47ca DJ |
3 | Copyright (C) 1988, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1998, 1999, |
4 | 2000, 2001, 2002, 2003, 2005, 2007 Free Software Foundation, Inc. | |
f0bdd87d YS |
5 | |
6 | This file is part of GDB. | |
7 | ||
8 | This program is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 10 | the Free Software Foundation; either version 3 of the License, or |
f0bdd87d YS |
11 | (at your option) any later version. |
12 | ||
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
a9762ec7 | 19 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
f0bdd87d YS |
20 | |
21 | /* | |
22 | Contributed by Steve Chamberlain | |
23 | sac@cygnus.com | |
24 | */ | |
25 | ||
26 | #include "defs.h" | |
27 | #include "value.h" | |
f0bdd87d YS |
28 | #include "arch-utils.h" |
29 | #include "regcache.h" | |
30 | #include "gdbcore.h" | |
31 | #include "objfiles.h" | |
f0bdd87d YS |
32 | #include "gdb_assert.h" |
33 | #include "dis-asm.h" | |
34 | #include "dwarf2-frame.h" | |
f0bdd87d YS |
35 | #include "frame-base.h" |
36 | #include "frame-unwind.h" | |
37 | ||
f0bdd87d YS |
38 | enum gdb_regnum |
39 | { | |
40 | E_R0_REGNUM, E_ER0_REGNUM = E_R0_REGNUM, E_ARG0_REGNUM = E_R0_REGNUM, | |
41 | E_RET0_REGNUM = E_R0_REGNUM, | |
42 | E_R1_REGNUM, E_ER1_REGNUM = E_R1_REGNUM, E_RET1_REGNUM = E_R1_REGNUM, | |
43 | E_R2_REGNUM, E_ER2_REGNUM = E_R2_REGNUM, E_ARGLAST_REGNUM = E_R2_REGNUM, | |
44 | E_R3_REGNUM, E_ER3_REGNUM = E_R3_REGNUM, | |
45 | E_R4_REGNUM, E_ER4_REGNUM = E_R4_REGNUM, | |
46 | E_R5_REGNUM, E_ER5_REGNUM = E_R5_REGNUM, | |
47 | E_R6_REGNUM, E_ER6_REGNUM = E_R6_REGNUM, E_FP_REGNUM = E_R6_REGNUM, | |
48 | E_SP_REGNUM, | |
49 | E_CCR_REGNUM, | |
50 | E_PC_REGNUM, | |
51 | E_CYCLES_REGNUM, | |
52 | E_TICK_REGNUM, E_EXR_REGNUM = E_TICK_REGNUM, | |
53 | E_INST_REGNUM, E_TICKS_REGNUM = E_INST_REGNUM, | |
54 | E_INSTS_REGNUM, | |
55 | E_MACH_REGNUM, | |
56 | E_MACL_REGNUM, | |
57 | E_SBR_REGNUM, | |
58 | E_VBR_REGNUM | |
59 | }; | |
60 | ||
61 | #define H8300_MAX_NUM_REGS 18 | |
62 | ||
f57d151a UW |
63 | #define E_PSEUDO_CCR_REGNUM (gdbarch_num_regs (current_gdbarch)) |
64 | #define E_PSEUDO_EXR_REGNUM (gdbarch_num_regs (current_gdbarch)+1) | |
f0bdd87d | 65 | |
862ba188 CV |
66 | struct h8300_frame_cache |
67 | { | |
68 | /* Base address. */ | |
69 | CORE_ADDR base; | |
70 | CORE_ADDR sp_offset; | |
71 | CORE_ADDR pc; | |
72 | ||
73 | /* Flag showing that a frame has been created in the prologue code. */ | |
74 | int uses_fp; | |
f0bdd87d | 75 | |
862ba188 CV |
76 | /* Saved registers. */ |
77 | CORE_ADDR saved_regs[H8300_MAX_NUM_REGS]; | |
78 | CORE_ADDR saved_sp; | |
79 | }; | |
80 | ||
81 | enum | |
82 | { | |
83 | h8300_reg_size = 2, | |
84 | h8300h_reg_size = 4, | |
85 | h8300_max_reg_size = 4, | |
86 | }; | |
87 | ||
88 | static int is_h8300hmode (struct gdbarch *gdbarch); | |
89 | static int is_h8300smode (struct gdbarch *gdbarch); | |
90 | static int is_h8300sxmode (struct gdbarch *gdbarch); | |
91 | static int is_h8300_normal_mode (struct gdbarch *gdbarch); | |
92 | ||
93 | #define BINWORD ((is_h8300hmode (current_gdbarch) \ | |
94 | && !is_h8300_normal_mode (current_gdbarch)) \ | |
95 | ? h8300h_reg_size : h8300_reg_size) | |
96 | ||
97 | static CORE_ADDR | |
98 | h8300_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
99 | { | |
100 | return frame_unwind_register_unsigned (next_frame, E_PC_REGNUM); | |
101 | } | |
102 | ||
103 | static CORE_ADDR | |
104 | h8300_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
105 | { | |
106 | return frame_unwind_register_unsigned (next_frame, E_SP_REGNUM); | |
107 | } | |
108 | ||
109 | static struct frame_id | |
110 | h8300_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
111 | { | |
112 | return frame_id_build (h8300_unwind_sp (gdbarch, next_frame), | |
113 | frame_pc_unwind (next_frame)); | |
114 | } | |
115 | ||
116 | /* Normal frames. */ | |
117 | ||
118 | /* Allocate and initialize a frame cache. */ | |
119 | ||
120 | static void | |
121 | h8300_init_frame_cache (struct h8300_frame_cache *cache) | |
122 | { | |
123 | int i; | |
124 | ||
125 | /* Base address. */ | |
126 | cache->base = 0; | |
127 | cache->sp_offset = 0; | |
128 | cache->pc = 0; | |
129 | ||
130 | /* Frameless until proven otherwise. */ | |
131 | cache->uses_fp = 0; | |
132 | ||
133 | /* Saved registers. We initialize these to -1 since zero is a valid | |
134 | offset (that's where %fp is supposed to be stored). */ | |
f57d151a | 135 | for (i = 0; i < gdbarch_num_regs (current_gdbarch); i++) |
862ba188 CV |
136 | cache->saved_regs[i] = -1; |
137 | } | |
138 | ||
139 | #define IS_MOVB_RnRm(x) (((x) & 0xff88) == 0x0c88) | |
140 | #define IS_MOVW_RnRm(x) (((x) & 0xff88) == 0x0d00) | |
141 | #define IS_MOVL_RnRm(x) (((x) & 0xff88) == 0x0f80) | |
142 | #define IS_MOVB_Rn16_SP(x) (((x) & 0xfff0) == 0x6ee0) | |
143 | #define IS_MOVB_EXT(x) ((x) == 0x7860) | |
144 | #define IS_MOVB_Rn24_SP(x) (((x) & 0xfff0) == 0x6aa0) | |
145 | #define IS_MOVW_Rn16_SP(x) (((x) & 0xfff0) == 0x6fe0) | |
146 | #define IS_MOVW_EXT(x) ((x) == 0x78e0) | |
147 | #define IS_MOVW_Rn24_SP(x) (((x) & 0xfff0) == 0x6ba0) | |
148 | /* Same instructions as mov.w, just prefixed with 0x0100 */ | |
149 | #define IS_MOVL_PRE(x) ((x) == 0x0100) | |
150 | #define IS_MOVL_Rn16_SP(x) (((x) & 0xfff0) == 0x6fe0) | |
151 | #define IS_MOVL_EXT(x) ((x) == 0x78e0) | |
152 | #define IS_MOVL_Rn24_SP(x) (((x) & 0xfff0) == 0x6ba0) | |
153 | ||
154 | #define IS_PUSHFP_MOVESPFP(x) ((x) == 0x6df60d76) | |
155 | #define IS_PUSH_FP(x) ((x) == 0x01006df6) | |
156 | #define IS_MOV_SP_FP(x) ((x) == 0x0ff6) | |
157 | #define IS_SUB2_SP(x) ((x) == 0x1b87) | |
158 | #define IS_SUB4_SP(x) ((x) == 0x1b97) | |
159 | #define IS_ADD_IMM_SP(x) ((x) == 0x7a1f) | |
160 | #define IS_SUB_IMM_SP(x) ((x) == 0x7a3f) | |
161 | #define IS_SUBL4_SP(x) ((x) == 0x1acf) | |
162 | #define IS_MOV_IMM_Rn(x) (((x) & 0xfff0) == 0x7905) | |
163 | #define IS_SUB_RnSP(x) (((x) & 0xff0f) == 0x1907) | |
164 | #define IS_ADD_RnSP(x) (((x) & 0xff0f) == 0x0907) | |
165 | #define IS_PUSH(x) (((x) & 0xfff0) == 0x6df0) | |
f0bdd87d YS |
166 | |
167 | /* If the instruction at PC is an argument register spill, return its | |
168 | length. Otherwise, return zero. | |
169 | ||
170 | An argument register spill is an instruction that moves an argument | |
171 | from the register in which it was passed to the stack slot in which | |
172 | it really lives. It is a byte, word, or longword move from an | |
173 | argument register to a negative offset from the frame pointer. | |
174 | ||
175 | CV, 2003-06-16: Or, in optimized code or when the `register' qualifier | |
176 | is used, it could be a byte, word or long move to registers r3-r5. */ | |
177 | ||
178 | static int | |
179 | h8300_is_argument_spill (CORE_ADDR pc) | |
180 | { | |
181 | int w = read_memory_unsigned_integer (pc, 2); | |
182 | ||
862ba188 | 183 | if ((IS_MOVB_RnRm (w) || IS_MOVW_RnRm (w) || IS_MOVL_RnRm (w)) |
f0bdd87d YS |
184 | && (w & 0x70) <= 0x20 /* Rs is R0, R1 or R2 */ |
185 | && (w & 0x7) >= 0x3 && (w & 0x7) <= 0x5) /* Rd is R3, R4 or R5 */ | |
186 | return 2; | |
187 | ||
862ba188 | 188 | if (IS_MOVB_Rn16_SP (w) |
f0bdd87d YS |
189 | && 8 <= (w & 0xf) && (w & 0xf) <= 10) /* Rs is R0L, R1L, or R2L */ |
190 | { | |
862ba188 | 191 | if (read_memory_integer (pc + 2, 2) < 0) /* ... and d:16 is negative. */ |
f0bdd87d YS |
192 | return 4; |
193 | } | |
862ba188 | 194 | else if (IS_MOVB_EXT (w)) |
f0bdd87d | 195 | { |
862ba188 | 196 | if (IS_MOVB_Rn24_SP (read_memory_unsigned_integer (pc + 2, 2))) |
f0bdd87d YS |
197 | { |
198 | LONGEST disp = read_memory_integer (pc + 4, 4); | |
199 | ||
200 | /* ... and d:24 is negative. */ | |
201 | if (disp < 0 && disp > 0xffffff) | |
202 | return 8; | |
203 | } | |
204 | } | |
862ba188 | 205 | else if (IS_MOVW_Rn16_SP (w) |
f0bdd87d YS |
206 | && (w & 0xf) <= 2) /* Rs is R0, R1, or R2 */ |
207 | { | |
f0bdd87d | 208 | /* ... and d:16 is negative. */ |
862ba188 | 209 | if (read_memory_integer (pc + 2, 2) < 0) |
f0bdd87d YS |
210 | return 4; |
211 | } | |
862ba188 | 212 | else if (IS_MOVW_EXT (w)) |
f0bdd87d | 213 | { |
862ba188 | 214 | if (IS_MOVW_Rn24_SP (read_memory_unsigned_integer (pc + 2, 2))) |
f0bdd87d YS |
215 | { |
216 | LONGEST disp = read_memory_integer (pc + 4, 4); | |
217 | ||
218 | /* ... and d:24 is negative. */ | |
219 | if (disp < 0 && disp > 0xffffff) | |
220 | return 8; | |
221 | } | |
222 | } | |
862ba188 | 223 | else if (IS_MOVL_PRE (w)) |
f0bdd87d YS |
224 | { |
225 | int w2 = read_memory_integer (pc + 2, 2); | |
226 | ||
862ba188 | 227 | if (IS_MOVL_Rn16_SP (w2) |
f0bdd87d YS |
228 | && (w2 & 0xf) <= 2) /* Rs is ER0, ER1, or ER2 */ |
229 | { | |
f0bdd87d | 230 | /* ... and d:16 is negative. */ |
862ba188 | 231 | if (read_memory_integer (pc + 4, 2) < 0) |
f0bdd87d YS |
232 | return 6; |
233 | } | |
862ba188 | 234 | else if (IS_MOVL_EXT (w2)) |
f0bdd87d YS |
235 | { |
236 | int w3 = read_memory_integer (pc + 4, 2); | |
237 | ||
862ba188 | 238 | if (IS_MOVL_Rn24_SP (read_memory_integer (pc + 4, 2))) |
f0bdd87d YS |
239 | { |
240 | LONGEST disp = read_memory_integer (pc + 6, 4); | |
241 | ||
242 | /* ... and d:24 is negative. */ | |
243 | if (disp < 0 && disp > 0xffffff) | |
244 | return 10; | |
245 | } | |
246 | } | |
247 | } | |
248 | ||
249 | return 0; | |
250 | } | |
251 | ||
f0bdd87d YS |
252 | /* Do a full analysis of the prologue at PC and update CACHE |
253 | accordingly. Bail out early if CURRENT_PC is reached. Return the | |
254 | address where the analysis stopped. | |
255 | ||
256 | We handle all cases that can be generated by gcc. | |
257 | ||
258 | For allocating a stack frame: | |
259 | ||
260 | mov.w r6,@-sp | |
261 | mov.w sp,r6 | |
262 | mov.w #-n,rN | |
263 | add.w rN,sp | |
264 | ||
265 | mov.w r6,@-sp | |
266 | mov.w sp,r6 | |
267 | subs #2,sp | |
268 | (repeat) | |
269 | ||
270 | mov.l er6,@-sp | |
271 | mov.l sp,er6 | |
272 | add.l #-n,sp | |
273 | ||
274 | mov.w r6,@-sp | |
275 | mov.w sp,r6 | |
276 | subs #4,sp | |
277 | (repeat) | |
278 | ||
279 | For saving registers: | |
280 | ||
281 | mov.w rN,@-sp | |
282 | mov.l erN,@-sp | |
283 | stm.l reglist,@-sp | |
284 | ||
f0bdd87d YS |
285 | */ |
286 | ||
287 | static CORE_ADDR | |
288 | h8300_analyze_prologue (CORE_ADDR pc, CORE_ADDR current_pc, | |
289 | struct h8300_frame_cache *cache) | |
290 | { | |
291 | unsigned int op; | |
862ba188 CV |
292 | int regno, i, spill_size; |
293 | ||
294 | cache->sp_offset = 0; | |
f0bdd87d | 295 | |
f0bdd87d YS |
296 | if (pc >= current_pc) |
297 | return current_pc; | |
298 | ||
862ba188 CV |
299 | op = read_memory_unsigned_integer (pc, 4); |
300 | ||
301 | if (IS_PUSHFP_MOVESPFP (op)) | |
302 | { | |
303 | cache->saved_regs[E_FP_REGNUM] = 0; | |
304 | cache->uses_fp = 1; | |
305 | pc += 4; | |
306 | } | |
307 | else if (IS_PUSH_FP (op)) | |
308 | { | |
309 | cache->saved_regs[E_FP_REGNUM] = 0; | |
310 | pc += 4; | |
311 | if (pc >= current_pc) | |
312 | return current_pc; | |
313 | op = read_memory_unsigned_integer (pc, 2); | |
314 | if (IS_MOV_SP_FP (op)) | |
315 | { | |
316 | cache->uses_fp = 1; | |
317 | pc += 2; | |
318 | } | |
319 | } | |
320 | ||
321 | while (pc < current_pc) | |
322 | { | |
323 | op = read_memory_unsigned_integer (pc, 2); | |
324 | if (IS_SUB2_SP (op)) | |
325 | { | |
326 | cache->sp_offset += 2; | |
327 | pc += 2; | |
328 | } | |
329 | else if (IS_SUB4_SP (op)) | |
330 | { | |
331 | cache->sp_offset += 4; | |
332 | pc += 2; | |
333 | } | |
334 | else if (IS_ADD_IMM_SP (op)) | |
335 | { | |
336 | cache->sp_offset += -read_memory_integer (pc + 2, 2); | |
337 | pc += 4; | |
338 | } | |
339 | else if (IS_SUB_IMM_SP (op)) | |
340 | { | |
341 | cache->sp_offset += read_memory_integer (pc + 2, 2); | |
342 | pc += 4; | |
343 | } | |
344 | else if (IS_SUBL4_SP (op)) | |
345 | { | |
346 | cache->sp_offset += 4; | |
347 | pc += 2; | |
348 | } | |
349 | else if (IS_MOV_IMM_Rn (op)) | |
350 | { | |
351 | int offset = read_memory_integer (pc + 2, 2); | |
352 | regno = op & 0x000f; | |
353 | op = read_memory_unsigned_integer (pc + 4, 2); | |
354 | if (IS_ADD_RnSP (op) && (op & 0x00f0) == regno) | |
355 | { | |
356 | cache->sp_offset -= offset; | |
357 | pc += 6; | |
358 | } | |
359 | else if (IS_SUB_RnSP (op) && (op & 0x00f0) == regno) | |
360 | { | |
361 | cache->sp_offset += offset; | |
362 | pc += 6; | |
363 | } | |
364 | else | |
365 | break; | |
366 | } | |
367 | else if (IS_PUSH (op)) | |
368 | { | |
369 | regno = op & 0x000f; | |
370 | cache->sp_offset += 2; | |
371 | cache->saved_regs[regno] = cache->sp_offset; | |
372 | pc += 2; | |
373 | } | |
374 | else if (op == 0x0100) | |
375 | { | |
376 | op = read_memory_unsigned_integer (pc + 2, 2); | |
377 | if (IS_PUSH (op)) | |
378 | { | |
379 | regno = op & 0x000f; | |
380 | cache->sp_offset += 4; | |
381 | cache->saved_regs[regno] = cache->sp_offset; | |
382 | pc += 4; | |
383 | } | |
384 | else | |
385 | break; | |
386 | } | |
387 | else if ((op & 0xffcf) == 0x0100) | |
388 | { | |
389 | int op1; | |
390 | op1 = read_memory_unsigned_integer (pc + 2, 2); | |
391 | if (IS_PUSH (op1)) | |
392 | { | |
393 | /* Since the prefix is 0x01x0, this is not a simple pushm but a | |
394 | stm.l reglist,@-sp */ | |
395 | i = ((op & 0x0030) >> 4) + 1; | |
396 | regno = op1 & 0x000f; | |
397 | for (; i > 0; regno++, --i) | |
398 | { | |
399 | cache->sp_offset += 4; | |
400 | cache->saved_regs[regno] = cache->sp_offset; | |
401 | } | |
402 | pc += 4; | |
403 | } | |
404 | else | |
405 | break; | |
406 | } | |
407 | else | |
408 | break; | |
409 | } | |
410 | ||
411 | /* Check for spilling an argument register to the stack frame. | |
412 | This could also be an initializing store from non-prologue code, | |
413 | but I don't think there's any harm in skipping that. */ | |
414 | while ((spill_size = h8300_is_argument_spill (pc)) > 0 | |
415 | && pc + spill_size <= current_pc) | |
416 | pc += spill_size; | |
f0bdd87d YS |
417 | |
418 | return pc; | |
419 | } | |
420 | ||
421 | static struct h8300_frame_cache * | |
422 | h8300_frame_cache (struct frame_info *next_frame, void **this_cache) | |
423 | { | |
424 | struct h8300_frame_cache *cache; | |
425 | char buf[4]; | |
426 | int i; | |
862ba188 | 427 | CORE_ADDR current_pc; |
f0bdd87d YS |
428 | |
429 | if (*this_cache) | |
430 | return *this_cache; | |
431 | ||
862ba188 CV |
432 | cache = FRAME_OBSTACK_ZALLOC (struct h8300_frame_cache); |
433 | h8300_init_frame_cache (cache); | |
f0bdd87d YS |
434 | *this_cache = cache; |
435 | ||
436 | /* In principle, for normal frames, %fp holds the frame pointer, | |
437 | which holds the base address for the current stack frame. | |
438 | However, for functions that don't need it, the frame pointer is | |
439 | optional. For these "frameless" functions the frame pointer is | |
862ba188 | 440 | actually the frame pointer of the calling frame. */ |
f0bdd87d | 441 | |
862ba188 | 442 | cache->base = frame_unwind_register_unsigned (next_frame, E_FP_REGNUM); |
f0bdd87d YS |
443 | if (cache->base == 0) |
444 | return cache; | |
445 | ||
862ba188 | 446 | cache->saved_regs[E_PC_REGNUM] = -BINWORD; |
f0bdd87d | 447 | |
93d42b30 | 448 | cache->pc = frame_func_unwind (next_frame, NORMAL_FRAME); |
862ba188 | 449 | current_pc = frame_pc_unwind (next_frame); |
f0bdd87d | 450 | if (cache->pc != 0) |
862ba188 | 451 | h8300_analyze_prologue (cache->pc, current_pc, cache); |
f0bdd87d | 452 | |
862ba188 | 453 | if (!cache->uses_fp) |
f0bdd87d YS |
454 | { |
455 | /* We didn't find a valid frame, which means that CACHE->base | |
456 | currently holds the frame pointer for our calling frame. If | |
457 | we're at the start of a function, or somewhere half-way its | |
458 | prologue, the function's frame probably hasn't been fully | |
459 | setup yet. Try to reconstruct the base address for the stack | |
460 | frame by looking at the stack pointer. For truly "frameless" | |
461 | functions this might work too. */ | |
462 | ||
862ba188 CV |
463 | cache->base = frame_unwind_register_unsigned (next_frame, E_SP_REGNUM) |
464 | + cache->sp_offset; | |
465 | cache->saved_sp = cache->base + BINWORD; | |
466 | cache->saved_regs[E_PC_REGNUM] = 0; | |
467 | } | |
468 | else | |
469 | { | |
470 | cache->saved_sp = cache->base + 2 * BINWORD; | |
471 | cache->saved_regs[E_PC_REGNUM] = -BINWORD; | |
f0bdd87d | 472 | } |
f0bdd87d YS |
473 | |
474 | /* Adjust all the saved registers such that they contain addresses | |
475 | instead of offsets. */ | |
f57d151a | 476 | for (i = 0; i < gdbarch_num_regs (current_gdbarch); i++) |
f0bdd87d | 477 | if (cache->saved_regs[i] != -1) |
862ba188 | 478 | cache->saved_regs[i] = cache->base - cache->saved_regs[i]; |
f0bdd87d YS |
479 | |
480 | return cache; | |
481 | } | |
482 | ||
483 | static void | |
484 | h8300_frame_this_id (struct frame_info *next_frame, void **this_cache, | |
485 | struct frame_id *this_id) | |
486 | { | |
487 | struct h8300_frame_cache *cache = | |
488 | h8300_frame_cache (next_frame, this_cache); | |
489 | ||
490 | /* This marks the outermost frame. */ | |
491 | if (cache->base == 0) | |
492 | return; | |
493 | ||
862ba188 | 494 | *this_id = frame_id_build (cache->saved_sp, cache->pc); |
f0bdd87d YS |
495 | } |
496 | ||
497 | static void | |
498 | h8300_frame_prev_register (struct frame_info *next_frame, void **this_cache, | |
499 | int regnum, int *optimizedp, | |
500 | enum lval_type *lvalp, CORE_ADDR *addrp, | |
5d0d05b6 | 501 | int *realnump, gdb_byte *valuep) |
f0bdd87d YS |
502 | { |
503 | struct h8300_frame_cache *cache = | |
504 | h8300_frame_cache (next_frame, this_cache); | |
505 | ||
506 | gdb_assert (regnum >= 0); | |
507 | ||
508 | if (regnum == E_SP_REGNUM && cache->saved_sp) | |
509 | { | |
510 | *optimizedp = 0; | |
511 | *lvalp = not_lval; | |
512 | *addrp = 0; | |
513 | *realnump = -1; | |
514 | if (valuep) | |
862ba188 | 515 | store_unsigned_integer (valuep, BINWORD, cache->saved_sp); |
f0bdd87d YS |
516 | return; |
517 | } | |
518 | ||
f57d151a UW |
519 | if (regnum < gdbarch_num_regs (current_gdbarch) |
520 | && cache->saved_regs[regnum] != -1) | |
f0bdd87d YS |
521 | { |
522 | *optimizedp = 0; | |
523 | *lvalp = lval_memory; | |
524 | *addrp = cache->saved_regs[regnum]; | |
525 | *realnump = -1; | |
526 | if (valuep) | |
862ba188 | 527 | read_memory (*addrp, valuep, register_size (current_gdbarch, regnum)); |
f0bdd87d YS |
528 | return; |
529 | } | |
530 | ||
5efde112 DJ |
531 | *optimizedp = 0; |
532 | *lvalp = lval_register; | |
533 | *addrp = 0; | |
534 | *realnump = regnum; | |
535 | if (valuep) | |
536 | frame_unwind_register (next_frame, *realnump, valuep); | |
f0bdd87d YS |
537 | } |
538 | ||
539 | static const struct frame_unwind h8300_frame_unwind = { | |
540 | NORMAL_FRAME, | |
541 | h8300_frame_this_id, | |
542 | h8300_frame_prev_register | |
543 | }; | |
544 | ||
545 | static const struct frame_unwind * | |
546 | h8300_frame_sniffer (struct frame_info *next_frame) | |
547 | { | |
548 | return &h8300_frame_unwind; | |
549 | } | |
550 | ||
862ba188 CV |
551 | static CORE_ADDR |
552 | h8300_frame_base_address (struct frame_info *next_frame, void **this_cache) | |
553 | { | |
554 | struct h8300_frame_cache *cache = h8300_frame_cache (next_frame, this_cache); | |
555 | return cache->base; | |
556 | } | |
557 | ||
558 | static const struct frame_base h8300_frame_base = { | |
559 | &h8300_frame_unwind, | |
560 | h8300_frame_base_address, | |
561 | h8300_frame_base_address, | |
562 | h8300_frame_base_address | |
563 | }; | |
564 | ||
565 | static CORE_ADDR | |
566 | h8300_skip_prologue (CORE_ADDR pc) | |
567 | { | |
568 | CORE_ADDR func_addr = 0 , func_end = 0; | |
569 | ||
570 | if (find_pc_partial_function (pc, NULL, &func_addr, &func_end)) | |
571 | { | |
572 | struct symtab_and_line sal; | |
573 | struct h8300_frame_cache cache; | |
574 | ||
575 | /* Found a function. */ | |
576 | sal = find_pc_line (func_addr, 0); | |
577 | if (sal.end && sal.end < func_end) | |
578 | /* Found a line number, use it as end of prologue. */ | |
579 | return sal.end; | |
580 | ||
581 | /* No useable line symbol. Use prologue parsing method. */ | |
582 | h8300_init_frame_cache (&cache); | |
583 | return h8300_analyze_prologue (func_addr, func_end, &cache); | |
584 | } | |
585 | ||
586 | /* No function symbol -- just return the PC. */ | |
587 | return (CORE_ADDR) pc; | |
588 | } | |
589 | ||
f0bdd87d YS |
590 | /* Function: push_dummy_call |
591 | Setup the function arguments for calling a function in the inferior. | |
592 | In this discussion, a `word' is 16 bits on the H8/300s, and 32 bits | |
593 | on the H8/300H. | |
594 | ||
595 | There are actually two ABI's here: -mquickcall (the default) and | |
596 | -mno-quickcall. With -mno-quickcall, all arguments are passed on | |
597 | the stack after the return address, word-aligned. With | |
598 | -mquickcall, GCC tries to use r0 -- r2 to pass registers. Since | |
599 | GCC doesn't indicate in the object file which ABI was used to | |
600 | compile it, GDB only supports the default --- -mquickcall. | |
601 | ||
602 | Here are the rules for -mquickcall, in detail: | |
603 | ||
604 | Each argument, whether scalar or aggregate, is padded to occupy a | |
605 | whole number of words. Arguments smaller than a word are padded at | |
606 | the most significant end; those larger than a word are padded at | |
607 | the least significant end. | |
608 | ||
609 | The initial arguments are passed in r0 -- r2. Earlier arguments go in | |
610 | lower-numbered registers. Multi-word arguments are passed in | |
611 | consecutive registers, with the most significant end in the | |
612 | lower-numbered register. | |
613 | ||
614 | If an argument doesn't fit entirely in the remaining registers, it | |
615 | is passed entirely on the stack. Stack arguments begin just after | |
616 | the return address. Once an argument has overflowed onto the stack | |
617 | this way, all subsequent arguments are passed on the stack. | |
618 | ||
619 | The above rule has odd consequences. For example, on the h8/300s, | |
620 | if a function takes two longs and an int as arguments: | |
621 | - the first long will be passed in r0/r1, | |
622 | - the second long will be passed entirely on the stack, since it | |
623 | doesn't fit in r2, | |
624 | - and the int will be passed on the stack, even though it could fit | |
625 | in r2. | |
626 | ||
627 | A weird exception: if an argument is larger than a word, but not a | |
628 | whole number of words in length (before padding), it is passed on | |
629 | the stack following the rules for stack arguments above, even if | |
630 | there are sufficient registers available to hold it. Stranger | |
631 | still, the argument registers are still `used up' --- even though | |
632 | there's nothing in them. | |
633 | ||
634 | So, for example, on the h8/300s, if a function expects a three-byte | |
635 | structure and an int, the structure will go on the stack, and the | |
636 | int will go in r2, not r0. | |
637 | ||
638 | If the function returns an aggregate type (struct, union, or class) | |
639 | by value, the caller must allocate space to hold the return value, | |
640 | and pass the callee a pointer to this space as an invisible first | |
641 | argument, in R0. | |
642 | ||
643 | For varargs functions, the last fixed argument and all the variable | |
644 | arguments are always passed on the stack. This means that calls to | |
645 | varargs functions don't work properly unless there is a prototype | |
646 | in scope. | |
647 | ||
648 | Basically, this ABI is not good, for the following reasons: | |
649 | - You can't call vararg functions properly unless a prototype is in scope. | |
650 | - Structure passing is inconsistent, to no purpose I can see. | |
651 | - It often wastes argument registers, of which there are only three | |
652 | to begin with. */ | |
653 | ||
654 | static CORE_ADDR | |
655 | h8300_push_dummy_call (struct gdbarch *gdbarch, struct value *function, | |
656 | struct regcache *regcache, CORE_ADDR bp_addr, | |
657 | int nargs, struct value **args, CORE_ADDR sp, | |
658 | int struct_return, CORE_ADDR struct_addr) | |
659 | { | |
660 | int stack_alloc = 0, stack_offset = 0; | |
661 | int wordsize = BINWORD; | |
662 | int reg = E_ARG0_REGNUM; | |
663 | int argument; | |
664 | ||
665 | /* First, make sure the stack is properly aligned. */ | |
666 | sp = align_down (sp, wordsize); | |
667 | ||
668 | /* Now make sure there's space on the stack for the arguments. We | |
669 | may over-allocate a little here, but that won't hurt anything. */ | |
670 | for (argument = 0; argument < nargs; argument++) | |
671 | stack_alloc += align_up (TYPE_LENGTH (value_type (args[argument])), | |
672 | wordsize); | |
673 | sp -= stack_alloc; | |
674 | ||
675 | /* Now load as many arguments as possible into registers, and push | |
676 | the rest onto the stack. | |
677 | If we're returning a structure by value, then we must pass a | |
678 | pointer to the buffer for the return value as an invisible first | |
679 | argument. */ | |
680 | if (struct_return) | |
681 | regcache_cooked_write_unsigned (regcache, reg++, struct_addr); | |
682 | ||
683 | for (argument = 0; argument < nargs; argument++) | |
684 | { | |
685 | struct type *type = value_type (args[argument]); | |
686 | int len = TYPE_LENGTH (type); | |
687 | char *contents = (char *) value_contents (args[argument]); | |
688 | ||
689 | /* Pad the argument appropriately. */ | |
690 | int padded_len = align_up (len, wordsize); | |
5d0d05b6 | 691 | gdb_byte *padded = alloca (padded_len); |
f0bdd87d YS |
692 | |
693 | memset (padded, 0, padded_len); | |
694 | memcpy (len < wordsize ? padded + padded_len - len : padded, | |
695 | contents, len); | |
696 | ||
697 | /* Could the argument fit in the remaining registers? */ | |
698 | if (padded_len <= (E_ARGLAST_REGNUM - reg + 1) * wordsize) | |
699 | { | |
700 | /* Are we going to pass it on the stack anyway, for no good | |
701 | reason? */ | |
702 | if (len > wordsize && len % wordsize) | |
703 | { | |
704 | /* I feel so unclean. */ | |
705 | write_memory (sp + stack_offset, padded, padded_len); | |
706 | stack_offset += padded_len; | |
707 | ||
708 | /* That's right --- even though we passed the argument | |
709 | on the stack, we consume the registers anyway! Love | |
710 | me, love my dog. */ | |
711 | reg += padded_len / wordsize; | |
712 | } | |
713 | else | |
714 | { | |
715 | /* Heavens to Betsy --- it's really going in registers! | |
716 | It would be nice if we could use write_register_bytes | |
717 | here, but on the h8/300s, there are gaps between | |
718 | the registers in the register file. */ | |
719 | int offset; | |
720 | ||
721 | for (offset = 0; offset < padded_len; offset += wordsize) | |
722 | { | |
723 | ULONGEST word = extract_unsigned_integer (padded + offset, | |
724 | wordsize); | |
725 | regcache_cooked_write_unsigned (regcache, reg++, word); | |
726 | } | |
727 | } | |
728 | } | |
729 | else | |
730 | { | |
731 | /* It doesn't fit in registers! Onto the stack it goes. */ | |
732 | write_memory (sp + stack_offset, padded, padded_len); | |
733 | stack_offset += padded_len; | |
734 | ||
735 | /* Once one argument has spilled onto the stack, all | |
736 | subsequent arguments go on the stack. */ | |
737 | reg = E_ARGLAST_REGNUM + 1; | |
738 | } | |
739 | } | |
740 | ||
741 | /* Store return address. */ | |
742 | sp -= wordsize; | |
743 | write_memory_unsigned_integer (sp, wordsize, bp_addr); | |
744 | ||
745 | /* Update stack pointer. */ | |
746 | regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, sp); | |
747 | ||
862ba188 CV |
748 | /* Return the new stack pointer minus the return address slot since |
749 | that's what DWARF2/GCC uses as the frame's CFA. */ | |
750 | return sp + wordsize; | |
f0bdd87d YS |
751 | } |
752 | ||
753 | /* Function: extract_return_value | |
754 | Figure out where in REGBUF the called function has left its return value. | |
755 | Copy that into VALBUF. Be sure to account for CPU type. */ | |
756 | ||
757 | static void | |
758 | h8300_extract_return_value (struct type *type, struct regcache *regcache, | |
759 | void *valbuf) | |
760 | { | |
761 | int len = TYPE_LENGTH (type); | |
762 | ULONGEST c, addr; | |
763 | ||
764 | switch (len) | |
765 | { | |
766 | case 1: | |
767 | case 2: | |
768 | regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c); | |
769 | store_unsigned_integer (valbuf, len, c); | |
770 | break; | |
771 | case 4: /* Needs two registers on plain H8/300 */ | |
772 | regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c); | |
773 | store_unsigned_integer (valbuf, 2, c); | |
774 | regcache_cooked_read_unsigned (regcache, E_RET1_REGNUM, &c); | |
775 | store_unsigned_integer ((void *) ((char *) valbuf + 2), 2, c); | |
776 | break; | |
777 | case 8: /* long long is now 8 bytes. */ | |
778 | if (TYPE_CODE (type) == TYPE_CODE_INT) | |
779 | { | |
780 | regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &addr); | |
781 | c = read_memory_unsigned_integer ((CORE_ADDR) addr, len); | |
782 | store_unsigned_integer (valbuf, len, c); | |
783 | } | |
784 | else | |
785 | { | |
786 | error ("I don't know how this 8 byte value is returned."); | |
787 | } | |
788 | break; | |
789 | } | |
790 | } | |
791 | ||
792 | static void | |
793 | h8300h_extract_return_value (struct type *type, struct regcache *regcache, | |
794 | void *valbuf) | |
795 | { | |
796 | int len = TYPE_LENGTH (type); | |
797 | ULONGEST c, addr; | |
798 | ||
799 | switch (len) | |
800 | { | |
801 | case 1: | |
802 | case 2: | |
803 | case 4: | |
804 | regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c); | |
805 | store_unsigned_integer (valbuf, len, c); | |
806 | break; | |
807 | case 8: /* long long is now 8 bytes. */ | |
808 | if (TYPE_CODE (type) == TYPE_CODE_INT) | |
809 | { | |
862ba188 CV |
810 | regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c); |
811 | store_unsigned_integer (valbuf, 4, c); | |
812 | regcache_cooked_read_unsigned (regcache, E_RET1_REGNUM, &c); | |
813 | store_unsigned_integer ((void *) ((char *) valbuf + 4), 4, c); | |
f0bdd87d YS |
814 | } |
815 | else | |
816 | { | |
817 | error ("I don't know how this 8 byte value is returned."); | |
818 | } | |
819 | break; | |
820 | } | |
821 | } | |
822 | ||
862ba188 CV |
823 | int |
824 | h8300_use_struct_convention (struct type *value_type) | |
825 | { | |
826 | /* Types of 1, 2 or 4 bytes are returned in R0/R1, everything else on the | |
827 | stack. */ | |
828 | ||
829 | if (TYPE_CODE (value_type) == TYPE_CODE_STRUCT | |
830 | || TYPE_CODE (value_type) == TYPE_CODE_UNION) | |
831 | return 1; | |
832 | return !(TYPE_LENGTH (value_type) == 1 | |
833 | || TYPE_LENGTH (value_type) == 2 | |
834 | || TYPE_LENGTH (value_type) == 4); | |
835 | } | |
836 | ||
837 | int | |
838 | h8300h_use_struct_convention (struct type *value_type) | |
839 | { | |
840 | /* Types of 1, 2 or 4 bytes are returned in R0, INT types of 8 bytes are | |
841 | returned in R0/R1, everything else on the stack. */ | |
842 | if (TYPE_CODE (value_type) == TYPE_CODE_STRUCT | |
843 | || TYPE_CODE (value_type) == TYPE_CODE_UNION) | |
844 | return 1; | |
845 | return !(TYPE_LENGTH (value_type) == 1 | |
846 | || TYPE_LENGTH (value_type) == 2 | |
847 | || TYPE_LENGTH (value_type) == 4 | |
848 | || (TYPE_LENGTH (value_type) == 8 | |
849 | && TYPE_CODE (value_type) == TYPE_CODE_INT)); | |
850 | } | |
f0bdd87d YS |
851 | |
852 | /* Function: store_return_value | |
853 | Place the appropriate value in the appropriate registers. | |
854 | Primarily used by the RETURN command. */ | |
855 | ||
856 | static void | |
857 | h8300_store_return_value (struct type *type, struct regcache *regcache, | |
858 | const void *valbuf) | |
859 | { | |
860 | int len = TYPE_LENGTH (type); | |
861 | ULONGEST val; | |
862 | ||
863 | switch (len) | |
864 | { | |
865 | case 1: | |
866 | case 2: /* short... */ | |
867 | val = extract_unsigned_integer (valbuf, len); | |
868 | regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, val); | |
869 | break; | |
870 | case 4: /* long, float */ | |
871 | val = extract_unsigned_integer (valbuf, len); | |
872 | regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, | |
873 | (val >> 16) & 0xffff); | |
874 | regcache_cooked_write_unsigned (regcache, E_RET1_REGNUM, val & 0xffff); | |
875 | break; | |
876 | case 8: /* long long, double and long double are all defined | |
877 | as 4 byte types so far so this shouldn't happen. */ | |
878 | error ("I don't know how to return an 8 byte value."); | |
879 | break; | |
880 | } | |
881 | } | |
882 | ||
883 | static void | |
884 | h8300h_store_return_value (struct type *type, struct regcache *regcache, | |
885 | const void *valbuf) | |
886 | { | |
887 | int len = TYPE_LENGTH (type); | |
888 | ULONGEST val; | |
889 | ||
890 | switch (len) | |
891 | { | |
892 | case 1: | |
893 | case 2: | |
894 | case 4: /* long, float */ | |
895 | val = extract_unsigned_integer (valbuf, len); | |
896 | regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, val); | |
897 | break; | |
862ba188 CV |
898 | case 8: |
899 | val = extract_unsigned_integer (valbuf, len); | |
900 | regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, | |
901 | (val >> 32) & 0xffffffff); | |
902 | regcache_cooked_write_unsigned (regcache, E_RET1_REGNUM, | |
903 | val & 0xffffffff); | |
f0bdd87d YS |
904 | break; |
905 | } | |
906 | } | |
907 | ||
862ba188 CV |
908 | static enum return_value_convention |
909 | h8300_return_value (struct gdbarch *gdbarch, struct type *type, | |
910 | struct regcache *regcache, | |
5d0d05b6 | 911 | gdb_byte *readbuf, const gdb_byte *writebuf) |
862ba188 CV |
912 | { |
913 | if (h8300_use_struct_convention (type)) | |
914 | return RETURN_VALUE_STRUCT_CONVENTION; | |
915 | if (writebuf) | |
916 | h8300_store_return_value (type, regcache, writebuf); | |
917 | else if (readbuf) | |
918 | h8300_extract_return_value (type, regcache, readbuf); | |
919 | return RETURN_VALUE_REGISTER_CONVENTION; | |
920 | } | |
921 | ||
922 | static enum return_value_convention | |
923 | h8300h_return_value (struct gdbarch *gdbarch, struct type *type, | |
924 | struct regcache *regcache, | |
5d0d05b6 | 925 | gdb_byte *readbuf, const gdb_byte *writebuf) |
862ba188 CV |
926 | { |
927 | if (h8300h_use_struct_convention (type)) | |
928 | { | |
929 | if (readbuf) | |
930 | { | |
931 | ULONGEST addr; | |
932 | ||
933 | regcache_raw_read_unsigned (regcache, E_R0_REGNUM, &addr); | |
934 | read_memory (addr, readbuf, TYPE_LENGTH (type)); | |
935 | } | |
936 | ||
937 | return RETURN_VALUE_ABI_RETURNS_ADDRESS; | |
938 | } | |
939 | if (writebuf) | |
940 | h8300h_store_return_value (type, regcache, writebuf); | |
941 | else if (readbuf) | |
942 | h8300h_extract_return_value (type, regcache, readbuf); | |
943 | return RETURN_VALUE_REGISTER_CONVENTION; | |
944 | } | |
945 | ||
f0bdd87d YS |
946 | static struct cmd_list_element *setmachinelist; |
947 | ||
948 | static const char * | |
949 | h8300_register_name (int regno) | |
950 | { | |
951 | /* The register names change depending on which h8300 processor | |
952 | type is selected. */ | |
953 | static char *register_names[] = { | |
954 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", | |
955 | "sp", "", "pc", "cycles", "tick", "inst", | |
956 | "ccr", /* pseudo register */ | |
957 | }; | |
958 | if (regno < 0 | |
959 | || regno >= (sizeof (register_names) / sizeof (*register_names))) | |
960 | internal_error (__FILE__, __LINE__, | |
961 | "h8300_register_name: illegal register number %d", regno); | |
962 | else | |
963 | return register_names[regno]; | |
964 | } | |
965 | ||
966 | static const char * | |
967 | h8300s_register_name (int regno) | |
968 | { | |
969 | static char *register_names[] = { | |
970 | "er0", "er1", "er2", "er3", "er4", "er5", "er6", | |
971 | "sp", "", "pc", "cycles", "", "tick", "inst", | |
972 | "mach", "macl", | |
973 | "ccr", "exr" /* pseudo registers */ | |
974 | }; | |
975 | if (regno < 0 | |
976 | || regno >= (sizeof (register_names) / sizeof (*register_names))) | |
977 | internal_error (__FILE__, __LINE__, | |
978 | "h8300s_register_name: illegal register number %d", | |
979 | regno); | |
980 | else | |
981 | return register_names[regno]; | |
982 | } | |
983 | ||
984 | static const char * | |
985 | h8300sx_register_name (int regno) | |
986 | { | |
987 | static char *register_names[] = { | |
988 | "er0", "er1", "er2", "er3", "er4", "er5", "er6", | |
989 | "sp", "", "pc", "cycles", "", "tick", "inst", | |
990 | "mach", "macl", "sbr", "vbr", | |
991 | "ccr", "exr" /* pseudo registers */ | |
992 | }; | |
993 | if (regno < 0 | |
994 | || regno >= (sizeof (register_names) / sizeof (*register_names))) | |
995 | internal_error (__FILE__, __LINE__, | |
996 | "h8300sx_register_name: illegal register number %d", | |
997 | regno); | |
998 | else | |
999 | return register_names[regno]; | |
1000 | } | |
1001 | ||
1002 | static void | |
1003 | h8300_print_register (struct gdbarch *gdbarch, struct ui_file *file, | |
1004 | struct frame_info *frame, int regno) | |
1005 | { | |
1006 | LONGEST rval; | |
1007 | const char *name = gdbarch_register_name (gdbarch, regno); | |
1008 | ||
1009 | if (!name || !*name) | |
1010 | return; | |
1011 | ||
1012 | rval = get_frame_register_signed (frame, regno); | |
1013 | ||
1014 | fprintf_filtered (file, "%-14s ", name); | |
1015 | if ((regno == E_PSEUDO_CCR_REGNUM) || \ | |
1016 | (regno == E_PSEUDO_EXR_REGNUM && is_h8300smode (current_gdbarch))) | |
1017 | { | |
1018 | fprintf_filtered (file, "0x%02x ", (unsigned char) rval); | |
1019 | print_longest (file, 'u', 1, rval); | |
1020 | } | |
1021 | else | |
1022 | { | |
1023 | fprintf_filtered (file, "0x%s ", phex ((ULONGEST) rval, BINWORD)); | |
1024 | print_longest (file, 'd', 1, rval); | |
1025 | } | |
1026 | if (regno == E_PSEUDO_CCR_REGNUM) | |
1027 | { | |
1028 | /* CCR register */ | |
1029 | int C, Z, N, V; | |
1030 | unsigned char l = rval & 0xff; | |
1031 | fprintf_filtered (file, "\t"); | |
1032 | fprintf_filtered (file, "I-%d ", (l & 0x80) != 0); | |
1033 | fprintf_filtered (file, "UI-%d ", (l & 0x40) != 0); | |
1034 | fprintf_filtered (file, "H-%d ", (l & 0x20) != 0); | |
1035 | fprintf_filtered (file, "U-%d ", (l & 0x10) != 0); | |
1036 | N = (l & 0x8) != 0; | |
1037 | Z = (l & 0x4) != 0; | |
1038 | V = (l & 0x2) != 0; | |
1039 | C = (l & 0x1) != 0; | |
1040 | fprintf_filtered (file, "N-%d ", N); | |
1041 | fprintf_filtered (file, "Z-%d ", Z); | |
1042 | fprintf_filtered (file, "V-%d ", V); | |
1043 | fprintf_filtered (file, "C-%d ", C); | |
1044 | if ((C | Z) == 0) | |
1045 | fprintf_filtered (file, "u> "); | |
1046 | if ((C | Z) == 1) | |
1047 | fprintf_filtered (file, "u<= "); | |
1048 | if ((C == 0)) | |
1049 | fprintf_filtered (file, "u>= "); | |
1050 | if (C == 1) | |
1051 | fprintf_filtered (file, "u< "); | |
1052 | if (Z == 0) | |
1053 | fprintf_filtered (file, "!= "); | |
1054 | if (Z == 1) | |
1055 | fprintf_filtered (file, "== "); | |
1056 | if ((N ^ V) == 0) | |
1057 | fprintf_filtered (file, ">= "); | |
1058 | if ((N ^ V) == 1) | |
1059 | fprintf_filtered (file, "< "); | |
1060 | if ((Z | (N ^ V)) == 0) | |
1061 | fprintf_filtered (file, "> "); | |
1062 | if ((Z | (N ^ V)) == 1) | |
1063 | fprintf_filtered (file, "<= "); | |
1064 | } | |
1065 | else if (regno == E_PSEUDO_EXR_REGNUM && is_h8300smode (current_gdbarch)) | |
1066 | { | |
1067 | /* EXR register */ | |
1068 | unsigned char l = rval & 0xff; | |
1069 | fprintf_filtered (file, "\t"); | |
1070 | fprintf_filtered (file, "T-%d - - - ", (l & 0x80) != 0); | |
1071 | fprintf_filtered (file, "I2-%d ", (l & 4) != 0); | |
1072 | fprintf_filtered (file, "I1-%d ", (l & 2) != 0); | |
1073 | fprintf_filtered (file, "I0-%d", (l & 1) != 0); | |
1074 | } | |
1075 | fprintf_filtered (file, "\n"); | |
1076 | } | |
1077 | ||
1078 | static void | |
1079 | h8300_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file, | |
1080 | struct frame_info *frame, int regno, int cpregs) | |
1081 | { | |
1082 | if (regno < 0) | |
1083 | { | |
1084 | for (regno = E_R0_REGNUM; regno <= E_SP_REGNUM; ++regno) | |
1085 | h8300_print_register (gdbarch, file, frame, regno); | |
1086 | h8300_print_register (gdbarch, file, frame, E_PSEUDO_CCR_REGNUM); | |
1087 | h8300_print_register (gdbarch, file, frame, E_PC_REGNUM); | |
1088 | if (is_h8300smode (current_gdbarch)) | |
1089 | { | |
1090 | h8300_print_register (gdbarch, file, frame, E_PSEUDO_EXR_REGNUM); | |
1091 | if (is_h8300sxmode (current_gdbarch)) | |
1092 | { | |
1093 | h8300_print_register (gdbarch, file, frame, E_SBR_REGNUM); | |
1094 | h8300_print_register (gdbarch, file, frame, E_VBR_REGNUM); | |
1095 | } | |
1096 | h8300_print_register (gdbarch, file, frame, E_MACH_REGNUM); | |
1097 | h8300_print_register (gdbarch, file, frame, E_MACL_REGNUM); | |
1098 | h8300_print_register (gdbarch, file, frame, E_CYCLES_REGNUM); | |
1099 | h8300_print_register (gdbarch, file, frame, E_TICKS_REGNUM); | |
1100 | h8300_print_register (gdbarch, file, frame, E_INSTS_REGNUM); | |
1101 | } | |
1102 | else | |
1103 | { | |
1104 | h8300_print_register (gdbarch, file, frame, E_CYCLES_REGNUM); | |
1105 | h8300_print_register (gdbarch, file, frame, E_TICK_REGNUM); | |
1106 | h8300_print_register (gdbarch, file, frame, E_INST_REGNUM); | |
1107 | } | |
1108 | } | |
1109 | else | |
1110 | { | |
1111 | if (regno == E_CCR_REGNUM) | |
1112 | h8300_print_register (gdbarch, file, frame, E_PSEUDO_CCR_REGNUM); | |
1113 | else if (regno == E_PSEUDO_EXR_REGNUM | |
1114 | && is_h8300smode (current_gdbarch)) | |
1115 | h8300_print_register (gdbarch, file, frame, E_PSEUDO_EXR_REGNUM); | |
1116 | else | |
1117 | h8300_print_register (gdbarch, file, frame, regno); | |
1118 | } | |
1119 | } | |
1120 | ||
1121 | static struct type * | |
1122 | h8300_register_type (struct gdbarch *gdbarch, int regno) | |
1123 | { | |
f57d151a UW |
1124 | if (regno < 0 || regno >= gdbarch_num_regs (current_gdbarch) |
1125 | + gdbarch_num_pseudo_regs (current_gdbarch)) | |
f0bdd87d YS |
1126 | internal_error (__FILE__, __LINE__, |
1127 | "h8300_register_type: illegal register number %d", regno); | |
1128 | else | |
1129 | { | |
1130 | switch (regno) | |
1131 | { | |
1132 | case E_PC_REGNUM: | |
1133 | return builtin_type_void_func_ptr; | |
1134 | case E_SP_REGNUM: | |
1135 | case E_FP_REGNUM: | |
1136 | return builtin_type_void_data_ptr; | |
1137 | default: | |
1138 | if (regno == E_PSEUDO_CCR_REGNUM) | |
1139 | return builtin_type_uint8; | |
1140 | else if (regno == E_PSEUDO_EXR_REGNUM) | |
1141 | return builtin_type_uint8; | |
1142 | else if (is_h8300hmode (current_gdbarch)) | |
1143 | return builtin_type_int32; | |
1144 | else | |
1145 | return builtin_type_int16; | |
1146 | } | |
1147 | } | |
1148 | } | |
1149 | ||
1150 | static void | |
1151 | h8300_pseudo_register_read (struct gdbarch *gdbarch, | |
5d0d05b6 CV |
1152 | struct regcache *regcache, int regno, |
1153 | gdb_byte *buf) | |
f0bdd87d YS |
1154 | { |
1155 | if (regno == E_PSEUDO_CCR_REGNUM) | |
1156 | regcache_raw_read (regcache, E_CCR_REGNUM, buf); | |
1157 | else if (regno == E_PSEUDO_EXR_REGNUM) | |
1158 | regcache_raw_read (regcache, E_EXR_REGNUM, buf); | |
1159 | else | |
1160 | regcache_raw_read (regcache, regno, buf); | |
1161 | } | |
1162 | ||
1163 | static void | |
1164 | h8300_pseudo_register_write (struct gdbarch *gdbarch, | |
1165 | struct regcache *regcache, int regno, | |
5d0d05b6 | 1166 | const gdb_byte *buf) |
f0bdd87d YS |
1167 | { |
1168 | if (regno == E_PSEUDO_CCR_REGNUM) | |
1169 | regcache_raw_write (regcache, E_CCR_REGNUM, buf); | |
1170 | else if (regno == E_PSEUDO_EXR_REGNUM) | |
1171 | regcache_raw_write (regcache, E_EXR_REGNUM, buf); | |
1172 | else | |
1173 | regcache_raw_write (regcache, regno, buf); | |
1174 | } | |
1175 | ||
1176 | static int | |
1177 | h8300_dbg_reg_to_regnum (int regno) | |
1178 | { | |
1179 | if (regno == E_CCR_REGNUM) | |
1180 | return E_PSEUDO_CCR_REGNUM; | |
1181 | return regno; | |
1182 | } | |
1183 | ||
1184 | static int | |
1185 | h8300s_dbg_reg_to_regnum (int regno) | |
1186 | { | |
1187 | if (regno == E_CCR_REGNUM) | |
1188 | return E_PSEUDO_CCR_REGNUM; | |
1189 | if (regno == E_EXR_REGNUM) | |
1190 | return E_PSEUDO_EXR_REGNUM; | |
1191 | return regno; | |
1192 | } | |
1193 | ||
f0bdd87d YS |
1194 | const static unsigned char * |
1195 | h8300_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr) | |
1196 | { | |
1197 | /*static unsigned char breakpoint[] = { 0x7A, 0xFF }; *//* ??? */ | |
1198 | static unsigned char breakpoint[] = { 0x01, 0x80 }; /* Sleep */ | |
1199 | ||
1200 | *lenptr = sizeof (breakpoint); | |
1201 | return breakpoint; | |
1202 | } | |
1203 | ||
f0bdd87d YS |
1204 | static void |
1205 | h8300_print_float_info (struct gdbarch *gdbarch, struct ui_file *file, | |
1206 | struct frame_info *frame, const char *args) | |
1207 | { | |
1208 | fprintf_filtered (file, "\ | |
1209 | No floating-point info available for this processor.\n"); | |
1210 | } | |
1211 | ||
1212 | static struct gdbarch * | |
1213 | h8300_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | |
1214 | { | |
1215 | struct gdbarch_tdep *tdep = NULL; | |
1216 | struct gdbarch *gdbarch; | |
1217 | ||
1218 | arches = gdbarch_list_lookup_by_info (arches, &info); | |
1219 | if (arches != NULL) | |
1220 | return arches->gdbarch; | |
1221 | ||
1222 | #if 0 | |
1223 | tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep)); | |
1224 | #endif | |
1225 | ||
1226 | if (info.bfd_arch_info->arch != bfd_arch_h8300) | |
1227 | return NULL; | |
1228 | ||
1229 | gdbarch = gdbarch_alloc (&info, 0); | |
1230 | ||
1231 | switch (info.bfd_arch_info->mach) | |
1232 | { | |
1233 | case bfd_mach_h8300: | |
1234 | set_gdbarch_num_regs (gdbarch, 13); | |
1235 | set_gdbarch_num_pseudo_regs (gdbarch, 1); | |
1236 | set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum); | |
1237 | set_gdbarch_dwarf_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum); | |
1238 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum); | |
1239 | set_gdbarch_stab_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum); | |
1240 | set_gdbarch_register_name (gdbarch, h8300_register_name); | |
1241 | set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT); | |
1242 | set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT); | |
862ba188 | 1243 | set_gdbarch_return_value (gdbarch, h8300_return_value); |
f0bdd87d YS |
1244 | set_gdbarch_print_insn (gdbarch, print_insn_h8300); |
1245 | break; | |
1246 | case bfd_mach_h8300h: | |
1247 | case bfd_mach_h8300hn: | |
1248 | set_gdbarch_num_regs (gdbarch, 13); | |
1249 | set_gdbarch_num_pseudo_regs (gdbarch, 1); | |
1250 | set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum); | |
1251 | set_gdbarch_dwarf_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum); | |
1252 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum); | |
1253 | set_gdbarch_stab_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum); | |
1254 | set_gdbarch_register_name (gdbarch, h8300_register_name); | |
1255 | if (info.bfd_arch_info->mach != bfd_mach_h8300hn) | |
1256 | { | |
1257 | set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
1258 | set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
1259 | } | |
1260 | else | |
1261 | { | |
1262 | set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT); | |
1263 | set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT); | |
1264 | } | |
862ba188 | 1265 | set_gdbarch_return_value (gdbarch, h8300h_return_value); |
f0bdd87d YS |
1266 | set_gdbarch_print_insn (gdbarch, print_insn_h8300h); |
1267 | break; | |
1268 | case bfd_mach_h8300s: | |
1269 | case bfd_mach_h8300sn: | |
1270 | set_gdbarch_num_regs (gdbarch, 16); | |
1271 | set_gdbarch_num_pseudo_regs (gdbarch, 2); | |
1272 | set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum); | |
1273 | set_gdbarch_dwarf_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum); | |
1274 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum); | |
1275 | set_gdbarch_stab_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum); | |
1276 | set_gdbarch_register_name (gdbarch, h8300s_register_name); | |
1277 | if (info.bfd_arch_info->mach != bfd_mach_h8300sn) | |
1278 | { | |
1279 | set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
1280 | set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
1281 | } | |
1282 | else | |
1283 | { | |
1284 | set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT); | |
1285 | set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT); | |
1286 | } | |
862ba188 | 1287 | set_gdbarch_return_value (gdbarch, h8300h_return_value); |
f0bdd87d YS |
1288 | set_gdbarch_print_insn (gdbarch, print_insn_h8300s); |
1289 | break; | |
1290 | case bfd_mach_h8300sx: | |
1291 | case bfd_mach_h8300sxn: | |
1292 | set_gdbarch_num_regs (gdbarch, 18); | |
1293 | set_gdbarch_num_pseudo_regs (gdbarch, 2); | |
1294 | set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum); | |
1295 | set_gdbarch_dwarf_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum); | |
1296 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum); | |
1297 | set_gdbarch_stab_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum); | |
1298 | set_gdbarch_register_name (gdbarch, h8300sx_register_name); | |
1299 | if (info.bfd_arch_info->mach != bfd_mach_h8300sxn) | |
1300 | { | |
1301 | set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
1302 | set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
1303 | } | |
1304 | else | |
1305 | { | |
1306 | set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT); | |
1307 | set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT); | |
1308 | } | |
862ba188 | 1309 | set_gdbarch_return_value (gdbarch, h8300h_return_value); |
f0bdd87d YS |
1310 | set_gdbarch_print_insn (gdbarch, print_insn_h8300s); |
1311 | break; | |
1312 | } | |
1313 | ||
1314 | set_gdbarch_pseudo_register_read (gdbarch, h8300_pseudo_register_read); | |
1315 | set_gdbarch_pseudo_register_write (gdbarch, h8300_pseudo_register_write); | |
1316 | ||
1317 | /* | |
1318 | * Basic register fields and methods. | |
1319 | */ | |
1320 | ||
1321 | set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM); | |
f0bdd87d YS |
1322 | set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM); |
1323 | set_gdbarch_register_type (gdbarch, h8300_register_type); | |
1324 | set_gdbarch_print_registers_info (gdbarch, h8300_print_registers_info); | |
1325 | set_gdbarch_print_float_info (gdbarch, h8300_print_float_info); | |
1326 | ||
1327 | /* | |
1328 | * Frame Info | |
1329 | */ | |
1330 | set_gdbarch_skip_prologue (gdbarch, h8300_skip_prologue); | |
1331 | ||
1332 | /* Frame unwinder. */ | |
f0bdd87d | 1333 | set_gdbarch_unwind_pc (gdbarch, h8300_unwind_pc); |
862ba188 CV |
1334 | set_gdbarch_unwind_sp (gdbarch, h8300_unwind_sp); |
1335 | set_gdbarch_unwind_dummy_id (gdbarch, h8300_unwind_dummy_id); | |
1336 | frame_base_set_default (gdbarch, &h8300_frame_base); | |
f0bdd87d YS |
1337 | |
1338 | /* | |
1339 | * Miscelany | |
1340 | */ | |
1341 | /* Stack grows up. */ | |
1342 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
1343 | ||
f0bdd87d | 1344 | set_gdbarch_breakpoint_from_pc (gdbarch, h8300_breakpoint_from_pc); |
f0bdd87d YS |
1345 | set_gdbarch_push_dummy_call (gdbarch, h8300_push_dummy_call); |
1346 | ||
862ba188 | 1347 | set_gdbarch_char_signed (gdbarch, 0); |
f0bdd87d YS |
1348 | set_gdbarch_int_bit (gdbarch, 2 * TARGET_CHAR_BIT); |
1349 | set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
1350 | set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT); | |
1351 | set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
1352 | set_gdbarch_long_double_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
1353 | ||
1354 | set_gdbarch_believe_pcc_promotion (gdbarch, 1); | |
1355 | ||
862ba188 CV |
1356 | /* Hook in the DWARF CFI frame unwinder. */ |
1357 | frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer); | |
f0bdd87d YS |
1358 | frame_unwind_append_sniffer (gdbarch, h8300_frame_sniffer); |
1359 | ||
1360 | return gdbarch; | |
1361 | ||
1362 | } | |
1363 | ||
1364 | extern initialize_file_ftype _initialize_h8300_tdep; /* -Wmissing-prototypes */ | |
1365 | ||
1366 | void | |
1367 | _initialize_h8300_tdep (void) | |
1368 | { | |
1369 | register_gdbarch_init (bfd_arch_h8300, h8300_gdbarch_init); | |
1370 | } | |
1371 | ||
1372 | static int | |
1373 | is_h8300hmode (struct gdbarch *gdbarch) | |
1374 | { | |
1375 | return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx | |
1376 | || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn | |
1377 | || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300s | |
1378 | || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn | |
1379 | || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300h | |
1380 | || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300hn; | |
1381 | } | |
1382 | ||
1383 | static int | |
1384 | is_h8300smode (struct gdbarch *gdbarch) | |
1385 | { | |
1386 | return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx | |
1387 | || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn | |
1388 | || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300s | |
1389 | || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn; | |
1390 | } | |
1391 | ||
1392 | static int | |
1393 | is_h8300sxmode (struct gdbarch *gdbarch) | |
1394 | { | |
1395 | return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx | |
1396 | || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn; | |
1397 | } | |
1398 | ||
1399 | static int | |
1400 | is_h8300_normal_mode (struct gdbarch *gdbarch) | |
1401 | { | |
1402 | return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn | |
1403 | || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn | |
1404 | || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300hn; | |
1405 | } |