* v850-tdep.c (v850_generic_reg_names, v850e_reg_names,
[deliverable/binutils-gdb.git] / gdb / h8300-tdep.c
CommitLineData
1f46923f
SC
1/* Target-machine dependent code for Hitachi H8/300, for GDB.
2 Copyright (C) 1988, 1990, 1991 Free Software Foundation, Inc.
3
4This file is part of GDB.
5
6This program is free software; you can redistribute it and/or modify
7it under the terms of the GNU General Public License as published by
8the Free Software Foundation; either version 2 of the License, or
9(at your option) any later version.
10
11This program is distributed in the hope that it will be useful,
12but WITHOUT ANY WARRANTY; without even the implied warranty of
13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14GNU General Public License for more details.
15
16You should have received a copy of the GNU General Public License
17along with this program; if not, write to the Free Software
6c9638b4 18Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
1f46923f 19
ec25d19b 20/*
1f46923f 21 Contributed by Steve Chamberlain
ec25d19b 22 sac@cygnus.com
1f46923f
SC
23 */
24
400943fb 25#include "defs.h"
1f46923f
SC
26#include "frame.h"
27#include "obstack.h"
28#include "symtab.h"
7f4c8595 29#include "dis-asm.h"
a3059251
SC
30#include "gdbcmd.h"
31#include "gdbtypes.h"
f9fedc48
MA
32#include "gdbcore.h"
33#include "gdb_string.h"
34#include "value.h"
35
dc1b349d 36extern int h8300hmode, h8300smode;
a3059251 37
256b4f37
SC
38#undef NUM_REGS
39#define NUM_REGS 11
40
1f46923f 41#define UNSIGNED_SHORT(X) ((X) & 0xffff)
400943fb 42
31778db0 43#define IS_PUSH(x) ((x & 0xfff0)==0x6df0)
ec25d19b 44#define IS_PUSH_FP(x) (x == 0x6df6)
31778db0
JL
45#define IS_MOVE_FP(x) (x == 0x0d76 || x == 0x0ff6)
46#define IS_MOV_SP_FP(x) (x == 0x0d76 || x == 0x0ff6)
1f46923f 47#define IS_SUB2_SP(x) (x==0x1b87)
31778db0
JL
48#define IS_SUB4_SP(x) (x==0x1b97)
49#define IS_SUBL_SP(x) (x==0x7a37)
1f46923f 50#define IS_MOVK_R5(x) (x==0x7905)
ec25d19b 51#define IS_SUB_R5SP(x) (x==0x1957)
1ca9e7c9 52
7363ff90
MA
53
54/* The register names change depending on whether the h8300h processor
55 type is selected. */
56
57static char *original_register_names[] = REGISTER_NAMES;
58
59static char *h8300h_register_names[] =
60 {"er0", "er1", "er2", "er3", "er4", "er5", "er6",
61 "sp", "ccr","pc","cycles","tick","inst" };
62
63char **h8300_register_names = original_register_names;
64
65
f9fedc48
MA
66/* Local function declarations. */
67
1ca9e7c9 68static CORE_ADDR examine_prologue ();
f9fedc48 69static void set_machine_hook PARAMS ((char *filename));
1f46923f 70
dc1b349d
MS
71void h8300_frame_find_saved_regs ();
72
ec25d19b
SC
73CORE_ADDR
74h8300_skip_prologue (start_pc)
75 CORE_ADDR start_pc;
0a8f9d31 76{
ec25d19b 77 short int w;
31778db0 78 int adjust = 0;
1f46923f 79
4679717d
JL
80 /* Skip past all push and stm insns. */
81 while (1)
31778db0 82 {
4679717d
JL
83 w = read_memory_unsigned_integer (start_pc, 2);
84 /* First look for push insns. */
85 if (w == 0x0100 || w == 0x0110 || w == 0x0120 || w == 0x0130)
86 {
87 w = read_memory_unsigned_integer (start_pc + 2, 2);
88 adjust = 2;
89 }
90
91 if (IS_PUSH (w))
92 {
93 start_pc += 2 + adjust;
94 w = read_memory_unsigned_integer (start_pc, 2);
95 continue;
96 }
97 adjust = 0;
98 break;
31778db0
JL
99 }
100
4679717d
JL
101 /* Skip past a move to FP, either word or long sized */
102 w = read_memory_unsigned_integer (start_pc, 2);
103 if (w == 0x0100)
ec25d19b 104 {
4679717d
JL
105 w = read_memory_unsigned_integer (start_pc + 2, 2);
106 adjust += 2;
ec25d19b 107 }
0a8f9d31 108
ec25d19b
SC
109 if (IS_MOVE_FP (w))
110 {
4679717d 111 start_pc += 2 + adjust;
df14b38b 112 w = read_memory_unsigned_integer (start_pc, 2);
1f46923f
SC
113 }
114
4679717d
JL
115 /* Check for loading either a word constant into r5;
116 long versions are handled by the SUBL_SP below. */
ec25d19b
SC
117 if (IS_MOVK_R5 (w))
118 {
119 start_pc += 2;
df14b38b 120 w = read_memory_unsigned_integer (start_pc, 2);
ec25d19b 121 }
4679717d
JL
122
123 /* Now check for subtracting r5 from sp, word sized only. */
ec25d19b
SC
124 if (IS_SUB_R5SP (w))
125 {
4679717d 126 start_pc += 2 + adjust;
df14b38b 127 w = read_memory_unsigned_integer (start_pc, 2);
ec25d19b 128 }
4679717d
JL
129
130 /* Check for subs #2 and subs #4. */
31778db0 131 while (IS_SUB2_SP (w) || IS_SUB4_SP (w))
ec25d19b 132 {
4679717d 133 start_pc += 2 + adjust;
df14b38b 134 w = read_memory_unsigned_integer (start_pc, 2);
ec25d19b
SC
135 }
136
4679717d 137 /* Check for a 32bit subtract. */
31778db0 138 if (IS_SUBL_SP (w))
4679717d 139 start_pc += 6 + adjust;
31778db0 140
ec25d19b 141 return start_pc;
ec25d19b 142}
1f46923f 143
400943fb 144int
18b46e7c
SS
145gdb_print_insn_h8300 (memaddr, info)
146 bfd_vma memaddr;
147 disassemble_info *info;
0a8f9d31 148{
d15396df
JL
149 if (h8300smode)
150 return print_insn_h8300s (memaddr, info);
239889fd 151 else if (h8300hmode)
5076ecd0 152 return print_insn_h8300h (memaddr, info);
d0414a11 153 else
5076ecd0 154 return print_insn_h8300 (memaddr, info);
0a8f9d31 155}
ec25d19b 156
1f46923f
SC
157/* Given a GDB frame, determine the address of the calling function's frame.
158 This will be used to create a new GDB frame struct, and then
159 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
160
161 For us, the frame address is its stack pointer value, so we look up
162 the function prologue to determine the caller's sp value, and return it. */
163
669caa9c
SS
164CORE_ADDR
165h8300_frame_chain (thisframe)
166 struct frame_info *thisframe;
1f46923f 167{
dc1b349d
MS
168 if (PC_IN_CALL_DUMMY(thisframe->pc, thisframe->frame, thisframe->frame))
169 { /* initialize the from_pc now */
170 thisframe->from_pc = generic_read_register_dummy (thisframe->pc,
171 thisframe->frame,
172 PC_REGNUM);
173 return thisframe->frame;
174 }
175 h8300_frame_find_saved_regs (thisframe, (struct frame_saved_regs *) 0);
ec25d19b 176 return thisframe->fsr->regs[SP_REGNUM];
1f46923f
SC
177}
178
1f46923f
SC
179/* Put here the code to store, into a struct frame_saved_regs,
180 the addresses of the saved registers of frame described by FRAME_INFO.
181 This includes special registers such as pc and fp saved in special
182 ways in the stack frame. sp is even more special:
183 the address we return for it IS the sp for the next frame.
184
86a51f41
AC
185 We cache the result of doing this in the frame_obstack, since it is
186 fairly expensive. */
1f46923f
SC
187
188void
dc1b349d 189h8300_frame_find_saved_regs (fi, fsr)
1f46923f
SC
190 struct frame_info *fi;
191 struct frame_saved_regs *fsr;
192{
1f46923f 193 register struct frame_saved_regs *cache_fsr;
1f46923f
SC
194 CORE_ADDR ip;
195 struct symtab_and_line sal;
196 CORE_ADDR limit;
197
198 if (!fi->fsr)
199 {
200 cache_fsr = (struct frame_saved_regs *)
86a51f41 201 frame_obstack_alloc (sizeof (struct frame_saved_regs));
4ed97c9a 202 memset (cache_fsr, '\0', sizeof (struct frame_saved_regs));
ec25d19b 203
1f46923f
SC
204 fi->fsr = cache_fsr;
205
dc1b349d
MS
206 if (PC_IN_CALL_DUMMY(fi->pc, fi->frame, fi->frame))
207 { /* no more to do. */
208 if (fsr)
209 *fsr = *fi->fsr;
210 return;
211 }
1f46923f
SC
212 /* Find the start and end of the function prologue. If the PC
213 is in the function prologue, we only consider the part that
214 has executed already. */
ec25d19b 215
1f46923f
SC
216 ip = get_pc_function_start (fi->pc);
217 sal = find_pc_line (ip, 0);
ec25d19b 218 limit = (sal.end && sal.end < fi->pc) ? sal.end : fi->pc;
1f46923f
SC
219
220 /* This will fill in fields in *fi as well as in cache_fsr. */
221 examine_prologue (ip, limit, fi->frame, cache_fsr, fi);
222 }
223
224 if (fsr)
225 *fsr = *fi->fsr;
226}
1f46923f
SC
227
228/* Fetch the instruction at ADDR, returning 0 if ADDR is beyond LIM or
229 is not the address of a valid instruction, the address of the next
230 instruction beyond ADDR otherwise. *PWORD1 receives the first word
231 of the instruction.*/
232
1f46923f 233CORE_ADDR
ec25d19b
SC
234NEXT_PROLOGUE_INSN (addr, lim, pword1)
235 CORE_ADDR addr;
236 CORE_ADDR lim;
58e49e21 237 INSN_WORD *pword1;
1f46923f 238{
34df79fc 239 char buf[2];
ec25d19b
SC
240 if (addr < lim + 8)
241 {
34df79fc
JK
242 read_memory (addr, buf, 2);
243 *pword1 = extract_signed_integer (buf, 2);
1f46923f 244
ec25d19b
SC
245 return addr + 2;
246 }
1f46923f 247 return 0;
1f46923f
SC
248}
249
250/* Examine the prologue of a function. `ip' points to the first instruction.
ec25d19b 251 `limit' is the limit of the prologue (e.g. the addr of the first
1f46923f 252 linenumber, or perhaps the program counter if we're stepping through).
ec25d19b 253 `frame_sp' is the stack pointer value in use in this frame.
1f46923f 254 `fsr' is a pointer to a frame_saved_regs structure into which we put
ec25d19b 255 info about the registers saved by this frame.
1f46923f
SC
256 `fi' is a struct frame_info pointer; we fill in various fields in it
257 to reflect the offsets of the arg pointer and the locals pointer. */
258
1f46923f
SC
259static CORE_ADDR
260examine_prologue (ip, limit, after_prolog_fp, fsr, fi)
261 register CORE_ADDR ip;
262 register CORE_ADDR limit;
669caa9c 263 CORE_ADDR after_prolog_fp;
1f46923f
SC
264 struct frame_saved_regs *fsr;
265 struct frame_info *fi;
266{
267 register CORE_ADDR next_ip;
268 int r;
1f46923f 269 int have_fp = 0;
1f46923f 270 INSN_WORD insn_word;
d0414a11
DE
271 /* Number of things pushed onto stack, starts at 2/4, 'cause the
272 PC is already there */
a3059251 273 unsigned int reg_save_depth = h8300hmode ? 4 : 2;
1f46923f
SC
274
275 unsigned int auto_depth = 0; /* Number of bytes of autos */
1f46923f 276
ddf30c37 277 char in_frame[11]; /* One for each reg */
1f46923f 278
31778db0
JL
279 int adjust = 0;
280
ddf30c37 281 memset (in_frame, 1, 11);
256b4f37 282 for (r = 0; r < 8; r++)
ec25d19b
SC
283 {
284 fsr->regs[r] = 0;
285 }
286 if (after_prolog_fp == 0)
287 {
288 after_prolog_fp = read_register (SP_REGNUM);
289 }
4679717d
JL
290
291 /* If the PC isn't valid, quit now. */
31778db0 292 if (ip == 0 || ip & (h8300hmode ? ~0xffffff : ~0xffff))
ec25d19b 293 return 0;
1f46923f 294
ec25d19b 295 next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn_word);
1f46923f 296
31778db0
JL
297 if (insn_word == 0x0100)
298 {
299 insn_word = read_memory_unsigned_integer (ip + 2, 2);
300 adjust = 2;
301 }
302
ec25d19b
SC
303 /* Skip over any fp push instructions */
304 fsr->regs[6] = after_prolog_fp;
305 while (next_ip && IS_PUSH_FP (insn_word))
306 {
31778db0 307 ip = next_ip + adjust;
1f46923f 308
ec25d19b
SC
309 in_frame[insn_word & 0x7] = reg_save_depth;
310 next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn_word);
31778db0 311 reg_save_depth += 2 + adjust;
ec25d19b 312 }
1f46923f
SC
313
314 /* Is this a move into the fp */
ec25d19b
SC
315 if (next_ip && IS_MOV_SP_FP (insn_word))
316 {
317 ip = next_ip;
318 next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn_word);
319 have_fp = 1;
320 }
1f46923f
SC
321
322 /* Skip over any stack adjustment, happens either with a number of
323 sub#2,sp or a mov #x,r5 sub r5,sp */
324
31778db0 325 if (next_ip && (IS_SUB2_SP (insn_word) || IS_SUB4_SP (insn_word)))
1f46923f 326 {
31778db0 327 while (next_ip && (IS_SUB2_SP (insn_word) || IS_SUB4_SP (insn_word)))
ec25d19b 328 {
31778db0 329 auto_depth += IS_SUB2_SP (insn_word) ? 2 : 4;
ec25d19b
SC
330 ip = next_ip;
331 next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn_word);
332 }
1f46923f 333 }
ec25d19b
SC
334 else
335 {
336 if (next_ip && IS_MOVK_R5 (insn_word))
337 {
338 ip = next_ip;
339 next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn_word);
340 auto_depth += insn_word;
341
342 next_ip = NEXT_PROLOGUE_INSN (next_ip, limit, &insn_word);
343 auto_depth += insn_word;
ec25d19b 344 }
31778db0
JL
345 if (next_ip && IS_SUBL_SP (insn_word))
346 {
347 ip = next_ip;
348 auto_depth += read_memory_unsigned_integer (ip, 4);
349 ip += 4;
350
351 next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn_word);
352 }
ec25d19b 353 }
31778db0 354
4679717d
JL
355 /* Now examine the push insns to determine where everything lives
356 on the stack. */
357 while (1)
1f46923f 358 {
4679717d
JL
359 adjust = 0;
360 if (!next_ip)
361 break;
362
363 if (insn_word == 0x0100)
364 {
365 ip = next_ip;
366 next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn_word);
367 adjust = 2;
368 }
369
370 if (IS_PUSH (insn_word))
371 {
372 ip = next_ip;
373 next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn_word);
374 fsr->regs[r] = after_prolog_fp + auto_depth;
375 auto_depth += 2 + adjust;
376 continue;
377 }
378
379 /* Now check for push multiple insns. */
380 if (insn_word == 0x0110 || insn_word == 0x0120 || insn_word == 0x0130)
381 {
382 int count = ((insn_word >> 4) & 0xf) + 1;
383 int start, i;
384
385 ip = next_ip;
386 next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn_word);
387 start = insn_word & 0x7;
388
389 for (i = start; i <= start + count; i++)
390 {
391 fsr->regs[i] = after_prolog_fp + auto_depth;
392 auto_depth += 4;
393 }
394 }
395 break;
1f46923f 396 }
1f46923f 397
1f46923f 398 /* The args are always reffed based from the stack pointer */
ec25d19b 399 fi->args_pointer = after_prolog_fp;
1f46923f 400 /* Locals are always reffed based from the fp */
ec25d19b 401 fi->locals_pointer = after_prolog_fp;
1f46923f 402 /* The PC is at a known place */
31778db0 403 fi->from_pc = read_memory_unsigned_integer (after_prolog_fp + BINWORD, BINWORD);
1f46923f
SC
404
405 /* Rememeber any others too */
1f46923f 406 in_frame[PC_REGNUM] = 0;
dc1b349d 407
ec25d19b
SC
408 if (have_fp)
409 /* We keep the old FP in the SP spot */
b1d0b161 410 fsr->regs[SP_REGNUM] = read_memory_unsigned_integer (fsr->regs[6], BINWORD);
ec25d19b
SC
411 else
412 fsr->regs[SP_REGNUM] = after_prolog_fp + auto_depth;
413
1f46923f
SC
414 return (ip);
415}
416
417void
dc1b349d 418h8300_init_extra_frame_info (fromleaf, fi)
1f46923f
SC
419 int fromleaf;
420 struct frame_info *fi;
421{
422 fi->fsr = 0; /* Not yet allocated */
423 fi->args_pointer = 0; /* Unknown */
424 fi->locals_pointer = 0; /* Unknown */
425 fi->from_pc = 0;
dc1b349d
MS
426 if (PC_IN_CALL_DUMMY(fi->pc, fi->frame, fi->frame))
427 { /* anything special to do? */
428 return;
429 }
1f46923f 430}
ec25d19b 431
1f46923f
SC
432/* Return the saved PC from this frame.
433
434 If the frame has a memory copy of SRP_REGNUM, use that. If not,
435 just use the register SRP_REGNUM itself. */
436
437CORE_ADDR
dc1b349d 438h8300_frame_saved_pc (frame)
669caa9c 439 struct frame_info *frame;
1f46923f 440{
dc1b349d
MS
441 if (PC_IN_CALL_DUMMY(frame->pc, frame->frame, frame->frame))
442 return generic_read_register_dummy (frame->pc, frame->frame, PC_REGNUM);
443 else
444 return frame->from_pc;
1f46923f
SC
445}
446
1f46923f
SC
447CORE_ADDR
448frame_locals_address (fi)
449 struct frame_info *fi;
450{
dc1b349d
MS
451 if (PC_IN_CALL_DUMMY(fi->pc, fi->frame, fi->frame))
452 return (CORE_ADDR) 0; /* Not sure what else to do... */
ec25d19b
SC
453 if (!fi->locals_pointer)
454 {
455 struct frame_saved_regs ignore;
456
457 get_frame_saved_regs (fi, &ignore);
1f46923f 458
ec25d19b 459 }
1f46923f
SC
460 return fi->locals_pointer;
461}
462
463/* Return the address of the argument block for the frame
464 described by FI. Returns 0 if the address is unknown. */
465
466CORE_ADDR
467frame_args_address (fi)
468 struct frame_info *fi;
469{
dc1b349d
MS
470 if (PC_IN_CALL_DUMMY(fi->pc, fi->frame, fi->frame))
471 return (CORE_ADDR) 0; /* Not sure what else to do... */
ec25d19b
SC
472 if (!fi->args_pointer)
473 {
474 struct frame_saved_regs ignore;
475
476 get_frame_saved_regs (fi, &ignore);
477
478 }
1f46923f 479
1f46923f
SC
480 return fi->args_pointer;
481}
482
dc1b349d
MS
483/* Function: push_arguments
484 Setup the function arguments for calling a function in the inferior.
485
486 On the Hitachi H8/300 architecture, there are three registers (R0 to R2)
487 which are dedicated for passing function arguments. Up to the first
488 three arguments (depending on size) may go into these registers.
489 The rest go on the stack.
490
491 Arguments that are smaller than WORDSIZE bytes will still take up a
492 whole register or a whole WORDSIZE word on the stack, and will be
493 right-justified in the register or the stack word. This includes
494 chars and small aggregate types. Note that WORDSIZE depends on the
495 cpu type.
496
497 Arguments that are larger than WORDSIZE bytes will be split between
498 two or more registers as available, but will NOT be split between a
499 register and the stack.
500
501 An exceptional case exists for struct arguments (and possibly other
502 aggregates such as arrays) -- if the size is larger than WORDSIZE
503 bytes but not a multiple of WORDSIZE bytes. In this case the
504 argument is never split between the registers and the stack, but
505 instead is copied in its entirety onto the stack, AND also copied
506 into as many registers as there is room for. In other words, space
507 in registers permitting, two copies of the same argument are passed
508 in. As far as I can tell, only the one on the stack is used,
509 although that may be a function of the level of compiler
510 optimization. I suspect this is a compiler bug. Arguments of
511 these odd sizes are left-justified within the word (as opposed to
512 arguments smaller than WORDSIZE bytes, which are right-justified).
513
514 If the function is to return an aggregate type such as a struct,
515 the caller must allocate space into which the callee will copy the
516 return value. In this case, a pointer to the return value location
517 is passed into the callee in register R0, which displaces one of
518 the other arguments passed in via registers R0 to R2. */
519
520CORE_ADDR
521h8300_push_arguments(nargs, args, sp, struct_return, struct_addr)
522 int nargs;
523 struct value **args;
524 CORE_ADDR sp;
525 unsigned char struct_return;
526 CORE_ADDR struct_addr;
527{
528 int stack_align, stack_alloc, stack_offset;
529 int wordsize;
530 int argreg;
531 int argnum;
532 struct type *type;
533 CORE_ADDR regval;
534 char *val;
535 char valbuf[4];
536 int len;
537
538 if (h8300hmode || h8300smode)
539 {
540 stack_align = 3;
541 wordsize = 4;
542 }
543 else
544 {
545 stack_align = 1;
546 wordsize = 2;
547 }
548
549 /* first force sp to a n-byte alignment */
550 sp = sp & ~stack_align;
551
552 /* Now make sure there's space on the stack */
553 for (argnum = 0, stack_alloc = 0;
554 argnum < nargs; argnum++)
555 stack_alloc += ((TYPE_LENGTH(VALUE_TYPE(args[argnum])) + stack_align)
556 & ~stack_align);
557 sp -= stack_alloc; /* make room on stack for args */
558 /* we may over-allocate a little here, but that won't hurt anything */
559
560 argreg = ARG0_REGNUM;
561 if (struct_return) /* "struct return" pointer takes up one argreg */
562 {
563 write_register (argreg++, struct_addr);
564 }
565
566 /* Now load as many as possible of the first arguments into
567 registers, and push the rest onto the stack. There are 3N bytes
568 in three registers available. Loop thru args from first to last. */
569
570 for (argnum = 0, stack_offset = 0; argnum < nargs; argnum++)
571 {
572 type = VALUE_TYPE (args[argnum]);
573 len = TYPE_LENGTH (type);
574 memset(valbuf, 0, sizeof(valbuf));
575 if (len < wordsize)
576 {
577 /* the purpose of this is to right-justify the value within the word */
578 memcpy(valbuf + (wordsize - len),
579 (char *) VALUE_CONTENTS (args[argnum]), len);
580 val = valbuf;
581 }
582 else
583 val = (char *) VALUE_CONTENTS (args[argnum]);
584
585 if (len > (ARGLAST_REGNUM+1 - argreg) * REGISTER_RAW_SIZE(ARG0_REGNUM) ||
586 (len > wordsize && (len & stack_align) != 0))
587 { /* passed on the stack */
588 write_memory (sp + stack_offset, val,
589 len < wordsize ? wordsize : len);
590 stack_offset += (len + stack_align) & ~stack_align;
591 }
592 /* NOTE WELL!!!!! This is not an "else if" clause!!!
593 That's because some *&^%$ things get passed on the stack
594 AND in the registers! */
595 if (len <= (ARGLAST_REGNUM+1 - argreg) * REGISTER_RAW_SIZE(ARG0_REGNUM))
596 while (len > 0)
597 { /* there's room in registers */
598 regval = extract_address (val, wordsize);
599 write_register (argreg, regval);
600 len -= wordsize;
601 val += wordsize;
602 argreg++;
603 }
604 }
605 return sp;
606}
607
608/* Function: push_return_address
609 Setup the return address for a dummy frame, as called by
610 call_function_by_hand. Only necessary when you are using an
611 empty CALL_DUMMY, ie. the target will not actually be executing
612 a JSR/BSR instruction. */
613
614CORE_ADDR
615h8300_push_return_address (pc, sp)
616 CORE_ADDR pc;
617 CORE_ADDR sp;
618{
619 unsigned char buf[4];
620 int wordsize;
621
622 if (h8300hmode || h8300smode)
623 wordsize = 4;
624 else
625 wordsize = 2;
626
dc1b349d 627 sp -= wordsize;
409f64ae 628 store_unsigned_integer (buf, wordsize, CALL_DUMMY_ADDRESS ());
dc1b349d
MS
629 write_memory (sp, buf, wordsize);
630 return sp;
631}
632
633/* Function: pop_frame
634 Restore the machine to the state it had before the current frame
635 was created. Usually used either by the "RETURN" command, or by
636 call_function_by_hand after the dummy_frame is finished. */
637
ec25d19b
SC
638void
639h8300_pop_frame ()
1f46923f
SC
640{
641 unsigned regnum;
642 struct frame_saved_regs fsr;
669caa9c 643 struct frame_info *frame = get_current_frame ();
1f46923f 644
dc1b349d 645 if (PC_IN_CALL_DUMMY(frame->pc, frame->frame, frame->frame))
1f46923f 646 {
dc1b349d 647 generic_pop_dummy_frame();
1f46923f 648 }
dc1b349d
MS
649 else
650 {
651 get_frame_saved_regs (frame, &fsr);
6bafbdfb 652
dc1b349d
MS
653 for (regnum = 0; regnum < 8; regnum++)
654 {
655 /* Don't forget SP_REGNUM is a frame_saved_regs struct is the
656 actual value we want, not the address of the value we want. */
657 if (fsr.regs[regnum] && regnum != SP_REGNUM)
658 write_register (regnum,
659 read_memory_integer(fsr.regs[regnum], BINWORD));
660 else if (fsr.regs[regnum] && regnum == SP_REGNUM)
661 write_register (regnum, frame->frame + 2 * BINWORD);
662 }
663
664 /* Don't forget the update the PC too! */
665 write_pc (frame->from_pc);
666 }
6bafbdfb 667 flush_cached_frames ();
1f46923f 668}
ec25d19b 669
dc1b349d
MS
670/* Function: extract_return_value
671 Figure out where in REGBUF the called function has left its return value.
672 Copy that into VALBUF. Be sure to account for CPU type. */
673
674void
675h8300_extract_return_value (type, regbuf, valbuf)
676 struct type *type;
677 char *regbuf;
678 char *valbuf;
679{
680 int wordsize, len;
681
682 if (h8300smode || h8300hmode)
683 wordsize = 4;
684 else
685 wordsize = 2;
686
687 len = TYPE_LENGTH(type);
688
689 switch (len) {
690 case 1: /* (char) */
691 case 2: /* (short), (int) */
692 memcpy (valbuf, regbuf + REGISTER_BYTE(0) + (wordsize - len), len);
693 break;
694 case 4: /* (long), (float) */
695 if (h8300smode || h8300hmode)
696 {
697 memcpy (valbuf, regbuf + REGISTER_BYTE(0), 4);
698 }
699 else
700 {
701 memcpy (valbuf, regbuf + REGISTER_BYTE(0), 2);
702 memcpy (valbuf+2, regbuf + REGISTER_BYTE(1), 2);
703 }
704 break;
705 case 8: /* (double) (doesn't seem to happen, which is good,
706 because this almost certainly isn't right. */
707 error ("I don't know how a double is returned.");
708 break;
709 }
710}
711
712/* Function: store_return_value
713 Place the appropriate value in the appropriate registers.
714 Primarily used by the RETURN command. */
715
716void
717h8300_store_return_value (type, valbuf)
718 struct type *type;
719 char *valbuf;
720{
721 int wordsize, len, regval;
722
723 if (h8300hmode || h8300smode)
724 wordsize = 4;
725 else
726 wordsize = 2;
727
728 len = TYPE_LENGTH(type);
729 switch (len) {
730 case 1: /* char */
731 case 2: /* short, int */
732 regval = extract_address(valbuf, len);
733 write_register (0, regval);
734 break;
735 case 4: /* long, float */
736 regval = extract_address(valbuf, len);
737 if (h8300smode || h8300hmode)
738 {
739 write_register (0, regval);
740 }
741 else
742 {
743 write_register (0, regval >> 16);
744 write_register (1, regval & 0xffff);
745 }
746 break;
747 case 8: /* presumeably double, but doesn't seem to happen */
748 error ("I don't know how to return a double.");
749 break;
750 }
751}
752
753/* Function: get_saved_register
754 Just call the generic_get_saved_register function. */
755
756void
757get_saved_register (raw_buffer, optimized, addrp, frame, regnum, lval)
758 char *raw_buffer;
759 int *optimized;
760 CORE_ADDR *addrp;
761 struct frame_info *frame;
762 int regnum;
763 enum lval_type *lval;
764{
765 generic_get_saved_register (raw_buffer, optimized, addrp,
766 frame, regnum, lval);
767}
a3059251
SC
768
769struct cmd_list_element *setmemorylist;
770
7363ff90
MA
771static void
772set_register_names ()
773{
774 if (h8300hmode != 0)
775 h8300_register_names = h8300h_register_names;
776 else
777 h8300_register_names = original_register_names;
778}
779
a3059251
SC
780static void
781h8300_command(args, from_tty)
782{
783 extern int h8300hmode;
784 h8300hmode = 0;
d15396df 785 h8300smode = 0;
7363ff90 786 set_register_names ();
a3059251
SC
787}
788
789static void
790h8300h_command(args, from_tty)
791{
792 extern int h8300hmode;
793 h8300hmode = 1;
d15396df 794 h8300smode = 0;
7363ff90 795 set_register_names ();
d15396df 796}
7363ff90 797
d15396df
JL
798static void
799h8300s_command(args, from_tty)
800{
801 extern int h8300smode;
802 extern int h8300hmode;
803 h8300smode = 1;
804 h8300hmode = 1;
7363ff90 805 set_register_names ();
a3059251 806}
d15396df 807
a3059251
SC
808
809static void
810set_machine (args, from_tty)
811 char *args;
812 int from_tty;
813{
d15396df 814 printf_unfiltered ("\"set machine\" must be followed by h8300, h8300h");
d15396df 815 printf_unfiltered ("or h8300s");
199b2450 816 help_list (setmemorylist, "set memory ", -1, gdb_stdout);
a3059251
SC
817}
818
f9fedc48
MA
819/* set_machine_hook is called as the exec file is being opened, but
820 before the symbol file is opened. This allows us to set the
821 h8300hmode flag based on the machine type specified in the exec
822 file. This in turn will cause subsequently defined pointer types
823 to be 16 or 32 bits as appropriate for the machine. */
824
825static void
826set_machine_hook (filename)
827 char *filename;
828{
d15396df
JL
829 if (bfd_get_mach (exec_bfd) == bfd_mach_h8300s)
830 {
831 h8300smode = 1;
832 h8300hmode = 1;
833 }
834 else
d15396df
JL
835 if (bfd_get_mach (exec_bfd) == bfd_mach_h8300h)
836 {
d15396df 837 h8300smode = 0;
d15396df
JL
838 h8300hmode = 1;
839 }
840 else
841 {
d15396df 842 h8300smode = 0;
d15396df
JL
843 h8300hmode = 0;
844 }
7363ff90 845 set_register_names ();
f9fedc48
MA
846}
847
a3059251
SC
848void
849_initialize_h8300m ()
850{
851 add_prefix_cmd ("machine", no_class, set_machine,
dc1b349d
MS
852 "set the machine type",
853 &setmemorylist, "set machine ", 0,
a3059251
SC
854 &setlist);
855
856 add_cmd ("h8300", class_support, h8300_command,
857 "Set machine to be H8/300.", &setmemorylist);
858
859 add_cmd ("h8300h", class_support, h8300h_command,
860 "Set machine to be H8/300H.", &setmemorylist);
f9fedc48 861
d15396df
JL
862 add_cmd ("h8300s", class_support, h8300s_command,
863 "Set machine to be H8/300S.", &setmemorylist);
d15396df 864
f9fedc48
MA
865 /* Add a hook to set the machine type when we're loading a file. */
866
867 specify_exec_file_hook(set_machine_hook);
a3059251
SC
868}
869
870
871
ec25d19b
SC
872void
873print_register_hook (regno)
874{
875 if (regno == 8)
876 {
877 /* CCR register */
ec25d19b 878 int C, Z, N, V;
08c0d7b8 879 unsigned char b[4];
ec25d19b 880 unsigned char l;
ec25d19b 881 read_relative_register_raw_bytes (regno, b);
08c0d7b8 882 l = b[REGISTER_VIRTUAL_SIZE(8) -1];
199b2450
TL
883 printf_unfiltered ("\t");
884 printf_unfiltered ("I-%d - ", (l & 0x80) != 0);
885 printf_unfiltered ("H-%d - ", (l & 0x20) != 0);
ec25d19b
SC
886 N = (l & 0x8) != 0;
887 Z = (l & 0x4) != 0;
888 V = (l & 0x2) != 0;
889 C = (l & 0x1) != 0;
199b2450
TL
890 printf_unfiltered ("N-%d ", N);
891 printf_unfiltered ("Z-%d ", Z);
892 printf_unfiltered ("V-%d ", V);
893 printf_unfiltered ("C-%d ", C);
ec25d19b 894 if ((C | Z) == 0)
199b2450 895 printf_unfiltered ("u> ");
ec25d19b 896 if ((C | Z) == 1)
199b2450 897 printf_unfiltered ("u<= ");
ec25d19b 898 if ((C == 0))
199b2450 899 printf_unfiltered ("u>= ");
ec25d19b 900 if (C == 1)
199b2450 901 printf_unfiltered ("u< ");
ec25d19b 902 if (Z == 0)
199b2450 903 printf_unfiltered ("!= ");
ec25d19b 904 if (Z == 1)
199b2450 905 printf_unfiltered ("== ");
ec25d19b 906 if ((N ^ V) == 0)
199b2450 907 printf_unfiltered (">= ");
ec25d19b 908 if ((N ^ V) == 1)
199b2450 909 printf_unfiltered ("< ");
ec25d19b 910 if ((Z | (N ^ V)) == 0)
199b2450 911 printf_unfiltered ("> ");
ec25d19b 912 if ((Z | (N ^ V)) == 1)
199b2450 913 printf_unfiltered ("<= ");
ec25d19b
SC
914 }
915}
a3059251 916
18b46e7c
SS
917void
918_initialize_h8300_tdep ()
919{
920 tm_print_insn = gdb_print_insn_h8300;
921}
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