Commit | Line | Data |
---|---|---|
f0bdd87d YS |
1 | /* Target-machine dependent code for Renesas H8/300, for GDB. |
2 | ||
b811d2c2 | 3 | Copyright (C) 1988-2020 Free Software Foundation, Inc. |
f0bdd87d YS |
4 | |
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 9 | the Free Software Foundation; either version 3 of the License, or |
f0bdd87d YS |
10 | (at your option) any later version. |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
a9762ec7 | 18 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
f0bdd87d YS |
19 | |
20 | /* | |
21 | Contributed by Steve Chamberlain | |
22 | sac@cygnus.com | |
23 | */ | |
24 | ||
25 | #include "defs.h" | |
26 | #include "value.h" | |
f0bdd87d YS |
27 | #include "arch-utils.h" |
28 | #include "regcache.h" | |
29 | #include "gdbcore.h" | |
30 | #include "objfiles.h" | |
f0bdd87d | 31 | #include "dis-asm.h" |
82ca8957 | 32 | #include "dwarf2/frame.h" |
f0bdd87d YS |
33 | #include "frame-base.h" |
34 | #include "frame-unwind.h" | |
35 | ||
f0bdd87d YS |
36 | enum gdb_regnum |
37 | { | |
38 | E_R0_REGNUM, E_ER0_REGNUM = E_R0_REGNUM, E_ARG0_REGNUM = E_R0_REGNUM, | |
39 | E_RET0_REGNUM = E_R0_REGNUM, | |
40 | E_R1_REGNUM, E_ER1_REGNUM = E_R1_REGNUM, E_RET1_REGNUM = E_R1_REGNUM, | |
41 | E_R2_REGNUM, E_ER2_REGNUM = E_R2_REGNUM, E_ARGLAST_REGNUM = E_R2_REGNUM, | |
42 | E_R3_REGNUM, E_ER3_REGNUM = E_R3_REGNUM, | |
43 | E_R4_REGNUM, E_ER4_REGNUM = E_R4_REGNUM, | |
44 | E_R5_REGNUM, E_ER5_REGNUM = E_R5_REGNUM, | |
45 | E_R6_REGNUM, E_ER6_REGNUM = E_R6_REGNUM, E_FP_REGNUM = E_R6_REGNUM, | |
46 | E_SP_REGNUM, | |
47 | E_CCR_REGNUM, | |
48 | E_PC_REGNUM, | |
49 | E_CYCLES_REGNUM, | |
50 | E_TICK_REGNUM, E_EXR_REGNUM = E_TICK_REGNUM, | |
51 | E_INST_REGNUM, E_TICKS_REGNUM = E_INST_REGNUM, | |
52 | E_INSTS_REGNUM, | |
53 | E_MACH_REGNUM, | |
54 | E_MACL_REGNUM, | |
55 | E_SBR_REGNUM, | |
56 | E_VBR_REGNUM | |
57 | }; | |
58 | ||
59 | #define H8300_MAX_NUM_REGS 18 | |
60 | ||
be8626e0 MD |
61 | #define E_PSEUDO_CCR_REGNUM(gdbarch) (gdbarch_num_regs (gdbarch)) |
62 | #define E_PSEUDO_EXR_REGNUM(gdbarch) (gdbarch_num_regs (gdbarch)+1) | |
f0bdd87d | 63 | |
862ba188 CV |
64 | struct h8300_frame_cache |
65 | { | |
66 | /* Base address. */ | |
67 | CORE_ADDR base; | |
68 | CORE_ADDR sp_offset; | |
69 | CORE_ADDR pc; | |
70 | ||
1777feb0 | 71 | /* Flag showing that a frame has been created in the prologue code. */ |
862ba188 | 72 | int uses_fp; |
f0bdd87d | 73 | |
862ba188 CV |
74 | /* Saved registers. */ |
75 | CORE_ADDR saved_regs[H8300_MAX_NUM_REGS]; | |
76 | CORE_ADDR saved_sp; | |
77 | }; | |
78 | ||
79 | enum | |
80 | { | |
81 | h8300_reg_size = 2, | |
82 | h8300h_reg_size = 4, | |
83 | h8300_max_reg_size = 4, | |
84 | }; | |
85 | ||
86 | static int is_h8300hmode (struct gdbarch *gdbarch); | |
87 | static int is_h8300smode (struct gdbarch *gdbarch); | |
88 | static int is_h8300sxmode (struct gdbarch *gdbarch); | |
89 | static int is_h8300_normal_mode (struct gdbarch *gdbarch); | |
90 | ||
be8626e0 MD |
91 | #define BINWORD(gdbarch) ((is_h8300hmode (gdbarch) \ |
92 | && !is_h8300_normal_mode (gdbarch)) \ | |
862ba188 CV |
93 | ? h8300h_reg_size : h8300_reg_size) |
94 | ||
862ba188 CV |
95 | /* Normal frames. */ |
96 | ||
97 | /* Allocate and initialize a frame cache. */ | |
98 | ||
99 | static void | |
be8626e0 MD |
100 | h8300_init_frame_cache (struct gdbarch *gdbarch, |
101 | struct h8300_frame_cache *cache) | |
862ba188 CV |
102 | { |
103 | int i; | |
104 | ||
105 | /* Base address. */ | |
106 | cache->base = 0; | |
107 | cache->sp_offset = 0; | |
108 | cache->pc = 0; | |
109 | ||
110 | /* Frameless until proven otherwise. */ | |
111 | cache->uses_fp = 0; | |
112 | ||
113 | /* Saved registers. We initialize these to -1 since zero is a valid | |
114 | offset (that's where %fp is supposed to be stored). */ | |
be8626e0 | 115 | for (i = 0; i < gdbarch_num_regs (gdbarch); i++) |
862ba188 CV |
116 | cache->saved_regs[i] = -1; |
117 | } | |
118 | ||
119 | #define IS_MOVB_RnRm(x) (((x) & 0xff88) == 0x0c88) | |
120 | #define IS_MOVW_RnRm(x) (((x) & 0xff88) == 0x0d00) | |
121 | #define IS_MOVL_RnRm(x) (((x) & 0xff88) == 0x0f80) | |
122 | #define IS_MOVB_Rn16_SP(x) (((x) & 0xfff0) == 0x6ee0) | |
123 | #define IS_MOVB_EXT(x) ((x) == 0x7860) | |
124 | #define IS_MOVB_Rn24_SP(x) (((x) & 0xfff0) == 0x6aa0) | |
125 | #define IS_MOVW_Rn16_SP(x) (((x) & 0xfff0) == 0x6fe0) | |
126 | #define IS_MOVW_EXT(x) ((x) == 0x78e0) | |
127 | #define IS_MOVW_Rn24_SP(x) (((x) & 0xfff0) == 0x6ba0) | |
1777feb0 | 128 | /* Same instructions as mov.w, just prefixed with 0x0100. */ |
862ba188 CV |
129 | #define IS_MOVL_PRE(x) ((x) == 0x0100) |
130 | #define IS_MOVL_Rn16_SP(x) (((x) & 0xfff0) == 0x6fe0) | |
131 | #define IS_MOVL_EXT(x) ((x) == 0x78e0) | |
132 | #define IS_MOVL_Rn24_SP(x) (((x) & 0xfff0) == 0x6ba0) | |
133 | ||
134 | #define IS_PUSHFP_MOVESPFP(x) ((x) == 0x6df60d76) | |
135 | #define IS_PUSH_FP(x) ((x) == 0x01006df6) | |
136 | #define IS_MOV_SP_FP(x) ((x) == 0x0ff6) | |
137 | #define IS_SUB2_SP(x) ((x) == 0x1b87) | |
138 | #define IS_SUB4_SP(x) ((x) == 0x1b97) | |
139 | #define IS_ADD_IMM_SP(x) ((x) == 0x7a1f) | |
140 | #define IS_SUB_IMM_SP(x) ((x) == 0x7a3f) | |
141 | #define IS_SUBL4_SP(x) ((x) == 0x1acf) | |
142 | #define IS_MOV_IMM_Rn(x) (((x) & 0xfff0) == 0x7905) | |
143 | #define IS_SUB_RnSP(x) (((x) & 0xff0f) == 0x1907) | |
144 | #define IS_ADD_RnSP(x) (((x) & 0xff0f) == 0x0907) | |
145 | #define IS_PUSH(x) (((x) & 0xfff0) == 0x6df0) | |
f0bdd87d YS |
146 | |
147 | /* If the instruction at PC is an argument register spill, return its | |
148 | length. Otherwise, return zero. | |
149 | ||
150 | An argument register spill is an instruction that moves an argument | |
151 | from the register in which it was passed to the stack slot in which | |
152 | it really lives. It is a byte, word, or longword move from an | |
153 | argument register to a negative offset from the frame pointer. | |
154 | ||
155 | CV, 2003-06-16: Or, in optimized code or when the `register' qualifier | |
156 | is used, it could be a byte, word or long move to registers r3-r5. */ | |
157 | ||
158 | static int | |
e17a4113 | 159 | h8300_is_argument_spill (struct gdbarch *gdbarch, CORE_ADDR pc) |
f0bdd87d | 160 | { |
e17a4113 UW |
161 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
162 | int w = read_memory_unsigned_integer (pc, 2, byte_order); | |
f0bdd87d | 163 | |
862ba188 | 164 | if ((IS_MOVB_RnRm (w) || IS_MOVW_RnRm (w) || IS_MOVL_RnRm (w)) |
f0bdd87d YS |
165 | && (w & 0x70) <= 0x20 /* Rs is R0, R1 or R2 */ |
166 | && (w & 0x7) >= 0x3 && (w & 0x7) <= 0x5) /* Rd is R3, R4 or R5 */ | |
167 | return 2; | |
168 | ||
862ba188 | 169 | if (IS_MOVB_Rn16_SP (w) |
f0bdd87d YS |
170 | && 8 <= (w & 0xf) && (w & 0xf) <= 10) /* Rs is R0L, R1L, or R2L */ |
171 | { | |
e17a4113 UW |
172 | /* ... and d:16 is negative. */ |
173 | if (read_memory_integer (pc + 2, 2, byte_order) < 0) | |
f0bdd87d YS |
174 | return 4; |
175 | } | |
862ba188 | 176 | else if (IS_MOVB_EXT (w)) |
f0bdd87d | 177 | { |
e17a4113 UW |
178 | if (IS_MOVB_Rn24_SP (read_memory_unsigned_integer (pc + 2, |
179 | 2, byte_order))) | |
f0bdd87d | 180 | { |
1d6ce4d3 | 181 | ULONGEST disp = read_memory_unsigned_integer (pc + 4, 4, byte_order); |
f0bdd87d YS |
182 | |
183 | /* ... and d:24 is negative. */ | |
1d6ce4d3 | 184 | if ((disp & 0x00800000) != 0) |
f0bdd87d YS |
185 | return 8; |
186 | } | |
187 | } | |
862ba188 | 188 | else if (IS_MOVW_Rn16_SP (w) |
f0bdd87d YS |
189 | && (w & 0xf) <= 2) /* Rs is R0, R1, or R2 */ |
190 | { | |
f0bdd87d | 191 | /* ... and d:16 is negative. */ |
e17a4113 | 192 | if (read_memory_integer (pc + 2, 2, byte_order) < 0) |
f0bdd87d YS |
193 | return 4; |
194 | } | |
862ba188 | 195 | else if (IS_MOVW_EXT (w)) |
f0bdd87d | 196 | { |
e17a4113 UW |
197 | if (IS_MOVW_Rn24_SP (read_memory_unsigned_integer (pc + 2, |
198 | 2, byte_order))) | |
f0bdd87d | 199 | { |
1d6ce4d3 | 200 | ULONGEST disp = read_memory_unsigned_integer (pc + 4, 4, byte_order); |
f0bdd87d YS |
201 | |
202 | /* ... and d:24 is negative. */ | |
1d6ce4d3 | 203 | if ((disp & 0x00800000) != 0) |
f0bdd87d YS |
204 | return 8; |
205 | } | |
206 | } | |
862ba188 | 207 | else if (IS_MOVL_PRE (w)) |
f0bdd87d | 208 | { |
e17a4113 | 209 | int w2 = read_memory_integer (pc + 2, 2, byte_order); |
f0bdd87d | 210 | |
862ba188 | 211 | if (IS_MOVL_Rn16_SP (w2) |
f0bdd87d YS |
212 | && (w2 & 0xf) <= 2) /* Rs is ER0, ER1, or ER2 */ |
213 | { | |
f0bdd87d | 214 | /* ... and d:16 is negative. */ |
e17a4113 | 215 | if (read_memory_integer (pc + 4, 2, byte_order) < 0) |
f0bdd87d YS |
216 | return 6; |
217 | } | |
862ba188 | 218 | else if (IS_MOVL_EXT (w2)) |
f0bdd87d | 219 | { |
e17a4113 | 220 | if (IS_MOVL_Rn24_SP (read_memory_integer (pc + 4, 2, byte_order))) |
f0bdd87d | 221 | { |
1d6ce4d3 YS |
222 | ULONGEST disp = read_memory_unsigned_integer (pc + 6, 4, |
223 | byte_order); | |
f0bdd87d YS |
224 | |
225 | /* ... and d:24 is negative. */ | |
1d6ce4d3 | 226 | if ((disp & 0x00800000) != 0) |
f0bdd87d YS |
227 | return 10; |
228 | } | |
229 | } | |
230 | } | |
231 | ||
232 | return 0; | |
233 | } | |
234 | ||
f0bdd87d YS |
235 | /* Do a full analysis of the prologue at PC and update CACHE |
236 | accordingly. Bail out early if CURRENT_PC is reached. Return the | |
237 | address where the analysis stopped. | |
238 | ||
239 | We handle all cases that can be generated by gcc. | |
240 | ||
241 | For allocating a stack frame: | |
242 | ||
243 | mov.w r6,@-sp | |
244 | mov.w sp,r6 | |
245 | mov.w #-n,rN | |
246 | add.w rN,sp | |
247 | ||
248 | mov.w r6,@-sp | |
249 | mov.w sp,r6 | |
250 | subs #2,sp | |
251 | (repeat) | |
252 | ||
253 | mov.l er6,@-sp | |
254 | mov.l sp,er6 | |
255 | add.l #-n,sp | |
256 | ||
257 | mov.w r6,@-sp | |
258 | mov.w sp,r6 | |
259 | subs #4,sp | |
260 | (repeat) | |
261 | ||
262 | For saving registers: | |
263 | ||
264 | mov.w rN,@-sp | |
265 | mov.l erN,@-sp | |
266 | stm.l reglist,@-sp | |
267 | ||
f0bdd87d YS |
268 | */ |
269 | ||
270 | static CORE_ADDR | |
e17a4113 UW |
271 | h8300_analyze_prologue (struct gdbarch *gdbarch, |
272 | CORE_ADDR pc, CORE_ADDR current_pc, | |
f0bdd87d YS |
273 | struct h8300_frame_cache *cache) |
274 | { | |
e17a4113 | 275 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
f0bdd87d | 276 | unsigned int op; |
862ba188 CV |
277 | int regno, i, spill_size; |
278 | ||
279 | cache->sp_offset = 0; | |
f0bdd87d | 280 | |
f0bdd87d YS |
281 | if (pc >= current_pc) |
282 | return current_pc; | |
283 | ||
e17a4113 | 284 | op = read_memory_unsigned_integer (pc, 4, byte_order); |
862ba188 CV |
285 | |
286 | if (IS_PUSHFP_MOVESPFP (op)) | |
287 | { | |
288 | cache->saved_regs[E_FP_REGNUM] = 0; | |
289 | cache->uses_fp = 1; | |
290 | pc += 4; | |
291 | } | |
292 | else if (IS_PUSH_FP (op)) | |
293 | { | |
294 | cache->saved_regs[E_FP_REGNUM] = 0; | |
295 | pc += 4; | |
296 | if (pc >= current_pc) | |
297 | return current_pc; | |
e17a4113 | 298 | op = read_memory_unsigned_integer (pc, 2, byte_order); |
862ba188 CV |
299 | if (IS_MOV_SP_FP (op)) |
300 | { | |
301 | cache->uses_fp = 1; | |
302 | pc += 2; | |
303 | } | |
304 | } | |
305 | ||
306 | while (pc < current_pc) | |
307 | { | |
e17a4113 | 308 | op = read_memory_unsigned_integer (pc, 2, byte_order); |
862ba188 CV |
309 | if (IS_SUB2_SP (op)) |
310 | { | |
311 | cache->sp_offset += 2; | |
312 | pc += 2; | |
313 | } | |
314 | else if (IS_SUB4_SP (op)) | |
315 | { | |
316 | cache->sp_offset += 4; | |
317 | pc += 2; | |
318 | } | |
319 | else if (IS_ADD_IMM_SP (op)) | |
320 | { | |
e17a4113 | 321 | cache->sp_offset += -read_memory_integer (pc + 2, 2, byte_order); |
862ba188 CV |
322 | pc += 4; |
323 | } | |
324 | else if (IS_SUB_IMM_SP (op)) | |
325 | { | |
e17a4113 | 326 | cache->sp_offset += read_memory_integer (pc + 2, 2, byte_order); |
862ba188 CV |
327 | pc += 4; |
328 | } | |
329 | else if (IS_SUBL4_SP (op)) | |
330 | { | |
331 | cache->sp_offset += 4; | |
332 | pc += 2; | |
333 | } | |
334 | else if (IS_MOV_IMM_Rn (op)) | |
335 | { | |
e17a4113 | 336 | int offset = read_memory_integer (pc + 2, 2, byte_order); |
862ba188 | 337 | regno = op & 0x000f; |
e17a4113 | 338 | op = read_memory_unsigned_integer (pc + 4, 2, byte_order); |
862ba188 CV |
339 | if (IS_ADD_RnSP (op) && (op & 0x00f0) == regno) |
340 | { | |
341 | cache->sp_offset -= offset; | |
342 | pc += 6; | |
343 | } | |
344 | else if (IS_SUB_RnSP (op) && (op & 0x00f0) == regno) | |
345 | { | |
346 | cache->sp_offset += offset; | |
347 | pc += 6; | |
348 | } | |
349 | else | |
350 | break; | |
351 | } | |
352 | else if (IS_PUSH (op)) | |
353 | { | |
354 | regno = op & 0x000f; | |
355 | cache->sp_offset += 2; | |
356 | cache->saved_regs[regno] = cache->sp_offset; | |
357 | pc += 2; | |
358 | } | |
359 | else if (op == 0x0100) | |
360 | { | |
e17a4113 | 361 | op = read_memory_unsigned_integer (pc + 2, 2, byte_order); |
862ba188 CV |
362 | if (IS_PUSH (op)) |
363 | { | |
364 | regno = op & 0x000f; | |
365 | cache->sp_offset += 4; | |
366 | cache->saved_regs[regno] = cache->sp_offset; | |
367 | pc += 4; | |
368 | } | |
369 | else | |
370 | break; | |
371 | } | |
372 | else if ((op & 0xffcf) == 0x0100) | |
373 | { | |
374 | int op1; | |
e17a4113 | 375 | op1 = read_memory_unsigned_integer (pc + 2, 2, byte_order); |
862ba188 CV |
376 | if (IS_PUSH (op1)) |
377 | { | |
378 | /* Since the prefix is 0x01x0, this is not a simple pushm but a | |
379 | stm.l reglist,@-sp */ | |
380 | i = ((op & 0x0030) >> 4) + 1; | |
381 | regno = op1 & 0x000f; | |
382 | for (; i > 0; regno++, --i) | |
383 | { | |
384 | cache->sp_offset += 4; | |
385 | cache->saved_regs[regno] = cache->sp_offset; | |
386 | } | |
387 | pc += 4; | |
388 | } | |
389 | else | |
390 | break; | |
391 | } | |
392 | else | |
393 | break; | |
394 | } | |
395 | ||
396 | /* Check for spilling an argument register to the stack frame. | |
397 | This could also be an initializing store from non-prologue code, | |
398 | but I don't think there's any harm in skipping that. */ | |
e17a4113 | 399 | while ((spill_size = h8300_is_argument_spill (gdbarch, pc)) > 0 |
862ba188 CV |
400 | && pc + spill_size <= current_pc) |
401 | pc += spill_size; | |
f0bdd87d YS |
402 | |
403 | return pc; | |
404 | } | |
405 | ||
406 | static struct h8300_frame_cache * | |
94afd7a6 | 407 | h8300_frame_cache (struct frame_info *this_frame, void **this_cache) |
f0bdd87d | 408 | { |
94afd7a6 | 409 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
f0bdd87d | 410 | struct h8300_frame_cache *cache; |
f0bdd87d | 411 | int i; |
862ba188 | 412 | CORE_ADDR current_pc; |
f0bdd87d YS |
413 | |
414 | if (*this_cache) | |
9a3c8263 | 415 | return (struct h8300_frame_cache *) *this_cache; |
f0bdd87d | 416 | |
862ba188 | 417 | cache = FRAME_OBSTACK_ZALLOC (struct h8300_frame_cache); |
be8626e0 | 418 | h8300_init_frame_cache (gdbarch, cache); |
f0bdd87d YS |
419 | *this_cache = cache; |
420 | ||
421 | /* In principle, for normal frames, %fp holds the frame pointer, | |
422 | which holds the base address for the current stack frame. | |
423 | However, for functions that don't need it, the frame pointer is | |
424 | optional. For these "frameless" functions the frame pointer is | |
862ba188 | 425 | actually the frame pointer of the calling frame. */ |
f0bdd87d | 426 | |
94afd7a6 | 427 | cache->base = get_frame_register_unsigned (this_frame, E_FP_REGNUM); |
f0bdd87d YS |
428 | if (cache->base == 0) |
429 | return cache; | |
430 | ||
be8626e0 | 431 | cache->saved_regs[E_PC_REGNUM] = -BINWORD (gdbarch); |
f0bdd87d | 432 | |
94afd7a6 UW |
433 | cache->pc = get_frame_func (this_frame); |
434 | current_pc = get_frame_pc (this_frame); | |
f0bdd87d | 435 | if (cache->pc != 0) |
e17a4113 | 436 | h8300_analyze_prologue (gdbarch, cache->pc, current_pc, cache); |
f0bdd87d | 437 | |
862ba188 | 438 | if (!cache->uses_fp) |
f0bdd87d YS |
439 | { |
440 | /* We didn't find a valid frame, which means that CACHE->base | |
441 | currently holds the frame pointer for our calling frame. If | |
442 | we're at the start of a function, or somewhere half-way its | |
443 | prologue, the function's frame probably hasn't been fully | |
444 | setup yet. Try to reconstruct the base address for the stack | |
445 | frame by looking at the stack pointer. For truly "frameless" | |
446 | functions this might work too. */ | |
447 | ||
94afd7a6 | 448 | cache->base = get_frame_register_unsigned (this_frame, E_SP_REGNUM) |
862ba188 | 449 | + cache->sp_offset; |
be8626e0 | 450 | cache->saved_sp = cache->base + BINWORD (gdbarch); |
862ba188 CV |
451 | cache->saved_regs[E_PC_REGNUM] = 0; |
452 | } | |
453 | else | |
454 | { | |
be8626e0 MD |
455 | cache->saved_sp = cache->base + 2 * BINWORD (gdbarch); |
456 | cache->saved_regs[E_PC_REGNUM] = -BINWORD (gdbarch); | |
f0bdd87d | 457 | } |
f0bdd87d YS |
458 | |
459 | /* Adjust all the saved registers such that they contain addresses | |
460 | instead of offsets. */ | |
be8626e0 | 461 | for (i = 0; i < gdbarch_num_regs (gdbarch); i++) |
f0bdd87d | 462 | if (cache->saved_regs[i] != -1) |
862ba188 | 463 | cache->saved_regs[i] = cache->base - cache->saved_regs[i]; |
f0bdd87d YS |
464 | |
465 | return cache; | |
466 | } | |
467 | ||
468 | static void | |
94afd7a6 | 469 | h8300_frame_this_id (struct frame_info *this_frame, void **this_cache, |
f0bdd87d YS |
470 | struct frame_id *this_id) |
471 | { | |
472 | struct h8300_frame_cache *cache = | |
94afd7a6 | 473 | h8300_frame_cache (this_frame, this_cache); |
f0bdd87d YS |
474 | |
475 | /* This marks the outermost frame. */ | |
476 | if (cache->base == 0) | |
477 | return; | |
478 | ||
862ba188 | 479 | *this_id = frame_id_build (cache->saved_sp, cache->pc); |
f0bdd87d YS |
480 | } |
481 | ||
94afd7a6 UW |
482 | static struct value * |
483 | h8300_frame_prev_register (struct frame_info *this_frame, void **this_cache, | |
484 | int regnum) | |
f0bdd87d | 485 | { |
94afd7a6 | 486 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
f0bdd87d | 487 | struct h8300_frame_cache *cache = |
94afd7a6 | 488 | h8300_frame_cache (this_frame, this_cache); |
f0bdd87d YS |
489 | |
490 | gdb_assert (regnum >= 0); | |
491 | ||
492 | if (regnum == E_SP_REGNUM && cache->saved_sp) | |
94afd7a6 | 493 | return frame_unwind_got_constant (this_frame, regnum, cache->saved_sp); |
f0bdd87d | 494 | |
ea78bae4 | 495 | if (regnum < gdbarch_num_regs (gdbarch) |
f57d151a | 496 | && cache->saved_regs[regnum] != -1) |
94afd7a6 UW |
497 | return frame_unwind_got_memory (this_frame, regnum, |
498 | cache->saved_regs[regnum]); | |
f0bdd87d | 499 | |
94afd7a6 | 500 | return frame_unwind_got_register (this_frame, regnum, regnum); |
f0bdd87d YS |
501 | } |
502 | ||
503 | static const struct frame_unwind h8300_frame_unwind = { | |
504 | NORMAL_FRAME, | |
8fbca658 | 505 | default_frame_unwind_stop_reason, |
f0bdd87d | 506 | h8300_frame_this_id, |
94afd7a6 UW |
507 | h8300_frame_prev_register, |
508 | NULL, | |
509 | default_frame_sniffer | |
f0bdd87d YS |
510 | }; |
511 | ||
862ba188 | 512 | static CORE_ADDR |
94afd7a6 | 513 | h8300_frame_base_address (struct frame_info *this_frame, void **this_cache) |
862ba188 | 514 | { |
94afd7a6 | 515 | struct h8300_frame_cache *cache = h8300_frame_cache (this_frame, this_cache); |
862ba188 CV |
516 | return cache->base; |
517 | } | |
518 | ||
519 | static const struct frame_base h8300_frame_base = { | |
520 | &h8300_frame_unwind, | |
521 | h8300_frame_base_address, | |
522 | h8300_frame_base_address, | |
523 | h8300_frame_base_address | |
524 | }; | |
525 | ||
526 | static CORE_ADDR | |
6093d2eb | 527 | h8300_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) |
862ba188 CV |
528 | { |
529 | CORE_ADDR func_addr = 0 , func_end = 0; | |
530 | ||
531 | if (find_pc_partial_function (pc, NULL, &func_addr, &func_end)) | |
532 | { | |
533 | struct symtab_and_line sal; | |
534 | struct h8300_frame_cache cache; | |
535 | ||
536 | /* Found a function. */ | |
537 | sal = find_pc_line (func_addr, 0); | |
538 | if (sal.end && sal.end < func_end) | |
539 | /* Found a line number, use it as end of prologue. */ | |
540 | return sal.end; | |
541 | ||
542 | /* No useable line symbol. Use prologue parsing method. */ | |
be8626e0 | 543 | h8300_init_frame_cache (gdbarch, &cache); |
e17a4113 | 544 | return h8300_analyze_prologue (gdbarch, func_addr, func_end, &cache); |
862ba188 CV |
545 | } |
546 | ||
547 | /* No function symbol -- just return the PC. */ | |
548 | return (CORE_ADDR) pc; | |
549 | } | |
550 | ||
f0bdd87d YS |
551 | /* Function: push_dummy_call |
552 | Setup the function arguments for calling a function in the inferior. | |
553 | In this discussion, a `word' is 16 bits on the H8/300s, and 32 bits | |
554 | on the H8/300H. | |
555 | ||
556 | There are actually two ABI's here: -mquickcall (the default) and | |
557 | -mno-quickcall. With -mno-quickcall, all arguments are passed on | |
558 | the stack after the return address, word-aligned. With | |
559 | -mquickcall, GCC tries to use r0 -- r2 to pass registers. Since | |
560 | GCC doesn't indicate in the object file which ABI was used to | |
561 | compile it, GDB only supports the default --- -mquickcall. | |
562 | ||
563 | Here are the rules for -mquickcall, in detail: | |
564 | ||
565 | Each argument, whether scalar or aggregate, is padded to occupy a | |
566 | whole number of words. Arguments smaller than a word are padded at | |
567 | the most significant end; those larger than a word are padded at | |
568 | the least significant end. | |
569 | ||
570 | The initial arguments are passed in r0 -- r2. Earlier arguments go in | |
571 | lower-numbered registers. Multi-word arguments are passed in | |
572 | consecutive registers, with the most significant end in the | |
573 | lower-numbered register. | |
574 | ||
575 | If an argument doesn't fit entirely in the remaining registers, it | |
576 | is passed entirely on the stack. Stack arguments begin just after | |
577 | the return address. Once an argument has overflowed onto the stack | |
578 | this way, all subsequent arguments are passed on the stack. | |
579 | ||
580 | The above rule has odd consequences. For example, on the h8/300s, | |
581 | if a function takes two longs and an int as arguments: | |
582 | - the first long will be passed in r0/r1, | |
583 | - the second long will be passed entirely on the stack, since it | |
584 | doesn't fit in r2, | |
585 | - and the int will be passed on the stack, even though it could fit | |
586 | in r2. | |
587 | ||
588 | A weird exception: if an argument is larger than a word, but not a | |
589 | whole number of words in length (before padding), it is passed on | |
590 | the stack following the rules for stack arguments above, even if | |
591 | there are sufficient registers available to hold it. Stranger | |
592 | still, the argument registers are still `used up' --- even though | |
593 | there's nothing in them. | |
594 | ||
595 | So, for example, on the h8/300s, if a function expects a three-byte | |
596 | structure and an int, the structure will go on the stack, and the | |
597 | int will go in r2, not r0. | |
598 | ||
599 | If the function returns an aggregate type (struct, union, or class) | |
600 | by value, the caller must allocate space to hold the return value, | |
601 | and pass the callee a pointer to this space as an invisible first | |
602 | argument, in R0. | |
603 | ||
604 | For varargs functions, the last fixed argument and all the variable | |
605 | arguments are always passed on the stack. This means that calls to | |
606 | varargs functions don't work properly unless there is a prototype | |
607 | in scope. | |
608 | ||
609 | Basically, this ABI is not good, for the following reasons: | |
610 | - You can't call vararg functions properly unless a prototype is in scope. | |
611 | - Structure passing is inconsistent, to no purpose I can see. | |
612 | - It often wastes argument registers, of which there are only three | |
613 | to begin with. */ | |
614 | ||
615 | static CORE_ADDR | |
616 | h8300_push_dummy_call (struct gdbarch *gdbarch, struct value *function, | |
617 | struct regcache *regcache, CORE_ADDR bp_addr, | |
618 | int nargs, struct value **args, CORE_ADDR sp, | |
cf84fa6b AH |
619 | function_call_return_method return_method, |
620 | CORE_ADDR struct_addr) | |
f0bdd87d | 621 | { |
e17a4113 | 622 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
f0bdd87d | 623 | int stack_alloc = 0, stack_offset = 0; |
be8626e0 | 624 | int wordsize = BINWORD (gdbarch); |
f0bdd87d YS |
625 | int reg = E_ARG0_REGNUM; |
626 | int argument; | |
627 | ||
628 | /* First, make sure the stack is properly aligned. */ | |
629 | sp = align_down (sp, wordsize); | |
630 | ||
631 | /* Now make sure there's space on the stack for the arguments. We | |
632 | may over-allocate a little here, but that won't hurt anything. */ | |
633 | for (argument = 0; argument < nargs; argument++) | |
634 | stack_alloc += align_up (TYPE_LENGTH (value_type (args[argument])), | |
635 | wordsize); | |
636 | sp -= stack_alloc; | |
637 | ||
638 | /* Now load as many arguments as possible into registers, and push | |
639 | the rest onto the stack. | |
640 | If we're returning a structure by value, then we must pass a | |
641 | pointer to the buffer for the return value as an invisible first | |
642 | argument. */ | |
cf84fa6b | 643 | if (return_method == return_method_struct) |
f0bdd87d YS |
644 | regcache_cooked_write_unsigned (regcache, reg++, struct_addr); |
645 | ||
646 | for (argument = 0; argument < nargs; argument++) | |
647 | { | |
648 | struct type *type = value_type (args[argument]); | |
649 | int len = TYPE_LENGTH (type); | |
650 | char *contents = (char *) value_contents (args[argument]); | |
651 | ||
652 | /* Pad the argument appropriately. */ | |
653 | int padded_len = align_up (len, wordsize); | |
ab4b1c46 TT |
654 | /* Use std::vector here to get zero initialization. */ |
655 | std::vector<gdb_byte> padded (padded_len); | |
f0bdd87d | 656 | |
ab4b1c46 TT |
657 | memcpy ((len < wordsize ? padded.data () + padded_len - len |
658 | : padded.data ()), | |
f0bdd87d YS |
659 | contents, len); |
660 | ||
661 | /* Could the argument fit in the remaining registers? */ | |
662 | if (padded_len <= (E_ARGLAST_REGNUM - reg + 1) * wordsize) | |
663 | { | |
664 | /* Are we going to pass it on the stack anyway, for no good | |
665 | reason? */ | |
666 | if (len > wordsize && len % wordsize) | |
667 | { | |
668 | /* I feel so unclean. */ | |
ab4b1c46 | 669 | write_memory (sp + stack_offset, padded.data (), padded_len); |
f0bdd87d YS |
670 | stack_offset += padded_len; |
671 | ||
672 | /* That's right --- even though we passed the argument | |
673 | on the stack, we consume the registers anyway! Love | |
674 | me, love my dog. */ | |
675 | reg += padded_len / wordsize; | |
676 | } | |
677 | else | |
678 | { | |
679 | /* Heavens to Betsy --- it's really going in registers! | |
99e42fd8 PA |
680 | Note that on the h8/300s, there are gaps between the |
681 | registers in the register file. */ | |
f0bdd87d YS |
682 | int offset; |
683 | ||
684 | for (offset = 0; offset < padded_len; offset += wordsize) | |
685 | { | |
e17a4113 | 686 | ULONGEST word |
ab4b1c46 | 687 | = extract_unsigned_integer (&padded[offset], |
e17a4113 | 688 | wordsize, byte_order); |
f0bdd87d YS |
689 | regcache_cooked_write_unsigned (regcache, reg++, word); |
690 | } | |
691 | } | |
692 | } | |
693 | else | |
694 | { | |
695 | /* It doesn't fit in registers! Onto the stack it goes. */ | |
ab4b1c46 | 696 | write_memory (sp + stack_offset, padded.data (), padded_len); |
f0bdd87d YS |
697 | stack_offset += padded_len; |
698 | ||
699 | /* Once one argument has spilled onto the stack, all | |
700 | subsequent arguments go on the stack. */ | |
701 | reg = E_ARGLAST_REGNUM + 1; | |
702 | } | |
703 | } | |
704 | ||
705 | /* Store return address. */ | |
706 | sp -= wordsize; | |
e17a4113 | 707 | write_memory_unsigned_integer (sp, wordsize, byte_order, bp_addr); |
f0bdd87d YS |
708 | |
709 | /* Update stack pointer. */ | |
710 | regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, sp); | |
711 | ||
862ba188 CV |
712 | /* Return the new stack pointer minus the return address slot since |
713 | that's what DWARF2/GCC uses as the frame's CFA. */ | |
714 | return sp + wordsize; | |
f0bdd87d YS |
715 | } |
716 | ||
717 | /* Function: extract_return_value | |
718 | Figure out where in REGBUF the called function has left its return value. | |
719 | Copy that into VALBUF. Be sure to account for CPU type. */ | |
720 | ||
721 | static void | |
722 | h8300_extract_return_value (struct type *type, struct regcache *regcache, | |
7c543f7b | 723 | gdb_byte *valbuf) |
f0bdd87d | 724 | { |
ac7936df | 725 | struct gdbarch *gdbarch = regcache->arch (); |
e17a4113 | 726 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
f0bdd87d YS |
727 | int len = TYPE_LENGTH (type); |
728 | ULONGEST c, addr; | |
729 | ||
bad43aa5 | 730 | switch (len) |
f0bdd87d YS |
731 | { |
732 | case 1: | |
733 | case 2: | |
734 | regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c); | |
bad43aa5 | 735 | store_unsigned_integer (valbuf, len, byte_order, c); |
f0bdd87d YS |
736 | break; |
737 | case 4: /* Needs two registers on plain H8/300 */ | |
738 | regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c); | |
e17a4113 | 739 | store_unsigned_integer (valbuf, 2, byte_order, c); |
f0bdd87d | 740 | regcache_cooked_read_unsigned (regcache, E_RET1_REGNUM, &c); |
7c543f7b | 741 | store_unsigned_integer (valbuf + 2, 2, byte_order, c); |
f0bdd87d YS |
742 | break; |
743 | case 8: /* long long is now 8 bytes. */ | |
78134374 | 744 | if (type->code () == TYPE_CODE_INT) |
f0bdd87d YS |
745 | { |
746 | regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &addr); | |
bad43aa5 SP |
747 | c = read_memory_unsigned_integer ((CORE_ADDR) addr, len, byte_order); |
748 | store_unsigned_integer (valbuf, len, byte_order, c); | |
f0bdd87d YS |
749 | } |
750 | else | |
751 | { | |
a73c6dcd | 752 | error (_("I don't know how this 8 byte value is returned.")); |
f0bdd87d YS |
753 | } |
754 | break; | |
755 | } | |
756 | } | |
757 | ||
758 | static void | |
759 | h8300h_extract_return_value (struct type *type, struct regcache *regcache, | |
7c543f7b | 760 | gdb_byte *valbuf) |
f0bdd87d | 761 | { |
ac7936df | 762 | struct gdbarch *gdbarch = regcache->arch (); |
e17a4113 | 763 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
22e048c9 | 764 | ULONGEST c; |
f0bdd87d | 765 | |
744a8059 | 766 | switch (TYPE_LENGTH (type)) |
f0bdd87d YS |
767 | { |
768 | case 1: | |
769 | case 2: | |
770 | case 4: | |
771 | regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c); | |
744a8059 | 772 | store_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order, c); |
f0bdd87d YS |
773 | break; |
774 | case 8: /* long long is now 8 bytes. */ | |
78134374 | 775 | if (type->code () == TYPE_CODE_INT) |
f0bdd87d | 776 | { |
862ba188 | 777 | regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c); |
e17a4113 | 778 | store_unsigned_integer (valbuf, 4, byte_order, c); |
862ba188 | 779 | regcache_cooked_read_unsigned (regcache, E_RET1_REGNUM, &c); |
7c543f7b | 780 | store_unsigned_integer (valbuf + 4, 4, byte_order, c); |
f0bdd87d YS |
781 | } |
782 | else | |
783 | { | |
a73c6dcd | 784 | error (_("I don't know how this 8 byte value is returned.")); |
f0bdd87d YS |
785 | } |
786 | break; | |
787 | } | |
788 | } | |
789 | ||
63807e1d | 790 | static int |
862ba188 CV |
791 | h8300_use_struct_convention (struct type *value_type) |
792 | { | |
793 | /* Types of 1, 2 or 4 bytes are returned in R0/R1, everything else on the | |
1777feb0 | 794 | stack. */ |
862ba188 | 795 | |
78134374 SM |
796 | if (value_type->code () == TYPE_CODE_STRUCT |
797 | || value_type->code () == TYPE_CODE_UNION) | |
862ba188 CV |
798 | return 1; |
799 | return !(TYPE_LENGTH (value_type) == 1 | |
800 | || TYPE_LENGTH (value_type) == 2 | |
801 | || TYPE_LENGTH (value_type) == 4); | |
802 | } | |
803 | ||
63807e1d | 804 | static int |
862ba188 CV |
805 | h8300h_use_struct_convention (struct type *value_type) |
806 | { | |
807 | /* Types of 1, 2 or 4 bytes are returned in R0, INT types of 8 bytes are | |
1777feb0 | 808 | returned in R0/R1, everything else on the stack. */ |
78134374 SM |
809 | if (value_type->code () == TYPE_CODE_STRUCT |
810 | || value_type->code () == TYPE_CODE_UNION) | |
862ba188 CV |
811 | return 1; |
812 | return !(TYPE_LENGTH (value_type) == 1 | |
813 | || TYPE_LENGTH (value_type) == 2 | |
814 | || TYPE_LENGTH (value_type) == 4 | |
815 | || (TYPE_LENGTH (value_type) == 8 | |
78134374 | 816 | && value_type->code () == TYPE_CODE_INT)); |
862ba188 | 817 | } |
f0bdd87d YS |
818 | |
819 | /* Function: store_return_value | |
820 | Place the appropriate value in the appropriate registers. | |
821 | Primarily used by the RETURN command. */ | |
822 | ||
823 | static void | |
824 | h8300_store_return_value (struct type *type, struct regcache *regcache, | |
7c543f7b | 825 | const gdb_byte *valbuf) |
f0bdd87d | 826 | { |
ac7936df | 827 | struct gdbarch *gdbarch = regcache->arch (); |
e17a4113 | 828 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
f0bdd87d YS |
829 | ULONGEST val; |
830 | ||
744a8059 | 831 | switch (TYPE_LENGTH (type)) |
f0bdd87d YS |
832 | { |
833 | case 1: | |
1777feb0 | 834 | case 2: /* short... */ |
744a8059 | 835 | val = extract_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order); |
f0bdd87d YS |
836 | regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, val); |
837 | break; | |
838 | case 4: /* long, float */ | |
744a8059 | 839 | val = extract_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order); |
f0bdd87d YS |
840 | regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, |
841 | (val >> 16) & 0xffff); | |
842 | regcache_cooked_write_unsigned (regcache, E_RET1_REGNUM, val & 0xffff); | |
843 | break; | |
1777feb0 MS |
844 | case 8: /* long long, double and long double |
845 | are all defined as 4 byte types so | |
846 | far so this shouldn't happen. */ | |
a73c6dcd | 847 | error (_("I don't know how to return an 8 byte value.")); |
f0bdd87d YS |
848 | break; |
849 | } | |
850 | } | |
851 | ||
852 | static void | |
853 | h8300h_store_return_value (struct type *type, struct regcache *regcache, | |
7c543f7b | 854 | const gdb_byte *valbuf) |
f0bdd87d | 855 | { |
ac7936df | 856 | struct gdbarch *gdbarch = regcache->arch (); |
e17a4113 | 857 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
f0bdd87d YS |
858 | ULONGEST val; |
859 | ||
744a8059 | 860 | switch (TYPE_LENGTH (type)) |
f0bdd87d YS |
861 | { |
862 | case 1: | |
863 | case 2: | |
864 | case 4: /* long, float */ | |
744a8059 | 865 | val = extract_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order); |
f0bdd87d YS |
866 | regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, val); |
867 | break; | |
862ba188 | 868 | case 8: |
744a8059 | 869 | val = extract_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order); |
862ba188 CV |
870 | regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, |
871 | (val >> 32) & 0xffffffff); | |
872 | regcache_cooked_write_unsigned (regcache, E_RET1_REGNUM, | |
873 | val & 0xffffffff); | |
f0bdd87d YS |
874 | break; |
875 | } | |
876 | } | |
877 | ||
862ba188 | 878 | static enum return_value_convention |
6a3a010b | 879 | h8300_return_value (struct gdbarch *gdbarch, struct value *function, |
c055b101 | 880 | struct type *type, struct regcache *regcache, |
5d0d05b6 | 881 | gdb_byte *readbuf, const gdb_byte *writebuf) |
862ba188 CV |
882 | { |
883 | if (h8300_use_struct_convention (type)) | |
884 | return RETURN_VALUE_STRUCT_CONVENTION; | |
885 | if (writebuf) | |
886 | h8300_store_return_value (type, regcache, writebuf); | |
887 | else if (readbuf) | |
888 | h8300_extract_return_value (type, regcache, readbuf); | |
889 | return RETURN_VALUE_REGISTER_CONVENTION; | |
890 | } | |
891 | ||
892 | static enum return_value_convention | |
6a3a010b | 893 | h8300h_return_value (struct gdbarch *gdbarch, struct value *function, |
c055b101 | 894 | struct type *type, struct regcache *regcache, |
5d0d05b6 | 895 | gdb_byte *readbuf, const gdb_byte *writebuf) |
862ba188 CV |
896 | { |
897 | if (h8300h_use_struct_convention (type)) | |
898 | { | |
899 | if (readbuf) | |
900 | { | |
901 | ULONGEST addr; | |
902 | ||
903 | regcache_raw_read_unsigned (regcache, E_R0_REGNUM, &addr); | |
904 | read_memory (addr, readbuf, TYPE_LENGTH (type)); | |
905 | } | |
906 | ||
907 | return RETURN_VALUE_ABI_RETURNS_ADDRESS; | |
908 | } | |
909 | if (writebuf) | |
910 | h8300h_store_return_value (type, regcache, writebuf); | |
911 | else if (readbuf) | |
912 | h8300h_extract_return_value (type, regcache, readbuf); | |
913 | return RETURN_VALUE_REGISTER_CONVENTION; | |
914 | } | |
915 | ||
76fd5f74 PA |
916 | /* Implementation of 'register_sim_regno' gdbarch method. */ |
917 | ||
918 | static int | |
919 | h8300_register_sim_regno (struct gdbarch *gdbarch, int regnum) | |
920 | { | |
921 | /* Only makes sense to supply raw registers. */ | |
922 | gdb_assert (regnum >= 0 && regnum < gdbarch_num_regs (gdbarch)); | |
923 | ||
924 | /* We hide the raw ccr from the user by making it nameless. Because | |
925 | the default register_sim_regno hook returns | |
926 | LEGACY_SIM_REGNO_IGNORE for unnamed registers, we need to | |
927 | override it. The sim register numbering is compatible with | |
928 | gdb's. */ | |
929 | return regnum; | |
930 | } | |
931 | ||
c54e4253 YS |
932 | static const char * |
933 | h8300_register_name_common (const char *regnames[], int numregs, | |
934 | struct gdbarch *gdbarch, int regno) | |
935 | { | |
936 | if (regno < 0 | |
937 | || regno >= numregs) | |
938 | internal_error (__FILE__, __LINE__, | |
939 | _("h8300_register_name_common: illegal register number %d"), | |
940 | regno); | |
941 | else | |
942 | return regnames[regno]; | |
943 | } | |
944 | ||
f0bdd87d | 945 | static const char * |
d93859e2 | 946 | h8300_register_name (struct gdbarch *gdbarch, int regno) |
f0bdd87d YS |
947 | { |
948 | /* The register names change depending on which h8300 processor | |
1777feb0 | 949 | type is selected. */ |
a121b7c1 | 950 | static const char *register_names[] = { |
f0bdd87d YS |
951 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", |
952 | "sp", "", "pc", "cycles", "tick", "inst", | |
953 | "ccr", /* pseudo register */ | |
954 | }; | |
c54e4253 YS |
955 | return h8300_register_name_common(register_names, ARRAY_SIZE(register_names), |
956 | gdbarch, regno); | |
957 | } | |
958 | ||
959 | static const char * | |
960 | h8300h_register_name (struct gdbarch *gdbarch, int regno) | |
961 | { | |
962 | static const char *register_names[] = { | |
963 | "er0", "er1", "er2", "er3", "er4", "er5", "er6", | |
964 | "sp", "", "pc", "cycles", "tick", "inst", | |
965 | "ccr", /* pseudo register */ | |
966 | }; | |
967 | return h8300_register_name_common(register_names, ARRAY_SIZE(register_names), | |
968 | gdbarch, regno); | |
f0bdd87d YS |
969 | } |
970 | ||
971 | static const char * | |
d93859e2 | 972 | h8300s_register_name (struct gdbarch *gdbarch, int regno) |
f0bdd87d | 973 | { |
a121b7c1 | 974 | static const char *register_names[] = { |
f0bdd87d YS |
975 | "er0", "er1", "er2", "er3", "er4", "er5", "er6", |
976 | "sp", "", "pc", "cycles", "", "tick", "inst", | |
977 | "mach", "macl", | |
978 | "ccr", "exr" /* pseudo registers */ | |
979 | }; | |
c54e4253 YS |
980 | return h8300_register_name_common(register_names, ARRAY_SIZE(register_names), |
981 | gdbarch, regno); | |
f0bdd87d YS |
982 | } |
983 | ||
984 | static const char * | |
d93859e2 | 985 | h8300sx_register_name (struct gdbarch *gdbarch, int regno) |
f0bdd87d | 986 | { |
a121b7c1 | 987 | static const char *register_names[] = { |
f0bdd87d YS |
988 | "er0", "er1", "er2", "er3", "er4", "er5", "er6", |
989 | "sp", "", "pc", "cycles", "", "tick", "inst", | |
990 | "mach", "macl", "sbr", "vbr", | |
991 | "ccr", "exr" /* pseudo registers */ | |
992 | }; | |
c54e4253 YS |
993 | return h8300_register_name_common(register_names, ARRAY_SIZE(register_names), |
994 | gdbarch, regno); | |
f0bdd87d YS |
995 | } |
996 | ||
997 | static void | |
998 | h8300_print_register (struct gdbarch *gdbarch, struct ui_file *file, | |
999 | struct frame_info *frame, int regno) | |
1000 | { | |
1001 | LONGEST rval; | |
1002 | const char *name = gdbarch_register_name (gdbarch, regno); | |
1003 | ||
1004 | if (!name || !*name) | |
1005 | return; | |
1006 | ||
1007 | rval = get_frame_register_signed (frame, regno); | |
1008 | ||
1009 | fprintf_filtered (file, "%-14s ", name); | |
be8626e0 MD |
1010 | if ((regno == E_PSEUDO_CCR_REGNUM (gdbarch)) || \ |
1011 | (regno == E_PSEUDO_EXR_REGNUM (gdbarch) && is_h8300smode (gdbarch))) | |
f0bdd87d YS |
1012 | { |
1013 | fprintf_filtered (file, "0x%02x ", (unsigned char) rval); | |
1014 | print_longest (file, 'u', 1, rval); | |
1015 | } | |
1016 | else | |
1017 | { | |
be8626e0 MD |
1018 | fprintf_filtered (file, "0x%s ", phex ((ULONGEST) rval, |
1019 | BINWORD (gdbarch))); | |
f0bdd87d YS |
1020 | print_longest (file, 'd', 1, rval); |
1021 | } | |
be8626e0 | 1022 | if (regno == E_PSEUDO_CCR_REGNUM (gdbarch)) |
f0bdd87d YS |
1023 | { |
1024 | /* CCR register */ | |
1025 | int C, Z, N, V; | |
1026 | unsigned char l = rval & 0xff; | |
1027 | fprintf_filtered (file, "\t"); | |
1028 | fprintf_filtered (file, "I-%d ", (l & 0x80) != 0); | |
1029 | fprintf_filtered (file, "UI-%d ", (l & 0x40) != 0); | |
1030 | fprintf_filtered (file, "H-%d ", (l & 0x20) != 0); | |
1031 | fprintf_filtered (file, "U-%d ", (l & 0x10) != 0); | |
1032 | N = (l & 0x8) != 0; | |
1033 | Z = (l & 0x4) != 0; | |
1034 | V = (l & 0x2) != 0; | |
1035 | C = (l & 0x1) != 0; | |
1036 | fprintf_filtered (file, "N-%d ", N); | |
1037 | fprintf_filtered (file, "Z-%d ", Z); | |
1038 | fprintf_filtered (file, "V-%d ", V); | |
1039 | fprintf_filtered (file, "C-%d ", C); | |
1040 | if ((C | Z) == 0) | |
1041 | fprintf_filtered (file, "u> "); | |
1042 | if ((C | Z) == 1) | |
1043 | fprintf_filtered (file, "u<= "); | |
fb36c6bf | 1044 | if (C == 0) |
f0bdd87d YS |
1045 | fprintf_filtered (file, "u>= "); |
1046 | if (C == 1) | |
1047 | fprintf_filtered (file, "u< "); | |
1048 | if (Z == 0) | |
1049 | fprintf_filtered (file, "!= "); | |
1050 | if (Z == 1) | |
1051 | fprintf_filtered (file, "== "); | |
1052 | if ((N ^ V) == 0) | |
1053 | fprintf_filtered (file, ">= "); | |
1054 | if ((N ^ V) == 1) | |
1055 | fprintf_filtered (file, "< "); | |
1056 | if ((Z | (N ^ V)) == 0) | |
1057 | fprintf_filtered (file, "> "); | |
1058 | if ((Z | (N ^ V)) == 1) | |
1059 | fprintf_filtered (file, "<= "); | |
1060 | } | |
be8626e0 | 1061 | else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch) && is_h8300smode (gdbarch)) |
f0bdd87d YS |
1062 | { |
1063 | /* EXR register */ | |
1064 | unsigned char l = rval & 0xff; | |
1065 | fprintf_filtered (file, "\t"); | |
1066 | fprintf_filtered (file, "T-%d - - - ", (l & 0x80) != 0); | |
1067 | fprintf_filtered (file, "I2-%d ", (l & 4) != 0); | |
1068 | fprintf_filtered (file, "I1-%d ", (l & 2) != 0); | |
1069 | fprintf_filtered (file, "I0-%d", (l & 1) != 0); | |
1070 | } | |
1071 | fprintf_filtered (file, "\n"); | |
1072 | } | |
1073 | ||
1074 | static void | |
1075 | h8300_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file, | |
1076 | struct frame_info *frame, int regno, int cpregs) | |
1077 | { | |
1078 | if (regno < 0) | |
1079 | { | |
1080 | for (regno = E_R0_REGNUM; regno <= E_SP_REGNUM; ++regno) | |
1081 | h8300_print_register (gdbarch, file, frame, regno); | |
be8626e0 MD |
1082 | h8300_print_register (gdbarch, file, frame, |
1083 | E_PSEUDO_CCR_REGNUM (gdbarch)); | |
f0bdd87d | 1084 | h8300_print_register (gdbarch, file, frame, E_PC_REGNUM); |
ea78bae4 | 1085 | if (is_h8300smode (gdbarch)) |
f0bdd87d | 1086 | { |
be8626e0 MD |
1087 | h8300_print_register (gdbarch, file, frame, |
1088 | E_PSEUDO_EXR_REGNUM (gdbarch)); | |
ea78bae4 | 1089 | if (is_h8300sxmode (gdbarch)) |
f0bdd87d YS |
1090 | { |
1091 | h8300_print_register (gdbarch, file, frame, E_SBR_REGNUM); | |
1092 | h8300_print_register (gdbarch, file, frame, E_VBR_REGNUM); | |
1093 | } | |
1094 | h8300_print_register (gdbarch, file, frame, E_MACH_REGNUM); | |
1095 | h8300_print_register (gdbarch, file, frame, E_MACL_REGNUM); | |
1096 | h8300_print_register (gdbarch, file, frame, E_CYCLES_REGNUM); | |
1097 | h8300_print_register (gdbarch, file, frame, E_TICKS_REGNUM); | |
1098 | h8300_print_register (gdbarch, file, frame, E_INSTS_REGNUM); | |
1099 | } | |
1100 | else | |
1101 | { | |
1102 | h8300_print_register (gdbarch, file, frame, E_CYCLES_REGNUM); | |
1103 | h8300_print_register (gdbarch, file, frame, E_TICK_REGNUM); | |
1104 | h8300_print_register (gdbarch, file, frame, E_INST_REGNUM); | |
1105 | } | |
1106 | } | |
1107 | else | |
1108 | { | |
1109 | if (regno == E_CCR_REGNUM) | |
be8626e0 MD |
1110 | h8300_print_register (gdbarch, file, frame, |
1111 | E_PSEUDO_CCR_REGNUM (gdbarch)); | |
1112 | else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch) | |
ea78bae4 | 1113 | && is_h8300smode (gdbarch)) |
be8626e0 MD |
1114 | h8300_print_register (gdbarch, file, frame, |
1115 | E_PSEUDO_EXR_REGNUM (gdbarch)); | |
f0bdd87d YS |
1116 | else |
1117 | h8300_print_register (gdbarch, file, frame, regno); | |
1118 | } | |
1119 | } | |
1120 | ||
1121 | static struct type * | |
1122 | h8300_register_type (struct gdbarch *gdbarch, int regno) | |
1123 | { | |
f6efe3f8 | 1124 | if (regno < 0 || regno >= gdbarch_num_cooked_regs (gdbarch)) |
f0bdd87d | 1125 | internal_error (__FILE__, __LINE__, |
a73c6dcd MS |
1126 | _("h8300_register_type: illegal register number %d"), |
1127 | regno); | |
f0bdd87d YS |
1128 | else |
1129 | { | |
1130 | switch (regno) | |
1131 | { | |
1132 | case E_PC_REGNUM: | |
0dfff4cb | 1133 | return builtin_type (gdbarch)->builtin_func_ptr; |
f0bdd87d YS |
1134 | case E_SP_REGNUM: |
1135 | case E_FP_REGNUM: | |
0dfff4cb | 1136 | return builtin_type (gdbarch)->builtin_data_ptr; |
f0bdd87d | 1137 | default: |
be8626e0 | 1138 | if (regno == E_PSEUDO_CCR_REGNUM (gdbarch)) |
df4df182 | 1139 | return builtin_type (gdbarch)->builtin_uint8; |
be8626e0 | 1140 | else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch)) |
df4df182 | 1141 | return builtin_type (gdbarch)->builtin_uint8; |
ea78bae4 | 1142 | else if (is_h8300hmode (gdbarch)) |
df4df182 | 1143 | return builtin_type (gdbarch)->builtin_int32; |
f0bdd87d | 1144 | else |
df4df182 | 1145 | return builtin_type (gdbarch)->builtin_int16; |
f0bdd87d YS |
1146 | } |
1147 | } | |
1148 | } | |
1149 | ||
5caa2f0b PA |
1150 | /* Helpers for h8300_pseudo_register_read. We expose ccr/exr as |
1151 | pseudo-registers to users with smaller sizes than the corresponding | |
1152 | raw registers. These helpers extend/narrow the values. */ | |
1153 | ||
1154 | static enum register_status | |
849d0ba8 | 1155 | pseudo_from_raw_register (struct gdbarch *gdbarch, readable_regcache *regcache, |
5caa2f0b PA |
1156 | gdb_byte *buf, int pseudo_regno, int raw_regno) |
1157 | { | |
1158 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
1159 | enum register_status status; | |
1160 | ULONGEST val; | |
1161 | ||
03f50fc8 | 1162 | status = regcache->raw_read (raw_regno, &val); |
5caa2f0b PA |
1163 | if (status == REG_VALID) |
1164 | store_unsigned_integer (buf, | |
1165 | register_size (gdbarch, pseudo_regno), | |
1166 | byte_order, val); | |
1167 | return status; | |
1168 | } | |
1169 | ||
1170 | /* See pseudo_from_raw_register. */ | |
1171 | ||
1172 | static void | |
1173 | raw_from_pseudo_register (struct gdbarch *gdbarch, struct regcache *regcache, | |
1174 | const gdb_byte *buf, int raw_regno, int pseudo_regno) | |
1175 | { | |
1176 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
1177 | ULONGEST val; | |
1178 | ||
1179 | val = extract_unsigned_integer (buf, register_size (gdbarch, pseudo_regno), | |
1180 | byte_order); | |
1181 | regcache_raw_write_unsigned (regcache, raw_regno, val); | |
1182 | } | |
1183 | ||
05d1431c | 1184 | static enum register_status |
f0bdd87d | 1185 | h8300_pseudo_register_read (struct gdbarch *gdbarch, |
849d0ba8 | 1186 | readable_regcache *regcache, int regno, |
5d0d05b6 | 1187 | gdb_byte *buf) |
f0bdd87d | 1188 | { |
be8626e0 | 1189 | if (regno == E_PSEUDO_CCR_REGNUM (gdbarch)) |
5caa2f0b PA |
1190 | { |
1191 | return pseudo_from_raw_register (gdbarch, regcache, buf, | |
1192 | regno, E_CCR_REGNUM); | |
1193 | } | |
be8626e0 | 1194 | else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch)) |
5caa2f0b PA |
1195 | { |
1196 | return pseudo_from_raw_register (gdbarch, regcache, buf, | |
1197 | regno, E_EXR_REGNUM); | |
1198 | } | |
f0bdd87d | 1199 | else |
03f50fc8 | 1200 | return regcache->raw_read (regno, buf); |
f0bdd87d YS |
1201 | } |
1202 | ||
1203 | static void | |
1204 | h8300_pseudo_register_write (struct gdbarch *gdbarch, | |
1205 | struct regcache *regcache, int regno, | |
5d0d05b6 | 1206 | const gdb_byte *buf) |
f0bdd87d | 1207 | { |
be8626e0 | 1208 | if (regno == E_PSEUDO_CCR_REGNUM (gdbarch)) |
5caa2f0b | 1209 | raw_from_pseudo_register (gdbarch, regcache, buf, E_CCR_REGNUM, regno); |
be8626e0 | 1210 | else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch)) |
5caa2f0b | 1211 | raw_from_pseudo_register (gdbarch, regcache, buf, E_EXR_REGNUM, regno); |
f0bdd87d | 1212 | else |
10eaee5f | 1213 | regcache->raw_write (regno, buf); |
f0bdd87d YS |
1214 | } |
1215 | ||
1216 | static int | |
d3f73121 | 1217 | h8300_dbg_reg_to_regnum (struct gdbarch *gdbarch, int regno) |
f0bdd87d YS |
1218 | { |
1219 | if (regno == E_CCR_REGNUM) | |
be8626e0 | 1220 | return E_PSEUDO_CCR_REGNUM (gdbarch); |
f0bdd87d YS |
1221 | return regno; |
1222 | } | |
1223 | ||
1224 | static int | |
d3f73121 | 1225 | h8300s_dbg_reg_to_regnum (struct gdbarch *gdbarch, int regno) |
f0bdd87d YS |
1226 | { |
1227 | if (regno == E_CCR_REGNUM) | |
be8626e0 | 1228 | return E_PSEUDO_CCR_REGNUM (gdbarch); |
f0bdd87d | 1229 | if (regno == E_EXR_REGNUM) |
be8626e0 | 1230 | return E_PSEUDO_EXR_REGNUM (gdbarch); |
f0bdd87d YS |
1231 | return regno; |
1232 | } | |
1233 | ||
598cc9dc | 1234 | /*static unsigned char breakpoint[] = { 0x7A, 0xFF }; *//* ??? */ |
04180708 | 1235 | constexpr gdb_byte h8300_break_insn[] = { 0x01, 0x80 }; /* Sleep */ |
f0bdd87d | 1236 | |
04180708 | 1237 | typedef BP_MANIPULATION (h8300_break_insn) h8300_breakpoint; |
f0bdd87d | 1238 | |
f0bdd87d YS |
1239 | static struct gdbarch * |
1240 | h8300_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | |
1241 | { | |
f0bdd87d YS |
1242 | struct gdbarch *gdbarch; |
1243 | ||
1244 | arches = gdbarch_list_lookup_by_info (arches, &info); | |
1245 | if (arches != NULL) | |
1246 | return arches->gdbarch; | |
1247 | ||
f0bdd87d YS |
1248 | if (info.bfd_arch_info->arch != bfd_arch_h8300) |
1249 | return NULL; | |
1250 | ||
1251 | gdbarch = gdbarch_alloc (&info, 0); | |
1252 | ||
76fd5f74 PA |
1253 | set_gdbarch_register_sim_regno (gdbarch, h8300_register_sim_regno); |
1254 | ||
f0bdd87d YS |
1255 | switch (info.bfd_arch_info->mach) |
1256 | { | |
1257 | case bfd_mach_h8300: | |
1258 | set_gdbarch_num_regs (gdbarch, 13); | |
1259 | set_gdbarch_num_pseudo_regs (gdbarch, 1); | |
f0bdd87d YS |
1260 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum); |
1261 | set_gdbarch_stab_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum); | |
1262 | set_gdbarch_register_name (gdbarch, h8300_register_name); | |
1263 | set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT); | |
1264 | set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT); | |
862ba188 | 1265 | set_gdbarch_return_value (gdbarch, h8300_return_value); |
f0bdd87d YS |
1266 | break; |
1267 | case bfd_mach_h8300h: | |
1268 | case bfd_mach_h8300hn: | |
1269 | set_gdbarch_num_regs (gdbarch, 13); | |
1270 | set_gdbarch_num_pseudo_regs (gdbarch, 1); | |
f0bdd87d YS |
1271 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum); |
1272 | set_gdbarch_stab_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum); | |
c54e4253 | 1273 | set_gdbarch_register_name (gdbarch, h8300h_register_name); |
f0bdd87d YS |
1274 | if (info.bfd_arch_info->mach != bfd_mach_h8300hn) |
1275 | { | |
1276 | set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
1277 | set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
1278 | } | |
1279 | else | |
1280 | { | |
1281 | set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT); | |
1282 | set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT); | |
1283 | } | |
862ba188 | 1284 | set_gdbarch_return_value (gdbarch, h8300h_return_value); |
f0bdd87d YS |
1285 | break; |
1286 | case bfd_mach_h8300s: | |
1287 | case bfd_mach_h8300sn: | |
1288 | set_gdbarch_num_regs (gdbarch, 16); | |
1289 | set_gdbarch_num_pseudo_regs (gdbarch, 2); | |
f0bdd87d YS |
1290 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum); |
1291 | set_gdbarch_stab_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum); | |
1292 | set_gdbarch_register_name (gdbarch, h8300s_register_name); | |
1293 | if (info.bfd_arch_info->mach != bfd_mach_h8300sn) | |
1294 | { | |
1295 | set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
1296 | set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
1297 | } | |
1298 | else | |
1299 | { | |
1300 | set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT); | |
1301 | set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT); | |
1302 | } | |
862ba188 | 1303 | set_gdbarch_return_value (gdbarch, h8300h_return_value); |
f0bdd87d YS |
1304 | break; |
1305 | case bfd_mach_h8300sx: | |
1306 | case bfd_mach_h8300sxn: | |
1307 | set_gdbarch_num_regs (gdbarch, 18); | |
1308 | set_gdbarch_num_pseudo_regs (gdbarch, 2); | |
f0bdd87d YS |
1309 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum); |
1310 | set_gdbarch_stab_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum); | |
1311 | set_gdbarch_register_name (gdbarch, h8300sx_register_name); | |
1312 | if (info.bfd_arch_info->mach != bfd_mach_h8300sxn) | |
1313 | { | |
1314 | set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
1315 | set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
1316 | } | |
1317 | else | |
1318 | { | |
1319 | set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT); | |
1320 | set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT); | |
1321 | } | |
862ba188 | 1322 | set_gdbarch_return_value (gdbarch, h8300h_return_value); |
f0bdd87d YS |
1323 | break; |
1324 | } | |
1325 | ||
1326 | set_gdbarch_pseudo_register_read (gdbarch, h8300_pseudo_register_read); | |
1327 | set_gdbarch_pseudo_register_write (gdbarch, h8300_pseudo_register_write); | |
1328 | ||
1329 | /* | |
1330 | * Basic register fields and methods. | |
1331 | */ | |
1332 | ||
1333 | set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM); | |
f0bdd87d YS |
1334 | set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM); |
1335 | set_gdbarch_register_type (gdbarch, h8300_register_type); | |
1336 | set_gdbarch_print_registers_info (gdbarch, h8300_print_registers_info); | |
f0bdd87d YS |
1337 | |
1338 | /* | |
1339 | * Frame Info | |
1340 | */ | |
1341 | set_gdbarch_skip_prologue (gdbarch, h8300_skip_prologue); | |
1342 | ||
1343 | /* Frame unwinder. */ | |
862ba188 | 1344 | frame_base_set_default (gdbarch, &h8300_frame_base); |
f0bdd87d YS |
1345 | |
1346 | /* | |
85102364 | 1347 | * Miscellany |
f0bdd87d | 1348 | */ |
1777feb0 | 1349 | /* Stack grows up. */ |
f0bdd87d YS |
1350 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); |
1351 | ||
04180708 YQ |
1352 | set_gdbarch_breakpoint_kind_from_pc (gdbarch, |
1353 | h8300_breakpoint::kind_from_pc); | |
1354 | set_gdbarch_sw_breakpoint_from_kind (gdbarch, | |
1355 | h8300_breakpoint::bp_from_kind); | |
f0bdd87d YS |
1356 | set_gdbarch_push_dummy_call (gdbarch, h8300_push_dummy_call); |
1357 | ||
862ba188 | 1358 | set_gdbarch_char_signed (gdbarch, 0); |
f0bdd87d YS |
1359 | set_gdbarch_int_bit (gdbarch, 2 * TARGET_CHAR_BIT); |
1360 | set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
1361 | set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT); | |
53375380 PA |
1362 | |
1363 | set_gdbarch_wchar_bit (gdbarch, 2 * TARGET_CHAR_BIT); | |
1364 | set_gdbarch_wchar_signed (gdbarch, 0); | |
1365 | ||
f0bdd87d | 1366 | set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT); |
f92589cb | 1367 | set_gdbarch_double_format (gdbarch, floatformats_ieee_single); |
f0bdd87d | 1368 | set_gdbarch_long_double_bit (gdbarch, 4 * TARGET_CHAR_BIT); |
f92589cb | 1369 | set_gdbarch_long_double_format (gdbarch, floatformats_ieee_single); |
f0bdd87d YS |
1370 | |
1371 | set_gdbarch_believe_pcc_promotion (gdbarch, 1); | |
1372 | ||
862ba188 | 1373 | /* Hook in the DWARF CFI frame unwinder. */ |
94afd7a6 UW |
1374 | dwarf2_append_unwinders (gdbarch); |
1375 | frame_unwind_append_unwinder (gdbarch, &h8300_frame_unwind); | |
f0bdd87d YS |
1376 | |
1377 | return gdbarch; | |
1378 | ||
1379 | } | |
1380 | ||
6c265988 | 1381 | void _initialize_h8300_tdep (); |
f0bdd87d | 1382 | void |
6c265988 | 1383 | _initialize_h8300_tdep () |
f0bdd87d YS |
1384 | { |
1385 | register_gdbarch_init (bfd_arch_h8300, h8300_gdbarch_init); | |
1386 | } | |
1387 | ||
1388 | static int | |
1389 | is_h8300hmode (struct gdbarch *gdbarch) | |
1390 | { | |
1391 | return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx | |
1392 | || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn | |
1393 | || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300s | |
1394 | || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn | |
1395 | || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300h | |
1396 | || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300hn; | |
1397 | } | |
1398 | ||
1399 | static int | |
1400 | is_h8300smode (struct gdbarch *gdbarch) | |
1401 | { | |
1402 | return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx | |
1403 | || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn | |
1404 | || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300s | |
1405 | || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn; | |
1406 | } | |
1407 | ||
1408 | static int | |
1409 | is_h8300sxmode (struct gdbarch *gdbarch) | |
1410 | { | |
1411 | return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx | |
1412 | || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn; | |
1413 | } | |
1414 | ||
1415 | static int | |
1416 | is_h8300_normal_mode (struct gdbarch *gdbarch) | |
1417 | { | |
1418 | return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn | |
1419 | || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn | |
1420 | || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300hn; | |
1421 | } |