Commit | Line | Data |
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f0bdd87d YS |
1 | /* Target-machine dependent code for Renesas H8/300, for GDB. |
2 | ||
32d0add0 | 3 | Copyright (C) 1988-2015 Free Software Foundation, Inc. |
f0bdd87d YS |
4 | |
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 9 | the Free Software Foundation; either version 3 of the License, or |
f0bdd87d YS |
10 | (at your option) any later version. |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
a9762ec7 | 18 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
f0bdd87d YS |
19 | |
20 | /* | |
21 | Contributed by Steve Chamberlain | |
22 | sac@cygnus.com | |
23 | */ | |
24 | ||
25 | #include "defs.h" | |
26 | #include "value.h" | |
f0bdd87d YS |
27 | #include "arch-utils.h" |
28 | #include "regcache.h" | |
29 | #include "gdbcore.h" | |
30 | #include "objfiles.h" | |
f0bdd87d YS |
31 | #include "dis-asm.h" |
32 | #include "dwarf2-frame.h" | |
f0bdd87d YS |
33 | #include "frame-base.h" |
34 | #include "frame-unwind.h" | |
35 | ||
f0bdd87d YS |
36 | enum gdb_regnum |
37 | { | |
38 | E_R0_REGNUM, E_ER0_REGNUM = E_R0_REGNUM, E_ARG0_REGNUM = E_R0_REGNUM, | |
39 | E_RET0_REGNUM = E_R0_REGNUM, | |
40 | E_R1_REGNUM, E_ER1_REGNUM = E_R1_REGNUM, E_RET1_REGNUM = E_R1_REGNUM, | |
41 | E_R2_REGNUM, E_ER2_REGNUM = E_R2_REGNUM, E_ARGLAST_REGNUM = E_R2_REGNUM, | |
42 | E_R3_REGNUM, E_ER3_REGNUM = E_R3_REGNUM, | |
43 | E_R4_REGNUM, E_ER4_REGNUM = E_R4_REGNUM, | |
44 | E_R5_REGNUM, E_ER5_REGNUM = E_R5_REGNUM, | |
45 | E_R6_REGNUM, E_ER6_REGNUM = E_R6_REGNUM, E_FP_REGNUM = E_R6_REGNUM, | |
46 | E_SP_REGNUM, | |
47 | E_CCR_REGNUM, | |
48 | E_PC_REGNUM, | |
49 | E_CYCLES_REGNUM, | |
50 | E_TICK_REGNUM, E_EXR_REGNUM = E_TICK_REGNUM, | |
51 | E_INST_REGNUM, E_TICKS_REGNUM = E_INST_REGNUM, | |
52 | E_INSTS_REGNUM, | |
53 | E_MACH_REGNUM, | |
54 | E_MACL_REGNUM, | |
55 | E_SBR_REGNUM, | |
56 | E_VBR_REGNUM | |
57 | }; | |
58 | ||
59 | #define H8300_MAX_NUM_REGS 18 | |
60 | ||
be8626e0 MD |
61 | #define E_PSEUDO_CCR_REGNUM(gdbarch) (gdbarch_num_regs (gdbarch)) |
62 | #define E_PSEUDO_EXR_REGNUM(gdbarch) (gdbarch_num_regs (gdbarch)+1) | |
f0bdd87d | 63 | |
862ba188 CV |
64 | struct h8300_frame_cache |
65 | { | |
66 | /* Base address. */ | |
67 | CORE_ADDR base; | |
68 | CORE_ADDR sp_offset; | |
69 | CORE_ADDR pc; | |
70 | ||
1777feb0 | 71 | /* Flag showing that a frame has been created in the prologue code. */ |
862ba188 | 72 | int uses_fp; |
f0bdd87d | 73 | |
862ba188 CV |
74 | /* Saved registers. */ |
75 | CORE_ADDR saved_regs[H8300_MAX_NUM_REGS]; | |
76 | CORE_ADDR saved_sp; | |
77 | }; | |
78 | ||
79 | enum | |
80 | { | |
81 | h8300_reg_size = 2, | |
82 | h8300h_reg_size = 4, | |
83 | h8300_max_reg_size = 4, | |
84 | }; | |
85 | ||
86 | static int is_h8300hmode (struct gdbarch *gdbarch); | |
87 | static int is_h8300smode (struct gdbarch *gdbarch); | |
88 | static int is_h8300sxmode (struct gdbarch *gdbarch); | |
89 | static int is_h8300_normal_mode (struct gdbarch *gdbarch); | |
90 | ||
be8626e0 MD |
91 | #define BINWORD(gdbarch) ((is_h8300hmode (gdbarch) \ |
92 | && !is_h8300_normal_mode (gdbarch)) \ | |
862ba188 CV |
93 | ? h8300h_reg_size : h8300_reg_size) |
94 | ||
95 | static CORE_ADDR | |
96 | h8300_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
97 | { | |
98 | return frame_unwind_register_unsigned (next_frame, E_PC_REGNUM); | |
99 | } | |
100 | ||
101 | static CORE_ADDR | |
102 | h8300_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
103 | { | |
104 | return frame_unwind_register_unsigned (next_frame, E_SP_REGNUM); | |
105 | } | |
106 | ||
107 | static struct frame_id | |
94afd7a6 | 108 | h8300_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame) |
862ba188 | 109 | { |
94afd7a6 UW |
110 | CORE_ADDR sp = get_frame_register_unsigned (this_frame, E_SP_REGNUM); |
111 | return frame_id_build (sp, get_frame_pc (this_frame)); | |
862ba188 CV |
112 | } |
113 | ||
114 | /* Normal frames. */ | |
115 | ||
116 | /* Allocate and initialize a frame cache. */ | |
117 | ||
118 | static void | |
be8626e0 MD |
119 | h8300_init_frame_cache (struct gdbarch *gdbarch, |
120 | struct h8300_frame_cache *cache) | |
862ba188 CV |
121 | { |
122 | int i; | |
123 | ||
124 | /* Base address. */ | |
125 | cache->base = 0; | |
126 | cache->sp_offset = 0; | |
127 | cache->pc = 0; | |
128 | ||
129 | /* Frameless until proven otherwise. */ | |
130 | cache->uses_fp = 0; | |
131 | ||
132 | /* Saved registers. We initialize these to -1 since zero is a valid | |
133 | offset (that's where %fp is supposed to be stored). */ | |
be8626e0 | 134 | for (i = 0; i < gdbarch_num_regs (gdbarch); i++) |
862ba188 CV |
135 | cache->saved_regs[i] = -1; |
136 | } | |
137 | ||
138 | #define IS_MOVB_RnRm(x) (((x) & 0xff88) == 0x0c88) | |
139 | #define IS_MOVW_RnRm(x) (((x) & 0xff88) == 0x0d00) | |
140 | #define IS_MOVL_RnRm(x) (((x) & 0xff88) == 0x0f80) | |
141 | #define IS_MOVB_Rn16_SP(x) (((x) & 0xfff0) == 0x6ee0) | |
142 | #define IS_MOVB_EXT(x) ((x) == 0x7860) | |
143 | #define IS_MOVB_Rn24_SP(x) (((x) & 0xfff0) == 0x6aa0) | |
144 | #define IS_MOVW_Rn16_SP(x) (((x) & 0xfff0) == 0x6fe0) | |
145 | #define IS_MOVW_EXT(x) ((x) == 0x78e0) | |
146 | #define IS_MOVW_Rn24_SP(x) (((x) & 0xfff0) == 0x6ba0) | |
1777feb0 | 147 | /* Same instructions as mov.w, just prefixed with 0x0100. */ |
862ba188 CV |
148 | #define IS_MOVL_PRE(x) ((x) == 0x0100) |
149 | #define IS_MOVL_Rn16_SP(x) (((x) & 0xfff0) == 0x6fe0) | |
150 | #define IS_MOVL_EXT(x) ((x) == 0x78e0) | |
151 | #define IS_MOVL_Rn24_SP(x) (((x) & 0xfff0) == 0x6ba0) | |
152 | ||
153 | #define IS_PUSHFP_MOVESPFP(x) ((x) == 0x6df60d76) | |
154 | #define IS_PUSH_FP(x) ((x) == 0x01006df6) | |
155 | #define IS_MOV_SP_FP(x) ((x) == 0x0ff6) | |
156 | #define IS_SUB2_SP(x) ((x) == 0x1b87) | |
157 | #define IS_SUB4_SP(x) ((x) == 0x1b97) | |
158 | #define IS_ADD_IMM_SP(x) ((x) == 0x7a1f) | |
159 | #define IS_SUB_IMM_SP(x) ((x) == 0x7a3f) | |
160 | #define IS_SUBL4_SP(x) ((x) == 0x1acf) | |
161 | #define IS_MOV_IMM_Rn(x) (((x) & 0xfff0) == 0x7905) | |
162 | #define IS_SUB_RnSP(x) (((x) & 0xff0f) == 0x1907) | |
163 | #define IS_ADD_RnSP(x) (((x) & 0xff0f) == 0x0907) | |
164 | #define IS_PUSH(x) (((x) & 0xfff0) == 0x6df0) | |
f0bdd87d YS |
165 | |
166 | /* If the instruction at PC is an argument register spill, return its | |
167 | length. Otherwise, return zero. | |
168 | ||
169 | An argument register spill is an instruction that moves an argument | |
170 | from the register in which it was passed to the stack slot in which | |
171 | it really lives. It is a byte, word, or longword move from an | |
172 | argument register to a negative offset from the frame pointer. | |
173 | ||
174 | CV, 2003-06-16: Or, in optimized code or when the `register' qualifier | |
175 | is used, it could be a byte, word or long move to registers r3-r5. */ | |
176 | ||
177 | static int | |
e17a4113 | 178 | h8300_is_argument_spill (struct gdbarch *gdbarch, CORE_ADDR pc) |
f0bdd87d | 179 | { |
e17a4113 UW |
180 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
181 | int w = read_memory_unsigned_integer (pc, 2, byte_order); | |
f0bdd87d | 182 | |
862ba188 | 183 | if ((IS_MOVB_RnRm (w) || IS_MOVW_RnRm (w) || IS_MOVL_RnRm (w)) |
f0bdd87d YS |
184 | && (w & 0x70) <= 0x20 /* Rs is R0, R1 or R2 */ |
185 | && (w & 0x7) >= 0x3 && (w & 0x7) <= 0x5) /* Rd is R3, R4 or R5 */ | |
186 | return 2; | |
187 | ||
862ba188 | 188 | if (IS_MOVB_Rn16_SP (w) |
f0bdd87d YS |
189 | && 8 <= (w & 0xf) && (w & 0xf) <= 10) /* Rs is R0L, R1L, or R2L */ |
190 | { | |
e17a4113 UW |
191 | /* ... and d:16 is negative. */ |
192 | if (read_memory_integer (pc + 2, 2, byte_order) < 0) | |
f0bdd87d YS |
193 | return 4; |
194 | } | |
862ba188 | 195 | else if (IS_MOVB_EXT (w)) |
f0bdd87d | 196 | { |
e17a4113 UW |
197 | if (IS_MOVB_Rn24_SP (read_memory_unsigned_integer (pc + 2, |
198 | 2, byte_order))) | |
f0bdd87d | 199 | { |
e17a4113 | 200 | LONGEST disp = read_memory_integer (pc + 4, 4, byte_order); |
f0bdd87d YS |
201 | |
202 | /* ... and d:24 is negative. */ | |
203 | if (disp < 0 && disp > 0xffffff) | |
204 | return 8; | |
205 | } | |
206 | } | |
862ba188 | 207 | else if (IS_MOVW_Rn16_SP (w) |
f0bdd87d YS |
208 | && (w & 0xf) <= 2) /* Rs is R0, R1, or R2 */ |
209 | { | |
f0bdd87d | 210 | /* ... and d:16 is negative. */ |
e17a4113 | 211 | if (read_memory_integer (pc + 2, 2, byte_order) < 0) |
f0bdd87d YS |
212 | return 4; |
213 | } | |
862ba188 | 214 | else if (IS_MOVW_EXT (w)) |
f0bdd87d | 215 | { |
e17a4113 UW |
216 | if (IS_MOVW_Rn24_SP (read_memory_unsigned_integer (pc + 2, |
217 | 2, byte_order))) | |
f0bdd87d | 218 | { |
e17a4113 | 219 | LONGEST disp = read_memory_integer (pc + 4, 4, byte_order); |
f0bdd87d YS |
220 | |
221 | /* ... and d:24 is negative. */ | |
222 | if (disp < 0 && disp > 0xffffff) | |
223 | return 8; | |
224 | } | |
225 | } | |
862ba188 | 226 | else if (IS_MOVL_PRE (w)) |
f0bdd87d | 227 | { |
e17a4113 | 228 | int w2 = read_memory_integer (pc + 2, 2, byte_order); |
f0bdd87d | 229 | |
862ba188 | 230 | if (IS_MOVL_Rn16_SP (w2) |
f0bdd87d YS |
231 | && (w2 & 0xf) <= 2) /* Rs is ER0, ER1, or ER2 */ |
232 | { | |
f0bdd87d | 233 | /* ... and d:16 is negative. */ |
e17a4113 | 234 | if (read_memory_integer (pc + 4, 2, byte_order) < 0) |
f0bdd87d YS |
235 | return 6; |
236 | } | |
862ba188 | 237 | else if (IS_MOVL_EXT (w2)) |
f0bdd87d | 238 | { |
e17a4113 | 239 | int w3 = read_memory_integer (pc + 4, 2, byte_order); |
f0bdd87d | 240 | |
e17a4113 | 241 | if (IS_MOVL_Rn24_SP (read_memory_integer (pc + 4, 2, byte_order))) |
f0bdd87d | 242 | { |
e17a4113 | 243 | LONGEST disp = read_memory_integer (pc + 6, 4, byte_order); |
f0bdd87d YS |
244 | |
245 | /* ... and d:24 is negative. */ | |
246 | if (disp < 0 && disp > 0xffffff) | |
247 | return 10; | |
248 | } | |
249 | } | |
250 | } | |
251 | ||
252 | return 0; | |
253 | } | |
254 | ||
f0bdd87d YS |
255 | /* Do a full analysis of the prologue at PC and update CACHE |
256 | accordingly. Bail out early if CURRENT_PC is reached. Return the | |
257 | address where the analysis stopped. | |
258 | ||
259 | We handle all cases that can be generated by gcc. | |
260 | ||
261 | For allocating a stack frame: | |
262 | ||
263 | mov.w r6,@-sp | |
264 | mov.w sp,r6 | |
265 | mov.w #-n,rN | |
266 | add.w rN,sp | |
267 | ||
268 | mov.w r6,@-sp | |
269 | mov.w sp,r6 | |
270 | subs #2,sp | |
271 | (repeat) | |
272 | ||
273 | mov.l er6,@-sp | |
274 | mov.l sp,er6 | |
275 | add.l #-n,sp | |
276 | ||
277 | mov.w r6,@-sp | |
278 | mov.w sp,r6 | |
279 | subs #4,sp | |
280 | (repeat) | |
281 | ||
282 | For saving registers: | |
283 | ||
284 | mov.w rN,@-sp | |
285 | mov.l erN,@-sp | |
286 | stm.l reglist,@-sp | |
287 | ||
f0bdd87d YS |
288 | */ |
289 | ||
290 | static CORE_ADDR | |
e17a4113 UW |
291 | h8300_analyze_prologue (struct gdbarch *gdbarch, |
292 | CORE_ADDR pc, CORE_ADDR current_pc, | |
f0bdd87d YS |
293 | struct h8300_frame_cache *cache) |
294 | { | |
e17a4113 | 295 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
f0bdd87d | 296 | unsigned int op; |
862ba188 CV |
297 | int regno, i, spill_size; |
298 | ||
299 | cache->sp_offset = 0; | |
f0bdd87d | 300 | |
f0bdd87d YS |
301 | if (pc >= current_pc) |
302 | return current_pc; | |
303 | ||
e17a4113 | 304 | op = read_memory_unsigned_integer (pc, 4, byte_order); |
862ba188 CV |
305 | |
306 | if (IS_PUSHFP_MOVESPFP (op)) | |
307 | { | |
308 | cache->saved_regs[E_FP_REGNUM] = 0; | |
309 | cache->uses_fp = 1; | |
310 | pc += 4; | |
311 | } | |
312 | else if (IS_PUSH_FP (op)) | |
313 | { | |
314 | cache->saved_regs[E_FP_REGNUM] = 0; | |
315 | pc += 4; | |
316 | if (pc >= current_pc) | |
317 | return current_pc; | |
e17a4113 | 318 | op = read_memory_unsigned_integer (pc, 2, byte_order); |
862ba188 CV |
319 | if (IS_MOV_SP_FP (op)) |
320 | { | |
321 | cache->uses_fp = 1; | |
322 | pc += 2; | |
323 | } | |
324 | } | |
325 | ||
326 | while (pc < current_pc) | |
327 | { | |
e17a4113 | 328 | op = read_memory_unsigned_integer (pc, 2, byte_order); |
862ba188 CV |
329 | if (IS_SUB2_SP (op)) |
330 | { | |
331 | cache->sp_offset += 2; | |
332 | pc += 2; | |
333 | } | |
334 | else if (IS_SUB4_SP (op)) | |
335 | { | |
336 | cache->sp_offset += 4; | |
337 | pc += 2; | |
338 | } | |
339 | else if (IS_ADD_IMM_SP (op)) | |
340 | { | |
e17a4113 | 341 | cache->sp_offset += -read_memory_integer (pc + 2, 2, byte_order); |
862ba188 CV |
342 | pc += 4; |
343 | } | |
344 | else if (IS_SUB_IMM_SP (op)) | |
345 | { | |
e17a4113 | 346 | cache->sp_offset += read_memory_integer (pc + 2, 2, byte_order); |
862ba188 CV |
347 | pc += 4; |
348 | } | |
349 | else if (IS_SUBL4_SP (op)) | |
350 | { | |
351 | cache->sp_offset += 4; | |
352 | pc += 2; | |
353 | } | |
354 | else if (IS_MOV_IMM_Rn (op)) | |
355 | { | |
e17a4113 | 356 | int offset = read_memory_integer (pc + 2, 2, byte_order); |
862ba188 | 357 | regno = op & 0x000f; |
e17a4113 | 358 | op = read_memory_unsigned_integer (pc + 4, 2, byte_order); |
862ba188 CV |
359 | if (IS_ADD_RnSP (op) && (op & 0x00f0) == regno) |
360 | { | |
361 | cache->sp_offset -= offset; | |
362 | pc += 6; | |
363 | } | |
364 | else if (IS_SUB_RnSP (op) && (op & 0x00f0) == regno) | |
365 | { | |
366 | cache->sp_offset += offset; | |
367 | pc += 6; | |
368 | } | |
369 | else | |
370 | break; | |
371 | } | |
372 | else if (IS_PUSH (op)) | |
373 | { | |
374 | regno = op & 0x000f; | |
375 | cache->sp_offset += 2; | |
376 | cache->saved_regs[regno] = cache->sp_offset; | |
377 | pc += 2; | |
378 | } | |
379 | else if (op == 0x0100) | |
380 | { | |
e17a4113 | 381 | op = read_memory_unsigned_integer (pc + 2, 2, byte_order); |
862ba188 CV |
382 | if (IS_PUSH (op)) |
383 | { | |
384 | regno = op & 0x000f; | |
385 | cache->sp_offset += 4; | |
386 | cache->saved_regs[regno] = cache->sp_offset; | |
387 | pc += 4; | |
388 | } | |
389 | else | |
390 | break; | |
391 | } | |
392 | else if ((op & 0xffcf) == 0x0100) | |
393 | { | |
394 | int op1; | |
e17a4113 | 395 | op1 = read_memory_unsigned_integer (pc + 2, 2, byte_order); |
862ba188 CV |
396 | if (IS_PUSH (op1)) |
397 | { | |
398 | /* Since the prefix is 0x01x0, this is not a simple pushm but a | |
399 | stm.l reglist,@-sp */ | |
400 | i = ((op & 0x0030) >> 4) + 1; | |
401 | regno = op1 & 0x000f; | |
402 | for (; i > 0; regno++, --i) | |
403 | { | |
404 | cache->sp_offset += 4; | |
405 | cache->saved_regs[regno] = cache->sp_offset; | |
406 | } | |
407 | pc += 4; | |
408 | } | |
409 | else | |
410 | break; | |
411 | } | |
412 | else | |
413 | break; | |
414 | } | |
415 | ||
416 | /* Check for spilling an argument register to the stack frame. | |
417 | This could also be an initializing store from non-prologue code, | |
418 | but I don't think there's any harm in skipping that. */ | |
e17a4113 | 419 | while ((spill_size = h8300_is_argument_spill (gdbarch, pc)) > 0 |
862ba188 CV |
420 | && pc + spill_size <= current_pc) |
421 | pc += spill_size; | |
f0bdd87d YS |
422 | |
423 | return pc; | |
424 | } | |
425 | ||
426 | static struct h8300_frame_cache * | |
94afd7a6 | 427 | h8300_frame_cache (struct frame_info *this_frame, void **this_cache) |
f0bdd87d | 428 | { |
94afd7a6 | 429 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
f0bdd87d | 430 | struct h8300_frame_cache *cache; |
f0bdd87d | 431 | int i; |
862ba188 | 432 | CORE_ADDR current_pc; |
f0bdd87d YS |
433 | |
434 | if (*this_cache) | |
435 | return *this_cache; | |
436 | ||
862ba188 | 437 | cache = FRAME_OBSTACK_ZALLOC (struct h8300_frame_cache); |
be8626e0 | 438 | h8300_init_frame_cache (gdbarch, cache); |
f0bdd87d YS |
439 | *this_cache = cache; |
440 | ||
441 | /* In principle, for normal frames, %fp holds the frame pointer, | |
442 | which holds the base address for the current stack frame. | |
443 | However, for functions that don't need it, the frame pointer is | |
444 | optional. For these "frameless" functions the frame pointer is | |
862ba188 | 445 | actually the frame pointer of the calling frame. */ |
f0bdd87d | 446 | |
94afd7a6 | 447 | cache->base = get_frame_register_unsigned (this_frame, E_FP_REGNUM); |
f0bdd87d YS |
448 | if (cache->base == 0) |
449 | return cache; | |
450 | ||
be8626e0 | 451 | cache->saved_regs[E_PC_REGNUM] = -BINWORD (gdbarch); |
f0bdd87d | 452 | |
94afd7a6 UW |
453 | cache->pc = get_frame_func (this_frame); |
454 | current_pc = get_frame_pc (this_frame); | |
f0bdd87d | 455 | if (cache->pc != 0) |
e17a4113 | 456 | h8300_analyze_prologue (gdbarch, cache->pc, current_pc, cache); |
f0bdd87d | 457 | |
862ba188 | 458 | if (!cache->uses_fp) |
f0bdd87d YS |
459 | { |
460 | /* We didn't find a valid frame, which means that CACHE->base | |
461 | currently holds the frame pointer for our calling frame. If | |
462 | we're at the start of a function, or somewhere half-way its | |
463 | prologue, the function's frame probably hasn't been fully | |
464 | setup yet. Try to reconstruct the base address for the stack | |
465 | frame by looking at the stack pointer. For truly "frameless" | |
466 | functions this might work too. */ | |
467 | ||
94afd7a6 | 468 | cache->base = get_frame_register_unsigned (this_frame, E_SP_REGNUM) |
862ba188 | 469 | + cache->sp_offset; |
be8626e0 | 470 | cache->saved_sp = cache->base + BINWORD (gdbarch); |
862ba188 CV |
471 | cache->saved_regs[E_PC_REGNUM] = 0; |
472 | } | |
473 | else | |
474 | { | |
be8626e0 MD |
475 | cache->saved_sp = cache->base + 2 * BINWORD (gdbarch); |
476 | cache->saved_regs[E_PC_REGNUM] = -BINWORD (gdbarch); | |
f0bdd87d | 477 | } |
f0bdd87d YS |
478 | |
479 | /* Adjust all the saved registers such that they contain addresses | |
480 | instead of offsets. */ | |
be8626e0 | 481 | for (i = 0; i < gdbarch_num_regs (gdbarch); i++) |
f0bdd87d | 482 | if (cache->saved_regs[i] != -1) |
862ba188 | 483 | cache->saved_regs[i] = cache->base - cache->saved_regs[i]; |
f0bdd87d YS |
484 | |
485 | return cache; | |
486 | } | |
487 | ||
488 | static void | |
94afd7a6 | 489 | h8300_frame_this_id (struct frame_info *this_frame, void **this_cache, |
f0bdd87d YS |
490 | struct frame_id *this_id) |
491 | { | |
492 | struct h8300_frame_cache *cache = | |
94afd7a6 | 493 | h8300_frame_cache (this_frame, this_cache); |
f0bdd87d YS |
494 | |
495 | /* This marks the outermost frame. */ | |
496 | if (cache->base == 0) | |
497 | return; | |
498 | ||
862ba188 | 499 | *this_id = frame_id_build (cache->saved_sp, cache->pc); |
f0bdd87d YS |
500 | } |
501 | ||
94afd7a6 UW |
502 | static struct value * |
503 | h8300_frame_prev_register (struct frame_info *this_frame, void **this_cache, | |
504 | int regnum) | |
f0bdd87d | 505 | { |
94afd7a6 | 506 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
f0bdd87d | 507 | struct h8300_frame_cache *cache = |
94afd7a6 | 508 | h8300_frame_cache (this_frame, this_cache); |
f0bdd87d YS |
509 | |
510 | gdb_assert (regnum >= 0); | |
511 | ||
512 | if (regnum == E_SP_REGNUM && cache->saved_sp) | |
94afd7a6 | 513 | return frame_unwind_got_constant (this_frame, regnum, cache->saved_sp); |
f0bdd87d | 514 | |
ea78bae4 | 515 | if (regnum < gdbarch_num_regs (gdbarch) |
f57d151a | 516 | && cache->saved_regs[regnum] != -1) |
94afd7a6 UW |
517 | return frame_unwind_got_memory (this_frame, regnum, |
518 | cache->saved_regs[regnum]); | |
f0bdd87d | 519 | |
94afd7a6 | 520 | return frame_unwind_got_register (this_frame, regnum, regnum); |
f0bdd87d YS |
521 | } |
522 | ||
523 | static const struct frame_unwind h8300_frame_unwind = { | |
524 | NORMAL_FRAME, | |
8fbca658 | 525 | default_frame_unwind_stop_reason, |
f0bdd87d | 526 | h8300_frame_this_id, |
94afd7a6 UW |
527 | h8300_frame_prev_register, |
528 | NULL, | |
529 | default_frame_sniffer | |
f0bdd87d YS |
530 | }; |
531 | ||
862ba188 | 532 | static CORE_ADDR |
94afd7a6 | 533 | h8300_frame_base_address (struct frame_info *this_frame, void **this_cache) |
862ba188 | 534 | { |
94afd7a6 | 535 | struct h8300_frame_cache *cache = h8300_frame_cache (this_frame, this_cache); |
862ba188 CV |
536 | return cache->base; |
537 | } | |
538 | ||
539 | static const struct frame_base h8300_frame_base = { | |
540 | &h8300_frame_unwind, | |
541 | h8300_frame_base_address, | |
542 | h8300_frame_base_address, | |
543 | h8300_frame_base_address | |
544 | }; | |
545 | ||
546 | static CORE_ADDR | |
6093d2eb | 547 | h8300_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) |
862ba188 CV |
548 | { |
549 | CORE_ADDR func_addr = 0 , func_end = 0; | |
550 | ||
551 | if (find_pc_partial_function (pc, NULL, &func_addr, &func_end)) | |
552 | { | |
553 | struct symtab_and_line sal; | |
554 | struct h8300_frame_cache cache; | |
555 | ||
556 | /* Found a function. */ | |
557 | sal = find_pc_line (func_addr, 0); | |
558 | if (sal.end && sal.end < func_end) | |
559 | /* Found a line number, use it as end of prologue. */ | |
560 | return sal.end; | |
561 | ||
562 | /* No useable line symbol. Use prologue parsing method. */ | |
be8626e0 | 563 | h8300_init_frame_cache (gdbarch, &cache); |
e17a4113 | 564 | return h8300_analyze_prologue (gdbarch, func_addr, func_end, &cache); |
862ba188 CV |
565 | } |
566 | ||
567 | /* No function symbol -- just return the PC. */ | |
568 | return (CORE_ADDR) pc; | |
569 | } | |
570 | ||
f0bdd87d YS |
571 | /* Function: push_dummy_call |
572 | Setup the function arguments for calling a function in the inferior. | |
573 | In this discussion, a `word' is 16 bits on the H8/300s, and 32 bits | |
574 | on the H8/300H. | |
575 | ||
576 | There are actually two ABI's here: -mquickcall (the default) and | |
577 | -mno-quickcall. With -mno-quickcall, all arguments are passed on | |
578 | the stack after the return address, word-aligned. With | |
579 | -mquickcall, GCC tries to use r0 -- r2 to pass registers. Since | |
580 | GCC doesn't indicate in the object file which ABI was used to | |
581 | compile it, GDB only supports the default --- -mquickcall. | |
582 | ||
583 | Here are the rules for -mquickcall, in detail: | |
584 | ||
585 | Each argument, whether scalar or aggregate, is padded to occupy a | |
586 | whole number of words. Arguments smaller than a word are padded at | |
587 | the most significant end; those larger than a word are padded at | |
588 | the least significant end. | |
589 | ||
590 | The initial arguments are passed in r0 -- r2. Earlier arguments go in | |
591 | lower-numbered registers. Multi-word arguments are passed in | |
592 | consecutive registers, with the most significant end in the | |
593 | lower-numbered register. | |
594 | ||
595 | If an argument doesn't fit entirely in the remaining registers, it | |
596 | is passed entirely on the stack. Stack arguments begin just after | |
597 | the return address. Once an argument has overflowed onto the stack | |
598 | this way, all subsequent arguments are passed on the stack. | |
599 | ||
600 | The above rule has odd consequences. For example, on the h8/300s, | |
601 | if a function takes two longs and an int as arguments: | |
602 | - the first long will be passed in r0/r1, | |
603 | - the second long will be passed entirely on the stack, since it | |
604 | doesn't fit in r2, | |
605 | - and the int will be passed on the stack, even though it could fit | |
606 | in r2. | |
607 | ||
608 | A weird exception: if an argument is larger than a word, but not a | |
609 | whole number of words in length (before padding), it is passed on | |
610 | the stack following the rules for stack arguments above, even if | |
611 | there are sufficient registers available to hold it. Stranger | |
612 | still, the argument registers are still `used up' --- even though | |
613 | there's nothing in them. | |
614 | ||
615 | So, for example, on the h8/300s, if a function expects a three-byte | |
616 | structure and an int, the structure will go on the stack, and the | |
617 | int will go in r2, not r0. | |
618 | ||
619 | If the function returns an aggregate type (struct, union, or class) | |
620 | by value, the caller must allocate space to hold the return value, | |
621 | and pass the callee a pointer to this space as an invisible first | |
622 | argument, in R0. | |
623 | ||
624 | For varargs functions, the last fixed argument and all the variable | |
625 | arguments are always passed on the stack. This means that calls to | |
626 | varargs functions don't work properly unless there is a prototype | |
627 | in scope. | |
628 | ||
629 | Basically, this ABI is not good, for the following reasons: | |
630 | - You can't call vararg functions properly unless a prototype is in scope. | |
631 | - Structure passing is inconsistent, to no purpose I can see. | |
632 | - It often wastes argument registers, of which there are only three | |
633 | to begin with. */ | |
634 | ||
635 | static CORE_ADDR | |
636 | h8300_push_dummy_call (struct gdbarch *gdbarch, struct value *function, | |
637 | struct regcache *regcache, CORE_ADDR bp_addr, | |
638 | int nargs, struct value **args, CORE_ADDR sp, | |
639 | int struct_return, CORE_ADDR struct_addr) | |
640 | { | |
e17a4113 | 641 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
f0bdd87d | 642 | int stack_alloc = 0, stack_offset = 0; |
be8626e0 | 643 | int wordsize = BINWORD (gdbarch); |
f0bdd87d YS |
644 | int reg = E_ARG0_REGNUM; |
645 | int argument; | |
646 | ||
647 | /* First, make sure the stack is properly aligned. */ | |
648 | sp = align_down (sp, wordsize); | |
649 | ||
650 | /* Now make sure there's space on the stack for the arguments. We | |
651 | may over-allocate a little here, but that won't hurt anything. */ | |
652 | for (argument = 0; argument < nargs; argument++) | |
653 | stack_alloc += align_up (TYPE_LENGTH (value_type (args[argument])), | |
654 | wordsize); | |
655 | sp -= stack_alloc; | |
656 | ||
657 | /* Now load as many arguments as possible into registers, and push | |
658 | the rest onto the stack. | |
659 | If we're returning a structure by value, then we must pass a | |
660 | pointer to the buffer for the return value as an invisible first | |
661 | argument. */ | |
662 | if (struct_return) | |
663 | regcache_cooked_write_unsigned (regcache, reg++, struct_addr); | |
664 | ||
665 | for (argument = 0; argument < nargs; argument++) | |
666 | { | |
ecfb0d68 | 667 | struct cleanup *back_to; |
f0bdd87d YS |
668 | struct type *type = value_type (args[argument]); |
669 | int len = TYPE_LENGTH (type); | |
670 | char *contents = (char *) value_contents (args[argument]); | |
671 | ||
672 | /* Pad the argument appropriately. */ | |
673 | int padded_len = align_up (len, wordsize); | |
ecfb0d68 SP |
674 | gdb_byte *padded = xmalloc (padded_len); |
675 | back_to = make_cleanup (xfree, padded); | |
f0bdd87d YS |
676 | |
677 | memset (padded, 0, padded_len); | |
678 | memcpy (len < wordsize ? padded + padded_len - len : padded, | |
679 | contents, len); | |
680 | ||
681 | /* Could the argument fit in the remaining registers? */ | |
682 | if (padded_len <= (E_ARGLAST_REGNUM - reg + 1) * wordsize) | |
683 | { | |
684 | /* Are we going to pass it on the stack anyway, for no good | |
685 | reason? */ | |
686 | if (len > wordsize && len % wordsize) | |
687 | { | |
688 | /* I feel so unclean. */ | |
689 | write_memory (sp + stack_offset, padded, padded_len); | |
690 | stack_offset += padded_len; | |
691 | ||
692 | /* That's right --- even though we passed the argument | |
693 | on the stack, we consume the registers anyway! Love | |
694 | me, love my dog. */ | |
695 | reg += padded_len / wordsize; | |
696 | } | |
697 | else | |
698 | { | |
699 | /* Heavens to Betsy --- it's really going in registers! | |
99e42fd8 PA |
700 | Note that on the h8/300s, there are gaps between the |
701 | registers in the register file. */ | |
f0bdd87d YS |
702 | int offset; |
703 | ||
704 | for (offset = 0; offset < padded_len; offset += wordsize) | |
705 | { | |
e17a4113 UW |
706 | ULONGEST word |
707 | = extract_unsigned_integer (padded + offset, | |
708 | wordsize, byte_order); | |
f0bdd87d YS |
709 | regcache_cooked_write_unsigned (regcache, reg++, word); |
710 | } | |
711 | } | |
712 | } | |
713 | else | |
714 | { | |
715 | /* It doesn't fit in registers! Onto the stack it goes. */ | |
716 | write_memory (sp + stack_offset, padded, padded_len); | |
717 | stack_offset += padded_len; | |
718 | ||
719 | /* Once one argument has spilled onto the stack, all | |
720 | subsequent arguments go on the stack. */ | |
721 | reg = E_ARGLAST_REGNUM + 1; | |
722 | } | |
ecfb0d68 SP |
723 | |
724 | do_cleanups (back_to); | |
f0bdd87d YS |
725 | } |
726 | ||
727 | /* Store return address. */ | |
728 | sp -= wordsize; | |
e17a4113 | 729 | write_memory_unsigned_integer (sp, wordsize, byte_order, bp_addr); |
f0bdd87d YS |
730 | |
731 | /* Update stack pointer. */ | |
732 | regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, sp); | |
733 | ||
862ba188 CV |
734 | /* Return the new stack pointer minus the return address slot since |
735 | that's what DWARF2/GCC uses as the frame's CFA. */ | |
736 | return sp + wordsize; | |
f0bdd87d YS |
737 | } |
738 | ||
739 | /* Function: extract_return_value | |
740 | Figure out where in REGBUF the called function has left its return value. | |
741 | Copy that into VALBUF. Be sure to account for CPU type. */ | |
742 | ||
743 | static void | |
744 | h8300_extract_return_value (struct type *type, struct regcache *regcache, | |
745 | void *valbuf) | |
746 | { | |
e17a4113 UW |
747 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
748 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
f0bdd87d YS |
749 | int len = TYPE_LENGTH (type); |
750 | ULONGEST c, addr; | |
751 | ||
bad43aa5 | 752 | switch (len) |
f0bdd87d YS |
753 | { |
754 | case 1: | |
755 | case 2: | |
756 | regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c); | |
bad43aa5 | 757 | store_unsigned_integer (valbuf, len, byte_order, c); |
f0bdd87d YS |
758 | break; |
759 | case 4: /* Needs two registers on plain H8/300 */ | |
760 | regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c); | |
e17a4113 | 761 | store_unsigned_integer (valbuf, 2, byte_order, c); |
f0bdd87d | 762 | regcache_cooked_read_unsigned (regcache, E_RET1_REGNUM, &c); |
e17a4113 | 763 | store_unsigned_integer ((void *)((char *) valbuf + 2), 2, byte_order, c); |
f0bdd87d YS |
764 | break; |
765 | case 8: /* long long is now 8 bytes. */ | |
766 | if (TYPE_CODE (type) == TYPE_CODE_INT) | |
767 | { | |
768 | regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &addr); | |
bad43aa5 SP |
769 | c = read_memory_unsigned_integer ((CORE_ADDR) addr, len, byte_order); |
770 | store_unsigned_integer (valbuf, len, byte_order, c); | |
f0bdd87d YS |
771 | } |
772 | else | |
773 | { | |
a73c6dcd | 774 | error (_("I don't know how this 8 byte value is returned.")); |
f0bdd87d YS |
775 | } |
776 | break; | |
777 | } | |
778 | } | |
779 | ||
780 | static void | |
781 | h8300h_extract_return_value (struct type *type, struct regcache *regcache, | |
782 | void *valbuf) | |
783 | { | |
e17a4113 UW |
784 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
785 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
22e048c9 | 786 | ULONGEST c; |
f0bdd87d | 787 | |
744a8059 | 788 | switch (TYPE_LENGTH (type)) |
f0bdd87d YS |
789 | { |
790 | case 1: | |
791 | case 2: | |
792 | case 4: | |
793 | regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c); | |
744a8059 | 794 | store_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order, c); |
f0bdd87d YS |
795 | break; |
796 | case 8: /* long long is now 8 bytes. */ | |
797 | if (TYPE_CODE (type) == TYPE_CODE_INT) | |
798 | { | |
862ba188 | 799 | regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c); |
e17a4113 | 800 | store_unsigned_integer (valbuf, 4, byte_order, c); |
862ba188 | 801 | regcache_cooked_read_unsigned (regcache, E_RET1_REGNUM, &c); |
e17a4113 UW |
802 | store_unsigned_integer ((void *) ((char *) valbuf + 4), 4, |
803 | byte_order, c); | |
f0bdd87d YS |
804 | } |
805 | else | |
806 | { | |
a73c6dcd | 807 | error (_("I don't know how this 8 byte value is returned.")); |
f0bdd87d YS |
808 | } |
809 | break; | |
810 | } | |
811 | } | |
812 | ||
63807e1d | 813 | static int |
862ba188 CV |
814 | h8300_use_struct_convention (struct type *value_type) |
815 | { | |
816 | /* Types of 1, 2 or 4 bytes are returned in R0/R1, everything else on the | |
1777feb0 | 817 | stack. */ |
862ba188 CV |
818 | |
819 | if (TYPE_CODE (value_type) == TYPE_CODE_STRUCT | |
820 | || TYPE_CODE (value_type) == TYPE_CODE_UNION) | |
821 | return 1; | |
822 | return !(TYPE_LENGTH (value_type) == 1 | |
823 | || TYPE_LENGTH (value_type) == 2 | |
824 | || TYPE_LENGTH (value_type) == 4); | |
825 | } | |
826 | ||
63807e1d | 827 | static int |
862ba188 CV |
828 | h8300h_use_struct_convention (struct type *value_type) |
829 | { | |
830 | /* Types of 1, 2 or 4 bytes are returned in R0, INT types of 8 bytes are | |
1777feb0 | 831 | returned in R0/R1, everything else on the stack. */ |
862ba188 CV |
832 | if (TYPE_CODE (value_type) == TYPE_CODE_STRUCT |
833 | || TYPE_CODE (value_type) == TYPE_CODE_UNION) | |
834 | return 1; | |
835 | return !(TYPE_LENGTH (value_type) == 1 | |
836 | || TYPE_LENGTH (value_type) == 2 | |
837 | || TYPE_LENGTH (value_type) == 4 | |
838 | || (TYPE_LENGTH (value_type) == 8 | |
839 | && TYPE_CODE (value_type) == TYPE_CODE_INT)); | |
840 | } | |
f0bdd87d YS |
841 | |
842 | /* Function: store_return_value | |
843 | Place the appropriate value in the appropriate registers. | |
844 | Primarily used by the RETURN command. */ | |
845 | ||
846 | static void | |
847 | h8300_store_return_value (struct type *type, struct regcache *regcache, | |
848 | const void *valbuf) | |
849 | { | |
e17a4113 UW |
850 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
851 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
f0bdd87d YS |
852 | ULONGEST val; |
853 | ||
744a8059 | 854 | switch (TYPE_LENGTH (type)) |
f0bdd87d YS |
855 | { |
856 | case 1: | |
1777feb0 | 857 | case 2: /* short... */ |
744a8059 | 858 | val = extract_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order); |
f0bdd87d YS |
859 | regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, val); |
860 | break; | |
861 | case 4: /* long, float */ | |
744a8059 | 862 | val = extract_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order); |
f0bdd87d YS |
863 | regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, |
864 | (val >> 16) & 0xffff); | |
865 | regcache_cooked_write_unsigned (regcache, E_RET1_REGNUM, val & 0xffff); | |
866 | break; | |
1777feb0 MS |
867 | case 8: /* long long, double and long double |
868 | are all defined as 4 byte types so | |
869 | far so this shouldn't happen. */ | |
a73c6dcd | 870 | error (_("I don't know how to return an 8 byte value.")); |
f0bdd87d YS |
871 | break; |
872 | } | |
873 | } | |
874 | ||
875 | static void | |
876 | h8300h_store_return_value (struct type *type, struct regcache *regcache, | |
877 | const void *valbuf) | |
878 | { | |
e17a4113 UW |
879 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
880 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
f0bdd87d YS |
881 | ULONGEST val; |
882 | ||
744a8059 | 883 | switch (TYPE_LENGTH (type)) |
f0bdd87d YS |
884 | { |
885 | case 1: | |
886 | case 2: | |
887 | case 4: /* long, float */ | |
744a8059 | 888 | val = extract_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order); |
f0bdd87d YS |
889 | regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, val); |
890 | break; | |
862ba188 | 891 | case 8: |
744a8059 | 892 | val = extract_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order); |
862ba188 CV |
893 | regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, |
894 | (val >> 32) & 0xffffffff); | |
895 | regcache_cooked_write_unsigned (regcache, E_RET1_REGNUM, | |
896 | val & 0xffffffff); | |
f0bdd87d YS |
897 | break; |
898 | } | |
899 | } | |
900 | ||
862ba188 | 901 | static enum return_value_convention |
6a3a010b | 902 | h8300_return_value (struct gdbarch *gdbarch, struct value *function, |
c055b101 | 903 | struct type *type, struct regcache *regcache, |
5d0d05b6 | 904 | gdb_byte *readbuf, const gdb_byte *writebuf) |
862ba188 CV |
905 | { |
906 | if (h8300_use_struct_convention (type)) | |
907 | return RETURN_VALUE_STRUCT_CONVENTION; | |
908 | if (writebuf) | |
909 | h8300_store_return_value (type, regcache, writebuf); | |
910 | else if (readbuf) | |
911 | h8300_extract_return_value (type, regcache, readbuf); | |
912 | return RETURN_VALUE_REGISTER_CONVENTION; | |
913 | } | |
914 | ||
915 | static enum return_value_convention | |
6a3a010b | 916 | h8300h_return_value (struct gdbarch *gdbarch, struct value *function, |
c055b101 | 917 | struct type *type, struct regcache *regcache, |
5d0d05b6 | 918 | gdb_byte *readbuf, const gdb_byte *writebuf) |
862ba188 CV |
919 | { |
920 | if (h8300h_use_struct_convention (type)) | |
921 | { | |
922 | if (readbuf) | |
923 | { | |
924 | ULONGEST addr; | |
925 | ||
926 | regcache_raw_read_unsigned (regcache, E_R0_REGNUM, &addr); | |
927 | read_memory (addr, readbuf, TYPE_LENGTH (type)); | |
928 | } | |
929 | ||
930 | return RETURN_VALUE_ABI_RETURNS_ADDRESS; | |
931 | } | |
932 | if (writebuf) | |
933 | h8300h_store_return_value (type, regcache, writebuf); | |
934 | else if (readbuf) | |
935 | h8300h_extract_return_value (type, regcache, readbuf); | |
936 | return RETURN_VALUE_REGISTER_CONVENTION; | |
937 | } | |
938 | ||
76fd5f74 PA |
939 | /* Implementation of 'register_sim_regno' gdbarch method. */ |
940 | ||
941 | static int | |
942 | h8300_register_sim_regno (struct gdbarch *gdbarch, int regnum) | |
943 | { | |
944 | /* Only makes sense to supply raw registers. */ | |
945 | gdb_assert (regnum >= 0 && regnum < gdbarch_num_regs (gdbarch)); | |
946 | ||
947 | /* We hide the raw ccr from the user by making it nameless. Because | |
948 | the default register_sim_regno hook returns | |
949 | LEGACY_SIM_REGNO_IGNORE for unnamed registers, we need to | |
950 | override it. The sim register numbering is compatible with | |
951 | gdb's. */ | |
952 | return regnum; | |
953 | } | |
954 | ||
f0bdd87d | 955 | static const char * |
d93859e2 | 956 | h8300_register_name (struct gdbarch *gdbarch, int regno) |
f0bdd87d YS |
957 | { |
958 | /* The register names change depending on which h8300 processor | |
1777feb0 | 959 | type is selected. */ |
f0bdd87d YS |
960 | static char *register_names[] = { |
961 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", | |
962 | "sp", "", "pc", "cycles", "tick", "inst", | |
963 | "ccr", /* pseudo register */ | |
964 | }; | |
965 | if (regno < 0 | |
966 | || regno >= (sizeof (register_names) / sizeof (*register_names))) | |
967 | internal_error (__FILE__, __LINE__, | |
a73c6dcd MS |
968 | _("h8300_register_name: illegal register number %d"), |
969 | regno); | |
f0bdd87d YS |
970 | else |
971 | return register_names[regno]; | |
972 | } | |
973 | ||
974 | static const char * | |
d93859e2 | 975 | h8300s_register_name (struct gdbarch *gdbarch, int regno) |
f0bdd87d YS |
976 | { |
977 | static char *register_names[] = { | |
978 | "er0", "er1", "er2", "er3", "er4", "er5", "er6", | |
979 | "sp", "", "pc", "cycles", "", "tick", "inst", | |
980 | "mach", "macl", | |
981 | "ccr", "exr" /* pseudo registers */ | |
982 | }; | |
983 | if (regno < 0 | |
984 | || regno >= (sizeof (register_names) / sizeof (*register_names))) | |
985 | internal_error (__FILE__, __LINE__, | |
a73c6dcd | 986 | _("h8300s_register_name: illegal register number %d"), |
f0bdd87d YS |
987 | regno); |
988 | else | |
989 | return register_names[regno]; | |
990 | } | |
991 | ||
992 | static const char * | |
d93859e2 | 993 | h8300sx_register_name (struct gdbarch *gdbarch, int regno) |
f0bdd87d YS |
994 | { |
995 | static char *register_names[] = { | |
996 | "er0", "er1", "er2", "er3", "er4", "er5", "er6", | |
997 | "sp", "", "pc", "cycles", "", "tick", "inst", | |
998 | "mach", "macl", "sbr", "vbr", | |
999 | "ccr", "exr" /* pseudo registers */ | |
1000 | }; | |
1001 | if (regno < 0 | |
1002 | || regno >= (sizeof (register_names) / sizeof (*register_names))) | |
1003 | internal_error (__FILE__, __LINE__, | |
a73c6dcd | 1004 | _("h8300sx_register_name: illegal register number %d"), |
f0bdd87d YS |
1005 | regno); |
1006 | else | |
1007 | return register_names[regno]; | |
1008 | } | |
1009 | ||
1010 | static void | |
1011 | h8300_print_register (struct gdbarch *gdbarch, struct ui_file *file, | |
1012 | struct frame_info *frame, int regno) | |
1013 | { | |
1014 | LONGEST rval; | |
1015 | const char *name = gdbarch_register_name (gdbarch, regno); | |
1016 | ||
1017 | if (!name || !*name) | |
1018 | return; | |
1019 | ||
1020 | rval = get_frame_register_signed (frame, regno); | |
1021 | ||
1022 | fprintf_filtered (file, "%-14s ", name); | |
be8626e0 MD |
1023 | if ((regno == E_PSEUDO_CCR_REGNUM (gdbarch)) || \ |
1024 | (regno == E_PSEUDO_EXR_REGNUM (gdbarch) && is_h8300smode (gdbarch))) | |
f0bdd87d YS |
1025 | { |
1026 | fprintf_filtered (file, "0x%02x ", (unsigned char) rval); | |
1027 | print_longest (file, 'u', 1, rval); | |
1028 | } | |
1029 | else | |
1030 | { | |
be8626e0 MD |
1031 | fprintf_filtered (file, "0x%s ", phex ((ULONGEST) rval, |
1032 | BINWORD (gdbarch))); | |
f0bdd87d YS |
1033 | print_longest (file, 'd', 1, rval); |
1034 | } | |
be8626e0 | 1035 | if (regno == E_PSEUDO_CCR_REGNUM (gdbarch)) |
f0bdd87d YS |
1036 | { |
1037 | /* CCR register */ | |
1038 | int C, Z, N, V; | |
1039 | unsigned char l = rval & 0xff; | |
1040 | fprintf_filtered (file, "\t"); | |
1041 | fprintf_filtered (file, "I-%d ", (l & 0x80) != 0); | |
1042 | fprintf_filtered (file, "UI-%d ", (l & 0x40) != 0); | |
1043 | fprintf_filtered (file, "H-%d ", (l & 0x20) != 0); | |
1044 | fprintf_filtered (file, "U-%d ", (l & 0x10) != 0); | |
1045 | N = (l & 0x8) != 0; | |
1046 | Z = (l & 0x4) != 0; | |
1047 | V = (l & 0x2) != 0; | |
1048 | C = (l & 0x1) != 0; | |
1049 | fprintf_filtered (file, "N-%d ", N); | |
1050 | fprintf_filtered (file, "Z-%d ", Z); | |
1051 | fprintf_filtered (file, "V-%d ", V); | |
1052 | fprintf_filtered (file, "C-%d ", C); | |
1053 | if ((C | Z) == 0) | |
1054 | fprintf_filtered (file, "u> "); | |
1055 | if ((C | Z) == 1) | |
1056 | fprintf_filtered (file, "u<= "); | |
1057 | if ((C == 0)) | |
1058 | fprintf_filtered (file, "u>= "); | |
1059 | if (C == 1) | |
1060 | fprintf_filtered (file, "u< "); | |
1061 | if (Z == 0) | |
1062 | fprintf_filtered (file, "!= "); | |
1063 | if (Z == 1) | |
1064 | fprintf_filtered (file, "== "); | |
1065 | if ((N ^ V) == 0) | |
1066 | fprintf_filtered (file, ">= "); | |
1067 | if ((N ^ V) == 1) | |
1068 | fprintf_filtered (file, "< "); | |
1069 | if ((Z | (N ^ V)) == 0) | |
1070 | fprintf_filtered (file, "> "); | |
1071 | if ((Z | (N ^ V)) == 1) | |
1072 | fprintf_filtered (file, "<= "); | |
1073 | } | |
be8626e0 | 1074 | else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch) && is_h8300smode (gdbarch)) |
f0bdd87d YS |
1075 | { |
1076 | /* EXR register */ | |
1077 | unsigned char l = rval & 0xff; | |
1078 | fprintf_filtered (file, "\t"); | |
1079 | fprintf_filtered (file, "T-%d - - - ", (l & 0x80) != 0); | |
1080 | fprintf_filtered (file, "I2-%d ", (l & 4) != 0); | |
1081 | fprintf_filtered (file, "I1-%d ", (l & 2) != 0); | |
1082 | fprintf_filtered (file, "I0-%d", (l & 1) != 0); | |
1083 | } | |
1084 | fprintf_filtered (file, "\n"); | |
1085 | } | |
1086 | ||
1087 | static void | |
1088 | h8300_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file, | |
1089 | struct frame_info *frame, int regno, int cpregs) | |
1090 | { | |
1091 | if (regno < 0) | |
1092 | { | |
1093 | for (regno = E_R0_REGNUM; regno <= E_SP_REGNUM; ++regno) | |
1094 | h8300_print_register (gdbarch, file, frame, regno); | |
be8626e0 MD |
1095 | h8300_print_register (gdbarch, file, frame, |
1096 | E_PSEUDO_CCR_REGNUM (gdbarch)); | |
f0bdd87d | 1097 | h8300_print_register (gdbarch, file, frame, E_PC_REGNUM); |
ea78bae4 | 1098 | if (is_h8300smode (gdbarch)) |
f0bdd87d | 1099 | { |
be8626e0 MD |
1100 | h8300_print_register (gdbarch, file, frame, |
1101 | E_PSEUDO_EXR_REGNUM (gdbarch)); | |
ea78bae4 | 1102 | if (is_h8300sxmode (gdbarch)) |
f0bdd87d YS |
1103 | { |
1104 | h8300_print_register (gdbarch, file, frame, E_SBR_REGNUM); | |
1105 | h8300_print_register (gdbarch, file, frame, E_VBR_REGNUM); | |
1106 | } | |
1107 | h8300_print_register (gdbarch, file, frame, E_MACH_REGNUM); | |
1108 | h8300_print_register (gdbarch, file, frame, E_MACL_REGNUM); | |
1109 | h8300_print_register (gdbarch, file, frame, E_CYCLES_REGNUM); | |
1110 | h8300_print_register (gdbarch, file, frame, E_TICKS_REGNUM); | |
1111 | h8300_print_register (gdbarch, file, frame, E_INSTS_REGNUM); | |
1112 | } | |
1113 | else | |
1114 | { | |
1115 | h8300_print_register (gdbarch, file, frame, E_CYCLES_REGNUM); | |
1116 | h8300_print_register (gdbarch, file, frame, E_TICK_REGNUM); | |
1117 | h8300_print_register (gdbarch, file, frame, E_INST_REGNUM); | |
1118 | } | |
1119 | } | |
1120 | else | |
1121 | { | |
1122 | if (regno == E_CCR_REGNUM) | |
be8626e0 MD |
1123 | h8300_print_register (gdbarch, file, frame, |
1124 | E_PSEUDO_CCR_REGNUM (gdbarch)); | |
1125 | else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch) | |
ea78bae4 | 1126 | && is_h8300smode (gdbarch)) |
be8626e0 MD |
1127 | h8300_print_register (gdbarch, file, frame, |
1128 | E_PSEUDO_EXR_REGNUM (gdbarch)); | |
f0bdd87d YS |
1129 | else |
1130 | h8300_print_register (gdbarch, file, frame, regno); | |
1131 | } | |
1132 | } | |
1133 | ||
1134 | static struct type * | |
1135 | h8300_register_type (struct gdbarch *gdbarch, int regno) | |
1136 | { | |
ea78bae4 UW |
1137 | if (regno < 0 || regno >= gdbarch_num_regs (gdbarch) |
1138 | + gdbarch_num_pseudo_regs (gdbarch)) | |
f0bdd87d | 1139 | internal_error (__FILE__, __LINE__, |
a73c6dcd MS |
1140 | _("h8300_register_type: illegal register number %d"), |
1141 | regno); | |
f0bdd87d YS |
1142 | else |
1143 | { | |
1144 | switch (regno) | |
1145 | { | |
1146 | case E_PC_REGNUM: | |
0dfff4cb | 1147 | return builtin_type (gdbarch)->builtin_func_ptr; |
f0bdd87d YS |
1148 | case E_SP_REGNUM: |
1149 | case E_FP_REGNUM: | |
0dfff4cb | 1150 | return builtin_type (gdbarch)->builtin_data_ptr; |
f0bdd87d | 1151 | default: |
be8626e0 | 1152 | if (regno == E_PSEUDO_CCR_REGNUM (gdbarch)) |
df4df182 | 1153 | return builtin_type (gdbarch)->builtin_uint8; |
be8626e0 | 1154 | else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch)) |
df4df182 | 1155 | return builtin_type (gdbarch)->builtin_uint8; |
ea78bae4 | 1156 | else if (is_h8300hmode (gdbarch)) |
df4df182 | 1157 | return builtin_type (gdbarch)->builtin_int32; |
f0bdd87d | 1158 | else |
df4df182 | 1159 | return builtin_type (gdbarch)->builtin_int16; |
f0bdd87d YS |
1160 | } |
1161 | } | |
1162 | } | |
1163 | ||
5caa2f0b PA |
1164 | /* Helpers for h8300_pseudo_register_read. We expose ccr/exr as |
1165 | pseudo-registers to users with smaller sizes than the corresponding | |
1166 | raw registers. These helpers extend/narrow the values. */ | |
1167 | ||
1168 | static enum register_status | |
1169 | pseudo_from_raw_register (struct gdbarch *gdbarch, struct regcache *regcache, | |
1170 | gdb_byte *buf, int pseudo_regno, int raw_regno) | |
1171 | { | |
1172 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
1173 | enum register_status status; | |
1174 | ULONGEST val; | |
1175 | ||
1176 | status = regcache_raw_read_unsigned (regcache, raw_regno, &val); | |
1177 | if (status == REG_VALID) | |
1178 | store_unsigned_integer (buf, | |
1179 | register_size (gdbarch, pseudo_regno), | |
1180 | byte_order, val); | |
1181 | return status; | |
1182 | } | |
1183 | ||
1184 | /* See pseudo_from_raw_register. */ | |
1185 | ||
1186 | static void | |
1187 | raw_from_pseudo_register (struct gdbarch *gdbarch, struct regcache *regcache, | |
1188 | const gdb_byte *buf, int raw_regno, int pseudo_regno) | |
1189 | { | |
1190 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
1191 | ULONGEST val; | |
1192 | ||
1193 | val = extract_unsigned_integer (buf, register_size (gdbarch, pseudo_regno), | |
1194 | byte_order); | |
1195 | regcache_raw_write_unsigned (regcache, raw_regno, val); | |
1196 | } | |
1197 | ||
05d1431c | 1198 | static enum register_status |
f0bdd87d | 1199 | h8300_pseudo_register_read (struct gdbarch *gdbarch, |
5d0d05b6 CV |
1200 | struct regcache *regcache, int regno, |
1201 | gdb_byte *buf) | |
f0bdd87d | 1202 | { |
be8626e0 | 1203 | if (regno == E_PSEUDO_CCR_REGNUM (gdbarch)) |
5caa2f0b PA |
1204 | { |
1205 | return pseudo_from_raw_register (gdbarch, regcache, buf, | |
1206 | regno, E_CCR_REGNUM); | |
1207 | } | |
be8626e0 | 1208 | else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch)) |
5caa2f0b PA |
1209 | { |
1210 | return pseudo_from_raw_register (gdbarch, regcache, buf, | |
1211 | regno, E_EXR_REGNUM); | |
1212 | } | |
f0bdd87d | 1213 | else |
05d1431c | 1214 | return regcache_raw_read (regcache, regno, buf); |
f0bdd87d YS |
1215 | } |
1216 | ||
1217 | static void | |
1218 | h8300_pseudo_register_write (struct gdbarch *gdbarch, | |
1219 | struct regcache *regcache, int regno, | |
5d0d05b6 | 1220 | const gdb_byte *buf) |
f0bdd87d | 1221 | { |
be8626e0 | 1222 | if (regno == E_PSEUDO_CCR_REGNUM (gdbarch)) |
5caa2f0b | 1223 | raw_from_pseudo_register (gdbarch, regcache, buf, E_CCR_REGNUM, regno); |
be8626e0 | 1224 | else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch)) |
5caa2f0b | 1225 | raw_from_pseudo_register (gdbarch, regcache, buf, E_EXR_REGNUM, regno); |
f0bdd87d YS |
1226 | else |
1227 | regcache_raw_write (regcache, regno, buf); | |
1228 | } | |
1229 | ||
1230 | static int | |
d3f73121 | 1231 | h8300_dbg_reg_to_regnum (struct gdbarch *gdbarch, int regno) |
f0bdd87d YS |
1232 | { |
1233 | if (regno == E_CCR_REGNUM) | |
be8626e0 | 1234 | return E_PSEUDO_CCR_REGNUM (gdbarch); |
f0bdd87d YS |
1235 | return regno; |
1236 | } | |
1237 | ||
1238 | static int | |
d3f73121 | 1239 | h8300s_dbg_reg_to_regnum (struct gdbarch *gdbarch, int regno) |
f0bdd87d YS |
1240 | { |
1241 | if (regno == E_CCR_REGNUM) | |
be8626e0 | 1242 | return E_PSEUDO_CCR_REGNUM (gdbarch); |
f0bdd87d | 1243 | if (regno == E_EXR_REGNUM) |
be8626e0 | 1244 | return E_PSEUDO_EXR_REGNUM (gdbarch); |
f0bdd87d YS |
1245 | return regno; |
1246 | } | |
1247 | ||
44d100c3 | 1248 | static const unsigned char * |
67d57894 MD |
1249 | h8300_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr, |
1250 | int *lenptr) | |
f0bdd87d YS |
1251 | { |
1252 | /*static unsigned char breakpoint[] = { 0x7A, 0xFF }; *//* ??? */ | |
1253 | static unsigned char breakpoint[] = { 0x01, 0x80 }; /* Sleep */ | |
1254 | ||
1255 | *lenptr = sizeof (breakpoint); | |
1256 | return breakpoint; | |
1257 | } | |
1258 | ||
f0bdd87d YS |
1259 | static struct gdbarch * |
1260 | h8300_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | |
1261 | { | |
1262 | struct gdbarch_tdep *tdep = NULL; | |
1263 | struct gdbarch *gdbarch; | |
1264 | ||
1265 | arches = gdbarch_list_lookup_by_info (arches, &info); | |
1266 | if (arches != NULL) | |
1267 | return arches->gdbarch; | |
1268 | ||
1269 | #if 0 | |
1270 | tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep)); | |
1271 | #endif | |
1272 | ||
1273 | if (info.bfd_arch_info->arch != bfd_arch_h8300) | |
1274 | return NULL; | |
1275 | ||
1276 | gdbarch = gdbarch_alloc (&info, 0); | |
1277 | ||
76fd5f74 PA |
1278 | set_gdbarch_register_sim_regno (gdbarch, h8300_register_sim_regno); |
1279 | ||
f0bdd87d YS |
1280 | switch (info.bfd_arch_info->mach) |
1281 | { | |
1282 | case bfd_mach_h8300: | |
1283 | set_gdbarch_num_regs (gdbarch, 13); | |
1284 | set_gdbarch_num_pseudo_regs (gdbarch, 1); | |
1285 | set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum); | |
f0bdd87d YS |
1286 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum); |
1287 | set_gdbarch_stab_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum); | |
1288 | set_gdbarch_register_name (gdbarch, h8300_register_name); | |
1289 | set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT); | |
1290 | set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT); | |
862ba188 | 1291 | set_gdbarch_return_value (gdbarch, h8300_return_value); |
f0bdd87d YS |
1292 | set_gdbarch_print_insn (gdbarch, print_insn_h8300); |
1293 | break; | |
1294 | case bfd_mach_h8300h: | |
1295 | case bfd_mach_h8300hn: | |
1296 | set_gdbarch_num_regs (gdbarch, 13); | |
1297 | set_gdbarch_num_pseudo_regs (gdbarch, 1); | |
1298 | set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum); | |
f0bdd87d YS |
1299 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum); |
1300 | set_gdbarch_stab_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum); | |
1301 | set_gdbarch_register_name (gdbarch, h8300_register_name); | |
1302 | if (info.bfd_arch_info->mach != bfd_mach_h8300hn) | |
1303 | { | |
1304 | set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
1305 | set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
1306 | } | |
1307 | else | |
1308 | { | |
1309 | set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT); | |
1310 | set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT); | |
1311 | } | |
862ba188 | 1312 | set_gdbarch_return_value (gdbarch, h8300h_return_value); |
f0bdd87d YS |
1313 | set_gdbarch_print_insn (gdbarch, print_insn_h8300h); |
1314 | break; | |
1315 | case bfd_mach_h8300s: | |
1316 | case bfd_mach_h8300sn: | |
1317 | set_gdbarch_num_regs (gdbarch, 16); | |
1318 | set_gdbarch_num_pseudo_regs (gdbarch, 2); | |
1319 | set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum); | |
f0bdd87d YS |
1320 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum); |
1321 | set_gdbarch_stab_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum); | |
1322 | set_gdbarch_register_name (gdbarch, h8300s_register_name); | |
1323 | if (info.bfd_arch_info->mach != bfd_mach_h8300sn) | |
1324 | { | |
1325 | set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
1326 | set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
1327 | } | |
1328 | else | |
1329 | { | |
1330 | set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT); | |
1331 | set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT); | |
1332 | } | |
862ba188 | 1333 | set_gdbarch_return_value (gdbarch, h8300h_return_value); |
f0bdd87d YS |
1334 | set_gdbarch_print_insn (gdbarch, print_insn_h8300s); |
1335 | break; | |
1336 | case bfd_mach_h8300sx: | |
1337 | case bfd_mach_h8300sxn: | |
1338 | set_gdbarch_num_regs (gdbarch, 18); | |
1339 | set_gdbarch_num_pseudo_regs (gdbarch, 2); | |
1340 | set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum); | |
f0bdd87d YS |
1341 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum); |
1342 | set_gdbarch_stab_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum); | |
1343 | set_gdbarch_register_name (gdbarch, h8300sx_register_name); | |
1344 | if (info.bfd_arch_info->mach != bfd_mach_h8300sxn) | |
1345 | { | |
1346 | set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
1347 | set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
1348 | } | |
1349 | else | |
1350 | { | |
1351 | set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT); | |
1352 | set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT); | |
1353 | } | |
862ba188 | 1354 | set_gdbarch_return_value (gdbarch, h8300h_return_value); |
f0bdd87d YS |
1355 | set_gdbarch_print_insn (gdbarch, print_insn_h8300s); |
1356 | break; | |
1357 | } | |
1358 | ||
1359 | set_gdbarch_pseudo_register_read (gdbarch, h8300_pseudo_register_read); | |
1360 | set_gdbarch_pseudo_register_write (gdbarch, h8300_pseudo_register_write); | |
1361 | ||
1362 | /* | |
1363 | * Basic register fields and methods. | |
1364 | */ | |
1365 | ||
1366 | set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM); | |
f0bdd87d YS |
1367 | set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM); |
1368 | set_gdbarch_register_type (gdbarch, h8300_register_type); | |
1369 | set_gdbarch_print_registers_info (gdbarch, h8300_print_registers_info); | |
f0bdd87d YS |
1370 | |
1371 | /* | |
1372 | * Frame Info | |
1373 | */ | |
1374 | set_gdbarch_skip_prologue (gdbarch, h8300_skip_prologue); | |
1375 | ||
1376 | /* Frame unwinder. */ | |
f0bdd87d | 1377 | set_gdbarch_unwind_pc (gdbarch, h8300_unwind_pc); |
862ba188 | 1378 | set_gdbarch_unwind_sp (gdbarch, h8300_unwind_sp); |
94afd7a6 | 1379 | set_gdbarch_dummy_id (gdbarch, h8300_dummy_id); |
862ba188 | 1380 | frame_base_set_default (gdbarch, &h8300_frame_base); |
f0bdd87d YS |
1381 | |
1382 | /* | |
1383 | * Miscelany | |
1384 | */ | |
1777feb0 | 1385 | /* Stack grows up. */ |
f0bdd87d YS |
1386 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); |
1387 | ||
f0bdd87d | 1388 | set_gdbarch_breakpoint_from_pc (gdbarch, h8300_breakpoint_from_pc); |
f0bdd87d YS |
1389 | set_gdbarch_push_dummy_call (gdbarch, h8300_push_dummy_call); |
1390 | ||
862ba188 | 1391 | set_gdbarch_char_signed (gdbarch, 0); |
f0bdd87d YS |
1392 | set_gdbarch_int_bit (gdbarch, 2 * TARGET_CHAR_BIT); |
1393 | set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
1394 | set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT); | |
1395 | set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
f92589cb | 1396 | set_gdbarch_double_format (gdbarch, floatformats_ieee_single); |
f0bdd87d | 1397 | set_gdbarch_long_double_bit (gdbarch, 4 * TARGET_CHAR_BIT); |
f92589cb | 1398 | set_gdbarch_long_double_format (gdbarch, floatformats_ieee_single); |
f0bdd87d YS |
1399 | |
1400 | set_gdbarch_believe_pcc_promotion (gdbarch, 1); | |
1401 | ||
862ba188 | 1402 | /* Hook in the DWARF CFI frame unwinder. */ |
94afd7a6 UW |
1403 | dwarf2_append_unwinders (gdbarch); |
1404 | frame_unwind_append_unwinder (gdbarch, &h8300_frame_unwind); | |
f0bdd87d YS |
1405 | |
1406 | return gdbarch; | |
1407 | ||
1408 | } | |
1409 | ||
1777feb0 | 1410 | extern initialize_file_ftype _initialize_h8300_tdep; /* -Wmissing-prototypes */ |
f0bdd87d YS |
1411 | |
1412 | void | |
1413 | _initialize_h8300_tdep (void) | |
1414 | { | |
1415 | register_gdbarch_init (bfd_arch_h8300, h8300_gdbarch_init); | |
1416 | } | |
1417 | ||
1418 | static int | |
1419 | is_h8300hmode (struct gdbarch *gdbarch) | |
1420 | { | |
1421 | return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx | |
1422 | || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn | |
1423 | || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300s | |
1424 | || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn | |
1425 | || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300h | |
1426 | || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300hn; | |
1427 | } | |
1428 | ||
1429 | static int | |
1430 | is_h8300smode (struct gdbarch *gdbarch) | |
1431 | { | |
1432 | return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx | |
1433 | || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn | |
1434 | || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300s | |
1435 | || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn; | |
1436 | } | |
1437 | ||
1438 | static int | |
1439 | is_h8300sxmode (struct gdbarch *gdbarch) | |
1440 | { | |
1441 | return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx | |
1442 | || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn; | |
1443 | } | |
1444 | ||
1445 | static int | |
1446 | is_h8300_normal_mode (struct gdbarch *gdbarch) | |
1447 | { | |
1448 | return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn | |
1449 | || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn | |
1450 | || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300hn; | |
1451 | } |