[deliverable/binutils-gdb.git] / gdb / hppa-hpux-nat.c

/* Native-dependent code for PA-RISC HP-UX.

   Copyright 2004 Free Software Foundation, Inc.

   This file is part of GDB.

   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 2 of the License, or
   (at your option) any later version.

   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with this program; if not, write to the Free Software
   Foundation, Inc., 59 Temple Place - Suite 330,
   Boston, MA 02111-1307, USA.  */

#include "defs.h"
#include "inferior.h"
#include "regcache.h"
#include "target.h"

#include "gdb_assert.h"
#include <sys/ptrace.h>
#include <machine/save_state.h>

#include "hppa-tdep.h"
#include "inf-ptrace.h"

int child_suppress_run = 0;     /* Non-zero if we should pretend not to be
				   a runnable target.  */

static int hppa_hpux_save_state_offset[] =
{
  ssoff(ss_flags),
  ssoff(ss_narrow.ss_gr1),
  ssoff(ss_narrow.ss_rp),
  ssoff(ss_narrow.ss_gr3),
  ssoff(ss_narrow.ss_gr4),
  ssoff(ss_narrow.ss_gr5),
  ssoff(ss_narrow.ss_gr6),
  ssoff(ss_narrow.ss_gr7),
  ssoff(ss_narrow.ss_gr8),
  ssoff(ss_narrow.ss_gr9),
  ssoff(ss_narrow.ss_gr10),
  ssoff(ss_narrow.ss_gr11),
  ssoff(ss_narrow.ss_gr12),
  ssoff(ss_narrow.ss_gr13),
  ssoff(ss_narrow.ss_gr14),
  ssoff(ss_narrow.ss_gr15),
  ssoff(ss_narrow.ss_gr16),
  ssoff(ss_narrow.ss_gr17),
  ssoff(ss_narrow.ss_gr18),
  ssoff(ss_narrow.ss_gr19),
  ssoff(ss_narrow.ss_gr20),
  ssoff(ss_narrow.ss_gr21),
  ssoff(ss_narrow.ss_gr22),
  ssoff(ss_narrow.ss_arg3),
  ssoff(ss_narrow.ss_arg2),
  ssoff(ss_narrow.ss_arg1),
  ssoff(ss_narrow.ss_arg0),
  ssoff(ss_narrow.ss_dp),
  ssoff(ss_narrow.ss_ret0),
  ssoff(ss_narrow.ss_ret1),
  ssoff(ss_narrow.ss_sp),
  ssoff(ss_narrow.ss_gr31),
  ssoff(ss_narrow.ss_cr11),
  ssoff(ss_narrow.ss_pcoq_head),
  ssoff(ss_narrow.ss_pcsq_head),
  ssoff(ss_narrow.ss_pcoq_tail),
  ssoff(ss_narrow.ss_pcsq_tail),
  ssoff(ss_narrow.ss_cr15),
  ssoff(ss_narrow.ss_cr19),
  ssoff(ss_narrow.ss_cr20),
  ssoff(ss_narrow.ss_cr21),
  ssoff(ss_narrow.ss_cr22),
  ssoff(ss_narrow.ss_cpustate),
  ssoff(ss_narrow.ss_sr4),
  ssoff(ss_narrow.ss_sr0),
  ssoff(ss_narrow.ss_sr1),
  ssoff(ss_narrow.ss_sr2),
  ssoff(ss_narrow.ss_sr3),
  ssoff(ss_narrow.ss_sr5),
  ssoff(ss_narrow.ss_sr6),
  ssoff(ss_narrow.ss_sr7),
  ssoff(ss_narrow.ss_cr0),
  ssoff(ss_narrow.ss_cr8),
  ssoff(ss_narrow.ss_cr9),
  ssoff(ss_narrow.ss_cr10),
  ssoff(ss_narrow.ss_cr12),
  ssoff(ss_narrow.ss_cr13),
  ssoff(ss_narrow.ss_cr24),
  ssoff(ss_narrow.ss_cr25),
  ssoff(ss_narrow.ss_cr26),
  ssoff(ss_narrow.ss_mpsfu_high),
  ssoff(ss_narrow.ss_mpsfu_low),
  ssoff(ss_narrow.ss_mpsfu_ovflo),
  ssoff(ss_pad),
  ssoff(ss_frstat),
  ssoff(ss_frexcp1),
  ssoff(ss_frexcp2),
  ssoff(ss_frexcp3),
  ssoff(ss_frexcp4),
  ssoff(ss_frexcp5),
  ssoff(ss_frexcp6),
  ssoff(ss_frexcp7),
  ssoff(ss_fr4_hi),
  ssoff(ss_fr4_lo),
  ssoff(ss_fr5_hi),
  ssoff(ss_fr5_lo),
  ssoff(ss_fr6_hi),
  ssoff(ss_fr6_lo),
  ssoff(ss_fr7_hi),
  ssoff(ss_fr7_lo),
  ssoff(ss_fr8_hi),
  ssoff(ss_fr8_lo),
  ssoff(ss_fr9_hi),
  ssoff(ss_fr9_lo),
  ssoff(ss_fr10_hi),
  ssoff(ss_fr10_lo),
  ssoff(ss_fr11_hi),
  ssoff(ss_fr11_lo),
  ssoff(ss_fr12_hi),
  ssoff(ss_fr12_lo),
  ssoff(ss_fr13_hi),
  ssoff(ss_fr13_lo),
  ssoff(ss_fr14_hi),
  ssoff(ss_fr14_lo),
  ssoff(ss_fr15_hi),
  ssoff(ss_fr15_lo),
  ssoff(ss_fr16_hi),
  ssoff(ss_fr16_lo),
  ssoff(ss_fr17_hi),
  ssoff(ss_fr17_lo),
  ssoff(ss_fr18_hi),
  ssoff(ss_fr18_lo),
  ssoff(ss_fr19_hi),
  ssoff(ss_fr19_lo),
  ssoff(ss_fr20_hi),
  ssoff(ss_fr20_lo),
  ssoff(ss_fr21_hi),
  ssoff(ss_fr21_lo),
  ssoff(ss_fr22_hi),
  ssoff(ss_fr22_lo),
  ssoff(ss_fr23_hi),
  ssoff(ss_fr23_lo),
  ssoff(ss_fr24_hi),
  ssoff(ss_fr24_lo),
  ssoff(ss_fr25_hi),
  ssoff(ss_fr25_lo),
  ssoff(ss_fr26_hi),
  ssoff(ss_fr26_lo),
  ssoff(ss_fr27_hi),
  ssoff(ss_fr27_lo),
  ssoff(ss_fr28_hi),
  ssoff(ss_fr28_lo),
  ssoff(ss_fr29_hi),
  ssoff(ss_fr29_lo),
  ssoff(ss_fr30_hi),
  ssoff(ss_fr30_lo),
  ssoff(ss_fr31_hi),
  ssoff(ss_fr31_lo)
};

static int
hppa_hpux_cannot_fetch_register (int regnum)
{
  gdb_assert (regnum >= 0 && regnum < NUM_REGS);
  return (regnum >= ARRAY_SIZE(hppa_hpux_save_state_offset));
}

static int
hppa_hpux_cannot_store_register (int regnum)
{
  return hppa_hpux_cannot_fetch_register (regnum);
}

static void
hppa_hpux_fetch_register (int regnum)
{
  CORE_ADDR addr;
  size_t size;
  PTRACE_TYPE_RET *buf;
  pid_t pid;
  int i;

  if (hppa_hpux_cannot_fetch_register (regnum))
    {
      regcache_raw_supply (current_regcache, regnum, NULL);
      return;
    }

  pid = PIDGET (inferior_ptid);

  /* This isn't really an address.  But ptrace thinks of it as one.  */
  addr = hppa_hpux_save_state_offset[regnum];
  size = register_size (current_gdbarch, regnum);

  gdb_assert ((size % sizeof (PTRACE_TYPE_RET)) == 0);
  buf = alloca (size);

  /* Read the register contents from the inferior a chuck at the time.  */
  for (i = 0; i < size / sizeof (PTRACE_TYPE_RET); i++)
    {
      errno = 0;
      buf[i] = ptrace (PT_RUREGS, pid, (PTRACE_TYPE_ARG3) addr, 0, 0);
      if (errno != 0)
	error ("Couldn't read register %s (#%d): %s.", REGISTER_NAME (regnum),
	       regnum, safe_strerror (errno));

      addr += sizeof (PTRACE_TYPE_RET);
    }
  regcache_raw_supply (current_regcache, regnum, buf);
}

static void
hppa_hpux_fetch_inferior_registers (int regnum)
{
  if (regnum == -1)
    for (regnum = 0; regnum < NUM_REGS; regnum++)
      hppa_hpux_fetch_register (regnum);
  else
    hppa_hpux_fetch_register (regnum);
}

/* Store register REGNUM into the inferior.  */

static void
hppa_hpux_store_register (int regnum)
{
  CORE_ADDR addr;
  size_t size;
  PTRACE_TYPE_RET *buf;
  pid_t pid;
  int i;

  if (hppa_hpux_cannot_store_register (regnum))
    return;

  pid = PIDGET (inferior_ptid);

  /* This isn't really an address.  But ptrace thinks of it as one.  */
  addr = hppa_hpux_save_state_offset[regnum];
  size = register_size (current_gdbarch, regnum);

  gdb_assert ((size % sizeof (PTRACE_TYPE_RET)) == 0);
  buf = alloca (size);

  /* Write the register contents into the inferior a chunk at the time.  */
  regcache_raw_collect (current_regcache, regnum, buf);
  for (i = 0; i < size / sizeof (PTRACE_TYPE_RET); i++)
    {
      errno = 0;
      ptrace (PT_WUREGS, pid, (PTRACE_TYPE_ARG3) addr, buf[i], 0);
      if (errno != 0)
	error ("Couldn't write register %s (#%d): %s.", REGISTER_NAME (regnum),
	       regnum, safe_strerror (errno));

      addr += sizeof (PTRACE_TYPE_RET);
    }
}

/* Store register REGNUM back into the inferior.  If REGNUM is -1, do
   this for all registers (including the floating point registers).  */

static void
hppa_hpux_store_inferior_registers (int regnum)
{
  if (regnum == -1)
    for (regnum = 0; regnum < NUM_REGS; regnum++)
      hppa_hpux_store_register (regnum);
  else
    hppa_hpux_store_register (regnum);
}

static int
hppa_hpux_child_can_run (void)
{
  /* This variable is controlled by modules that layer their own process
     structure atop that provided here.  hpux-thread.c does this because
     of the HP-UX user-mode level thread model.  */

  return !child_suppress_run;
}
\f

/* Prevent warning from -Wmissing-prototypes.  */
void _initialize_hppa_hpux_nat (void);

void
_initialize_hppa_hpux_nat (void)
{
  struct target_ops *t;

  t = inf_ptrace_target ();
  t->to_fetch_registers = hppa_hpux_fetch_inferior_registers;
  t->to_store_registers = hppa_hpux_store_inferior_registers;
  t->to_can_run = hppa_hpux_child_can_run;
  add_target (t);
}
Commit	Line	Data
eeb8076c MK	1	/* Native-dependent code for PA-RISC HP-UX.
	2
	3	Copyright 2004 Free Software Foundation, Inc.
	4
	5	This file is part of GDB.
	6
	7	This program is free software; you can redistribute it and/or modify
	8	it under the terms of the GNU General Public License as published by
	9	the Free Software Foundation; either version 2 of the License, or
	10	(at your option) any later version.
	11
	12	This program is distributed in the hope that it will be useful,
	13	but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	GNU General Public License for more details.
	16
	17	You should have received a copy of the GNU General Public License
	18	along with this program; if not, write to the Free Software
	19	Foundation, Inc., 59 Temple Place - Suite 330,
	20	Boston, MA 02111-1307, USA. */
	21
	22	#include "defs.h"
	23	#include "inferior.h"
	24	#include "regcache.h"
	25	#include "target.h"
	26
	27	#include "gdb_assert.h"
	28	#include <sys/ptrace.h>
	29	#include <machine/save_state.h>
	30
	31	#include "hppa-tdep.h"
	32	#include "inf-ptrace.h"
	33
3f6306ec DA	34	int child_suppress_run = 0; /* Non-zero if we should pretend not to be
	35	a runnable target. */
	36
eeb8076c MK	37	static int hppa_hpux_save_state_offset[] =
	38	{
	39	ssoff(ss_flags),
	40	ssoff(ss_narrow.ss_gr1),
	41	ssoff(ss_narrow.ss_rp),
	42	ssoff(ss_narrow.ss_gr3),
	43	ssoff(ss_narrow.ss_gr4),
	44	ssoff(ss_narrow.ss_gr5),
	45	ssoff(ss_narrow.ss_gr6),
	46	ssoff(ss_narrow.ss_gr7),
	47	ssoff(ss_narrow.ss_gr8),
	48	ssoff(ss_narrow.ss_gr9),
	49	ssoff(ss_narrow.ss_gr10),
	50	ssoff(ss_narrow.ss_gr11),
	51	ssoff(ss_narrow.ss_gr12),
	52	ssoff(ss_narrow.ss_gr13),
	53	ssoff(ss_narrow.ss_gr14),
	54	ssoff(ss_narrow.ss_gr15),
	55	ssoff(ss_narrow.ss_gr16),
	56	ssoff(ss_narrow.ss_gr17),
	57	ssoff(ss_narrow.ss_gr18),
	58	ssoff(ss_narrow.ss_gr19),
	59	ssoff(ss_narrow.ss_gr20),
	60	ssoff(ss_narrow.ss_gr21),
	61	ssoff(ss_narrow.ss_gr22),
	62	ssoff(ss_narrow.ss_arg3),
	63	ssoff(ss_narrow.ss_arg2),
	64	ssoff(ss_narrow.ss_arg1),
	65	ssoff(ss_narrow.ss_arg0),
	66	ssoff(ss_narrow.ss_dp),
	67	ssoff(ss_narrow.ss_ret0),
	68	ssoff(ss_narrow.ss_ret1),
	69	ssoff(ss_narrow.ss_sp),
	70	ssoff(ss_narrow.ss_gr31),
	71	ssoff(ss_narrow.ss_cr11),
	72	ssoff(ss_narrow.ss_pcoq_head),
	73	ssoff(ss_narrow.ss_pcsq_head),
	74	ssoff(ss_narrow.ss_pcoq_tail),
	75	ssoff(ss_narrow.ss_pcsq_tail),
	76	ssoff(ss_narrow.ss_cr15),
	77	ssoff(ss_narrow.ss_cr19),
	78	ssoff(ss_narrow.ss_cr20),
	79	ssoff(ss_narrow.ss_cr21),
	80	ssoff(ss_narrow.ss_cr22),
	81	ssoff(ss_narrow.ss_cpustate),
	82	ssoff(ss_narrow.ss_sr4),
	83	ssoff(ss_narrow.ss_sr0),
	84	ssoff(ss_narrow.ss_sr1),
	85	ssoff(ss_narrow.ss_sr2),
	86	ssoff(ss_narrow.ss_sr3),
	87	ssoff(ss_narrow.ss_sr5),
	88	ssoff(ss_narrow.ss_sr6),
	89	ssoff(ss_narrow.ss_sr7),
	90	ssoff(ss_narrow.ss_cr0),
	91	ssoff(ss_narrow.ss_cr8),
	92	ssoff(ss_narrow.ss_cr9),
	93	ssoff(ss_narrow.ss_cr10),
	94	ssoff(ss_narrow.ss_cr12),
	95	ssoff(ss_narrow.ss_cr13),
	96	ssoff(ss_narrow.ss_cr24),
	97	ssoff(ss_narrow.ss_cr25),
	98	ssoff(ss_narrow.ss_cr26),
	99	ssoff(ss_narrow.ss_mpsfu_high),
	100	ssoff(ss_narrow.ss_mpsfu_low),
101	ssoff(ss_narrow.ss_mpsfu_ovflo),
102	ssoff(ss_pad),
103	ssoff(ss_frstat),
104	ssoff(ss_frexcp1),
105	ssoff(ss_frexcp2),
106	ssoff(ss_frexcp3),
107	ssoff(ss_frexcp4),
108	ssoff(ss_frexcp5),
109	ssoff(ss_frexcp6),
110	ssoff(ss_frexcp7),
111	ssoff(ss_fr4_hi),
112	ssoff(ss_fr4_lo),
113	ssoff(ss_fr5_hi),
114	ssoff(ss_fr5_lo),
115	ssoff(ss_fr6_hi),
116	ssoff(ss_fr6_lo),
117	ssoff(ss_fr7_hi),
118	ssoff(ss_fr7_lo),
119	ssoff(ss_fr8_hi),
120	ssoff(ss_fr8_lo),
121	ssoff(ss_fr9_hi),
122	ssoff(ss_fr9_lo),
123	ssoff(ss_fr10_hi),
124	ssoff(ss_fr10_lo),
125	ssoff(ss_fr11_hi),
126	ssoff(ss_fr11_lo),
127	ssoff(ss_fr12_hi),
128	ssoff(ss_fr12_lo),
129	ssoff(ss_fr13_hi),
130	ssoff(ss_fr13_lo),
131	ssoff(ss_fr14_hi),
132	ssoff(ss_fr14_lo),
133	ssoff(ss_fr15_hi),
134	ssoff(ss_fr15_lo),
135	ssoff(ss_fr16_hi),
136	ssoff(ss_fr16_lo),
137	ssoff(ss_fr17_hi),
138	ssoff(ss_fr17_lo),
139	ssoff(ss_fr18_hi),
140	ssoff(ss_fr18_lo),
141	ssoff(ss_fr19_hi),
142	ssoff(ss_fr19_lo),
143	ssoff(ss_fr20_hi),
144	ssoff(ss_fr20_lo),
145	ssoff(ss_fr21_hi),
146	ssoff(ss_fr21_lo),
147	ssoff(ss_fr22_hi),
148	ssoff(ss_fr22_lo),
149	ssoff(ss_fr23_hi),
150	ssoff(ss_fr23_lo),
151	ssoff(ss_fr24_hi),
152	ssoff(ss_fr24_lo),
153	ssoff(ss_fr25_hi),
154	ssoff(ss_fr25_lo),
155	ssoff(ss_fr26_hi),
156	ssoff(ss_fr26_lo),
157	ssoff(ss_fr27_hi),
158	ssoff(ss_fr27_lo),
159	ssoff(ss_fr28_hi),
160	ssoff(ss_fr28_lo),
161	ssoff(ss_fr29_hi),
162	ssoff(ss_fr29_lo),
163	ssoff(ss_fr30_hi),
164	ssoff(ss_fr30_lo),
165	ssoff(ss_fr31_hi),
166	ssoff(ss_fr31_lo)
167	};
168
169	static int
170	hppa_hpux_cannot_fetch_register (int regnum)
171	{
172	gdb_assert (regnum >= 0 && regnum < NUM_REGS);
173	return (regnum >= ARRAY_SIZE(hppa_hpux_save_state_offset));
174	}
175
176	static int
177	hppa_hpux_cannot_store_register (int regnum)
178	{
179	return hppa_hpux_cannot_fetch_register (regnum);
180	}
181
182	static void
183	hppa_hpux_fetch_register (int regnum)
184	{
185	CORE_ADDR addr;
186	size_t size;
187	PTRACE_TYPE_RET *buf;
188	pid_t pid;
189	int i;
190
191	if (hppa_hpux_cannot_fetch_register (regnum))
192	{
193	regcache_raw_supply (current_regcache, regnum, NULL);
194	return;
195	}
196
197	pid = PIDGET (inferior_ptid);
198
199	/* This isn't really an address. But ptrace thinks of it as one. */
200	addr = hppa_hpux_save_state_offset[regnum];
201	size = register_size (current_gdbarch, regnum);
202
203	gdb_assert ((size % sizeof (PTRACE_TYPE_RET)) == 0);
204	buf = alloca (size);
205
206	/* Read the register contents from the inferior a chuck at the time. */
207	for (i = 0; i < size / sizeof (PTRACE_TYPE_RET); i++)
208	{
209	errno = 0;
210	buf[i] = ptrace (PT_RUREGS, pid, (PTRACE_TYPE_ARG3) addr, 0, 0);
211	if (errno != 0)
212	error ("Couldn't read register %s (#%d): %s.", REGISTER_NAME (regnum),
213	regnum, safe_strerror (errno));
214
215	addr += sizeof (PTRACE_TYPE_RET);
216	}
217	regcache_raw_supply (current_regcache, regnum, buf);
218	}
219
220	static void
221	hppa_hpux_fetch_inferior_registers (int regnum)
222	{
223	if (regnum == -1)
224	for (regnum = 0; regnum < NUM_REGS; regnum++)
225	hppa_hpux_fetch_register (regnum);
226	else
227	hppa_hpux_fetch_register (regnum);
228	}
229
230	/* Store register REGNUM into the inferior. */
231
232	static void
233	hppa_hpux_store_register (int regnum)
234	{
235	CORE_ADDR addr;
236	size_t size;
237	PTRACE_TYPE_RET *buf;
238	pid_t pid;
239	int i;
240
241	if (hppa_hpux_cannot_store_register (regnum))
242	return;
243
244	pid = PIDGET (inferior_ptid);
245
246	/* This isn't really an address. But ptrace thinks of it as one. */
247	addr = hppa_hpux_save_state_offset[regnum];
248	size = register_size (current_gdbarch, regnum);
249
250	gdb_assert ((size % sizeof (PTRACE_TYPE_RET)) == 0);
251	buf = alloca (size);
252
253	/* Write the register contents into the inferior a chunk at the time. */
254	regcache_raw_collect (current_regcache, regnum, buf);
255	for (i = 0; i < size / sizeof (PTRACE_TYPE_RET); i++)
256	{
257	errno = 0;
258	ptrace (PT_WUREGS, pid, (PTRACE_TYPE_ARG3) addr, buf[i], 0);
259	if (errno != 0)
260	error ("Couldn't write register %s (#%d): %s.", REGISTER_NAME (regnum),
261	regnum, safe_strerror (errno));
262
263	addr += sizeof (PTRACE_TYPE_RET);
264	}
265	}
266
267	/* Store register REGNUM back into the inferior. If REGNUM is -1, do
268	this for all registers (including the floating point registers). */
269
270	static void
271	hppa_hpux_store_inferior_registers (int regnum)
272	{
273	if (regnum == -1)
274	for (regnum = 0; regnum < NUM_REGS; regnum++)
275	hppa_hpux_store_register (regnum);
276	else
277	hppa_hpux_store_register (regnum);
278	}
3f6306ec DA	279
	280	static int
	281	hppa_hpux_child_can_run (void)
	282	{
	283	/* This variable is controlled by modules that layer their own process
	284	structure atop that provided here. hpux-thread.c does this because
	285	of the HP-UX user-mode level thread model. */
	286
	287	return !child_suppress_run;
	288	}
eeb8076c MK	289	\f
	290
	291	/* Prevent warning from -Wmissing-prototypes. */
	292	void _initialize_hppa_hpux_nat (void);
	293
	294	void
	295	_initialize_hppa_hpux_nat (void)
	296	{
	297	struct target_ops *t;
	298
	299	t = inf_ptrace_target ();
	300	t->to_fetch_registers = hppa_hpux_fetch_inferior_registers;
	301	t->to_store_registers = hppa_hpux_store_inferior_registers;
3f6306ec	302	t->to_can_run = hppa_hpux_child_can_run;
eeb8076c MK	303	add_target (t);
eeb8076c MK	304	}