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eeb8076c MK |
1 | /* Native-dependent code for PA-RISC HP-UX. |
2 | ||
3 | Copyright 2004 Free Software Foundation, Inc. | |
4 | ||
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the Free Software | |
19 | Foundation, Inc., 59 Temple Place - Suite 330, | |
20 | Boston, MA 02111-1307, USA. */ | |
21 | ||
22 | #include "defs.h" | |
23 | #include "inferior.h" | |
24 | #include "regcache.h" | |
25 | #include "target.h" | |
26 | ||
27 | #include "gdb_assert.h" | |
28 | #include <sys/ptrace.h> | |
29 | #include <machine/save_state.h> | |
30 | ||
31 | #include "hppa-tdep.h" | |
32 | #include "inf-ptrace.h" | |
33 | ||
34 | static int hppa_hpux_save_state_offset[] = | |
35 | { | |
36 | ssoff(ss_flags), | |
37 | ssoff(ss_narrow.ss_gr1), | |
38 | ssoff(ss_narrow.ss_rp), | |
39 | ssoff(ss_narrow.ss_gr3), | |
40 | ssoff(ss_narrow.ss_gr4), | |
41 | ssoff(ss_narrow.ss_gr5), | |
42 | ssoff(ss_narrow.ss_gr6), | |
43 | ssoff(ss_narrow.ss_gr7), | |
44 | ssoff(ss_narrow.ss_gr8), | |
45 | ssoff(ss_narrow.ss_gr9), | |
46 | ssoff(ss_narrow.ss_gr10), | |
47 | ssoff(ss_narrow.ss_gr11), | |
48 | ssoff(ss_narrow.ss_gr12), | |
49 | ssoff(ss_narrow.ss_gr13), | |
50 | ssoff(ss_narrow.ss_gr14), | |
51 | ssoff(ss_narrow.ss_gr15), | |
52 | ssoff(ss_narrow.ss_gr16), | |
53 | ssoff(ss_narrow.ss_gr17), | |
54 | ssoff(ss_narrow.ss_gr18), | |
55 | ssoff(ss_narrow.ss_gr19), | |
56 | ssoff(ss_narrow.ss_gr20), | |
57 | ssoff(ss_narrow.ss_gr21), | |
58 | ssoff(ss_narrow.ss_gr22), | |
59 | ssoff(ss_narrow.ss_arg3), | |
60 | ssoff(ss_narrow.ss_arg2), | |
61 | ssoff(ss_narrow.ss_arg1), | |
62 | ssoff(ss_narrow.ss_arg0), | |
63 | ssoff(ss_narrow.ss_dp), | |
64 | ssoff(ss_narrow.ss_ret0), | |
65 | ssoff(ss_narrow.ss_ret1), | |
66 | ssoff(ss_narrow.ss_sp), | |
67 | ssoff(ss_narrow.ss_gr31), | |
68 | ssoff(ss_narrow.ss_cr11), | |
69 | ssoff(ss_narrow.ss_pcoq_head), | |
70 | ssoff(ss_narrow.ss_pcsq_head), | |
71 | ssoff(ss_narrow.ss_pcoq_tail), | |
72 | ssoff(ss_narrow.ss_pcsq_tail), | |
73 | ssoff(ss_narrow.ss_cr15), | |
74 | ssoff(ss_narrow.ss_cr19), | |
75 | ssoff(ss_narrow.ss_cr20), | |
76 | ssoff(ss_narrow.ss_cr21), | |
77 | ssoff(ss_narrow.ss_cr22), | |
78 | ssoff(ss_narrow.ss_cpustate), | |
79 | ssoff(ss_narrow.ss_sr4), | |
80 | ssoff(ss_narrow.ss_sr0), | |
81 | ssoff(ss_narrow.ss_sr1), | |
82 | ssoff(ss_narrow.ss_sr2), | |
83 | ssoff(ss_narrow.ss_sr3), | |
84 | ssoff(ss_narrow.ss_sr5), | |
85 | ssoff(ss_narrow.ss_sr6), | |
86 | ssoff(ss_narrow.ss_sr7), | |
87 | ssoff(ss_narrow.ss_cr0), | |
88 | ssoff(ss_narrow.ss_cr8), | |
89 | ssoff(ss_narrow.ss_cr9), | |
90 | ssoff(ss_narrow.ss_cr10), | |
91 | ssoff(ss_narrow.ss_cr12), | |
92 | ssoff(ss_narrow.ss_cr13), | |
93 | ssoff(ss_narrow.ss_cr24), | |
94 | ssoff(ss_narrow.ss_cr25), | |
95 | ssoff(ss_narrow.ss_cr26), | |
96 | ssoff(ss_narrow.ss_mpsfu_high), | |
97 | ssoff(ss_narrow.ss_mpsfu_low), | |
98 | ssoff(ss_narrow.ss_mpsfu_ovflo), | |
99 | ssoff(ss_pad), | |
100 | ssoff(ss_frstat), | |
101 | ssoff(ss_frexcp1), | |
102 | ssoff(ss_frexcp2), | |
103 | ssoff(ss_frexcp3), | |
104 | ssoff(ss_frexcp4), | |
105 | ssoff(ss_frexcp5), | |
106 | ssoff(ss_frexcp6), | |
107 | ssoff(ss_frexcp7), | |
108 | ssoff(ss_fr4_hi), | |
109 | ssoff(ss_fr4_lo), | |
110 | ssoff(ss_fr5_hi), | |
111 | ssoff(ss_fr5_lo), | |
112 | ssoff(ss_fr6_hi), | |
113 | ssoff(ss_fr6_lo), | |
114 | ssoff(ss_fr7_hi), | |
115 | ssoff(ss_fr7_lo), | |
116 | ssoff(ss_fr8_hi), | |
117 | ssoff(ss_fr8_lo), | |
118 | ssoff(ss_fr9_hi), | |
119 | ssoff(ss_fr9_lo), | |
120 | ssoff(ss_fr10_hi), | |
121 | ssoff(ss_fr10_lo), | |
122 | ssoff(ss_fr11_hi), | |
123 | ssoff(ss_fr11_lo), | |
124 | ssoff(ss_fr12_hi), | |
125 | ssoff(ss_fr12_lo), | |
126 | ssoff(ss_fr13_hi), | |
127 | ssoff(ss_fr13_lo), | |
128 | ssoff(ss_fr14_hi), | |
129 | ssoff(ss_fr14_lo), | |
130 | ssoff(ss_fr15_hi), | |
131 | ssoff(ss_fr15_lo), | |
132 | ssoff(ss_fr16_hi), | |
133 | ssoff(ss_fr16_lo), | |
134 | ssoff(ss_fr17_hi), | |
135 | ssoff(ss_fr17_lo), | |
136 | ssoff(ss_fr18_hi), | |
137 | ssoff(ss_fr18_lo), | |
138 | ssoff(ss_fr19_hi), | |
139 | ssoff(ss_fr19_lo), | |
140 | ssoff(ss_fr20_hi), | |
141 | ssoff(ss_fr20_lo), | |
142 | ssoff(ss_fr21_hi), | |
143 | ssoff(ss_fr21_lo), | |
144 | ssoff(ss_fr22_hi), | |
145 | ssoff(ss_fr22_lo), | |
146 | ssoff(ss_fr23_hi), | |
147 | ssoff(ss_fr23_lo), | |
148 | ssoff(ss_fr24_hi), | |
149 | ssoff(ss_fr24_lo), | |
150 | ssoff(ss_fr25_hi), | |
151 | ssoff(ss_fr25_lo), | |
152 | ssoff(ss_fr26_hi), | |
153 | ssoff(ss_fr26_lo), | |
154 | ssoff(ss_fr27_hi), | |
155 | ssoff(ss_fr27_lo), | |
156 | ssoff(ss_fr28_hi), | |
157 | ssoff(ss_fr28_lo), | |
158 | ssoff(ss_fr29_hi), | |
159 | ssoff(ss_fr29_lo), | |
160 | ssoff(ss_fr30_hi), | |
161 | ssoff(ss_fr30_lo), | |
162 | ssoff(ss_fr31_hi), | |
163 | ssoff(ss_fr31_lo) | |
164 | }; | |
165 | ||
166 | static int | |
167 | hppa_hpux_cannot_fetch_register (int regnum) | |
168 | { | |
169 | gdb_assert (regnum >= 0 && regnum < NUM_REGS); | |
170 | return (regnum >= ARRAY_SIZE(hppa_hpux_save_state_offset)); | |
171 | } | |
172 | ||
173 | static int | |
174 | hppa_hpux_cannot_store_register (int regnum) | |
175 | { | |
176 | return hppa_hpux_cannot_fetch_register (regnum); | |
177 | } | |
178 | ||
179 | static void | |
180 | hppa_hpux_fetch_register (int regnum) | |
181 | { | |
182 | CORE_ADDR addr; | |
183 | size_t size; | |
184 | PTRACE_TYPE_RET *buf; | |
185 | pid_t pid; | |
186 | int i; | |
187 | ||
188 | if (hppa_hpux_cannot_fetch_register (regnum)) | |
189 | { | |
190 | regcache_raw_supply (current_regcache, regnum, NULL); | |
191 | return; | |
192 | } | |
193 | ||
194 | pid = PIDGET (inferior_ptid); | |
195 | ||
196 | /* This isn't really an address. But ptrace thinks of it as one. */ | |
197 | addr = hppa_hpux_save_state_offset[regnum]; | |
198 | size = register_size (current_gdbarch, regnum); | |
199 | ||
200 | gdb_assert ((size % sizeof (PTRACE_TYPE_RET)) == 0); | |
201 | buf = alloca (size); | |
202 | ||
203 | /* Read the register contents from the inferior a chuck at the time. */ | |
204 | for (i = 0; i < size / sizeof (PTRACE_TYPE_RET); i++) | |
205 | { | |
206 | errno = 0; | |
207 | buf[i] = ptrace (PT_RUREGS, pid, (PTRACE_TYPE_ARG3) addr, 0, 0); | |
208 | if (errno != 0) | |
209 | error ("Couldn't read register %s (#%d): %s.", REGISTER_NAME (regnum), | |
210 | regnum, safe_strerror (errno)); | |
211 | ||
212 | addr += sizeof (PTRACE_TYPE_RET); | |
213 | } | |
214 | regcache_raw_supply (current_regcache, regnum, buf); | |
215 | } | |
216 | ||
217 | static void | |
218 | hppa_hpux_fetch_inferior_registers (int regnum) | |
219 | { | |
220 | if (regnum == -1) | |
221 | for (regnum = 0; regnum < NUM_REGS; regnum++) | |
222 | hppa_hpux_fetch_register (regnum); | |
223 | else | |
224 | hppa_hpux_fetch_register (regnum); | |
225 | } | |
226 | ||
227 | /* Store register REGNUM into the inferior. */ | |
228 | ||
229 | static void | |
230 | hppa_hpux_store_register (int regnum) | |
231 | { | |
232 | CORE_ADDR addr; | |
233 | size_t size; | |
234 | PTRACE_TYPE_RET *buf; | |
235 | pid_t pid; | |
236 | int i; | |
237 | ||
238 | if (hppa_hpux_cannot_store_register (regnum)) | |
239 | return; | |
240 | ||
241 | pid = PIDGET (inferior_ptid); | |
242 | ||
243 | /* This isn't really an address. But ptrace thinks of it as one. */ | |
244 | addr = hppa_hpux_save_state_offset[regnum]; | |
245 | size = register_size (current_gdbarch, regnum); | |
246 | ||
247 | gdb_assert ((size % sizeof (PTRACE_TYPE_RET)) == 0); | |
248 | buf = alloca (size); | |
249 | ||
250 | /* Write the register contents into the inferior a chunk at the time. */ | |
251 | regcache_raw_collect (current_regcache, regnum, buf); | |
252 | for (i = 0; i < size / sizeof (PTRACE_TYPE_RET); i++) | |
253 | { | |
254 | errno = 0; | |
255 | ptrace (PT_WUREGS, pid, (PTRACE_TYPE_ARG3) addr, buf[i], 0); | |
256 | if (errno != 0) | |
257 | error ("Couldn't write register %s (#%d): %s.", REGISTER_NAME (regnum), | |
258 | regnum, safe_strerror (errno)); | |
259 | ||
260 | addr += sizeof (PTRACE_TYPE_RET); | |
261 | } | |
262 | } | |
263 | ||
264 | /* Store register REGNUM back into the inferior. If REGNUM is -1, do | |
265 | this for all registers (including the floating point registers). */ | |
266 | ||
267 | static void | |
268 | hppa_hpux_store_inferior_registers (int regnum) | |
269 | { | |
270 | if (regnum == -1) | |
271 | for (regnum = 0; regnum < NUM_REGS; regnum++) | |
272 | hppa_hpux_store_register (regnum); | |
273 | else | |
274 | hppa_hpux_store_register (regnum); | |
275 | } | |
276 | \f | |
277 | ||
278 | /* Prevent warning from -Wmissing-prototypes. */ | |
279 | void _initialize_hppa_hpux_nat (void); | |
280 | ||
281 | void | |
282 | _initialize_hppa_hpux_nat (void) | |
283 | { | |
284 | struct target_ops *t; | |
285 | ||
286 | t = inf_ptrace_target (); | |
287 | t->to_fetch_registers = hppa_hpux_fetch_inferior_registers; | |
288 | t->to_store_registers = hppa_hpux_store_inferior_registers; | |
289 | add_target (t); | |
290 | } |