* gdbme.c (call_with_trampolines): New function to try and step
[deliverable/binutils-gdb.git] / gdb / hppa-tdep.c
CommitLineData
66a1aa07
SG
1/* Machine-dependent code which would otherwise be in inflow.c and core.c,
2 for GDB, the GNU debugger. This code is for the HP PA-RISC cpu.
3 Copyright 1986, 1987, 1989, 1990, 1991, 1992, 1993 Free Software Foundation, Inc.
4
5 Contributed by the Center for Software Science at the
6 University of Utah (pa-gdb-bugs@cs.utah.edu).
7
8This file is part of GDB.
9
10This program is free software; you can redistribute it and/or modify
11it under the terms of the GNU General Public License as published by
12the Free Software Foundation; either version 2 of the License, or
13(at your option) any later version.
14
15This program is distributed in the hope that it will be useful,
16but WITHOUT ANY WARRANTY; without even the implied warranty of
17MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18GNU General Public License for more details.
19
20You should have received a copy of the GNU General Public License
21along with this program; if not, write to the Free Software
22Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
23
24#include "defs.h"
25#include "frame.h"
26#include "inferior.h"
27#include "value.h"
28
29/* For argument passing to the inferior */
30#include "symtab.h"
31
32#ifdef USG
33#include <sys/types.h>
34#endif
35
36#include <sys/param.h>
37#include <sys/dir.h>
38#include <signal.h>
39#include <sys/ioctl.h>
40
41#ifdef COFF_ENCAPSULATE
42#include "a.out.encap.h"
43#else
44#include <a.out.h>
45#endif
46#ifndef N_SET_MAGIC
47#define N_SET_MAGIC(exec, val) ((exec).a_magic = (val))
48#endif
49
50/*#include <sys/user.h> After a.out.h */
51#include <sys/file.h>
52#include <sys/stat.h>
53#include <machine/psl.h>
54#include "wait.h"
55
56#include "gdbcore.h"
57#include "gdbcmd.h"
58#include "target.h"
59#include "symfile.h"
60#include "objfiles.h"
61
62static int restore_pc_queue PARAMS ((struct frame_saved_regs *fsr));
63static int hppa_alignof PARAMS ((struct type *arg));
8fa74880 64CORE_ADDR frame_saved_pc PARAMS ((FRAME frame));
c598654a
JL
65static int prologue_inst_adjust_sp PARAMS ((unsigned long));
66static int is_branch PARAMS ((unsigned long));
67static int inst_saves_gr PARAMS ((unsigned long));
68static int inst_saves_fr PARAMS ((unsigned long));
70e43abe
JL
69static int pc_in_interrupt_handler PARAMS ((CORE_ADDR));
70static int pc_in_linker_stub PARAMS ((CORE_ADDR));
66a1aa07
SG
71
72\f
73/* Routines to extract various sized constants out of hppa
74 instructions. */
75
76/* This assumes that no garbage lies outside of the lower bits of
77 value. */
78
79int
80sign_extend (val, bits)
81 unsigned val, bits;
82{
83 return (int)(val >> bits - 1 ? (-1 << bits) | val : val);
84}
85
86/* For many immediate values the sign bit is the low bit! */
87
88int
89low_sign_extend (val, bits)
90 unsigned val, bits;
91{
92 return (int)((val & 0x1 ? (-1 << (bits - 1)) : 0) | val >> 1);
93}
94/* extract the immediate field from a ld{bhw}s instruction */
95
96unsigned
97get_field (val, from, to)
98 unsigned val, from, to;
99{
100 val = val >> 31 - to;
101 return val & ((1 << 32 - from) - 1);
102}
103
104unsigned
105set_field (val, from, to, new_val)
106 unsigned *val, from, to;
107{
108 unsigned mask = ~((1 << (to - from + 1)) << (31 - from));
109 return *val = *val & mask | (new_val << (31 - from));
110}
111
112/* extract a 3-bit space register number from a be, ble, mtsp or mfsp */
113
114extract_3 (word)
115 unsigned word;
116{
117 return GET_FIELD (word, 18, 18) << 2 | GET_FIELD (word, 16, 17);
118}
119
120extract_5_load (word)
121 unsigned word;
122{
123 return low_sign_extend (word >> 16 & MASK_5, 5);
124}
125
126/* extract the immediate field from a st{bhw}s instruction */
127
128int
129extract_5_store (word)
130 unsigned word;
131{
132 return low_sign_extend (word & MASK_5, 5);
133}
134
68c8d698
SG
135/* extract the immediate field from a break instruction */
136
137unsigned
138extract_5r_store (word)
139 unsigned word;
140{
141 return (word & MASK_5);
142}
143
144/* extract the immediate field from a {sr}sm instruction */
145
146unsigned
147extract_5R_store (word)
148 unsigned word;
149{
150 return (word >> 16 & MASK_5);
151}
152
66a1aa07
SG
153/* extract an 11 bit immediate field */
154
155int
156extract_11 (word)
157 unsigned word;
158{
159 return low_sign_extend (word & MASK_11, 11);
160}
161
162/* extract a 14 bit immediate field */
163
164int
165extract_14 (word)
166 unsigned word;
167{
168 return low_sign_extend (word & MASK_14, 14);
169}
170
171/* deposit a 14 bit constant in a word */
172
173unsigned
174deposit_14 (opnd, word)
175 int opnd;
176 unsigned word;
177{
178 unsigned sign = (opnd < 0 ? 1 : 0);
179
180 return word | ((unsigned)opnd << 1 & MASK_14) | sign;
181}
182
183/* extract a 21 bit constant */
184
185int
186extract_21 (word)
187 unsigned word;
188{
189 int val;
190
191 word &= MASK_21;
192 word <<= 11;
193 val = GET_FIELD (word, 20, 20);
194 val <<= 11;
195 val |= GET_FIELD (word, 9, 19);
196 val <<= 2;
197 val |= GET_FIELD (word, 5, 6);
198 val <<= 5;
199 val |= GET_FIELD (word, 0, 4);
200 val <<= 2;
201 val |= GET_FIELD (word, 7, 8);
202 return sign_extend (val, 21) << 11;
203}
204
205/* deposit a 21 bit constant in a word. Although 21 bit constants are
206 usually the top 21 bits of a 32 bit constant, we assume that only
207 the low 21 bits of opnd are relevant */
208
209unsigned
210deposit_21 (opnd, word)
211 unsigned opnd, word;
212{
213 unsigned val = 0;
214
215 val |= GET_FIELD (opnd, 11 + 14, 11 + 18);
216 val <<= 2;
217 val |= GET_FIELD (opnd, 11 + 12, 11 + 13);
218 val <<= 2;
219 val |= GET_FIELD (opnd, 11 + 19, 11 + 20);
220 val <<= 11;
221 val |= GET_FIELD (opnd, 11 + 1, 11 + 11);
222 val <<= 1;
223 val |= GET_FIELD (opnd, 11 + 0, 11 + 0);
224 return word | val;
225}
226
227/* extract a 12 bit constant from branch instructions */
228
229int
230extract_12 (word)
231 unsigned word;
232{
233 return sign_extend (GET_FIELD (word, 19, 28) |
234 GET_FIELD (word, 29, 29) << 10 |
235 (word & 0x1) << 11, 12) << 2;
236}
237
238/* extract a 17 bit constant from branch instructions, returning the
239 19 bit signed value. */
240
241int
242extract_17 (word)
243 unsigned word;
244{
245 return sign_extend (GET_FIELD (word, 19, 28) |
246 GET_FIELD (word, 29, 29) << 10 |
247 GET_FIELD (word, 11, 15) << 11 |
248 (word & 0x1) << 16, 17) << 2;
249}
250\f
66a1aa07
SG
251/* Lookup the unwind (stack backtrace) info for the given PC. We search all
252 of the objfiles seeking the unwind table entry for this PC. Each objfile
253 contains a sorted list of struct unwind_table_entry. Since we do a binary
254 search of the unwind tables, we depend upon them to be sorted. */
255
256static struct unwind_table_entry *
257find_unwind_entry(pc)
258 CORE_ADDR pc;
259{
260 int first, middle, last;
261 struct objfile *objfile;
262
263 ALL_OBJFILES (objfile)
264 {
265 struct obj_unwind_info *ui;
266
267 ui = OBJ_UNWIND_INFO (objfile);
268
269 if (!ui)
270 continue;
271
272 /* First, check the cache */
273
274 if (ui->cache
275 && pc >= ui->cache->region_start
276 && pc <= ui->cache->region_end)
277 return ui->cache;
278
279 /* Not in the cache, do a binary search */
280
281 first = 0;
282 last = ui->last;
283
284 while (first <= last)
285 {
286 middle = (first + last) / 2;
287 if (pc >= ui->table[middle].region_start
288 && pc <= ui->table[middle].region_end)
289 {
290 ui->cache = &ui->table[middle];
291 return &ui->table[middle];
292 }
293
294 if (pc < ui->table[middle].region_start)
295 last = middle - 1;
296 else
297 first = middle + 1;
298 }
299 } /* ALL_OBJFILES() */
300 return NULL;
301}
302
70e43abe
JL
303/* Called to determine if PC is in an interrupt handler of some
304 kind. */
305
306static int
307pc_in_interrupt_handler (pc)
308 CORE_ADDR pc;
309{
310 struct unwind_table_entry *u;
311 struct minimal_symbol *msym_us;
312
313 u = find_unwind_entry (pc);
314 if (!u)
315 return 0;
316
317 /* Oh joys. HPUX sets the interrupt bit for _sigreturn even though
318 its frame isn't a pure interrupt frame. Deal with this. */
319 msym_us = lookup_minimal_symbol_by_pc (pc);
320
321 return u->HP_UX_interrupt_marker && !IN_SIGTRAMP (pc, SYMBOL_NAME (msym_us));
322}
323
5ac7f56e
JK
324/* Called when no unwind descriptor was found for PC. Returns 1 if it
325 appears that PC is in a linker stub. */
5ac7f56e
JK
326
327static int
328pc_in_linker_stub (pc)
329 CORE_ADDR pc;
330{
5ac7f56e
JK
331 int found_magic_instruction = 0;
332 int i;
08ecd8f3
JK
333 char buf[4];
334
335 /* If unable to read memory, assume pc is not in a linker stub. */
336 if (target_read_memory (pc, buf, 4) != 0)
337 return 0;
5ac7f56e 338
d08c6f4c
JK
339 /* We are looking for something like
340
341 ; $$dyncall jams RP into this special spot in the frame (RP')
342 ; before calling the "call stub"
343 ldw -18(sp),rp
344
345 ldsid (rp),r1 ; Get space associated with RP into r1
346 mtsp r1,sp ; Move it into space register 0
347 be,n 0(sr0),rp) ; back to your regularly scheduled program
348 */
349
5ac7f56e
JK
350 /* Maximum known linker stub size is 4 instructions. Search forward
351 from the given PC, then backward. */
352 for (i = 0; i < 4; i++)
353 {
6e35b037 354 /* If we hit something with an unwind, stop searching this direction. */
5ac7f56e
JK
355
356 if (find_unwind_entry (pc + i * 4) != 0)
357 break;
358
359 /* Check for ldsid (rp),r1 which is the magic instruction for a
360 return from a cross-space function call. */
361 if (read_memory_integer (pc + i * 4, 4) == 0x004010a1)
362 {
363 found_magic_instruction = 1;
364 break;
365 }
366 /* Add code to handle long call/branch and argument relocation stubs
367 here. */
368 }
369
370 if (found_magic_instruction != 0)
371 return 1;
372
373 /* Now look backward. */
374 for (i = 0; i < 4; i++)
375 {
6e35b037 376 /* If we hit something with an unwind, stop searching this direction. */
5ac7f56e
JK
377
378 if (find_unwind_entry (pc - i * 4) != 0)
379 break;
380
381 /* Check for ldsid (rp),r1 which is the magic instruction for a
382 return from a cross-space function call. */
383 if (read_memory_integer (pc - i * 4, 4) == 0x004010a1)
384 {
385 found_magic_instruction = 1;
386 break;
387 }
388 /* Add code to handle long call/branch and argument relocation stubs
389 here. */
390 }
391 return found_magic_instruction;
392}
393
66a1aa07
SG
394static int
395find_return_regnum(pc)
396 CORE_ADDR pc;
397{
398 struct unwind_table_entry *u;
399
400 u = find_unwind_entry (pc);
401
402 if (!u)
403 return RP_REGNUM;
404
405 if (u->Millicode)
406 return 31;
407
408 return RP_REGNUM;
409}
410
5ac7f56e 411/* Return size of frame, or -1 if we should use a frame pointer. */
66a1aa07 412int
70e43abe 413find_proc_framesize (pc)
66a1aa07
SG
414 CORE_ADDR pc;
415{
416 struct unwind_table_entry *u;
70e43abe 417 struct minimal_symbol *msym_us;
66a1aa07 418
66a1aa07
SG
419 u = find_unwind_entry (pc);
420
421 if (!u)
5ac7f56e
JK
422 {
423 if (pc_in_linker_stub (pc))
424 /* Linker stubs have a zero size frame. */
425 return 0;
426 else
427 return -1;
428 }
66a1aa07 429
70e43abe
JL
430 msym_us = lookup_minimal_symbol_by_pc (pc);
431
432 /* If Save_SP is set, and we're not in an interrupt or signal caller,
433 then we have a frame pointer. Use it. */
434 if (u->Save_SP && !pc_in_interrupt_handler (pc)
435 && !IN_SIGTRAMP (pc, SYMBOL_NAME (msym_us)))
eabbe766
JK
436 return -1;
437
66a1aa07
SG
438 return u->Total_frame_size << 3;
439}
440
5ac7f56e
JK
441/* Return offset from sp at which rp is saved, or 0 if not saved. */
442static int rp_saved PARAMS ((CORE_ADDR));
443
444static int
445rp_saved (pc)
446 CORE_ADDR pc;
66a1aa07
SG
447{
448 struct unwind_table_entry *u;
449
450 u = find_unwind_entry (pc);
451
452 if (!u)
5ac7f56e
JK
453 {
454 if (pc_in_linker_stub (pc))
455 /* This is the so-called RP'. */
456 return -24;
457 else
458 return 0;
459 }
66a1aa07
SG
460
461 if (u->Save_RP)
5ac7f56e 462 return -20;
c7f3b703
JL
463 else if (u->stub_type != 0)
464 {
465 switch (u->stub_type)
466 {
467 case EXPORT:
468 return -24;
469 case PARAMETER_RELOCATION:
470 return -8;
471 default:
472 return 0;
473 }
474 }
66a1aa07
SG
475 else
476 return 0;
477}
478\f
8fa74880
SG
479int
480frameless_function_invocation (frame)
481 FRAME frame;
482{
b8ec9a79 483 struct unwind_table_entry *u;
8fa74880 484
b8ec9a79 485 u = find_unwind_entry (frame->pc);
8fa74880 486
b8ec9a79 487 if (u == 0)
8fa74880 488 return frameless_look_for_prologue (frame);
b8ec9a79 489
c7f3b703 490 return (u->Total_frame_size == 0 && u->stub_type == 0);
8fa74880
SG
491}
492
66a1aa07
SG
493CORE_ADDR
494saved_pc_after_call (frame)
495 FRAME frame;
496{
497 int ret_regnum;
498
499 ret_regnum = find_return_regnum (get_frame_pc (frame));
500
501 return read_register (ret_regnum) & ~0x3;
502}
503\f
504CORE_ADDR
505frame_saved_pc (frame)
506 FRAME frame;
507{
508 CORE_ADDR pc = get_frame_pc (frame);
509
70e43abe
JL
510 /* BSD, HPUX & OSF1 all lay out the hardware state in the same manner
511 at the base of the frame in an interrupt handler. Registers within
512 are saved in the exact same order as GDB numbers registers. How
513 convienent. */
514 if (pc_in_interrupt_handler (pc))
515 return read_memory_integer (frame->frame + PC_REGNUM * 4, 4) & ~0x3;
516
517 /* Deal with signal handler caller frames too. */
518 if (frame->signal_handler_caller)
519 {
520 CORE_ADDR rp;
521 FRAME_SAVED_PC_IN_SIGTRAMP (frame, &rp);
522 return rp;
523 }
524
8fa74880 525 if (frameless_function_invocation (frame))
66a1aa07
SG
526 {
527 int ret_regnum;
528
529 ret_regnum = find_return_regnum (pc);
530
70e43abe
JL
531 /* If the next frame is an interrupt frame or a signal
532 handler caller, then we need to look in the saved
533 register area to get the return pointer (the values
534 in the registers may not correspond to anything useful). */
535 if (frame->next
536 && (frame->next->signal_handler_caller
537 || pc_in_interrupt_handler (frame->next->pc)))
538 {
539 struct frame_info *fi;
540 struct frame_saved_regs saved_regs;
541
542 fi = get_frame_info (frame->next);
543 get_frame_saved_regs (fi, &saved_regs);
544 if (read_memory_integer (saved_regs.regs[FLAGS_REGNUM] & 0x2, 4))
545 return read_memory_integer (saved_regs.regs[31], 4);
546 else
547 return read_memory_integer (saved_regs.regs[RP_REGNUM], 4);
548 }
549 else
550 return read_register (ret_regnum) & ~0x3;
66a1aa07 551 }
66a1aa07 552 else
5ac7f56e
JK
553 {
554 int rp_offset = rp_saved (pc);
555
70e43abe
JL
556 /* Similar to code in frameless function case. If the next
557 frame is a signal or interrupt handler, then dig the right
558 information out of the saved register info. */
559 if (rp_offset == 0
560 && frame->next
561 && (frame->next->signal_handler_caller
562 || pc_in_interrupt_handler (frame->next->pc)))
563 {
564 struct frame_info *fi;
565 struct frame_saved_regs saved_regs;
566
567 fi = get_frame_info (frame->next);
568 get_frame_saved_regs (fi, &saved_regs);
569 if (read_memory_integer (saved_regs.regs[FLAGS_REGNUM] & 0x2, 4))
570 return read_memory_integer (saved_regs.regs[31], 4);
571 else
572 return read_memory_integer (saved_regs.regs[RP_REGNUM], 4);
573 }
574 else if (rp_offset == 0)
5ac7f56e
JK
575 return read_register (RP_REGNUM) & ~0x3;
576 else
28403b8e 577 return read_memory_integer (frame->frame + rp_offset, 4) & ~0x3;
5ac7f56e 578 }
66a1aa07
SG
579}
580\f
581/* We need to correct the PC and the FP for the outermost frame when we are
582 in a system call. */
583
584void
585init_extra_frame_info (fromleaf, frame)
586 int fromleaf;
587 struct frame_info *frame;
588{
589 int flags;
590 int framesize;
591
192c3eeb 592 if (frame->next && !fromleaf)
66a1aa07
SG
593 return;
594
192c3eeb
JL
595 /* If the next frame represents a frameless function invocation
596 then we have to do some adjustments that are normally done by
597 FRAME_CHAIN. (FRAME_CHAIN is not called in this case.) */
598 if (fromleaf)
599 {
600 /* Find the framesize of *this* frame without peeking at the PC
601 in the current frame structure (it isn't set yet). */
602 framesize = find_proc_framesize (FRAME_SAVED_PC (get_next_frame (frame)));
603
604 /* Now adjust our base frame accordingly. If we have a frame pointer
605 use it, else subtract the size of this frame from the current
606 frame. (we always want frame->frame to point at the lowest address
607 in the frame). */
608 if (framesize == -1)
609 frame->frame = read_register (FP_REGNUM);
610 else
611 frame->frame -= framesize;
612 return;
613 }
614
66a1aa07
SG
615 flags = read_register (FLAGS_REGNUM);
616 if (flags & 2) /* In system call? */
617 frame->pc = read_register (31) & ~0x3;
618
192c3eeb
JL
619 /* The outermost frame is always derived from PC-framesize
620
621 One might think frameless innermost frames should have
622 a frame->frame that is the same as the parent's frame->frame.
623 That is wrong; frame->frame in that case should be the *high*
624 address of the parent's frame. It's complicated as hell to
625 explain, but the parent *always* creates some stack space for
626 the child. So the child actually does have a frame of some
627 sorts, and its base is the high address in its parent's frame. */
66a1aa07
SG
628 framesize = find_proc_framesize(frame->pc);
629 if (framesize == -1)
630 frame->frame = read_register (FP_REGNUM);
631 else
632 frame->frame = read_register (SP_REGNUM) - framesize;
66a1aa07
SG
633}
634\f
8966221d
JK
635/* Given a GDB frame, determine the address of the calling function's frame.
636 This will be used to create a new GDB frame struct, and then
637 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
638
639 This may involve searching through prologues for several functions
640 at boundaries where GCC calls HP C code, or where code which has
641 a frame pointer calls code without a frame pointer. */
642
643
66a1aa07
SG
644FRAME_ADDR
645frame_chain (frame)
646 struct frame_info *frame;
647{
8966221d
JK
648 int my_framesize, caller_framesize;
649 struct unwind_table_entry *u;
70e43abe
JL
650 CORE_ADDR frame_base;
651
652 /* Handle HPUX, BSD, and OSF1 style interrupt frames first. These
653 are easy; at *sp we have a full save state strucutre which we can
654 pull the old stack pointer from. Also see frame_saved_pc for
655 code to dig a saved PC out of the save state structure. */
656 if (pc_in_interrupt_handler (frame->pc))
657 frame_base = read_memory_integer (frame->frame + SP_REGNUM * 4, 4);
658 else if (frame->signal_handler_caller)
659 {
660 FRAME_BASE_BEFORE_SIGTRAMP (frame, &frame_base);
661 }
662 else
663 frame_base = frame->frame;
66a1aa07 664
8966221d
JK
665 /* Get frame sizes for the current frame and the frame of the
666 caller. */
667 my_framesize = find_proc_framesize (frame->pc);
668 caller_framesize = find_proc_framesize (FRAME_SAVED_PC(frame));
66a1aa07 669
8966221d
JK
670 /* If caller does not have a frame pointer, then its frame
671 can be found at current_frame - caller_framesize. */
672 if (caller_framesize != -1)
70e43abe 673 return frame_base - caller_framesize;
8966221d
JK
674
675 /* Both caller and callee have frame pointers and are GCC compiled
676 (SAVE_SP bit in unwind descriptor is on for both functions.
677 The previous frame pointer is found at the top of the current frame. */
678 if (caller_framesize == -1 && my_framesize == -1)
70e43abe 679 return read_memory_integer (frame_base, 4);
8966221d
JK
680
681 /* Caller has a frame pointer, but callee does not. This is a little
682 more difficult as GCC and HP C lay out locals and callee register save
683 areas very differently.
684
685 The previous frame pointer could be in a register, or in one of
686 several areas on the stack.
687
688 Walk from the current frame to the innermost frame examining
2f8c3639 689 unwind descriptors to determine if %r3 ever gets saved into the
8966221d 690 stack. If so return whatever value got saved into the stack.
2f8c3639 691 If it was never saved in the stack, then the value in %r3 is still
8966221d
JK
692 valid, so use it.
693
2f8c3639 694 We use information from unwind descriptors to determine if %r3
8966221d
JK
695 is saved into the stack (Entry_GR field has this information). */
696
697 while (frame)
698 {
699 u = find_unwind_entry (frame->pc);
700
701 if (!u)
702 {
01a03545
JK
703 /* We could find this information by examining prologues. I don't
704 think anyone has actually written any tools (not even "strip")
705 which leave them out of an executable, so maybe this is a moot
706 point. */
8966221d
JK
707 warning ("Unable to find unwind for PC 0x%x -- Help!", frame->pc);
708 return 0;
709 }
710
711 /* Entry_GR specifies the number of callee-saved general registers
2f8c3639 712 saved in the stack. It starts at %r3, so %r3 would be 1. */
70e43abe
JL
713 if (u->Entry_GR >= 1 || u->Save_SP
714 || frame->signal_handler_caller
715 || pc_in_interrupt_handler (frame->pc))
8966221d
JK
716 break;
717 else
718 frame = frame->next;
719 }
720
721 if (frame)
722 {
723 /* We may have walked down the chain into a function with a frame
724 pointer. */
70e43abe
JL
725 if (u->Save_SP
726 && !frame->signal_handler_caller
727 && !pc_in_interrupt_handler (frame->pc))
8966221d 728 return read_memory_integer (frame->frame, 4);
2f8c3639 729 /* %r3 was saved somewhere in the stack. Dig it out. */
8966221d 730 else
c598654a
JL
731 {
732 struct frame_info *fi;
733 struct frame_saved_regs saved_regs;
734
735 fi = get_frame_info (frame);
736 get_frame_saved_regs (fi, &saved_regs);
737 return read_memory_integer (saved_regs.regs[FP_REGNUM], 4);
738 }
8966221d
JK
739 }
740 else
741 {
2f8c3639 742 /* The value in %r3 was never saved into the stack (thus %r3 still
8966221d 743 holds the value of the previous frame pointer). */
2f8c3639 744 return read_register (FP_REGNUM);
8966221d
JK
745 }
746}
66a1aa07 747
66a1aa07
SG
748\f
749/* To see if a frame chain is valid, see if the caller looks like it
750 was compiled with gcc. */
751
752int
753frame_chain_valid (chain, thisframe)
754 FRAME_ADDR chain;
755 FRAME thisframe;
756{
247145e6
JK
757 struct minimal_symbol *msym_us;
758 struct minimal_symbol *msym_start;
70e43abe
JL
759 struct unwind_table_entry *u, *next_u = NULL;
760 FRAME next;
66a1aa07
SG
761
762 if (!chain)
763 return 0;
764
b8ec9a79 765 u = find_unwind_entry (thisframe->pc);
4b01383b 766
70e43abe
JL
767 if (u == NULL)
768 return 1;
769
247145e6
JK
770 /* We can't just check that the same of msym_us is "_start", because
771 someone idiotically decided that they were going to make a Ltext_end
772 symbol with the same address. This Ltext_end symbol is totally
773 indistinguishable (as nearly as I can tell) from the symbol for a function
774 which is (legitimately, since it is in the user's namespace)
775 named Ltext_end, so we can't just ignore it. */
776 msym_us = lookup_minimal_symbol_by_pc (FRAME_SAVED_PC (thisframe));
777 msym_start = lookup_minimal_symbol ("_start", NULL);
778 if (msym_us
779 && msym_start
780 && SYMBOL_VALUE_ADDRESS (msym_us) == SYMBOL_VALUE_ADDRESS (msym_start))
b8ec9a79 781 return 0;
5ac7f56e 782
70e43abe
JL
783 next = get_next_frame (thisframe);
784 if (next)
785 next_u = find_unwind_entry (next->pc);
5ac7f56e 786
70e43abe
JL
787 /* If this frame does not save SP, has no stack, isn't a stub,
788 and doesn't "call" an interrupt routine or signal handler caller,
789 then its not valid. */
790 if (u->Save_SP || u->Total_frame_size || u->stub_type != 0
791 || (thisframe->next && thisframe->next->signal_handler_caller)
792 || (next_u && next_u->HP_UX_interrupt_marker))
b8ec9a79 793 return 1;
5ac7f56e 794
b8ec9a79
JK
795 if (pc_in_linker_stub (thisframe->pc))
796 return 1;
4b01383b 797
b8ec9a79 798 return 0;
66a1aa07
SG
799}
800
66a1aa07
SG
801/*
802 * These functions deal with saving and restoring register state
803 * around a function call in the inferior. They keep the stack
804 * double-word aligned; eventually, on an hp700, the stack will have
805 * to be aligned to a 64-byte boundary.
806 */
807
808int
809push_dummy_frame ()
810{
811 register CORE_ADDR sp;
812 register int regnum;
813 int int_buffer;
814 double freg_buffer;
815
816 /* Space for "arguments"; the RP goes in here. */
817 sp = read_register (SP_REGNUM) + 48;
818 int_buffer = read_register (RP_REGNUM) | 0x3;
819 write_memory (sp - 20, (char *)&int_buffer, 4);
820
821 int_buffer = read_register (FP_REGNUM);
822 write_memory (sp, (char *)&int_buffer, 4);
823
824 write_register (FP_REGNUM, sp);
825
826 sp += 8;
827
828 for (regnum = 1; regnum < 32; regnum++)
829 if (regnum != RP_REGNUM && regnum != FP_REGNUM)
830 sp = push_word (sp, read_register (regnum));
831
832 sp += 4;
833
834 for (regnum = FP0_REGNUM; regnum < NUM_REGS; regnum++)
835 {
836 read_register_bytes (REGISTER_BYTE (regnum), (char *)&freg_buffer, 8);
837 sp = push_bytes (sp, (char *)&freg_buffer, 8);
838 }
839 sp = push_word (sp, read_register (IPSW_REGNUM));
840 sp = push_word (sp, read_register (SAR_REGNUM));
841 sp = push_word (sp, read_register (PCOQ_HEAD_REGNUM));
842 sp = push_word (sp, read_register (PCSQ_HEAD_REGNUM));
843 sp = push_word (sp, read_register (PCOQ_TAIL_REGNUM));
844 sp = push_word (sp, read_register (PCSQ_TAIL_REGNUM));
845 write_register (SP_REGNUM, sp);
846}
847
848find_dummy_frame_regs (frame, frame_saved_regs)
849 struct frame_info *frame;
850 struct frame_saved_regs *frame_saved_regs;
851{
852 CORE_ADDR fp = frame->frame;
853 int i;
854
855 frame_saved_regs->regs[RP_REGNUM] = fp - 20 & ~0x3;
856 frame_saved_regs->regs[FP_REGNUM] = fp;
857 frame_saved_regs->regs[1] = fp + 8;
66a1aa07 858
b227992a
SG
859 for (fp += 12, i = 3; i < 32; i++)
860 {
861 if (i != FP_REGNUM)
862 {
863 frame_saved_regs->regs[i] = fp;
864 fp += 4;
865 }
866 }
66a1aa07
SG
867
868 fp += 4;
869 for (i = FP0_REGNUM; i < NUM_REGS; i++, fp += 8)
870 frame_saved_regs->regs[i] = fp;
871
872 frame_saved_regs->regs[IPSW_REGNUM] = fp;
b227992a
SG
873 frame_saved_regs->regs[SAR_REGNUM] = fp + 4;
874 frame_saved_regs->regs[PCOQ_HEAD_REGNUM] = fp + 8;
875 frame_saved_regs->regs[PCSQ_HEAD_REGNUM] = fp + 12;
876 frame_saved_regs->regs[PCOQ_TAIL_REGNUM] = fp + 16;
877 frame_saved_regs->regs[PCSQ_TAIL_REGNUM] = fp + 20;
66a1aa07
SG
878}
879
880int
881hppa_pop_frame ()
882{
883 register FRAME frame = get_current_frame ();
884 register CORE_ADDR fp;
885 register int regnum;
886 struct frame_saved_regs fsr;
887 struct frame_info *fi;
888 double freg_buffer;
889
890 fi = get_frame_info (frame);
891 fp = fi->frame;
892 get_frame_saved_regs (fi, &fsr);
893
0a64709e 894#ifndef NO_PC_SPACE_QUEUE_RESTORE
66a1aa07
SG
895 if (fsr.regs[IPSW_REGNUM]) /* Restoring a call dummy frame */
896 restore_pc_queue (&fsr);
0a64709e 897#endif
66a1aa07
SG
898
899 for (regnum = 31; regnum > 0; regnum--)
900 if (fsr.regs[regnum])
901 write_register (regnum, read_memory_integer (fsr.regs[regnum], 4));
902
903 for (regnum = NUM_REGS - 1; regnum >= FP0_REGNUM ; regnum--)
904 if (fsr.regs[regnum])
905 {
906 read_memory (fsr.regs[regnum], (char *)&freg_buffer, 8);
907 write_register_bytes (REGISTER_BYTE (regnum), (char *)&freg_buffer, 8);
908 }
909
910 if (fsr.regs[IPSW_REGNUM])
911 write_register (IPSW_REGNUM,
912 read_memory_integer (fsr.regs[IPSW_REGNUM], 4));
913
914 if (fsr.regs[SAR_REGNUM])
915 write_register (SAR_REGNUM,
916 read_memory_integer (fsr.regs[SAR_REGNUM], 4));
917
ed1a07ad 918 /* If the PC was explicitly saved, then just restore it. */
66a1aa07
SG
919 if (fsr.regs[PCOQ_TAIL_REGNUM])
920 write_register (PCOQ_TAIL_REGNUM,
921 read_memory_integer (fsr.regs[PCOQ_TAIL_REGNUM], 4));
922
ed1a07ad
JK
923 /* Else use the value in %rp to set the new PC. */
924 else
925 target_write_pc (read_register (RP_REGNUM));
926
66a1aa07
SG
927 write_register (FP_REGNUM, read_memory_integer (fp, 4));
928
929 if (fsr.regs[IPSW_REGNUM]) /* call dummy */
930 write_register (SP_REGNUM, fp - 48);
931 else
932 write_register (SP_REGNUM, fp);
933
934 flush_cached_frames ();
935 set_current_frame (create_new_frame (read_register (FP_REGNUM),
936 read_pc ()));
937}
938
939/*
940 * After returning to a dummy on the stack, restore the instruction
941 * queue space registers. */
942
943static int
944restore_pc_queue (fsr)
945 struct frame_saved_regs *fsr;
946{
947 CORE_ADDR pc = read_pc ();
948 CORE_ADDR new_pc = read_memory_integer (fsr->regs[PCOQ_HEAD_REGNUM], 4);
949 int pid;
67ac9759 950 struct target_waitstatus w;
66a1aa07
SG
951 int insn_count;
952
953 /* Advance past break instruction in the call dummy. */
954 write_register (PCOQ_HEAD_REGNUM, pc + 4);
955 write_register (PCOQ_TAIL_REGNUM, pc + 8);
956
957 /*
958 * HPUX doesn't let us set the space registers or the space
959 * registers of the PC queue through ptrace. Boo, hiss.
960 * Conveniently, the call dummy has this sequence of instructions
961 * after the break:
962 * mtsp r21, sr0
963 * ble,n 0(sr0, r22)
964 *
965 * So, load up the registers and single step until we are in the
966 * right place.
967 */
968
969 write_register (21, read_memory_integer (fsr->regs[PCSQ_HEAD_REGNUM], 4));
970 write_register (22, new_pc);
971
972 for (insn_count = 0; insn_count < 3; insn_count++)
973 {
8c5e0021
JK
974 /* FIXME: What if the inferior gets a signal right now? Want to
975 merge this into wait_for_inferior (as a special kind of
976 watchpoint? By setting a breakpoint at the end? Is there
977 any other choice? Is there *any* way to do this stuff with
978 ptrace() or some equivalent?). */
66a1aa07 979 resume (1, 0);
67ac9759 980 target_wait (inferior_pid, &w);
66a1aa07 981
67ac9759 982 if (w.kind == TARGET_WAITKIND_SIGNALLED)
66a1aa07 983 {
67ac9759 984 stop_signal = w.value.sig;
66a1aa07 985 terminal_ours_for_output ();
67ac9759
JK
986 printf_unfiltered ("\nProgram terminated with signal %s, %s.\n",
987 target_signal_to_name (stop_signal),
988 target_signal_to_string (stop_signal));
199b2450 989 gdb_flush (gdb_stdout);
66a1aa07
SG
990 return 0;
991 }
992 }
8c5e0021 993 target_terminal_ours ();
66a1aa07
SG
994 fetch_inferior_registers (-1);
995 return 1;
996}
997
998CORE_ADDR
999hppa_push_arguments (nargs, args, sp, struct_return, struct_addr)
1000 int nargs;
4fd5eed4 1001 value_ptr *args;
66a1aa07
SG
1002 CORE_ADDR sp;
1003 int struct_return;
1004 CORE_ADDR struct_addr;
1005{
1006 /* array of arguments' offsets */
1edc5cd2 1007 int *offset = (int *)alloca(nargs * sizeof (int));
66a1aa07
SG
1008 int cum = 0;
1009 int i, alignment;
1010
1011 for (i = 0; i < nargs; i++)
1012 {
1013 /* Coerce chars to int & float to double if necessary */
1014 args[i] = value_arg_coerce (args[i]);
1015
1016 cum += TYPE_LENGTH (VALUE_TYPE (args[i]));
1017
1018 /* value must go at proper alignment. Assume alignment is a
1019 power of two.*/
1020 alignment = hppa_alignof (VALUE_TYPE (args[i]));
1021 if (cum % alignment)
1022 cum = (cum + alignment) & -alignment;
1023 offset[i] = -cum;
1024 }
558f4183 1025 sp += max ((cum + 7) & -8, 16);
66a1aa07
SG
1026
1027 for (i = 0; i < nargs; i++)
1028 write_memory (sp + offset[i], VALUE_CONTENTS (args[i]),
1029 TYPE_LENGTH (VALUE_TYPE (args[i])));
1030
1031 if (struct_return)
1032 write_register (28, struct_addr);
1033 return sp + 32;
1034}
1035
1036/*
1037 * Insert the specified number of args and function address
1038 * into a call sequence of the above form stored at DUMMYNAME.
1039 *
1040 * On the hppa we need to call the stack dummy through $$dyncall.
1041 * Therefore our version of FIX_CALL_DUMMY takes an extra argument,
1042 * real_pc, which is the location where gdb should start up the
1043 * inferior to do the function call.
1044 */
1045
1046CORE_ADDR
1047hppa_fix_call_dummy (dummy, pc, fun, nargs, args, type, gcc_p)
f4f0d174 1048 char *dummy;
66a1aa07
SG
1049 CORE_ADDR pc;
1050 CORE_ADDR fun;
1051 int nargs;
4fd5eed4 1052 value_ptr *args;
66a1aa07
SG
1053 struct type *type;
1054 int gcc_p;
1055{
1056 CORE_ADDR dyncall_addr, sr4export_addr;
1057 struct minimal_symbol *msymbol;
6cfec929 1058 int flags = read_register (FLAGS_REGNUM);
66a1aa07
SG
1059
1060 msymbol = lookup_minimal_symbol ("$$dyncall", (struct objfile *) NULL);
1061 if (msymbol == NULL)
1062 error ("Can't find an address for $$dyncall trampoline");
1063
1064 dyncall_addr = SYMBOL_VALUE_ADDRESS (msymbol);
1065
1066 msymbol = lookup_minimal_symbol ("_sr4export", (struct objfile *) NULL);
1067 if (msymbol == NULL)
1068 error ("Can't find an address for _sr4export trampoline");
1069
1070 sr4export_addr = SYMBOL_VALUE_ADDRESS (msymbol);
1071
f4f0d174
JK
1072 store_unsigned_integer
1073 (&dummy[9*REGISTER_SIZE],
1074 REGISTER_SIZE,
1075 deposit_21 (fun >> 11,
1076 extract_unsigned_integer (&dummy[9*REGISTER_SIZE],
1077 REGISTER_SIZE)));
1078 store_unsigned_integer
1079 (&dummy[10*REGISTER_SIZE],
1080 REGISTER_SIZE,
1081 deposit_14 (fun & MASK_11,
1082 extract_unsigned_integer (&dummy[10*REGISTER_SIZE],
1083 REGISTER_SIZE)));
1084 store_unsigned_integer
1085 (&dummy[12*REGISTER_SIZE],
1086 REGISTER_SIZE,
1087 deposit_21 (sr4export_addr >> 11,
1088 extract_unsigned_integer (&dummy[12*REGISTER_SIZE],
1089 REGISTER_SIZE)));
1090 store_unsigned_integer
1091 (&dummy[13*REGISTER_SIZE],
1092 REGISTER_SIZE,
1093 deposit_14 (sr4export_addr & MASK_11,
1094 extract_unsigned_integer (&dummy[13*REGISTER_SIZE],
1095 REGISTER_SIZE)));
66a1aa07
SG
1096
1097 write_register (22, pc);
1098
6cfec929
JK
1099 /* If we are in a syscall, then we should call the stack dummy
1100 directly. $$dyncall is not needed as the kernel sets up the
1101 space id registers properly based on the value in %r31. In
1102 fact calling $$dyncall will not work because the value in %r22
1103 will be clobbered on the syscall exit path. */
1104 if (flags & 2)
1105 return pc;
1106 else
1107 return dyncall_addr;
1108
66a1aa07
SG
1109}
1110
d3862cae
JK
1111/* Get the PC from %r31 if currently in a syscall. Also mask out privilege
1112 bits. */
1113CORE_ADDR
1114target_read_pc ()
1115{
1116 int flags = read_register (FLAGS_REGNUM);
1117
1118 if (flags & 2)
1119 return read_register (31) & ~0x3;
1120 return read_register (PC_REGNUM) & ~0x3;
1121}
1122
6cfec929
JK
1123/* Write out the PC. If currently in a syscall, then also write the new
1124 PC value into %r31. */
1125void
1126target_write_pc (v)
1127 CORE_ADDR v;
1128{
1129 int flags = read_register (FLAGS_REGNUM);
1130
1131 /* If in a syscall, then set %r31. Also make sure to get the
1132 privilege bits set correctly. */
1133 if (flags & 2)
1134 write_register (31, (long) (v | 0x3));
1135
1136 write_register (PC_REGNUM, (long) v);
1137 write_register (NPC_REGNUM, (long) v + 4);
1138}
1139
66a1aa07
SG
1140/* return the alignment of a type in bytes. Structures have the maximum
1141 alignment required by their fields. */
1142
1143static int
1144hppa_alignof (arg)
1145 struct type *arg;
1146{
1147 int max_align, align, i;
1148 switch (TYPE_CODE (arg))
1149 {
1150 case TYPE_CODE_PTR:
1151 case TYPE_CODE_INT:
1152 case TYPE_CODE_FLT:
1153 return TYPE_LENGTH (arg);
1154 case TYPE_CODE_ARRAY:
1155 return hppa_alignof (TYPE_FIELD_TYPE (arg, 0));
1156 case TYPE_CODE_STRUCT:
1157 case TYPE_CODE_UNION:
1158 max_align = 2;
1159 for (i = 0; i < TYPE_NFIELDS (arg); i++)
1160 {
1161 /* Bit fields have no real alignment. */
1162 if (!TYPE_FIELD_BITPOS (arg, i))
1163 {
1164 align = hppa_alignof (TYPE_FIELD_TYPE (arg, i));
1165 max_align = max (max_align, align);
1166 }
1167 }
1168 return max_align;
1169 default:
1170 return 4;
1171 }
1172}
1173
1174/* Print the register regnum, or all registers if regnum is -1 */
1175
1176pa_do_registers_info (regnum, fpregs)
1177 int regnum;
1178 int fpregs;
1179{
1180 char raw_regs [REGISTER_BYTES];
1181 int i;
1182
1183 for (i = 0; i < NUM_REGS; i++)
1184 read_relative_register_raw_bytes (i, raw_regs + REGISTER_BYTE (i));
1185 if (regnum == -1)
1186 pa_print_registers (raw_regs, regnum, fpregs);
1187 else if (regnum < FP0_REGNUM)
199b2450 1188 printf_unfiltered ("%s %x\n", reg_names[regnum], *(long *)(raw_regs +
66a1aa07
SG
1189 REGISTER_BYTE (regnum)));
1190 else
1191 pa_print_fp_reg (regnum);
1192}
1193
1194pa_print_registers (raw_regs, regnum, fpregs)
1195 char *raw_regs;
1196 int regnum;
1197 int fpregs;
1198{
1199 int i;
1200
1201 for (i = 0; i < 18; i++)
199b2450 1202 printf_unfiltered ("%8.8s: %8x %8.8s: %8x %8.8s: %8x %8.8s: %8x\n",
66a1aa07
SG
1203 reg_names[i],
1204 *(int *)(raw_regs + REGISTER_BYTE (i)),
1205 reg_names[i + 18],
1206 *(int *)(raw_regs + REGISTER_BYTE (i + 18)),
1207 reg_names[i + 36],
1208 *(int *)(raw_regs + REGISTER_BYTE (i + 36)),
1209 reg_names[i + 54],
1210 *(int *)(raw_regs + REGISTER_BYTE (i + 54)));
1211
1212 if (fpregs)
1213 for (i = 72; i < NUM_REGS; i++)
1214 pa_print_fp_reg (i);
1215}
1216
1217pa_print_fp_reg (i)
1218 int i;
1219{
1220 unsigned char raw_buffer[MAX_REGISTER_RAW_SIZE];
1221 unsigned char virtual_buffer[MAX_REGISTER_VIRTUAL_SIZE];
66a1aa07 1222
eb1167c6 1223 /* Get 32bits of data. */
66a1aa07 1224 read_relative_register_raw_bytes (i, raw_buffer);
ad09cb2b 1225
eb1167c6
JL
1226 /* Put it in the buffer. No conversions are ever necessary. */
1227 memcpy (virtual_buffer, raw_buffer, REGISTER_RAW_SIZE (i));
66a1aa07 1228
199b2450 1229 fputs_filtered (reg_names[i], gdb_stdout);
eb1167c6
JL
1230 print_spaces_filtered (8 - strlen (reg_names[i]), gdb_stdout);
1231 fputs_filtered ("(single precision) ", gdb_stdout);
66a1aa07 1232
199b2450 1233 val_print (REGISTER_VIRTUAL_TYPE (i), virtual_buffer, 0, gdb_stdout, 0,
66a1aa07
SG
1234 1, 0, Val_pretty_default);
1235 printf_filtered ("\n");
eb1167c6
JL
1236
1237 /* If "i" is even, then this register can also be a double-precision
1238 FP register. Dump it out as such. */
1239 if ((i % 2) == 0)
1240 {
1241 /* Get the data in raw format for the 2nd half. */
1242 read_relative_register_raw_bytes (i + 1, raw_buffer);
1243
1244 /* Copy it into the appropriate part of the virtual buffer. */
1245 memcpy (virtual_buffer + REGISTER_RAW_SIZE (i), raw_buffer,
1246 REGISTER_RAW_SIZE (i));
1247
1248 /* Dump it as a double. */
1249 fputs_filtered (reg_names[i], gdb_stdout);
1250 print_spaces_filtered (8 - strlen (reg_names[i]), gdb_stdout);
1251 fputs_filtered ("(double precision) ", gdb_stdout);
1252
1253 val_print (builtin_type_double, virtual_buffer, 0, gdb_stdout, 0,
1254 1, 0, Val_pretty_default);
1255 printf_filtered ("\n");
1256 }
66a1aa07
SG
1257}
1258
1259/* Function calls that pass into a new compilation unit must pass through a
1260 small piece of code that does long format (`external' in HPPA parlance)
1261 jumps. We figure out where the trampoline is going to end up, and return
1262 the PC of the final destination. If we aren't in a trampoline, we just
1263 return NULL.
1264
1265 For computed calls, we just extract the new PC from r22. */
1266
1267CORE_ADDR
1268skip_trampoline_code (pc, name)
1269 CORE_ADDR pc;
1270 char *name;
1271{
1272 long inst0, inst1;
1273 static CORE_ADDR dyncall = 0;
1274 struct minimal_symbol *msym;
1275
1276/* FIXME XXX - dyncall must be initialized whenever we get a new exec file */
1277
1278 if (!dyncall)
1279 {
1280 msym = lookup_minimal_symbol ("$$dyncall", NULL);
1281 if (msym)
1282 dyncall = SYMBOL_VALUE_ADDRESS (msym);
1283 else
1284 dyncall = -1;
1285 }
1286
1287 if (pc == dyncall)
1288 return (CORE_ADDR)(read_register (22) & ~0x3);
1289
1290 inst0 = read_memory_integer (pc, 4);
1291 inst1 = read_memory_integer (pc+4, 4);
1292
1293 if ( (inst0 & 0xffe00000) == 0x20200000 /* ldil xxx, r1 */
1294 && (inst1 & 0xffe0e002) == 0xe0202002) /* be,n yyy(sr4, r1) */
1295 pc = extract_21 (inst0) + extract_17 (inst1);
1296 else
1297 pc = (CORE_ADDR)NULL;
1298
1299 return pc;
1300}
1301
c598654a
JL
1302/* For the given instruction (INST), return any adjustment it makes
1303 to the stack pointer or zero for no adjustment.
1304
1305 This only handles instructions commonly found in prologues. */
1306
1307static int
1308prologue_inst_adjust_sp (inst)
1309 unsigned long inst;
1310{
1311 /* This must persist across calls. */
1312 static int save_high21;
1313
1314 /* The most common way to perform a stack adjustment ldo X(sp),sp */
1315 if ((inst & 0xffffc000) == 0x37de0000)
1316 return extract_14 (inst);
1317
1318 /* stwm X,D(sp) */
1319 if ((inst & 0xffe00000) == 0x6fc00000)
1320 return extract_14 (inst);
1321
1322 /* addil high21,%r1; ldo low11,(%r1),%r30)
1323 save high bits in save_high21 for later use. */
1324 if ((inst & 0xffe00000) == 0x28200000)
1325 {
1326 save_high21 = extract_21 (inst);
1327 return 0;
1328 }
1329
1330 if ((inst & 0xffff0000) == 0x343e0000)
1331 return save_high21 + extract_14 (inst);
1332
1333 /* fstws as used by the HP compilers. */
1334 if ((inst & 0xffffffe0) == 0x2fd01220)
1335 return extract_5_load (inst);
1336
1337 /* No adjustment. */
1338 return 0;
1339}
1340
1341/* Return nonzero if INST is a branch of some kind, else return zero. */
1342
1343static int
1344is_branch (inst)
1345 unsigned long inst;
1346{
1347 switch (inst >> 26)
1348 {
1349 case 0x20:
1350 case 0x21:
1351 case 0x22:
1352 case 0x23:
1353 case 0x28:
1354 case 0x29:
1355 case 0x2a:
1356 case 0x2b:
1357 case 0x30:
1358 case 0x31:
1359 case 0x32:
1360 case 0x33:
1361 case 0x38:
1362 case 0x39:
1363 case 0x3a:
1364 return 1;
1365
1366 default:
1367 return 0;
1368 }
1369}
1370
1371/* Return the register number for a GR which is saved by INST or
1372 zero it INST does not save a GR.
1373
1374 Note we only care about full 32bit register stores (that's the only
1375 kind of stores the prologue will use). */
1376
1377static int
1378inst_saves_gr (inst)
1379 unsigned long inst;
1380{
1381 /* Does it look like a stw? */
1382 if ((inst >> 26) == 0x1a)
1383 return extract_5R_store (inst);
1384
1385 /* Does it look like a stwm? */
1386 if ((inst >> 26) == 0x1b)
1387 return extract_5R_store (inst);
1388
1389 return 0;
1390}
1391
1392/* Return the register number for a FR which is saved by INST or
1393 zero it INST does not save a FR.
1394
1395 Note we only care about full 64bit register stores (that's the only
1396 kind of stores the prologue will use). */
1397
1398static int
1399inst_saves_fr (inst)
1400 unsigned long inst;
1401{
1402 if ((inst & 0xfc1fffe0) == 0x2c101220)
1403 return extract_5r_store (inst);
1404 return 0;
1405}
1406
66a1aa07 1407/* Advance PC across any function entry prologue instructions
c598654a 1408 to reach some "real" code.
66a1aa07 1409
c598654a
JL
1410 Use information in the unwind table to determine what exactly should
1411 be in the prologue. */
66a1aa07
SG
1412
1413CORE_ADDR
1414skip_prologue(pc)
1415 CORE_ADDR pc;
1416{
34df79fc 1417 char buf[4];
c598654a
JL
1418 unsigned long inst, stack_remaining, save_gr, save_fr, save_rp, save_sp;
1419 int status, i;
1420 struct unwind_table_entry *u;
66a1aa07 1421
c598654a
JL
1422 u = find_unwind_entry (pc);
1423 if (!u)
fdafbfad 1424 return pc;
c598654a
JL
1425
1426 /* This is how much of a frame adjustment we need to account for. */
1427 stack_remaining = u->Total_frame_size << 3;
66a1aa07 1428
c598654a
JL
1429 /* Magic register saves we want to know about. */
1430 save_rp = u->Save_RP;
1431 save_sp = u->Save_SP;
1432
1433 /* Turn the Entry_GR field into a bitmask. */
1434 save_gr = 0;
1435 for (i = 3; i < u->Entry_GR + 3; i++)
66a1aa07 1436 {
c598654a
JL
1437 /* Frame pointer gets saved into a special location. */
1438 if (u->Save_SP && i == FP_REGNUM)
1439 continue;
1440
1441 save_gr |= (1 << i);
1442 }
1443
1444 /* Turn the Entry_FR field into a bitmask too. */
1445 save_fr = 0;
1446 for (i = 12; i < u->Entry_FR + 12; i++)
1447 save_fr |= (1 << i);
1448
1449 /* Loop until we find everything of interest or hit a branch.
1450
1451 For unoptimized GCC code and for any HP CC code this will never ever
1452 examine any user instructions.
1453
1454 For optimzied GCC code we're faced with problems. GCC will schedule
1455 its prologue and make prologue instructions available for delay slot
1456 filling. The end result is user code gets mixed in with the prologue
1457 and a prologue instruction may be in the delay slot of the first branch
1458 or call.
1459
1460 Some unexpected things are expected with debugging optimized code, so
1461 we allow this routine to walk past user instructions in optimized
1462 GCC code. */
1463 while (save_gr || save_fr || save_rp || save_sp || stack_remaining > 0)
1464 {
1465 status = target_read_memory (pc, buf, 4);
1466 inst = extract_unsigned_integer (buf, 4);
1467
1468 /* Yow! */
1469 if (status != 0)
1470 return pc;
1471
1472 /* Note the interesting effects of this instruction. */
1473 stack_remaining -= prologue_inst_adjust_sp (inst);
1474
1475 /* There is only one instruction used for saving RP into the stack. */
1476 if (inst == 0x6bc23fd9)
1477 save_rp = 0;
1478
1479 /* This is the only way we save SP into the stack. At this time
1480 the HP compilers never bother to save SP into the stack. */
1481 if ((inst & 0xffffc000) == 0x6fc10000)
1482 save_sp = 0;
1483
1484 /* Account for general and floating-point register saves. */
1485 save_gr &= ~(1 << inst_saves_gr (inst));
1486 save_fr &= ~(1 << inst_saves_fr (inst));
1487
1488 /* Quit if we hit any kind of branch. This can happen if a prologue
1489 instruction is in the delay slot of the first call/branch. */
1490 if (is_branch (inst))
1491 break;
1492
1493 /* Bump the PC. */
1494 pc += 4;
66a1aa07 1495 }
66a1aa07
SG
1496
1497 return pc;
1498}
1499
c598654a
JL
1500/* Put here the code to store, into a struct frame_saved_regs,
1501 the addresses of the saved registers of frame described by FRAME_INFO.
1502 This includes special registers such as pc and fp saved in special
1503 ways in the stack frame. sp is even more special:
1504 the address we return for it IS the sp for the next frame. */
1505
1506void
1507hppa_frame_find_saved_regs (frame_info, frame_saved_regs)
1508 struct frame_info *frame_info;
1509 struct frame_saved_regs *frame_saved_regs;
1510{
1511 CORE_ADDR pc;
1512 struct unwind_table_entry *u;
1513 unsigned long inst, stack_remaining, save_gr, save_fr, save_rp, save_sp;
1514 int status, i, reg;
1515 char buf[4];
1516 int fp_loc = -1;
1517
1518 /* Zero out everything. */
1519 memset (frame_saved_regs, '\0', sizeof (struct frame_saved_regs));
1520
1521 /* Call dummy frames always look the same, so there's no need to
1522 examine the dummy code to determine locations of saved registers;
1523 instead, let find_dummy_frame_regs fill in the correct offsets
1524 for the saved registers. */
1525 if ((frame_info->pc >= frame_info->frame
1526 && frame_info->pc <= (frame_info->frame + CALL_DUMMY_LENGTH
1527 + 32 * 4 + (NUM_REGS - FP0_REGNUM) * 8
1528 + 6 * 4)))
1529 find_dummy_frame_regs (frame_info, frame_saved_regs);
1530
70e43abe
JL
1531 /* Interrupt handlers are special too. They lay out the register
1532 state in the exact same order as the register numbers in GDB. */
1533 if (pc_in_interrupt_handler (frame_info->pc))
1534 {
1535 for (i = 0; i < NUM_REGS; i++)
1536 {
1537 /* SP is a little special. */
1538 if (i == SP_REGNUM)
1539 frame_saved_regs->regs[SP_REGNUM]
1540 = read_memory_integer (frame_info->frame + SP_REGNUM * 4, 4);
1541 else
1542 frame_saved_regs->regs[i] = frame_info->frame + i * 4;
1543 }
1544 return;
1545 }
1546
1547 /* Handle signal handler callers. */
1548 if (frame_info->signal_handler_caller)
1549 {
1550 FRAME_FIND_SAVED_REGS_IN_SIGTRAMP (frame_info, frame_saved_regs);
1551 return;
1552 }
1553
c598654a
JL
1554 /* Get the starting address of the function referred to by the PC
1555 saved in frame_info. */
1556 pc = get_pc_function_start (frame_info->pc);
1557
1558 /* Yow! */
1559 u = find_unwind_entry (pc);
1560 if (!u)
1561 return;
1562
1563 /* This is how much of a frame adjustment we need to account for. */
1564 stack_remaining = u->Total_frame_size << 3;
1565
1566 /* Magic register saves we want to know about. */
1567 save_rp = u->Save_RP;
1568 save_sp = u->Save_SP;
1569
1570 /* Turn the Entry_GR field into a bitmask. */
1571 save_gr = 0;
1572 for (i = 3; i < u->Entry_GR + 3; i++)
1573 {
1574 /* Frame pointer gets saved into a special location. */
1575 if (u->Save_SP && i == FP_REGNUM)
1576 continue;
1577
1578 save_gr |= (1 << i);
1579 }
1580
1581 /* Turn the Entry_FR field into a bitmask too. */
1582 save_fr = 0;
1583 for (i = 12; i < u->Entry_FR + 12; i++)
1584 save_fr |= (1 << i);
1585
70e43abe
JL
1586 /* The frame always represents the value of %sp at entry to the
1587 current function (and is thus equivalent to the "saved" stack
1588 pointer. */
1589 frame_saved_regs->regs[SP_REGNUM] = frame_info->frame;
1590
c598654a
JL
1591 /* Loop until we find everything of interest or hit a branch.
1592
1593 For unoptimized GCC code and for any HP CC code this will never ever
1594 examine any user instructions.
1595
1596 For optimzied GCC code we're faced with problems. GCC will schedule
1597 its prologue and make prologue instructions available for delay slot
1598 filling. The end result is user code gets mixed in with the prologue
1599 and a prologue instruction may be in the delay slot of the first branch
1600 or call.
1601
1602 Some unexpected things are expected with debugging optimized code, so
1603 we allow this routine to walk past user instructions in optimized
1604 GCC code. */
1605 while (save_gr || save_fr || save_rp || save_sp || stack_remaining > 0)
1606 {
1607 status = target_read_memory (pc, buf, 4);
1608 inst = extract_unsigned_integer (buf, 4);
1609
1610 /* Yow! */
1611 if (status != 0)
1612 return;
1613
1614 /* Note the interesting effects of this instruction. */
1615 stack_remaining -= prologue_inst_adjust_sp (inst);
1616
1617 /* There is only one instruction used for saving RP into the stack. */
1618 if (inst == 0x6bc23fd9)
1619 {
1620 save_rp = 0;
1621 frame_saved_regs->regs[RP_REGNUM] = frame_info->frame - 20;
1622 }
1623
70e43abe
JL
1624 /* Just note that we found the save of SP into the stack. The
1625 value for frame_saved_regs was computed above. */
c598654a 1626 if ((inst & 0xffffc000) == 0x6fc10000)
70e43abe 1627 save_sp = 0;
c598654a
JL
1628
1629 /* Account for general and floating-point register saves. */
1630 reg = inst_saves_gr (inst);
1631 if (reg >= 3 && reg <= 18
1632 && (!u->Save_SP || reg != FP_REGNUM))
1633 {
1634 save_gr &= ~(1 << reg);
1635
1636 /* stwm with a positive displacement is a *post modify*. */
1637 if ((inst >> 26) == 0x1b
1638 && extract_14 (inst) >= 0)
1639 frame_saved_regs->regs[reg] = frame_info->frame;
1640 else
1641 {
1642 /* Handle code with and without frame pointers. */
1643 if (u->Save_SP)
1644 frame_saved_regs->regs[reg]
1645 = frame_info->frame + extract_14 (inst);
1646 else
1647 frame_saved_regs->regs[reg]
1648 = frame_info->frame + (u->Total_frame_size << 3)
1649 + extract_14 (inst);
1650 }
1651 }
1652
1653
1654 /* GCC handles callee saved FP regs a little differently.
1655
1656 It emits an instruction to put the value of the start of
1657 the FP store area into %r1. It then uses fstds,ma with
1658 a basereg of %r1 for the stores.
1659
1660 HP CC emits them at the current stack pointer modifying
1661 the stack pointer as it stores each register. */
1662
1663 /* ldo X(%r3),%r1 or ldo X(%r30),%r1. */
1664 if ((inst & 0xffffc000) == 0x34610000
1665 || (inst & 0xffffc000) == 0x37c10000)
1666 fp_loc = extract_14 (inst);
1667
1668 reg = inst_saves_fr (inst);
1669 if (reg >= 12 && reg <= 21)
1670 {
1671 /* Note +4 braindamage below is necessary because the FP status
1672 registers are internally 8 registers rather than the expected
1673 4 registers. */
1674 save_fr &= ~(1 << reg);
1675 if (fp_loc == -1)
1676 {
1677 /* 1st HP CC FP register store. After this instruction
1678 we've set enough state that the GCC and HPCC code are
1679 both handled in the same manner. */
1680 frame_saved_regs->regs[reg + FP4_REGNUM + 4] = frame_info->frame;
1681 fp_loc = 8;
1682 }
1683 else
1684 {
1685 frame_saved_regs->regs[reg + FP0_REGNUM + 4]
1686 = frame_info->frame + fp_loc;
1687 fp_loc += 8;
1688 }
1689 }
1690
1691 /* Quit if we hit any kind of branch. This can happen if a prologue
1692 instruction is in the delay slot of the first call/branch. */
1693 if (is_branch (inst))
1694 break;
1695
1696 /* Bump the PC. */
1697 pc += 4;
1698 }
1699}
1700
63757ecd
JK
1701#ifdef MAINTENANCE_CMDS
1702
66a1aa07
SG
1703static void
1704unwind_command (exp, from_tty)
1705 char *exp;
1706 int from_tty;
1707{
1708 CORE_ADDR address;
1709 union
1710 {
1711 int *foo;
1712 struct unwind_table_entry *u;
1713 } xxx;
1714
1715 /* If we have an expression, evaluate it and use it as the address. */
1716
1717 if (exp != 0 && *exp != 0)
1718 address = parse_and_eval_address (exp);
1719 else
1720 return;
1721
1722 xxx.u = find_unwind_entry (address);
1723
1724 if (!xxx.u)
1725 {
199b2450 1726 printf_unfiltered ("Can't find unwind table entry for PC 0x%x\n", address);
66a1aa07
SG
1727 return;
1728 }
1729
199b2450 1730 printf_unfiltered ("%08x\n%08X\n%08X\n%08X\n", xxx.foo[0], xxx.foo[1], xxx.foo[2],
66a1aa07
SG
1731 xxx.foo[3]);
1732}
976bb0be 1733#endif /* MAINTENANCE_CMDS */
63757ecd
JK
1734
1735void
1736_initialize_hppa_tdep ()
1737{
976bb0be 1738#ifdef MAINTENANCE_CMDS
63757ecd
JK
1739 add_cmd ("unwind", class_maintenance, unwind_command,
1740 "Print unwind table entry at given address.",
1741 &maintenanceprintlist);
63757ecd 1742#endif /* MAINTENANCE_CMDS */
976bb0be 1743}
This page took 0.15389 seconds and 4 git commands to generate.