[deliverable/binutils-gdb.git] / gdb / i386-darwin-nat.c

/* Darwin support for GDB, the GNU debugger.
   Copyright (C) 1997-2019 Free Software Foundation, Inc.

   Contributed by Apple Computer, Inc.

   This file is part of GDB.

   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 3 of the License, or
   (at your option) any later version.

   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */

#include "defs.h"
#include "frame.h"
#include "inferior.h"
#include "target.h"
#include "symfile.h"
#include "symtab.h"
#include "objfiles.h"
#include "gdbcmd.h"
#include "regcache.h"
#include "i386-tdep.h"
#include "i387-tdep.h"
#include "gdbarch.h"
#include "arch-utils.h"
#include "gdbcore.h"

#include "x86-nat.h"
#include "darwin-nat.h"
#include "i386-darwin-tdep.h"

#ifdef BFD64
#include "amd64-nat.h"
#include "amd64-tdep.h"
#include "amd64-darwin-tdep.h"
#endif

struct i386_darwin_nat_target final : public x86_nat_target<darwin_nat_target>
{
  /* Add our register access methods.  */
  void fetch_registers (struct regcache *, int) override;
  void store_registers (struct regcache *, int) override;
};

static struct i386_darwin_nat_target darwin_target;

/* Read register values from the inferior process.
   If REGNO is -1, do this for all registers.
   Otherwise, REGNO specifies which register (so we can save time).  */

void
i386_darwin_nat_target::fetch_registers (struct regcache *regcache, int regno)
{
  thread_t current_thread = regcache->ptid ().tid ();
  int fetched = 0;
  struct gdbarch *gdbarch = regcache->arch ();

#ifdef BFD64
  if (gdbarch_ptr_bit (gdbarch) == 64)
    {
      if (regno == -1 || amd64_native_gregset_supplies_p (gdbarch, regno))
        {
          x86_thread_state_t gp_regs;
          unsigned int gp_count = x86_THREAD_STATE_COUNT;
          kern_return_t ret;

	  ret = thread_get_state
            (current_thread, x86_THREAD_STATE, (thread_state_t) & gp_regs,
             &gp_count);
	  if (ret != KERN_SUCCESS)
	    {
	      printf_unfiltered (_("Error calling thread_get_state for "
				   "GP registers for thread 0x%lx\n"),
				 (unsigned long) current_thread);
	      MACH_CHECK_ERROR (ret);
	    }

	  /* Some kernels don't sanitize the values.  */
	  gp_regs.uts.ts64.__fs &= 0xffff;
	  gp_regs.uts.ts64.__gs &= 0xffff;

	  amd64_supply_native_gregset (regcache, &gp_regs.uts, -1);
          fetched++;
        }

      if (regno == -1 || !amd64_native_gregset_supplies_p (gdbarch, regno))
        {
          x86_float_state_t fp_regs;
          unsigned int fp_count = x86_FLOAT_STATE_COUNT;
          kern_return_t ret;

	  ret = thread_get_state
            (current_thread, x86_FLOAT_STATE, (thread_state_t) & fp_regs,
             &fp_count);
	  if (ret != KERN_SUCCESS)
	    {
	      printf_unfiltered (_("Error calling thread_get_state for "
				   "float registers for thread 0x%lx\n"),
				 (unsigned long) current_thread);
	      MACH_CHECK_ERROR (ret);
	    }
          amd64_supply_fxsave (regcache, -1, &fp_regs.ufs.fs64.__fpu_fcw);
          fetched++;
        }
    }
  else
#endif
    {
      if (regno == -1 || regno < I386_NUM_GREGS)
        {
          x86_thread_state32_t gp_regs;
          unsigned int gp_count = x86_THREAD_STATE32_COUNT;
          kern_return_t ret;
	  int i;

	  ret = thread_get_state
            (current_thread, x86_THREAD_STATE32, (thread_state_t) &gp_regs,
             &gp_count);
	  if (ret != KERN_SUCCESS)
	    {
	      printf_unfiltered (_("Error calling thread_get_state for "
				   "GP registers for thread 0x%lx\n"),
				 (unsigned long) current_thread);
	      MACH_CHECK_ERROR (ret);
	    }
	  for (i = 0; i < I386_NUM_GREGS; i++)
	    regcache->raw_supply
	      (i, (char *) &gp_regs + i386_darwin_thread_state_reg_offset[i]);

          fetched++;
        }

      if (regno == -1
	  || (regno >= I386_ST0_REGNUM && regno < I386_SSE_NUM_REGS))
        {
          x86_float_state32_t fp_regs;
          unsigned int fp_count = x86_FLOAT_STATE32_COUNT;
          kern_return_t ret;

	  ret = thread_get_state
            (current_thread, x86_FLOAT_STATE32, (thread_state_t) &fp_regs,
             &fp_count);
	  if (ret != KERN_SUCCESS)
	    {
	      printf_unfiltered (_("Error calling thread_get_state for "
				   "float registers for thread 0x%lx\n"),
				 (unsigned long) current_thread);
	      MACH_CHECK_ERROR (ret);
	    }
          i387_supply_fxsave (regcache, -1, &fp_regs.__fpu_fcw);
          fetched++;
        }
    }

  if (! fetched)
    {
      warning (_("unknown register %d"), regno);
      regcache->raw_supply (regno, NULL);
    }
}

/* Store our register values back into the inferior.
   If REGNO is -1, do this for all registers.
   Otherwise, REGNO specifies which register (so we can save time).  */

void
i386_darwin_nat_target::store_registers (struct regcache *regcache,
					 int regno)
{
  thread_t current_thread = regcache->ptid ().tid ();
  struct gdbarch *gdbarch = regcache->arch ();

#ifdef BFD64
  if (gdbarch_ptr_bit (gdbarch) == 64)
    {
      if (regno == -1 || amd64_native_gregset_supplies_p (gdbarch, regno))
        {
          x86_thread_state_t gp_regs;
          kern_return_t ret;
	  unsigned int gp_count = x86_THREAD_STATE_COUNT;

	  ret = thread_get_state
	    (current_thread, x86_THREAD_STATE, (thread_state_t) &gp_regs,
	     &gp_count);
          MACH_CHECK_ERROR (ret);
	  gdb_assert (gp_regs.tsh.flavor == x86_THREAD_STATE64);
          gdb_assert (gp_regs.tsh.count == x86_THREAD_STATE64_COUNT);

	  amd64_collect_native_gregset (regcache, &gp_regs.uts, regno);

	  /* Some kernels don't sanitize the values.  */
	  gp_regs.uts.ts64.__fs &= 0xffff;
	  gp_regs.uts.ts64.__gs &= 0xffff;

          ret = thread_set_state (current_thread, x86_THREAD_STATE,
                                  (thread_state_t) &gp_regs,
                                  x86_THREAD_STATE_COUNT);
          MACH_CHECK_ERROR (ret);
        }

      if (regno == -1 || !amd64_native_gregset_supplies_p (gdbarch, regno))
        {
          x86_float_state_t fp_regs;
          kern_return_t ret;
	  unsigned int fp_count = x86_FLOAT_STATE_COUNT;

	  ret = thread_get_state
	    (current_thread, x86_FLOAT_STATE, (thread_state_t) & fp_regs,
	     &fp_count);
          MACH_CHECK_ERROR (ret);
          gdb_assert (fp_regs.fsh.flavor == x86_FLOAT_STATE64);
          gdb_assert (fp_regs.fsh.count == x86_FLOAT_STATE64_COUNT);

	  amd64_collect_fxsave (regcache, regno, &fp_regs.ufs.fs64.__fpu_fcw);

	  ret = thread_set_state (current_thread, x86_FLOAT_STATE,
				  (thread_state_t) & fp_regs,
				  x86_FLOAT_STATE_COUNT);
	  MACH_CHECK_ERROR (ret);
        }
    }
  else
#endif
    {
      if (regno == -1 || regno < I386_NUM_GREGS)
        {
          x86_thread_state32_t gp_regs;
          kern_return_t ret;
          unsigned int gp_count = x86_THREAD_STATE32_COUNT;
	  int i;

          ret = thread_get_state
            (current_thread, x86_THREAD_STATE32, (thread_state_t) &gp_regs,
             &gp_count);
	  MACH_CHECK_ERROR (ret);

	  for (i = 0; i < I386_NUM_GREGS; i++)
	    if (regno == -1 || regno == i)
	      regcache->raw_collect
		(i, (char *) &gp_regs + i386_darwin_thread_state_reg_offset[i]);

          ret = thread_set_state (current_thread, x86_THREAD_STATE32,
                                  (thread_state_t) &gp_regs,
                                  x86_THREAD_STATE32_COUNT);
          MACH_CHECK_ERROR (ret);
        }

      if (regno == -1
	  || (regno >= I386_ST0_REGNUM && regno < I386_SSE_NUM_REGS))
        {
          x86_float_state32_t fp_regs;
          unsigned int fp_count = x86_FLOAT_STATE32_COUNT;
          kern_return_t ret;

	  ret = thread_get_state
            (current_thread, x86_FLOAT_STATE32, (thread_state_t) & fp_regs,
             &fp_count);
	  MACH_CHECK_ERROR (ret);

	  i387_collect_fxsave (regcache, regno, &fp_regs.__fpu_fcw);

	  ret = thread_set_state (current_thread, x86_FLOAT_STATE32,
				  (thread_state_t) &fp_regs,
				  x86_FLOAT_STATE32_COUNT);
	  MACH_CHECK_ERROR (ret);
        }
    }
}

/* Support for debug registers, boosted mostly from i386-linux-nat.c.  */

static void
i386_darwin_dr_set (int regnum, CORE_ADDR value)
{
  thread_t current_thread;
  x86_debug_state_t dr_regs;
  kern_return_t ret;
  unsigned int dr_count;

  gdb_assert (regnum >= 0 && regnum <= DR_CONTROL);

  current_thread = inferior_ptid.tid ();

  dr_regs.dsh.flavor = x86_DEBUG_STATE;
  dr_regs.dsh.count = x86_DEBUG_STATE_COUNT;
  dr_count = x86_DEBUG_STATE_COUNT;
  ret = thread_get_state (current_thread, x86_DEBUG_STATE,
                          (thread_state_t) &dr_regs, &dr_count);
  MACH_CHECK_ERROR (ret);

  switch (dr_regs.dsh.flavor)
    {
    case x86_DEBUG_STATE32:
      switch (regnum)
	{
	case 0:
	  dr_regs.uds.ds32.__dr0 = value;
	  break;
	case 1:
	  dr_regs.uds.ds32.__dr1 = value;
	  break;
	case 2:
	  dr_regs.uds.ds32.__dr2 = value;
	  break;
	case 3:
	  dr_regs.uds.ds32.__dr3 = value;
	  break;
	case 4:
	  dr_regs.uds.ds32.__dr4 = value;
	  break;
	case 5:
	  dr_regs.uds.ds32.__dr5 = value;
	  break;
	case 6:
	  dr_regs.uds.ds32.__dr6 = value;
	  break;
	case 7:
	  dr_regs.uds.ds32.__dr7 = value;
	  break;
	}
      break;
#ifdef BFD64
    case x86_DEBUG_STATE64:
      switch (regnum)
	{
	case 0:
	  dr_regs.uds.ds64.__dr0 = value;
	  break;
	case 1:
	  dr_regs.uds.ds64.__dr1 = value;
	  break;
	case 2:
	  dr_regs.uds.ds64.__dr2 = value;
	  break;
	case 3:
	  dr_regs.uds.ds64.__dr3 = value;
	  break;
	case 4:
	  dr_regs.uds.ds64.__dr4 = value;
	  break;
	case 5:
	  dr_regs.uds.ds64.__dr5 = value;
	  break;
	case 6:
	  dr_regs.uds.ds64.__dr6 = value;
	  break;
	case 7:
	  dr_regs.uds.ds64.__dr7 = value;
	  break;
	}
      break;
#endif
    }

  ret = thread_set_state (current_thread, dr_regs.dsh.flavor,
                          (thread_state_t) &dr_regs.uds, dr_count);

  MACH_CHECK_ERROR (ret);
}

static CORE_ADDR
i386_darwin_dr_get (int regnum)
{
  thread_t current_thread;
  x86_debug_state_t dr_regs;
  kern_return_t ret;
  unsigned int dr_count;

  gdb_assert (regnum >= 0 && regnum <= DR_CONTROL);

  current_thread = inferior_ptid.tid ();

  dr_regs.dsh.flavor = x86_DEBUG_STATE;
  dr_regs.dsh.count = x86_DEBUG_STATE_COUNT;
  dr_count = x86_DEBUG_STATE_COUNT;
  ret = thread_get_state (current_thread, x86_DEBUG_STATE,
                          (thread_state_t) &dr_regs, &dr_count);
  MACH_CHECK_ERROR (ret);

  switch (dr_regs.dsh.flavor)
    {
    case x86_DEBUG_STATE32:
      switch (regnum)
	{
	case 0:
	  return dr_regs.uds.ds32.__dr0;
	case 1:
	  return dr_regs.uds.ds32.__dr1;
	case 2:
	  return dr_regs.uds.ds32.__dr2;
	case 3:
	  return dr_regs.uds.ds32.__dr3;
	case 4:
	  return dr_regs.uds.ds32.__dr4;
	case 5:
	  return dr_regs.uds.ds32.__dr5;
	case 6:
	  return dr_regs.uds.ds32.__dr6;
	case 7:
	  return dr_regs.uds.ds32.__dr7;
	default:
	  return -1;
	}
      break;
#ifdef BFD64
    case x86_DEBUG_STATE64:
      switch (regnum)
	{
	case 0:
	  return dr_regs.uds.ds64.__dr0;
	case 1:
	  return dr_regs.uds.ds64.__dr1;
	case 2:
	  return dr_regs.uds.ds64.__dr2;
	case 3:
	  return dr_regs.uds.ds64.__dr3;
	case 4:
	  return dr_regs.uds.ds64.__dr4;
	case 5:
	  return dr_regs.uds.ds64.__dr5;
	case 6:
	  return dr_regs.uds.ds64.__dr6;
	case 7:
	  return dr_regs.uds.ds64.__dr7;
	default:
	  return -1;
	}
      break;
#endif
    default:
      return -1;
    }
}

static void
i386_darwin_dr_set_control (unsigned long control)
{
  i386_darwin_dr_set (DR_CONTROL, control);
}

static void
i386_darwin_dr_set_addr (int regnum, CORE_ADDR addr)
{
  gdb_assert (regnum >= 0 && regnum <= DR_LASTADDR - DR_FIRSTADDR);

  i386_darwin_dr_set (DR_FIRSTADDR + regnum, addr);
}

static CORE_ADDR
i386_darwin_dr_get_addr (int regnum)
{
  return i386_darwin_dr_get (regnum);
}

static unsigned long
i386_darwin_dr_get_status (void)
{
  return i386_darwin_dr_get (DR_STATUS);
}

static unsigned long
i386_darwin_dr_get_control (void)
{
  return i386_darwin_dr_get (DR_CONTROL);
}

void
darwin_check_osabi (darwin_inferior *inf, thread_t thread)
{
  if (gdbarch_osabi (target_gdbarch ()) == GDB_OSABI_UNKNOWN)
    {
      /* Attaching to a process.  Let's figure out what kind it is.  */
      x86_thread_state_t gp_regs;
      struct gdbarch_info info;
      unsigned int gp_count = x86_THREAD_STATE_COUNT;
      kern_return_t ret;

      ret = thread_get_state (thread, x86_THREAD_STATE,
			      (thread_state_t) &gp_regs, &gp_count);
      if (ret != KERN_SUCCESS)
	{
	  MACH_CHECK_ERROR (ret);
	  return;
	}

      gdbarch_info_init (&info);
      gdbarch_info_fill (&info);
      info.byte_order = gdbarch_byte_order (target_gdbarch ());
      info.osabi = GDB_OSABI_DARWIN;
      if (gp_regs.tsh.flavor == x86_THREAD_STATE64)
	info.bfd_arch_info = bfd_lookup_arch (bfd_arch_i386,
					      bfd_mach_x86_64);
      else
	info.bfd_arch_info = bfd_lookup_arch (bfd_arch_i386,
					      bfd_mach_i386_i386);
      gdbarch_update_p (info);
    }
}

#define X86_EFLAGS_T 0x100UL

/* Returning from a signal trampoline is done by calling a
   special system call (sigreturn).  This system call
   restores the registers that were saved when the signal was
   raised, including %eflags/%rflags.  That means that single-stepping
   won't work.  Instead, we'll have to modify the signal context
   that's about to be restored, and set the trace flag there.  */

static int
i386_darwin_sstep_at_sigreturn (x86_thread_state_t *regs)
{
  enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ());
  static const gdb_byte darwin_syscall[] = { 0xcd, 0x80 }; /* int 0x80 */
  gdb_byte buf[sizeof (darwin_syscall)];

  /* Check if PC is at a sigreturn system call.  */
  if (target_read_memory (regs->uts.ts32.__eip, buf, sizeof (buf)) == 0
      && memcmp (buf, darwin_syscall, sizeof (darwin_syscall)) == 0
      && regs->uts.ts32.__eax == 0xb8 /* SYS_sigreturn */)
    {
      ULONGEST uctx_addr;
      ULONGEST mctx_addr;
      ULONGEST flags_addr;
      unsigned int eflags;

      uctx_addr = read_memory_unsigned_integer
		    (regs->uts.ts32.__esp + 4, 4, byte_order);
      mctx_addr = read_memory_unsigned_integer
		    (uctx_addr + 28, 4, byte_order);

      flags_addr = mctx_addr + 12 + 9 * 4;
      read_memory (flags_addr, (gdb_byte *) &eflags, 4);
      eflags |= X86_EFLAGS_T;
      write_memory (flags_addr, (gdb_byte *) &eflags, 4);

      return 1;
    }
  return 0;
}

#ifdef BFD64
static int
amd64_darwin_sstep_at_sigreturn (x86_thread_state_t *regs)
{
  enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ());
  static const gdb_byte darwin_syscall[] = { 0x0f, 0x05 }; /* syscall */
  gdb_byte buf[sizeof (darwin_syscall)];

  /* Check if PC is at a sigreturn system call.  */
  if (target_read_memory (regs->uts.ts64.__rip, buf, sizeof (buf)) == 0
      && memcmp (buf, darwin_syscall, sizeof (darwin_syscall)) == 0
      && (regs->uts.ts64.__rax & 0xffffffff) == 0x20000b8 /* SYS_sigreturn */)
    {
      ULONGEST mctx_addr;
      ULONGEST flags_addr;
      unsigned int rflags;

      mctx_addr = read_memory_unsigned_integer
		    (regs->uts.ts64.__rdi + 48, 8, byte_order);
      flags_addr = mctx_addr + 16 + 17 * 8;

      /* AMD64 is little endian.  */
      read_memory (flags_addr, (gdb_byte *) &rflags, 4);
      rflags |= X86_EFLAGS_T;
      write_memory (flags_addr, (gdb_byte *) &rflags, 4);

      return 1;
    }
  return 0;
}
#endif

void
darwin_set_sstep (thread_t thread, int enable)
{
  x86_thread_state_t regs;
  unsigned int count = x86_THREAD_STATE_COUNT;
  kern_return_t kret;

  kret = thread_get_state (thread, x86_THREAD_STATE,
			   (thread_state_t) &regs, &count);
  if (kret != KERN_SUCCESS)
    {
      printf_unfiltered (_("darwin_set_sstep: error %x, thread=%x\n"),
			 kret, thread);
      return;
    }

  switch (regs.tsh.flavor)
    {
    case x86_THREAD_STATE32:
      {
	__uint32_t bit = enable ? X86_EFLAGS_T : 0;

	if (enable && i386_darwin_sstep_at_sigreturn (&regs))
	  return;
	if ((regs.uts.ts32.__eflags & X86_EFLAGS_T) == bit)
	  return;
	regs.uts.ts32.__eflags
	  = (regs.uts.ts32.__eflags & ~X86_EFLAGS_T) | bit;
	kret = thread_set_state (thread, x86_THREAD_STATE,
				 (thread_state_t) &regs, count);
	MACH_CHECK_ERROR (kret);
      }
      break;
#ifdef BFD64
    case x86_THREAD_STATE64:
      {
	__uint64_t bit = enable ? X86_EFLAGS_T : 0;

	if (enable && amd64_darwin_sstep_at_sigreturn (&regs))
	  return;
	if ((regs.uts.ts64.__rflags & X86_EFLAGS_T) == bit)
	  return;
	regs.uts.ts64.__rflags
	  = (regs.uts.ts64.__rflags & ~X86_EFLAGS_T) | bit;
	kret = thread_set_state (thread, x86_THREAD_STATE,
				 (thread_state_t) &regs, count);
	MACH_CHECK_ERROR (kret);
      }
      break;
#endif
    default:
      error (_("darwin_set_sstep: unknown flavour: %d"), regs.tsh.flavor);
    }
}

void
_initialize_i386_darwin_nat (void)
{
#ifdef BFD64
  amd64_native_gregset64_reg_offset = amd64_darwin_thread_state_reg_offset;
  amd64_native_gregset64_num_regs = amd64_darwin_thread_state_num_regs;
  amd64_native_gregset32_reg_offset = i386_darwin_thread_state_reg_offset;
  amd64_native_gregset32_num_regs = i386_darwin_thread_state_num_regs;
#endif

  x86_dr_low.set_control = i386_darwin_dr_set_control;
  x86_dr_low.set_addr = i386_darwin_dr_set_addr;
  x86_dr_low.get_addr = i386_darwin_dr_get_addr;
  x86_dr_low.get_status = i386_darwin_dr_get_status;
  x86_dr_low.get_control = i386_darwin_dr_get_control;

  /* Let's assume that the kernel is 64 bits iff the executable is.  */
#ifdef __x86_64__
  x86_set_debug_register_length (8);
#else
  x86_set_debug_register_length (4);
#endif

  add_inf_child_target (&darwin_target);
}
Commit	Line	Data
a80b95ba	1	/* Darwin support for GDB, the GNU debugger.
42a4f53d	2	Copyright (C) 1997-2019 Free Software Foundation, Inc.
a80b95ba TG	3
	4	Contributed by Apple Computer, Inc.
	5
	6	This file is part of GDB.
	7
	8	This program is free software; you can redistribute it and/or modify
	9	it under the terms of the GNU General Public License as published by
	10	the Free Software Foundation; either version 3 of the License, or
	11	(at your option) any later version.
	12
	13	This program is distributed in the hope that it will be useful,
	14	but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	GNU General Public License for more details.
	17
	18	You should have received a copy of the GNU General Public License
	19	along with this program. If not, see <http://www.gnu.org/licenses/>. */
	20
	21	#include "defs.h"
	22	#include "frame.h"
	23	#include "inferior.h"
	24	#include "target.h"
	25	#include "symfile.h"
	26	#include "symtab.h"
	27	#include "objfiles.h"
	28	#include "gdbcmd.h"
	29	#include "regcache.h"
a80b95ba	30	#include "i386-tdep.h"
a80b95ba TG	31	#include "i387-tdep.h"
	32	#include "gdbarch.h"
	33	#include "arch-utils.h"
acdb24a9	34	#include "gdbcore.h"
a80b95ba	35
df7e5265	36	#include "x86-nat.h"
a80b95ba TG	37	#include "darwin-nat.h"
	38	#include "i386-darwin-tdep.h"
	39
5cd226f2 TG	40	#ifdef BFD64
5cd226f2 TG	41	#include "amd64-nat.h"
46187dff	42	#include "amd64-tdep.h"
5cd226f2 TG	43	#include "amd64-darwin-tdep.h"
	44	#endif
	45
f6ac5f3d PA	46	struct i386_darwin_nat_target final : public x86_nat_target<darwin_nat_target>
	47	{
	48	/* Add our register access methods. */
	49	void fetch_registers (struct regcache *, int) override;
	50	void store_registers (struct regcache *, int) override;
	51	};
	52
	53	static struct i386_darwin_nat_target darwin_target;
	54
a80b95ba TG	55	/* Read register values from the inferior process.
	56	If REGNO is -1, do this for all registers.
	57	Otherwise, REGNO specifies which register (so we can save time). */
f6ac5f3d PA	58
	59	void
	60	i386_darwin_nat_target::fetch_registers (struct regcache *regcache, int regno)
a80b95ba	61	{
cc6bcb54	62	thread_t current_thread = regcache->ptid ().tid ();
a80b95ba	63	int fetched = 0;
ac7936df	64	struct gdbarch *gdbarch = regcache->arch ();
a80b95ba	65
5cd226f2	66	#ifdef BFD64
a80b95ba TG	67	if (gdbarch_ptr_bit (gdbarch) == 64)
	68	{
	69	if (regno == -1 \|\| amd64_native_gregset_supplies_p (gdbarch, regno))
	70	{
	71	x86_thread_state_t gp_regs;
	72	unsigned int gp_count = x86_THREAD_STATE_COUNT;
	73	kern_return_t ret;
	74
	75	ret = thread_get_state
	76	(current_thread, x86_THREAD_STATE, (thread_state_t) & gp_regs,
	77	&gp_count);
	78	if (ret != KERN_SUCCESS)
	79	{
1777feb0	80	printf_unfiltered (_("Error calling thread_get_state for "
17092398	81	"GP registers for thread 0x%lx\n"),
016b7430	82	(unsigned long) current_thread);
a80b95ba TG	83	MACH_CHECK_ERROR (ret);
a80b95ba TG	84	}
89c7137f TG	85
	86	/* Some kernels don't sanitize the values. */
	87	gp_regs.uts.ts64.__fs &= 0xffff;
	88	gp_regs.uts.ts64.__gs &= 0xffff;
	89
a80b95ba TG	90	amd64_supply_native_gregset (regcache, &gp_regs.uts, -1);
	91	fetched++;
	92	}
	93
	94	if (regno == -1 \|\| !amd64_native_gregset_supplies_p (gdbarch, regno))
	95	{
	96	x86_float_state_t fp_regs;
	97	unsigned int fp_count = x86_FLOAT_STATE_COUNT;
	98	kern_return_t ret;
	99
	100	ret = thread_get_state
	101	(current_thread, x86_FLOAT_STATE, (thread_state_t) & fp_regs,
	102	&fp_count);
	103	if (ret != KERN_SUCCESS)
	104	{
1777feb0	105	printf_unfiltered (_("Error calling thread_get_state for "
17092398	106	"float registers for thread 0x%lx\n"),
016b7430	107	(unsigned long) current_thread);
a80b95ba TG	108	MACH_CHECK_ERROR (ret);
a80b95ba TG	109	}
46187dff	110	amd64_supply_fxsave (regcache, -1, &fp_regs.ufs.fs64.__fpu_fcw);
a80b95ba TG	111	fetched++;
	112	}
	113	}
	114	else
5cd226f2	115	#endif
a80b95ba TG	116	{
	117	if (regno == -1 \|\| regno < I386_NUM_GREGS)
	118	{
cf9bb588 TG	119	x86_thread_state32_t gp_regs;
cf9bb588 TG	120	unsigned int gp_count = x86_THREAD_STATE32_COUNT;
a80b95ba TG	121	kern_return_t ret;
	122	int i;
	123
	124	ret = thread_get_state
cf9bb588	125	(current_thread, x86_THREAD_STATE32, (thread_state_t) &gp_regs,
a80b95ba TG	126	&gp_count);
	127	if (ret != KERN_SUCCESS)
	128	{
1777feb0	129	printf_unfiltered (_("Error calling thread_get_state for "
17092398 TG	130	"GP registers for thread 0x%lx\n"),
17092398 TG	131	(unsigned long) current_thread);
a80b95ba TG	132	MACH_CHECK_ERROR (ret);
	133	}
	134	for (i = 0; i < I386_NUM_GREGS; i++)
73e1c03f SM	135	regcache->raw_supply
73e1c03f SM	136	(i, (char *) &gp_regs + i386_darwin_thread_state_reg_offset[i]);
a80b95ba TG	137
	138	fetched++;
	139	}
	140
	141	if (regno == -1
	142	\|\| (regno >= I386_ST0_REGNUM && regno < I386_SSE_NUM_REGS))
	143	{
cf9bb588 TG	144	x86_float_state32_t fp_regs;
cf9bb588 TG	145	unsigned int fp_count = x86_FLOAT_STATE32_COUNT;
a80b95ba TG	146	kern_return_t ret;
	147
	148	ret = thread_get_state
cf9bb588	149	(current_thread, x86_FLOAT_STATE32, (thread_state_t) &fp_regs,
a80b95ba TG	150	&fp_count);
	151	if (ret != KERN_SUCCESS)
	152	{
1777feb0	153	printf_unfiltered (_("Error calling thread_get_state for "
17092398 TG	154	"float registers for thread 0x%lx\n"),
17092398 TG	155	(unsigned long) current_thread);
a80b95ba TG	156	MACH_CHECK_ERROR (ret);
	157	}
	158	i387_supply_fxsave (regcache, -1, &fp_regs.__fpu_fcw);
	159	fetched++;
	160	}
	161	}
	162
	163	if (! fetched)
	164	{
	165	warning (_("unknown register %d"), regno);
73e1c03f	166	regcache->raw_supply (regno, NULL);
a80b95ba TG	167	}
	168	}
	169
	170	/* Store our register values back into the inferior.
	171	If REGNO is -1, do this for all registers.
	172	Otherwise, REGNO specifies which register (so we can save time). */
	173
f6ac5f3d PA	174	void
	175	i386_darwin_nat_target::store_registers (struct regcache *regcache,
	176	int regno)
a80b95ba	177	{
cc6bcb54	178	thread_t current_thread = regcache->ptid ().tid ();
ac7936df	179	struct gdbarch *gdbarch = regcache->arch ();
a80b95ba	180
5cd226f2	181	#ifdef BFD64
a80b95ba TG	182	if (gdbarch_ptr_bit (gdbarch) == 64)
	183	{
	184	if (regno == -1 \|\| amd64_native_gregset_supplies_p (gdbarch, regno))
	185	{
	186	x86_thread_state_t gp_regs;
	187	kern_return_t ret;
	188	unsigned int gp_count = x86_THREAD_STATE_COUNT;
	189
	190	ret = thread_get_state
	191	(current_thread, x86_THREAD_STATE, (thread_state_t) &gp_regs,
	192	&gp_count);
	193	MACH_CHECK_ERROR (ret);
	194	gdb_assert (gp_regs.tsh.flavor == x86_THREAD_STATE64);
	195	gdb_assert (gp_regs.tsh.count == x86_THREAD_STATE64_COUNT);
	196
	197	amd64_collect_native_gregset (regcache, &gp_regs.uts, regno);
	198
89c7137f TG	199	/* Some kernels don't sanitize the values. */
	200	gp_regs.uts.ts64.__fs &= 0xffff;
	201	gp_regs.uts.ts64.__gs &= 0xffff;
	202
a80b95ba TG	203	ret = thread_set_state (current_thread, x86_THREAD_STATE,
	204	(thread_state_t) &gp_regs,
	205	x86_THREAD_STATE_COUNT);
	206	MACH_CHECK_ERROR (ret);
	207	}
	208
	209	if (regno == -1 \|\| !amd64_native_gregset_supplies_p (gdbarch, regno))
	210	{
	211	x86_float_state_t fp_regs;
	212	kern_return_t ret;
	213	unsigned int fp_count = x86_FLOAT_STATE_COUNT;
	214
	215	ret = thread_get_state
	216	(current_thread, x86_FLOAT_STATE, (thread_state_t) & fp_regs,
	217	&fp_count);
	218	MACH_CHECK_ERROR (ret);
	219	gdb_assert (fp_regs.fsh.flavor == x86_FLOAT_STATE64);
	220	gdb_assert (fp_regs.fsh.count == x86_FLOAT_STATE64_COUNT);
	221
46187dff	222	amd64_collect_fxsave (regcache, regno, &fp_regs.ufs.fs64.__fpu_fcw);
a80b95ba TG	223
	224	ret = thread_set_state (current_thread, x86_FLOAT_STATE,
	225	(thread_state_t) & fp_regs,
	226	x86_FLOAT_STATE_COUNT);
	227	MACH_CHECK_ERROR (ret);
	228	}
	229	}
	230	else
5cd226f2	231	#endif
a80b95ba TG	232	{
	233	if (regno == -1 \|\| regno < I386_NUM_GREGS)
	234	{
cf9bb588	235	x86_thread_state32_t gp_regs;
a80b95ba	236	kern_return_t ret;
cf9bb588	237	unsigned int gp_count = x86_THREAD_STATE32_COUNT;
a80b95ba TG	238	int i;
	239
	240	ret = thread_get_state
cf9bb588	241	(current_thread, x86_THREAD_STATE32, (thread_state_t) &gp_regs,
a80b95ba TG	242	&gp_count);
	243	MACH_CHECK_ERROR (ret);
	244
	245	for (i = 0; i < I386_NUM_GREGS; i++)
	246	if (regno == -1 \|\| regno == i)
34a79281 SM	247	regcache->raw_collect
34a79281 SM	248	(i, (char *) &gp_regs + i386_darwin_thread_state_reg_offset[i]);
a80b95ba	249
cf9bb588 TG	250	ret = thread_set_state (current_thread, x86_THREAD_STATE32,
	251	(thread_state_t) &gp_regs,
	252	x86_THREAD_STATE32_COUNT);
a80b95ba TG	253	MACH_CHECK_ERROR (ret);
	254	}
	255
	256	if (regno == -1
	257	\|\| (regno >= I386_ST0_REGNUM && regno < I386_SSE_NUM_REGS))
	258	{
cf9bb588 TG	259	x86_float_state32_t fp_regs;
cf9bb588 TG	260	unsigned int fp_count = x86_FLOAT_STATE32_COUNT;
a80b95ba TG	261	kern_return_t ret;
	262
	263	ret = thread_get_state
cf9bb588	264	(current_thread, x86_FLOAT_STATE32, (thread_state_t) & fp_regs,
a80b95ba TG	265	&fp_count);
	266	MACH_CHECK_ERROR (ret);
	267
	268	i387_collect_fxsave (regcache, regno, &fp_regs.__fpu_fcw);
	269
cf9bb588 TG	270	ret = thread_set_state (current_thread, x86_FLOAT_STATE32,
	271	(thread_state_t) &fp_regs,
	272	x86_FLOAT_STATE32_COUNT);
a80b95ba TG	273	MACH_CHECK_ERROR (ret);
	274	}
	275	}
	276	}
	277
a80b95ba TG	278	/* Support for debug registers, boosted mostly from i386-linux-nat.c. */
a80b95ba TG	279
a80b95ba	280	static void
b1328b1b	281	i386_darwin_dr_set (int regnum, CORE_ADDR value)
a80b95ba	282	{
a80b95ba TG	283	thread_t current_thread;
	284	x86_debug_state_t dr_regs;
	285	kern_return_t ret;
61d82a0d	286	unsigned int dr_count;
a80b95ba TG	287
	288	gdb_assert (regnum >= 0 && regnum <= DR_CONTROL);
	289
cc6bcb54	290	current_thread = inferior_ptid.tid ();
a80b95ba	291
61d82a0d TG	292	dr_regs.dsh.flavor = x86_DEBUG_STATE;
61d82a0d TG	293	dr_regs.dsh.count = x86_DEBUG_STATE_COUNT;
a80b95ba	294	dr_count = x86_DEBUG_STATE_COUNT;
61d82a0d	295	ret = thread_get_state (current_thread, x86_DEBUG_STATE,
a80b95ba	296	(thread_state_t) &dr_regs, &dr_count);
b1328b1b	297	MACH_CHECK_ERROR (ret);
a80b95ba	298
61d82a0d	299	switch (dr_regs.dsh.flavor)
a80b95ba	300	{
61d82a0d TG	301	case x86_DEBUG_STATE32:
	302	switch (regnum)
	303	{
	304	case 0:
	305	dr_regs.uds.ds32.__dr0 = value;
	306	break;
	307	case 1:
	308	dr_regs.uds.ds32.__dr1 = value;
	309	break;
	310	case 2:
	311	dr_regs.uds.ds32.__dr2 = value;
	312	break;
	313	case 3:
	314	dr_regs.uds.ds32.__dr3 = value;
	315	break;
	316	case 4:
	317	dr_regs.uds.ds32.__dr4 = value;
	318	break;
	319	case 5:
	320	dr_regs.uds.ds32.__dr5 = value;
	321	break;
	322	case 6:
	323	dr_regs.uds.ds32.__dr6 = value;
	324	break;
	325	case 7:
	326	dr_regs.uds.ds32.__dr7 = value;
	327	break;
	328	}
	329	break;
	330	#ifdef BFD64
	331	case x86_DEBUG_STATE64:
	332	switch (regnum)
	333	{
	334	case 0:
	335	dr_regs.uds.ds64.__dr0 = value;
	336	break;
	337	case 1:
	338	dr_regs.uds.ds64.__dr1 = value;
	339	break;
	340	case 2:
	341	dr_regs.uds.ds64.__dr2 = value;
	342	break;
	343	case 3:
	344	dr_regs.uds.ds64.__dr3 = value;
	345	break;
	346	case 4:
	347	dr_regs.uds.ds64.__dr4 = value;
	348	break;
	349	case 5:
	350	dr_regs.uds.ds64.__dr5 = value;
	351	break;
	352	case 6:
	353	dr_regs.uds.ds64.__dr6 = value;
	354	break;
	355	case 7:
	356	dr_regs.uds.ds64.__dr7 = value;
	357	break;
	358	}
	359	break;
	360	#endif
a80b95ba TG	361	}
a80b95ba TG	362
b1328b1b TG	363	ret = thread_set_state (current_thread, dr_regs.dsh.flavor,
b1328b1b TG	364	(thread_state_t) &dr_regs.uds, dr_count);
a80b95ba	365
b1328b1b	366	MACH_CHECK_ERROR (ret);
a80b95ba TG	367	}
a80b95ba TG	368
b1328b1b	369	static CORE_ADDR
a80b95ba TG	370	i386_darwin_dr_get (int regnum)
	371	{
	372	thread_t current_thread;
	373	x86_debug_state_t dr_regs;
	374	kern_return_t ret;
61d82a0d	375	unsigned int dr_count;
a80b95ba TG	376
	377	gdb_assert (regnum >= 0 && regnum <= DR_CONTROL);
	378
cc6bcb54	379	current_thread = inferior_ptid.tid ();
a80b95ba	380
61d82a0d TG	381	dr_regs.dsh.flavor = x86_DEBUG_STATE;
61d82a0d TG	382	dr_regs.dsh.count = x86_DEBUG_STATE_COUNT;
a80b95ba	383	dr_count = x86_DEBUG_STATE_COUNT;
61d82a0d	384	ret = thread_get_state (current_thread, x86_DEBUG_STATE,
a80b95ba	385	(thread_state_t) &dr_regs, &dr_count);
b1328b1b	386	MACH_CHECK_ERROR (ret);
a80b95ba	387
61d82a0d	388	switch (dr_regs.dsh.flavor)
a80b95ba	389	{
61d82a0d TG	390	case x86_DEBUG_STATE32:
	391	switch (regnum)
	392	{
	393	case 0:
	394	return dr_regs.uds.ds32.__dr0;
	395	case 1:
	396	return dr_regs.uds.ds32.__dr1;
	397	case 2:
	398	return dr_regs.uds.ds32.__dr2;
	399	case 3:
	400	return dr_regs.uds.ds32.__dr3;
	401	case 4:
	402	return dr_regs.uds.ds32.__dr4;
	403	case 5:
	404	return dr_regs.uds.ds32.__dr5;
	405	case 6:
	406	return dr_regs.uds.ds32.__dr6;
	407	case 7:
	408	return dr_regs.uds.ds32.__dr7;
	409	default:
	410	return -1;
	411	}
	412	break;
	413	#ifdef BFD64
	414	case x86_DEBUG_STATE64:
	415	switch (regnum)
	416	{
	417	case 0:
	418	return dr_regs.uds.ds64.__dr0;
	419	case 1:
	420	return dr_regs.uds.ds64.__dr1;
	421	case 2:
	422	return dr_regs.uds.ds64.__dr2;
	423	case 3:
	424	return dr_regs.uds.ds64.__dr3;
	425	case 4:
	426	return dr_regs.uds.ds64.__dr4;
	427	case 5:
	428	return dr_regs.uds.ds64.__dr5;
	429	case 6:
	430	return dr_regs.uds.ds64.__dr6;
	431	case 7:
	432	return dr_regs.uds.ds64.__dr7;
	433	default:
	434	return -1;
	435	}
	436	break;
	437	#endif
	438	default:
	439	return -1;
a80b95ba TG	440	}
	441	}
	442
61d82a0d	443	static void
a80b95ba TG	444	i386_darwin_dr_set_control (unsigned long control)
	445	{
	446	i386_darwin_dr_set (DR_CONTROL, control);
	447	}
	448
61d82a0d	449	static void
a80b95ba TG	450	i386_darwin_dr_set_addr (int regnum, CORE_ADDR addr)
	451	{
	452	gdb_assert (regnum >= 0 && regnum <= DR_LASTADDR - DR_FIRSTADDR);
	453
	454	i386_darwin_dr_set (DR_FIRSTADDR + regnum, addr);
	455	}
	456
61d82a0d	457	static CORE_ADDR
7b50312a	458	i386_darwin_dr_get_addr (int regnum)
a80b95ba	459	{
7b50312a	460	return i386_darwin_dr_get (regnum);
a80b95ba TG	461	}
a80b95ba TG	462
61d82a0d	463	static unsigned long
a80b95ba TG	464	i386_darwin_dr_get_status (void)
	465	{
	466	return i386_darwin_dr_get (DR_STATUS);
	467	}
	468
61d82a0d	469	static unsigned long
7b50312a PA	470	i386_darwin_dr_get_control (void)
	471	{
	472	return i386_darwin_dr_get (DR_CONTROL);
	473	}
	474
a80b95ba TG	475	void
	476	darwin_check_osabi (darwin_inferior *inf, thread_t thread)
	477	{
f5656ead	478	if (gdbarch_osabi (target_gdbarch ()) == GDB_OSABI_UNKNOWN)
a80b95ba TG	479	{
	480	/* Attaching to a process. Let's figure out what kind it is. */
	481	x86_thread_state_t gp_regs;
	482	struct gdbarch_info info;
	483	unsigned int gp_count = x86_THREAD_STATE_COUNT;
	484	kern_return_t ret;
	485
	486	ret = thread_get_state (thread, x86_THREAD_STATE,
	487	(thread_state_t) &gp_regs, &gp_count);
	488	if (ret != KERN_SUCCESS)
	489	{
	490	MACH_CHECK_ERROR (ret);
	491	return;
	492	}
	493
	494	gdbarch_info_init (&info);
	495	gdbarch_info_fill (&info);
f5656ead	496	info.byte_order = gdbarch_byte_order (target_gdbarch ());
a80b95ba TG	497	info.osabi = GDB_OSABI_DARWIN;
	498	if (gp_regs.tsh.flavor == x86_THREAD_STATE64)
	499	info.bfd_arch_info = bfd_lookup_arch (bfd_arch_i386,
	500	bfd_mach_x86_64);
	501	else
61d82a0d	502	info.bfd_arch_info = bfd_lookup_arch (bfd_arch_i386,
a80b95ba TG	503	bfd_mach_i386_i386);
	504	gdbarch_update_p (info);
	505	}
	506	}
	507
	508	#define X86_EFLAGS_T 0x100UL
	509
acdb24a9 TG	510	/* Returning from a signal trampoline is done by calling a
	511	special system call (sigreturn). This system call
	512	restores the registers that were saved when the signal was
	513	raised, including %eflags/%rflags. That means that single-stepping
	514	won't work. Instead, we'll have to modify the signal context
	515	that's about to be restored, and set the trace flag there. */
	516
	517	static int
	518	i386_darwin_sstep_at_sigreturn (x86_thread_state_t *regs)
	519	{
f5656ead	520	enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ());
acdb24a9 TG	521	static const gdb_byte darwin_syscall[] = { 0xcd, 0x80 }; /* int 0x80 */
	522	gdb_byte buf[sizeof (darwin_syscall)];
	523
	524	/* Check if PC is at a sigreturn system call. */
	525	if (target_read_memory (regs->uts.ts32.__eip, buf, sizeof (buf)) == 0
	526	&& memcmp (buf, darwin_syscall, sizeof (darwin_syscall)) == 0
	527	&& regs->uts.ts32.__eax == 0xb8 /* SYS_sigreturn */)
	528	{
	529	ULONGEST uctx_addr;
	530	ULONGEST mctx_addr;
	531	ULONGEST flags_addr;
	532	unsigned int eflags;
	533
e17a4113 UW	534	uctx_addr = read_memory_unsigned_integer
	535	(regs->uts.ts32.__esp + 4, 4, byte_order);
	536	mctx_addr = read_memory_unsigned_integer
	537	(uctx_addr + 28, 4, byte_order);
acdb24a9 TG	538
	539	flags_addr = mctx_addr + 12 + 9 * 4;
	540	read_memory (flags_addr, (gdb_byte *) &eflags, 4);
	541	eflags \|= X86_EFLAGS_T;
	542	write_memory (flags_addr, (gdb_byte *) &eflags, 4);
	543
	544	return 1;
	545	}
	546	return 0;
	547	}
	548
5cd226f2	549	#ifdef BFD64
acdb24a9 TG	550	static int
	551	amd64_darwin_sstep_at_sigreturn (x86_thread_state_t *regs)
	552	{
f5656ead	553	enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ());
acdb24a9 TG	554	static const gdb_byte darwin_syscall[] = { 0x0f, 0x05 }; /* syscall */
	555	gdb_byte buf[sizeof (darwin_syscall)];
	556
	557	/* Check if PC is at a sigreturn system call. */
	558	if (target_read_memory (regs->uts.ts64.__rip, buf, sizeof (buf)) == 0
	559	&& memcmp (buf, darwin_syscall, sizeof (darwin_syscall)) == 0
	560	&& (regs->uts.ts64.__rax & 0xffffffff) == 0x20000b8 /* SYS_sigreturn */)
	561	{
	562	ULONGEST mctx_addr;
	563	ULONGEST flags_addr;
	564	unsigned int rflags;
	565
e17a4113 UW	566	mctx_addr = read_memory_unsigned_integer
e17a4113 UW	567	(regs->uts.ts64.__rdi + 48, 8, byte_order);
acdb24a9 TG	568	flags_addr = mctx_addr + 16 + 17 * 8;
	569
	570	/* AMD64 is little endian. */
	571	read_memory (flags_addr, (gdb_byte *) &rflags, 4);
	572	rflags \|= X86_EFLAGS_T;
	573	write_memory (flags_addr, (gdb_byte *) &rflags, 4);
	574
	575	return 1;
	576	}
	577	return 0;
	578	}
5cd226f2	579	#endif
acdb24a9	580
a80b95ba TG	581	void
	582	darwin_set_sstep (thread_t thread, int enable)
	583	{
	584	x86_thread_state_t regs;
	585	unsigned int count = x86_THREAD_STATE_COUNT;
	586	kern_return_t kret;
	587
	588	kret = thread_get_state (thread, x86_THREAD_STATE,
	589	(thread_state_t) &regs, &count);
	590	if (kret != KERN_SUCCESS)
	591	{
	592	printf_unfiltered (_("darwin_set_sstep: error %x, thread=%x\n"),
	593	kret, thread);
	594	return;
	595	}
acdb24a9	596
a80b95ba TG	597	switch (regs.tsh.flavor)
	598	{
	599	case x86_THREAD_STATE32:
	600	{
	601	__uint32_t bit = enable ? X86_EFLAGS_T : 0;
b1328b1b	602
acdb24a9 TG	603	if (enable && i386_darwin_sstep_at_sigreturn (&regs))
acdb24a9 TG	604	return;
a80b95ba TG	605	if ((regs.uts.ts32.__eflags & X86_EFLAGS_T) == bit)
a80b95ba TG	606	return;
1777feb0 MS	607	regs.uts.ts32.__eflags
1777feb0 MS	608	= (regs.uts.ts32.__eflags & ~X86_EFLAGS_T) \| bit;
b1328b1b	609	kret = thread_set_state (thread, x86_THREAD_STATE,
a80b95ba TG	610	(thread_state_t) &regs, count);
	611	MACH_CHECK_ERROR (kret);
	612	}
	613	break;
5cd226f2	614	#ifdef BFD64
a80b95ba TG	615	case x86_THREAD_STATE64:
	616	{
	617	__uint64_t bit = enable ? X86_EFLAGS_T : 0;
	618
acdb24a9 TG	619	if (enable && amd64_darwin_sstep_at_sigreturn (&regs))
acdb24a9 TG	620	return;
a80b95ba TG	621	if ((regs.uts.ts64.__rflags & X86_EFLAGS_T) == bit)
a80b95ba TG	622	return;
1777feb0 MS	623	regs.uts.ts64.__rflags
1777feb0 MS	624	= (regs.uts.ts64.__rflags & ~X86_EFLAGS_T) \| bit;
b1328b1b	625	kret = thread_set_state (thread, x86_THREAD_STATE,
a80b95ba TG	626	(thread_state_t) &regs, count);
	627	MACH_CHECK_ERROR (kret);
	628	}
	629	break;
5cd226f2	630	#endif
a80b95ba	631	default:
b37520b6	632	error (_("darwin_set_sstep: unknown flavour: %d"), regs.tsh.flavor);
a80b95ba TG	633	}
	634	}
	635
	636	void
f6ac5f3d	637	_initialize_i386_darwin_nat (void)
a80b95ba	638	{
5cd226f2	639	#ifdef BFD64
a80b95ba TG	640	amd64_native_gregset64_reg_offset = amd64_darwin_thread_state_reg_offset;
	641	amd64_native_gregset64_num_regs = amd64_darwin_thread_state_num_regs;
	642	amd64_native_gregset32_reg_offset = i386_darwin_thread_state_reg_offset;
	643	amd64_native_gregset32_num_regs = i386_darwin_thread_state_num_regs;
5cd226f2	644	#endif
a80b95ba	645
df7e5265 GB	646	x86_dr_low.set_control = i386_darwin_dr_set_control;
	647	x86_dr_low.set_addr = i386_darwin_dr_set_addr;
	648	x86_dr_low.get_addr = i386_darwin_dr_get_addr;
	649	x86_dr_low.get_status = i386_darwin_dr_get_status;
	650	x86_dr_low.get_control = i386_darwin_dr_get_control;
61d82a0d TG	651
	652	/* Let's assume that the kernel is 64 bits iff the executable is. */
	653	#ifdef __x86_64__
df7e5265	654	x86_set_debug_register_length (8);
61d82a0d	655	#else
df7e5265	656	x86_set_debug_register_length (4);
61d82a0d TG	657	#endif
61d82a0d TG	658
d9f719f1	659	add_inf_child_target (&darwin_target);
a80b95ba	660	}